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Source file src/pkg/cmd/compile/internal/ssa/rewritePPC64.go

     1	// Code generated from gen/PPC64.rules; DO NOT EDIT.
     2	// generated with: cd gen; go run *.go
     3	
     4	package ssa
     5	
     6	import "fmt"
     7	import "math"
     8	import "cmd/internal/obj"
     9	import "cmd/internal/objabi"
    10	import "cmd/compile/internal/types"
    11	
    12	var _ = fmt.Println   // in case not otherwise used
    13	var _ = math.MinInt8  // in case not otherwise used
    14	var _ = obj.ANOP      // in case not otherwise used
    15	var _ = objabi.GOROOT // in case not otherwise used
    16	var _ = types.TypeMem // in case not otherwise used
    17	
    18	func rewriteValuePPC64(v *Value) bool {
    19		switch v.Op {
    20		case OpAbs:
    21			return rewriteValuePPC64_OpAbs_0(v)
    22		case OpAdd16:
    23			return rewriteValuePPC64_OpAdd16_0(v)
    24		case OpAdd32:
    25			return rewriteValuePPC64_OpAdd32_0(v)
    26		case OpAdd32F:
    27			return rewriteValuePPC64_OpAdd32F_0(v)
    28		case OpAdd64:
    29			return rewriteValuePPC64_OpAdd64_0(v)
    30		case OpAdd64F:
    31			return rewriteValuePPC64_OpAdd64F_0(v)
    32		case OpAdd64carry:
    33			return rewriteValuePPC64_OpAdd64carry_0(v)
    34		case OpAdd8:
    35			return rewriteValuePPC64_OpAdd8_0(v)
    36		case OpAddPtr:
    37			return rewriteValuePPC64_OpAddPtr_0(v)
    38		case OpAddr:
    39			return rewriteValuePPC64_OpAddr_0(v)
    40		case OpAnd16:
    41			return rewriteValuePPC64_OpAnd16_0(v)
    42		case OpAnd32:
    43			return rewriteValuePPC64_OpAnd32_0(v)
    44		case OpAnd64:
    45			return rewriteValuePPC64_OpAnd64_0(v)
    46		case OpAnd8:
    47			return rewriteValuePPC64_OpAnd8_0(v)
    48		case OpAndB:
    49			return rewriteValuePPC64_OpAndB_0(v)
    50		case OpAtomicAdd32:
    51			return rewriteValuePPC64_OpAtomicAdd32_0(v)
    52		case OpAtomicAdd64:
    53			return rewriteValuePPC64_OpAtomicAdd64_0(v)
    54		case OpAtomicAnd8:
    55			return rewriteValuePPC64_OpAtomicAnd8_0(v)
    56		case OpAtomicCompareAndSwap32:
    57			return rewriteValuePPC64_OpAtomicCompareAndSwap32_0(v)
    58		case OpAtomicCompareAndSwap64:
    59			return rewriteValuePPC64_OpAtomicCompareAndSwap64_0(v)
    60		case OpAtomicCompareAndSwapRel32:
    61			return rewriteValuePPC64_OpAtomicCompareAndSwapRel32_0(v)
    62		case OpAtomicExchange32:
    63			return rewriteValuePPC64_OpAtomicExchange32_0(v)
    64		case OpAtomicExchange64:
    65			return rewriteValuePPC64_OpAtomicExchange64_0(v)
    66		case OpAtomicLoad32:
    67			return rewriteValuePPC64_OpAtomicLoad32_0(v)
    68		case OpAtomicLoad64:
    69			return rewriteValuePPC64_OpAtomicLoad64_0(v)
    70		case OpAtomicLoad8:
    71			return rewriteValuePPC64_OpAtomicLoad8_0(v)
    72		case OpAtomicLoadAcq32:
    73			return rewriteValuePPC64_OpAtomicLoadAcq32_0(v)
    74		case OpAtomicLoadPtr:
    75			return rewriteValuePPC64_OpAtomicLoadPtr_0(v)
    76		case OpAtomicOr8:
    77			return rewriteValuePPC64_OpAtomicOr8_0(v)
    78		case OpAtomicStore32:
    79			return rewriteValuePPC64_OpAtomicStore32_0(v)
    80		case OpAtomicStore64:
    81			return rewriteValuePPC64_OpAtomicStore64_0(v)
    82		case OpAtomicStoreRel32:
    83			return rewriteValuePPC64_OpAtomicStoreRel32_0(v)
    84		case OpAvg64u:
    85			return rewriteValuePPC64_OpAvg64u_0(v)
    86		case OpBitLen32:
    87			return rewriteValuePPC64_OpBitLen32_0(v)
    88		case OpBitLen64:
    89			return rewriteValuePPC64_OpBitLen64_0(v)
    90		case OpCeil:
    91			return rewriteValuePPC64_OpCeil_0(v)
    92		case OpClosureCall:
    93			return rewriteValuePPC64_OpClosureCall_0(v)
    94		case OpCom16:
    95			return rewriteValuePPC64_OpCom16_0(v)
    96		case OpCom32:
    97			return rewriteValuePPC64_OpCom32_0(v)
    98		case OpCom64:
    99			return rewriteValuePPC64_OpCom64_0(v)
   100		case OpCom8:
   101			return rewriteValuePPC64_OpCom8_0(v)
   102		case OpConst16:
   103			return rewriteValuePPC64_OpConst16_0(v)
   104		case OpConst32:
   105			return rewriteValuePPC64_OpConst32_0(v)
   106		case OpConst32F:
   107			return rewriteValuePPC64_OpConst32F_0(v)
   108		case OpConst64:
   109			return rewriteValuePPC64_OpConst64_0(v)
   110		case OpConst64F:
   111			return rewriteValuePPC64_OpConst64F_0(v)
   112		case OpConst8:
   113			return rewriteValuePPC64_OpConst8_0(v)
   114		case OpConstBool:
   115			return rewriteValuePPC64_OpConstBool_0(v)
   116		case OpConstNil:
   117			return rewriteValuePPC64_OpConstNil_0(v)
   118		case OpCopysign:
   119			return rewriteValuePPC64_OpCopysign_0(v)
   120		case OpCtz16:
   121			return rewriteValuePPC64_OpCtz16_0(v)
   122		case OpCtz32:
   123			return rewriteValuePPC64_OpCtz32_0(v)
   124		case OpCtz32NonZero:
   125			return rewriteValuePPC64_OpCtz32NonZero_0(v)
   126		case OpCtz64:
   127			return rewriteValuePPC64_OpCtz64_0(v)
   128		case OpCtz64NonZero:
   129			return rewriteValuePPC64_OpCtz64NonZero_0(v)
   130		case OpCtz8:
   131			return rewriteValuePPC64_OpCtz8_0(v)
   132		case OpCvt32Fto32:
   133			return rewriteValuePPC64_OpCvt32Fto32_0(v)
   134		case OpCvt32Fto64:
   135			return rewriteValuePPC64_OpCvt32Fto64_0(v)
   136		case OpCvt32Fto64F:
   137			return rewriteValuePPC64_OpCvt32Fto64F_0(v)
   138		case OpCvt32to32F:
   139			return rewriteValuePPC64_OpCvt32to32F_0(v)
   140		case OpCvt32to64F:
   141			return rewriteValuePPC64_OpCvt32to64F_0(v)
   142		case OpCvt64Fto32:
   143			return rewriteValuePPC64_OpCvt64Fto32_0(v)
   144		case OpCvt64Fto32F:
   145			return rewriteValuePPC64_OpCvt64Fto32F_0(v)
   146		case OpCvt64Fto64:
   147			return rewriteValuePPC64_OpCvt64Fto64_0(v)
   148		case OpCvt64to32F:
   149			return rewriteValuePPC64_OpCvt64to32F_0(v)
   150		case OpCvt64to64F:
   151			return rewriteValuePPC64_OpCvt64to64F_0(v)
   152		case OpDiv16:
   153			return rewriteValuePPC64_OpDiv16_0(v)
   154		case OpDiv16u:
   155			return rewriteValuePPC64_OpDiv16u_0(v)
   156		case OpDiv32:
   157			return rewriteValuePPC64_OpDiv32_0(v)
   158		case OpDiv32F:
   159			return rewriteValuePPC64_OpDiv32F_0(v)
   160		case OpDiv32u:
   161			return rewriteValuePPC64_OpDiv32u_0(v)
   162		case OpDiv64:
   163			return rewriteValuePPC64_OpDiv64_0(v)
   164		case OpDiv64F:
   165			return rewriteValuePPC64_OpDiv64F_0(v)
   166		case OpDiv64u:
   167			return rewriteValuePPC64_OpDiv64u_0(v)
   168		case OpDiv8:
   169			return rewriteValuePPC64_OpDiv8_0(v)
   170		case OpDiv8u:
   171			return rewriteValuePPC64_OpDiv8u_0(v)
   172		case OpEq16:
   173			return rewriteValuePPC64_OpEq16_0(v)
   174		case OpEq32:
   175			return rewriteValuePPC64_OpEq32_0(v)
   176		case OpEq32F:
   177			return rewriteValuePPC64_OpEq32F_0(v)
   178		case OpEq64:
   179			return rewriteValuePPC64_OpEq64_0(v)
   180		case OpEq64F:
   181			return rewriteValuePPC64_OpEq64F_0(v)
   182		case OpEq8:
   183			return rewriteValuePPC64_OpEq8_0(v)
   184		case OpEqB:
   185			return rewriteValuePPC64_OpEqB_0(v)
   186		case OpEqPtr:
   187			return rewriteValuePPC64_OpEqPtr_0(v)
   188		case OpFloor:
   189			return rewriteValuePPC64_OpFloor_0(v)
   190		case OpGeq16:
   191			return rewriteValuePPC64_OpGeq16_0(v)
   192		case OpGeq16U:
   193			return rewriteValuePPC64_OpGeq16U_0(v)
   194		case OpGeq32:
   195			return rewriteValuePPC64_OpGeq32_0(v)
   196		case OpGeq32F:
   197			return rewriteValuePPC64_OpGeq32F_0(v)
   198		case OpGeq32U:
   199			return rewriteValuePPC64_OpGeq32U_0(v)
   200		case OpGeq64:
   201			return rewriteValuePPC64_OpGeq64_0(v)
   202		case OpGeq64F:
   203			return rewriteValuePPC64_OpGeq64F_0(v)
   204		case OpGeq64U:
   205			return rewriteValuePPC64_OpGeq64U_0(v)
   206		case OpGeq8:
   207			return rewriteValuePPC64_OpGeq8_0(v)
   208		case OpGeq8U:
   209			return rewriteValuePPC64_OpGeq8U_0(v)
   210		case OpGetCallerPC:
   211			return rewriteValuePPC64_OpGetCallerPC_0(v)
   212		case OpGetCallerSP:
   213			return rewriteValuePPC64_OpGetCallerSP_0(v)
   214		case OpGetClosurePtr:
   215			return rewriteValuePPC64_OpGetClosurePtr_0(v)
   216		case OpGreater16:
   217			return rewriteValuePPC64_OpGreater16_0(v)
   218		case OpGreater16U:
   219			return rewriteValuePPC64_OpGreater16U_0(v)
   220		case OpGreater32:
   221			return rewriteValuePPC64_OpGreater32_0(v)
   222		case OpGreater32F:
   223			return rewriteValuePPC64_OpGreater32F_0(v)
   224		case OpGreater32U:
   225			return rewriteValuePPC64_OpGreater32U_0(v)
   226		case OpGreater64:
   227			return rewriteValuePPC64_OpGreater64_0(v)
   228		case OpGreater64F:
   229			return rewriteValuePPC64_OpGreater64F_0(v)
   230		case OpGreater64U:
   231			return rewriteValuePPC64_OpGreater64U_0(v)
   232		case OpGreater8:
   233			return rewriteValuePPC64_OpGreater8_0(v)
   234		case OpGreater8U:
   235			return rewriteValuePPC64_OpGreater8U_0(v)
   236		case OpHmul32:
   237			return rewriteValuePPC64_OpHmul32_0(v)
   238		case OpHmul32u:
   239			return rewriteValuePPC64_OpHmul32u_0(v)
   240		case OpHmul64:
   241			return rewriteValuePPC64_OpHmul64_0(v)
   242		case OpHmul64u:
   243			return rewriteValuePPC64_OpHmul64u_0(v)
   244		case OpInterCall:
   245			return rewriteValuePPC64_OpInterCall_0(v)
   246		case OpIsInBounds:
   247			return rewriteValuePPC64_OpIsInBounds_0(v)
   248		case OpIsNonNil:
   249			return rewriteValuePPC64_OpIsNonNil_0(v)
   250		case OpIsSliceInBounds:
   251			return rewriteValuePPC64_OpIsSliceInBounds_0(v)
   252		case OpLeq16:
   253			return rewriteValuePPC64_OpLeq16_0(v)
   254		case OpLeq16U:
   255			return rewriteValuePPC64_OpLeq16U_0(v)
   256		case OpLeq32:
   257			return rewriteValuePPC64_OpLeq32_0(v)
   258		case OpLeq32F:
   259			return rewriteValuePPC64_OpLeq32F_0(v)
   260		case OpLeq32U:
   261			return rewriteValuePPC64_OpLeq32U_0(v)
   262		case OpLeq64:
   263			return rewriteValuePPC64_OpLeq64_0(v)
   264		case OpLeq64F:
   265			return rewriteValuePPC64_OpLeq64F_0(v)
   266		case OpLeq64U:
   267			return rewriteValuePPC64_OpLeq64U_0(v)
   268		case OpLeq8:
   269			return rewriteValuePPC64_OpLeq8_0(v)
   270		case OpLeq8U:
   271			return rewriteValuePPC64_OpLeq8U_0(v)
   272		case OpLess16:
   273			return rewriteValuePPC64_OpLess16_0(v)
   274		case OpLess16U:
   275			return rewriteValuePPC64_OpLess16U_0(v)
   276		case OpLess32:
   277			return rewriteValuePPC64_OpLess32_0(v)
   278		case OpLess32F:
   279			return rewriteValuePPC64_OpLess32F_0(v)
   280		case OpLess32U:
   281			return rewriteValuePPC64_OpLess32U_0(v)
   282		case OpLess64:
   283			return rewriteValuePPC64_OpLess64_0(v)
   284		case OpLess64F:
   285			return rewriteValuePPC64_OpLess64F_0(v)
   286		case OpLess64U:
   287			return rewriteValuePPC64_OpLess64U_0(v)
   288		case OpLess8:
   289			return rewriteValuePPC64_OpLess8_0(v)
   290		case OpLess8U:
   291			return rewriteValuePPC64_OpLess8U_0(v)
   292		case OpLoad:
   293			return rewriteValuePPC64_OpLoad_0(v)
   294		case OpLocalAddr:
   295			return rewriteValuePPC64_OpLocalAddr_0(v)
   296		case OpLsh16x16:
   297			return rewriteValuePPC64_OpLsh16x16_0(v)
   298		case OpLsh16x32:
   299			return rewriteValuePPC64_OpLsh16x32_0(v)
   300		case OpLsh16x64:
   301			return rewriteValuePPC64_OpLsh16x64_0(v)
   302		case OpLsh16x8:
   303			return rewriteValuePPC64_OpLsh16x8_0(v)
   304		case OpLsh32x16:
   305			return rewriteValuePPC64_OpLsh32x16_0(v)
   306		case OpLsh32x32:
   307			return rewriteValuePPC64_OpLsh32x32_0(v)
   308		case OpLsh32x64:
   309			return rewriteValuePPC64_OpLsh32x64_0(v)
   310		case OpLsh32x8:
   311			return rewriteValuePPC64_OpLsh32x8_0(v)
   312		case OpLsh64x16:
   313			return rewriteValuePPC64_OpLsh64x16_0(v)
   314		case OpLsh64x32:
   315			return rewriteValuePPC64_OpLsh64x32_0(v)
   316		case OpLsh64x64:
   317			return rewriteValuePPC64_OpLsh64x64_0(v)
   318		case OpLsh64x8:
   319			return rewriteValuePPC64_OpLsh64x8_0(v)
   320		case OpLsh8x16:
   321			return rewriteValuePPC64_OpLsh8x16_0(v)
   322		case OpLsh8x32:
   323			return rewriteValuePPC64_OpLsh8x32_0(v)
   324		case OpLsh8x64:
   325			return rewriteValuePPC64_OpLsh8x64_0(v)
   326		case OpLsh8x8:
   327			return rewriteValuePPC64_OpLsh8x8_0(v)
   328		case OpMod16:
   329			return rewriteValuePPC64_OpMod16_0(v)
   330		case OpMod16u:
   331			return rewriteValuePPC64_OpMod16u_0(v)
   332		case OpMod32:
   333			return rewriteValuePPC64_OpMod32_0(v)
   334		case OpMod32u:
   335			return rewriteValuePPC64_OpMod32u_0(v)
   336		case OpMod64:
   337			return rewriteValuePPC64_OpMod64_0(v)
   338		case OpMod64u:
   339			return rewriteValuePPC64_OpMod64u_0(v)
   340		case OpMod8:
   341			return rewriteValuePPC64_OpMod8_0(v)
   342		case OpMod8u:
   343			return rewriteValuePPC64_OpMod8u_0(v)
   344		case OpMove:
   345			return rewriteValuePPC64_OpMove_0(v) || rewriteValuePPC64_OpMove_10(v)
   346		case OpMul16:
   347			return rewriteValuePPC64_OpMul16_0(v)
   348		case OpMul32:
   349			return rewriteValuePPC64_OpMul32_0(v)
   350		case OpMul32F:
   351			return rewriteValuePPC64_OpMul32F_0(v)
   352		case OpMul64:
   353			return rewriteValuePPC64_OpMul64_0(v)
   354		case OpMul64F:
   355			return rewriteValuePPC64_OpMul64F_0(v)
   356		case OpMul64uhilo:
   357			return rewriteValuePPC64_OpMul64uhilo_0(v)
   358		case OpMul8:
   359			return rewriteValuePPC64_OpMul8_0(v)
   360		case OpNeg16:
   361			return rewriteValuePPC64_OpNeg16_0(v)
   362		case OpNeg32:
   363			return rewriteValuePPC64_OpNeg32_0(v)
   364		case OpNeg32F:
   365			return rewriteValuePPC64_OpNeg32F_0(v)
   366		case OpNeg64:
   367			return rewriteValuePPC64_OpNeg64_0(v)
   368		case OpNeg64F:
   369			return rewriteValuePPC64_OpNeg64F_0(v)
   370		case OpNeg8:
   371			return rewriteValuePPC64_OpNeg8_0(v)
   372		case OpNeq16:
   373			return rewriteValuePPC64_OpNeq16_0(v)
   374		case OpNeq32:
   375			return rewriteValuePPC64_OpNeq32_0(v)
   376		case OpNeq32F:
   377			return rewriteValuePPC64_OpNeq32F_0(v)
   378		case OpNeq64:
   379			return rewriteValuePPC64_OpNeq64_0(v)
   380		case OpNeq64F:
   381			return rewriteValuePPC64_OpNeq64F_0(v)
   382		case OpNeq8:
   383			return rewriteValuePPC64_OpNeq8_0(v)
   384		case OpNeqB:
   385			return rewriteValuePPC64_OpNeqB_0(v)
   386		case OpNeqPtr:
   387			return rewriteValuePPC64_OpNeqPtr_0(v)
   388		case OpNilCheck:
   389			return rewriteValuePPC64_OpNilCheck_0(v)
   390		case OpNot:
   391			return rewriteValuePPC64_OpNot_0(v)
   392		case OpOffPtr:
   393			return rewriteValuePPC64_OpOffPtr_0(v)
   394		case OpOr16:
   395			return rewriteValuePPC64_OpOr16_0(v)
   396		case OpOr32:
   397			return rewriteValuePPC64_OpOr32_0(v)
   398		case OpOr64:
   399			return rewriteValuePPC64_OpOr64_0(v)
   400		case OpOr8:
   401			return rewriteValuePPC64_OpOr8_0(v)
   402		case OpOrB:
   403			return rewriteValuePPC64_OpOrB_0(v)
   404		case OpPPC64ADD:
   405			return rewriteValuePPC64_OpPPC64ADD_0(v)
   406		case OpPPC64ADDconst:
   407			return rewriteValuePPC64_OpPPC64ADDconst_0(v)
   408		case OpPPC64AND:
   409			return rewriteValuePPC64_OpPPC64AND_0(v) || rewriteValuePPC64_OpPPC64AND_10(v)
   410		case OpPPC64ANDconst:
   411			return rewriteValuePPC64_OpPPC64ANDconst_0(v) || rewriteValuePPC64_OpPPC64ANDconst_10(v)
   412		case OpPPC64CMP:
   413			return rewriteValuePPC64_OpPPC64CMP_0(v)
   414		case OpPPC64CMPU:
   415			return rewriteValuePPC64_OpPPC64CMPU_0(v)
   416		case OpPPC64CMPUconst:
   417			return rewriteValuePPC64_OpPPC64CMPUconst_0(v)
   418		case OpPPC64CMPW:
   419			return rewriteValuePPC64_OpPPC64CMPW_0(v)
   420		case OpPPC64CMPWU:
   421			return rewriteValuePPC64_OpPPC64CMPWU_0(v)
   422		case OpPPC64CMPWUconst:
   423			return rewriteValuePPC64_OpPPC64CMPWUconst_0(v)
   424		case OpPPC64CMPWconst:
   425			return rewriteValuePPC64_OpPPC64CMPWconst_0(v)
   426		case OpPPC64CMPconst:
   427			return rewriteValuePPC64_OpPPC64CMPconst_0(v)
   428		case OpPPC64Equal:
   429			return rewriteValuePPC64_OpPPC64Equal_0(v)
   430		case OpPPC64FABS:
   431			return rewriteValuePPC64_OpPPC64FABS_0(v)
   432		case OpPPC64FADD:
   433			return rewriteValuePPC64_OpPPC64FADD_0(v)
   434		case OpPPC64FADDS:
   435			return rewriteValuePPC64_OpPPC64FADDS_0(v)
   436		case OpPPC64FCEIL:
   437			return rewriteValuePPC64_OpPPC64FCEIL_0(v)
   438		case OpPPC64FFLOOR:
   439			return rewriteValuePPC64_OpPPC64FFLOOR_0(v)
   440		case OpPPC64FMOVDload:
   441			return rewriteValuePPC64_OpPPC64FMOVDload_0(v)
   442		case OpPPC64FMOVDstore:
   443			return rewriteValuePPC64_OpPPC64FMOVDstore_0(v)
   444		case OpPPC64FMOVSload:
   445			return rewriteValuePPC64_OpPPC64FMOVSload_0(v)
   446		case OpPPC64FMOVSstore:
   447			return rewriteValuePPC64_OpPPC64FMOVSstore_0(v)
   448		case OpPPC64FNEG:
   449			return rewriteValuePPC64_OpPPC64FNEG_0(v)
   450		case OpPPC64FSQRT:
   451			return rewriteValuePPC64_OpPPC64FSQRT_0(v)
   452		case OpPPC64FSUB:
   453			return rewriteValuePPC64_OpPPC64FSUB_0(v)
   454		case OpPPC64FSUBS:
   455			return rewriteValuePPC64_OpPPC64FSUBS_0(v)
   456		case OpPPC64FTRUNC:
   457			return rewriteValuePPC64_OpPPC64FTRUNC_0(v)
   458		case OpPPC64GreaterEqual:
   459			return rewriteValuePPC64_OpPPC64GreaterEqual_0(v)
   460		case OpPPC64GreaterThan:
   461			return rewriteValuePPC64_OpPPC64GreaterThan_0(v)
   462		case OpPPC64LessEqual:
   463			return rewriteValuePPC64_OpPPC64LessEqual_0(v)
   464		case OpPPC64LessThan:
   465			return rewriteValuePPC64_OpPPC64LessThan_0(v)
   466		case OpPPC64MFVSRD:
   467			return rewriteValuePPC64_OpPPC64MFVSRD_0(v)
   468		case OpPPC64MOVBZload:
   469			return rewriteValuePPC64_OpPPC64MOVBZload_0(v)
   470		case OpPPC64MOVBZloadidx:
   471			return rewriteValuePPC64_OpPPC64MOVBZloadidx_0(v)
   472		case OpPPC64MOVBZreg:
   473			return rewriteValuePPC64_OpPPC64MOVBZreg_0(v) || rewriteValuePPC64_OpPPC64MOVBZreg_10(v)
   474		case OpPPC64MOVBreg:
   475			return rewriteValuePPC64_OpPPC64MOVBreg_0(v) || rewriteValuePPC64_OpPPC64MOVBreg_10(v)
   476		case OpPPC64MOVBstore:
   477			return rewriteValuePPC64_OpPPC64MOVBstore_0(v) || rewriteValuePPC64_OpPPC64MOVBstore_10(v) || rewriteValuePPC64_OpPPC64MOVBstore_20(v)
   478		case OpPPC64MOVBstoreidx:
   479			return rewriteValuePPC64_OpPPC64MOVBstoreidx_0(v) || rewriteValuePPC64_OpPPC64MOVBstoreidx_10(v)
   480		case OpPPC64MOVBstorezero:
   481			return rewriteValuePPC64_OpPPC64MOVBstorezero_0(v)
   482		case OpPPC64MOVDload:
   483			return rewriteValuePPC64_OpPPC64MOVDload_0(v)
   484		case OpPPC64MOVDloadidx:
   485			return rewriteValuePPC64_OpPPC64MOVDloadidx_0(v)
   486		case OpPPC64MOVDstore:
   487			return rewriteValuePPC64_OpPPC64MOVDstore_0(v)
   488		case OpPPC64MOVDstoreidx:
   489			return rewriteValuePPC64_OpPPC64MOVDstoreidx_0(v)
   490		case OpPPC64MOVDstorezero:
   491			return rewriteValuePPC64_OpPPC64MOVDstorezero_0(v)
   492		case OpPPC64MOVHBRstore:
   493			return rewriteValuePPC64_OpPPC64MOVHBRstore_0(v)
   494		case OpPPC64MOVHZload:
   495			return rewriteValuePPC64_OpPPC64MOVHZload_0(v)
   496		case OpPPC64MOVHZloadidx:
   497			return rewriteValuePPC64_OpPPC64MOVHZloadidx_0(v)
   498		case OpPPC64MOVHZreg:
   499			return rewriteValuePPC64_OpPPC64MOVHZreg_0(v) || rewriteValuePPC64_OpPPC64MOVHZreg_10(v)
   500		case OpPPC64MOVHload:
   501			return rewriteValuePPC64_OpPPC64MOVHload_0(v)
   502		case OpPPC64MOVHloadidx:
   503			return rewriteValuePPC64_OpPPC64MOVHloadidx_0(v)
   504		case OpPPC64MOVHreg:
   505			return rewriteValuePPC64_OpPPC64MOVHreg_0(v) || rewriteValuePPC64_OpPPC64MOVHreg_10(v)
   506		case OpPPC64MOVHstore:
   507			return rewriteValuePPC64_OpPPC64MOVHstore_0(v)
   508		case OpPPC64MOVHstoreidx:
   509			return rewriteValuePPC64_OpPPC64MOVHstoreidx_0(v)
   510		case OpPPC64MOVHstorezero:
   511			return rewriteValuePPC64_OpPPC64MOVHstorezero_0(v)
   512		case OpPPC64MOVWBRstore:
   513			return rewriteValuePPC64_OpPPC64MOVWBRstore_0(v)
   514		case OpPPC64MOVWZload:
   515			return rewriteValuePPC64_OpPPC64MOVWZload_0(v)
   516		case OpPPC64MOVWZloadidx:
   517			return rewriteValuePPC64_OpPPC64MOVWZloadidx_0(v)
   518		case OpPPC64MOVWZreg:
   519			return rewriteValuePPC64_OpPPC64MOVWZreg_0(v) || rewriteValuePPC64_OpPPC64MOVWZreg_10(v) || rewriteValuePPC64_OpPPC64MOVWZreg_20(v)
   520		case OpPPC64MOVWload:
   521			return rewriteValuePPC64_OpPPC64MOVWload_0(v)
   522		case OpPPC64MOVWloadidx:
   523			return rewriteValuePPC64_OpPPC64MOVWloadidx_0(v)
   524		case OpPPC64MOVWreg:
   525			return rewriteValuePPC64_OpPPC64MOVWreg_0(v) || rewriteValuePPC64_OpPPC64MOVWreg_10(v)
   526		case OpPPC64MOVWstore:
   527			return rewriteValuePPC64_OpPPC64MOVWstore_0(v)
   528		case OpPPC64MOVWstoreidx:
   529			return rewriteValuePPC64_OpPPC64MOVWstoreidx_0(v)
   530		case OpPPC64MOVWstorezero:
   531			return rewriteValuePPC64_OpPPC64MOVWstorezero_0(v)
   532		case OpPPC64MTVSRD:
   533			return rewriteValuePPC64_OpPPC64MTVSRD_0(v)
   534		case OpPPC64MaskIfNotCarry:
   535			return rewriteValuePPC64_OpPPC64MaskIfNotCarry_0(v)
   536		case OpPPC64NotEqual:
   537			return rewriteValuePPC64_OpPPC64NotEqual_0(v)
   538		case OpPPC64OR:
   539			return rewriteValuePPC64_OpPPC64OR_0(v) || rewriteValuePPC64_OpPPC64OR_10(v) || rewriteValuePPC64_OpPPC64OR_20(v) || rewriteValuePPC64_OpPPC64OR_30(v) || rewriteValuePPC64_OpPPC64OR_40(v) || rewriteValuePPC64_OpPPC64OR_50(v) || rewriteValuePPC64_OpPPC64OR_60(v) || rewriteValuePPC64_OpPPC64OR_70(v) || rewriteValuePPC64_OpPPC64OR_80(v) || rewriteValuePPC64_OpPPC64OR_90(v) || rewriteValuePPC64_OpPPC64OR_100(v) || rewriteValuePPC64_OpPPC64OR_110(v)
   540		case OpPPC64ORN:
   541			return rewriteValuePPC64_OpPPC64ORN_0(v)
   542		case OpPPC64ORconst:
   543			return rewriteValuePPC64_OpPPC64ORconst_0(v)
   544		case OpPPC64ROTL:
   545			return rewriteValuePPC64_OpPPC64ROTL_0(v)
   546		case OpPPC64ROTLW:
   547			return rewriteValuePPC64_OpPPC64ROTLW_0(v)
   548		case OpPPC64SUB:
   549			return rewriteValuePPC64_OpPPC64SUB_0(v)
   550		case OpPPC64XOR:
   551			return rewriteValuePPC64_OpPPC64XOR_0(v) || rewriteValuePPC64_OpPPC64XOR_10(v)
   552		case OpPPC64XORconst:
   553			return rewriteValuePPC64_OpPPC64XORconst_0(v)
   554		case OpPanicBounds:
   555			return rewriteValuePPC64_OpPanicBounds_0(v)
   556		case OpPopCount16:
   557			return rewriteValuePPC64_OpPopCount16_0(v)
   558		case OpPopCount32:
   559			return rewriteValuePPC64_OpPopCount32_0(v)
   560		case OpPopCount64:
   561			return rewriteValuePPC64_OpPopCount64_0(v)
   562		case OpPopCount8:
   563			return rewriteValuePPC64_OpPopCount8_0(v)
   564		case OpRotateLeft16:
   565			return rewriteValuePPC64_OpRotateLeft16_0(v)
   566		case OpRotateLeft32:
   567			return rewriteValuePPC64_OpRotateLeft32_0(v)
   568		case OpRotateLeft64:
   569			return rewriteValuePPC64_OpRotateLeft64_0(v)
   570		case OpRotateLeft8:
   571			return rewriteValuePPC64_OpRotateLeft8_0(v)
   572		case OpRound:
   573			return rewriteValuePPC64_OpRound_0(v)
   574		case OpRound32F:
   575			return rewriteValuePPC64_OpRound32F_0(v)
   576		case OpRound64F:
   577			return rewriteValuePPC64_OpRound64F_0(v)
   578		case OpRsh16Ux16:
   579			return rewriteValuePPC64_OpRsh16Ux16_0(v)
   580		case OpRsh16Ux32:
   581			return rewriteValuePPC64_OpRsh16Ux32_0(v)
   582		case OpRsh16Ux64:
   583			return rewriteValuePPC64_OpRsh16Ux64_0(v)
   584		case OpRsh16Ux8:
   585			return rewriteValuePPC64_OpRsh16Ux8_0(v)
   586		case OpRsh16x16:
   587			return rewriteValuePPC64_OpRsh16x16_0(v)
   588		case OpRsh16x32:
   589			return rewriteValuePPC64_OpRsh16x32_0(v)
   590		case OpRsh16x64:
   591			return rewriteValuePPC64_OpRsh16x64_0(v)
   592		case OpRsh16x8:
   593			return rewriteValuePPC64_OpRsh16x8_0(v)
   594		case OpRsh32Ux16:
   595			return rewriteValuePPC64_OpRsh32Ux16_0(v)
   596		case OpRsh32Ux32:
   597			return rewriteValuePPC64_OpRsh32Ux32_0(v)
   598		case OpRsh32Ux64:
   599			return rewriteValuePPC64_OpRsh32Ux64_0(v) || rewriteValuePPC64_OpRsh32Ux64_10(v)
   600		case OpRsh32Ux8:
   601			return rewriteValuePPC64_OpRsh32Ux8_0(v)
   602		case OpRsh32x16:
   603			return rewriteValuePPC64_OpRsh32x16_0(v)
   604		case OpRsh32x32:
   605			return rewriteValuePPC64_OpRsh32x32_0(v)
   606		case OpRsh32x64:
   607			return rewriteValuePPC64_OpRsh32x64_0(v) || rewriteValuePPC64_OpRsh32x64_10(v)
   608		case OpRsh32x8:
   609			return rewriteValuePPC64_OpRsh32x8_0(v)
   610		case OpRsh64Ux16:
   611			return rewriteValuePPC64_OpRsh64Ux16_0(v)
   612		case OpRsh64Ux32:
   613			return rewriteValuePPC64_OpRsh64Ux32_0(v)
   614		case OpRsh64Ux64:
   615			return rewriteValuePPC64_OpRsh64Ux64_0(v) || rewriteValuePPC64_OpRsh64Ux64_10(v)
   616		case OpRsh64Ux8:
   617			return rewriteValuePPC64_OpRsh64Ux8_0(v)
   618		case OpRsh64x16:
   619			return rewriteValuePPC64_OpRsh64x16_0(v)
   620		case OpRsh64x32:
   621			return rewriteValuePPC64_OpRsh64x32_0(v)
   622		case OpRsh64x64:
   623			return rewriteValuePPC64_OpRsh64x64_0(v) || rewriteValuePPC64_OpRsh64x64_10(v)
   624		case OpRsh64x8:
   625			return rewriteValuePPC64_OpRsh64x8_0(v)
   626		case OpRsh8Ux16:
   627			return rewriteValuePPC64_OpRsh8Ux16_0(v)
   628		case OpRsh8Ux32:
   629			return rewriteValuePPC64_OpRsh8Ux32_0(v)
   630		case OpRsh8Ux64:
   631			return rewriteValuePPC64_OpRsh8Ux64_0(v)
   632		case OpRsh8Ux8:
   633			return rewriteValuePPC64_OpRsh8Ux8_0(v)
   634		case OpRsh8x16:
   635			return rewriteValuePPC64_OpRsh8x16_0(v)
   636		case OpRsh8x32:
   637			return rewriteValuePPC64_OpRsh8x32_0(v)
   638		case OpRsh8x64:
   639			return rewriteValuePPC64_OpRsh8x64_0(v)
   640		case OpRsh8x8:
   641			return rewriteValuePPC64_OpRsh8x8_0(v)
   642		case OpSignExt16to32:
   643			return rewriteValuePPC64_OpSignExt16to32_0(v)
   644		case OpSignExt16to64:
   645			return rewriteValuePPC64_OpSignExt16to64_0(v)
   646		case OpSignExt32to64:
   647			return rewriteValuePPC64_OpSignExt32to64_0(v)
   648		case OpSignExt8to16:
   649			return rewriteValuePPC64_OpSignExt8to16_0(v)
   650		case OpSignExt8to32:
   651			return rewriteValuePPC64_OpSignExt8to32_0(v)
   652		case OpSignExt8to64:
   653			return rewriteValuePPC64_OpSignExt8to64_0(v)
   654		case OpSlicemask:
   655			return rewriteValuePPC64_OpSlicemask_0(v)
   656		case OpSqrt:
   657			return rewriteValuePPC64_OpSqrt_0(v)
   658		case OpStaticCall:
   659			return rewriteValuePPC64_OpStaticCall_0(v)
   660		case OpStore:
   661			return rewriteValuePPC64_OpStore_0(v)
   662		case OpSub16:
   663			return rewriteValuePPC64_OpSub16_0(v)
   664		case OpSub32:
   665			return rewriteValuePPC64_OpSub32_0(v)
   666		case OpSub32F:
   667			return rewriteValuePPC64_OpSub32F_0(v)
   668		case OpSub64:
   669			return rewriteValuePPC64_OpSub64_0(v)
   670		case OpSub64F:
   671			return rewriteValuePPC64_OpSub64F_0(v)
   672		case OpSub8:
   673			return rewriteValuePPC64_OpSub8_0(v)
   674		case OpSubPtr:
   675			return rewriteValuePPC64_OpSubPtr_0(v)
   676		case OpTrunc:
   677			return rewriteValuePPC64_OpTrunc_0(v)
   678		case OpTrunc16to8:
   679			return rewriteValuePPC64_OpTrunc16to8_0(v)
   680		case OpTrunc32to16:
   681			return rewriteValuePPC64_OpTrunc32to16_0(v)
   682		case OpTrunc32to8:
   683			return rewriteValuePPC64_OpTrunc32to8_0(v)
   684		case OpTrunc64to16:
   685			return rewriteValuePPC64_OpTrunc64to16_0(v)
   686		case OpTrunc64to32:
   687			return rewriteValuePPC64_OpTrunc64to32_0(v)
   688		case OpTrunc64to8:
   689			return rewriteValuePPC64_OpTrunc64to8_0(v)
   690		case OpWB:
   691			return rewriteValuePPC64_OpWB_0(v)
   692		case OpXor16:
   693			return rewriteValuePPC64_OpXor16_0(v)
   694		case OpXor32:
   695			return rewriteValuePPC64_OpXor32_0(v)
   696		case OpXor64:
   697			return rewriteValuePPC64_OpXor64_0(v)
   698		case OpXor8:
   699			return rewriteValuePPC64_OpXor8_0(v)
   700		case OpZero:
   701			return rewriteValuePPC64_OpZero_0(v) || rewriteValuePPC64_OpZero_10(v)
   702		case OpZeroExt16to32:
   703			return rewriteValuePPC64_OpZeroExt16to32_0(v)
   704		case OpZeroExt16to64:
   705			return rewriteValuePPC64_OpZeroExt16to64_0(v)
   706		case OpZeroExt32to64:
   707			return rewriteValuePPC64_OpZeroExt32to64_0(v)
   708		case OpZeroExt8to16:
   709			return rewriteValuePPC64_OpZeroExt8to16_0(v)
   710		case OpZeroExt8to32:
   711			return rewriteValuePPC64_OpZeroExt8to32_0(v)
   712		case OpZeroExt8to64:
   713			return rewriteValuePPC64_OpZeroExt8to64_0(v)
   714		}
   715		return false
   716	}
   717	func rewriteValuePPC64_OpAbs_0(v *Value) bool {
   718		// match: (Abs x)
   719		// cond:
   720		// result: (FABS x)
   721		for {
   722			x := v.Args[0]
   723			v.reset(OpPPC64FABS)
   724			v.AddArg(x)
   725			return true
   726		}
   727	}
   728	func rewriteValuePPC64_OpAdd16_0(v *Value) bool {
   729		// match: (Add16 x y)
   730		// cond:
   731		// result: (ADD x y)
   732		for {
   733			y := v.Args[1]
   734			x := v.Args[0]
   735			v.reset(OpPPC64ADD)
   736			v.AddArg(x)
   737			v.AddArg(y)
   738			return true
   739		}
   740	}
   741	func rewriteValuePPC64_OpAdd32_0(v *Value) bool {
   742		// match: (Add32 x y)
   743		// cond:
   744		// result: (ADD x y)
   745		for {
   746			y := v.Args[1]
   747			x := v.Args[0]
   748			v.reset(OpPPC64ADD)
   749			v.AddArg(x)
   750			v.AddArg(y)
   751			return true
   752		}
   753	}
   754	func rewriteValuePPC64_OpAdd32F_0(v *Value) bool {
   755		// match: (Add32F x y)
   756		// cond:
   757		// result: (FADDS x y)
   758		for {
   759			y := v.Args[1]
   760			x := v.Args[0]
   761			v.reset(OpPPC64FADDS)
   762			v.AddArg(x)
   763			v.AddArg(y)
   764			return true
   765		}
   766	}
   767	func rewriteValuePPC64_OpAdd64_0(v *Value) bool {
   768		// match: (Add64 x y)
   769		// cond:
   770		// result: (ADD x y)
   771		for {
   772			y := v.Args[1]
   773			x := v.Args[0]
   774			v.reset(OpPPC64ADD)
   775			v.AddArg(x)
   776			v.AddArg(y)
   777			return true
   778		}
   779	}
   780	func rewriteValuePPC64_OpAdd64F_0(v *Value) bool {
   781		// match: (Add64F x y)
   782		// cond:
   783		// result: (FADD x y)
   784		for {
   785			y := v.Args[1]
   786			x := v.Args[0]
   787			v.reset(OpPPC64FADD)
   788			v.AddArg(x)
   789			v.AddArg(y)
   790			return true
   791		}
   792	}
   793	func rewriteValuePPC64_OpAdd64carry_0(v *Value) bool {
   794		// match: (Add64carry x y c)
   795		// cond:
   796		// result: (LoweredAdd64Carry x y c)
   797		for {
   798			c := v.Args[2]
   799			x := v.Args[0]
   800			y := v.Args[1]
   801			v.reset(OpPPC64LoweredAdd64Carry)
   802			v.AddArg(x)
   803			v.AddArg(y)
   804			v.AddArg(c)
   805			return true
   806		}
   807	}
   808	func rewriteValuePPC64_OpAdd8_0(v *Value) bool {
   809		// match: (Add8 x y)
   810		// cond:
   811		// result: (ADD x y)
   812		for {
   813			y := v.Args[1]
   814			x := v.Args[0]
   815			v.reset(OpPPC64ADD)
   816			v.AddArg(x)
   817			v.AddArg(y)
   818			return true
   819		}
   820	}
   821	func rewriteValuePPC64_OpAddPtr_0(v *Value) bool {
   822		// match: (AddPtr x y)
   823		// cond:
   824		// result: (ADD x y)
   825		for {
   826			y := v.Args[1]
   827			x := v.Args[0]
   828			v.reset(OpPPC64ADD)
   829			v.AddArg(x)
   830			v.AddArg(y)
   831			return true
   832		}
   833	}
   834	func rewriteValuePPC64_OpAddr_0(v *Value) bool {
   835		// match: (Addr {sym} base)
   836		// cond:
   837		// result: (MOVDaddr {sym} base)
   838		for {
   839			sym := v.Aux
   840			base := v.Args[0]
   841			v.reset(OpPPC64MOVDaddr)
   842			v.Aux = sym
   843			v.AddArg(base)
   844			return true
   845		}
   846	}
   847	func rewriteValuePPC64_OpAnd16_0(v *Value) bool {
   848		// match: (And16 x y)
   849		// cond:
   850		// result: (AND x y)
   851		for {
   852			y := v.Args[1]
   853			x := v.Args[0]
   854			v.reset(OpPPC64AND)
   855			v.AddArg(x)
   856			v.AddArg(y)
   857			return true
   858		}
   859	}
   860	func rewriteValuePPC64_OpAnd32_0(v *Value) bool {
   861		// match: (And32 x y)
   862		// cond:
   863		// result: (AND x y)
   864		for {
   865			y := v.Args[1]
   866			x := v.Args[0]
   867			v.reset(OpPPC64AND)
   868			v.AddArg(x)
   869			v.AddArg(y)
   870			return true
   871		}
   872	}
   873	func rewriteValuePPC64_OpAnd64_0(v *Value) bool {
   874		// match: (And64 x y)
   875		// cond:
   876		// result: (AND x y)
   877		for {
   878			y := v.Args[1]
   879			x := v.Args[0]
   880			v.reset(OpPPC64AND)
   881			v.AddArg(x)
   882			v.AddArg(y)
   883			return true
   884		}
   885	}
   886	func rewriteValuePPC64_OpAnd8_0(v *Value) bool {
   887		// match: (And8 x y)
   888		// cond:
   889		// result: (AND x y)
   890		for {
   891			y := v.Args[1]
   892			x := v.Args[0]
   893			v.reset(OpPPC64AND)
   894			v.AddArg(x)
   895			v.AddArg(y)
   896			return true
   897		}
   898	}
   899	func rewriteValuePPC64_OpAndB_0(v *Value) bool {
   900		// match: (AndB x y)
   901		// cond:
   902		// result: (AND x y)
   903		for {
   904			y := v.Args[1]
   905			x := v.Args[0]
   906			v.reset(OpPPC64AND)
   907			v.AddArg(x)
   908			v.AddArg(y)
   909			return true
   910		}
   911	}
   912	func rewriteValuePPC64_OpAtomicAdd32_0(v *Value) bool {
   913		// match: (AtomicAdd32 ptr val mem)
   914		// cond:
   915		// result: (LoweredAtomicAdd32 ptr val mem)
   916		for {
   917			mem := v.Args[2]
   918			ptr := v.Args[0]
   919			val := v.Args[1]
   920			v.reset(OpPPC64LoweredAtomicAdd32)
   921			v.AddArg(ptr)
   922			v.AddArg(val)
   923			v.AddArg(mem)
   924			return true
   925		}
   926	}
   927	func rewriteValuePPC64_OpAtomicAdd64_0(v *Value) bool {
   928		// match: (AtomicAdd64 ptr val mem)
   929		// cond:
   930		// result: (LoweredAtomicAdd64 ptr val mem)
   931		for {
   932			mem := v.Args[2]
   933			ptr := v.Args[0]
   934			val := v.Args[1]
   935			v.reset(OpPPC64LoweredAtomicAdd64)
   936			v.AddArg(ptr)
   937			v.AddArg(val)
   938			v.AddArg(mem)
   939			return true
   940		}
   941	}
   942	func rewriteValuePPC64_OpAtomicAnd8_0(v *Value) bool {
   943		// match: (AtomicAnd8 ptr val mem)
   944		// cond:
   945		// result: (LoweredAtomicAnd8 ptr val mem)
   946		for {
   947			mem := v.Args[2]
   948			ptr := v.Args[0]
   949			val := v.Args[1]
   950			v.reset(OpPPC64LoweredAtomicAnd8)
   951			v.AddArg(ptr)
   952			v.AddArg(val)
   953			v.AddArg(mem)
   954			return true
   955		}
   956	}
   957	func rewriteValuePPC64_OpAtomicCompareAndSwap32_0(v *Value) bool {
   958		// match: (AtomicCompareAndSwap32 ptr old new_ mem)
   959		// cond:
   960		// result: (LoweredAtomicCas32 [1] ptr old new_ mem)
   961		for {
   962			mem := v.Args[3]
   963			ptr := v.Args[0]
   964			old := v.Args[1]
   965			new_ := v.Args[2]
   966			v.reset(OpPPC64LoweredAtomicCas32)
   967			v.AuxInt = 1
   968			v.AddArg(ptr)
   969			v.AddArg(old)
   970			v.AddArg(new_)
   971			v.AddArg(mem)
   972			return true
   973		}
   974	}
   975	func rewriteValuePPC64_OpAtomicCompareAndSwap64_0(v *Value) bool {
   976		// match: (AtomicCompareAndSwap64 ptr old new_ mem)
   977		// cond:
   978		// result: (LoweredAtomicCas64 [1] ptr old new_ mem)
   979		for {
   980			mem := v.Args[3]
   981			ptr := v.Args[0]
   982			old := v.Args[1]
   983			new_ := v.Args[2]
   984			v.reset(OpPPC64LoweredAtomicCas64)
   985			v.AuxInt = 1
   986			v.AddArg(ptr)
   987			v.AddArg(old)
   988			v.AddArg(new_)
   989			v.AddArg(mem)
   990			return true
   991		}
   992	}
   993	func rewriteValuePPC64_OpAtomicCompareAndSwapRel32_0(v *Value) bool {
   994		// match: (AtomicCompareAndSwapRel32 ptr old new_ mem)
   995		// cond:
   996		// result: (LoweredAtomicCas32 [0] ptr old new_ mem)
   997		for {
   998			mem := v.Args[3]
   999			ptr := v.Args[0]
  1000			old := v.Args[1]
  1001			new_ := v.Args[2]
  1002			v.reset(OpPPC64LoweredAtomicCas32)
  1003			v.AuxInt = 0
  1004			v.AddArg(ptr)
  1005			v.AddArg(old)
  1006			v.AddArg(new_)
  1007			v.AddArg(mem)
  1008			return true
  1009		}
  1010	}
  1011	func rewriteValuePPC64_OpAtomicExchange32_0(v *Value) bool {
  1012		// match: (AtomicExchange32 ptr val mem)
  1013		// cond:
  1014		// result: (LoweredAtomicExchange32 ptr val mem)
  1015		for {
  1016			mem := v.Args[2]
  1017			ptr := v.Args[0]
  1018			val := v.Args[1]
  1019			v.reset(OpPPC64LoweredAtomicExchange32)
  1020			v.AddArg(ptr)
  1021			v.AddArg(val)
  1022			v.AddArg(mem)
  1023			return true
  1024		}
  1025	}
  1026	func rewriteValuePPC64_OpAtomicExchange64_0(v *Value) bool {
  1027		// match: (AtomicExchange64 ptr val mem)
  1028		// cond:
  1029		// result: (LoweredAtomicExchange64 ptr val mem)
  1030		for {
  1031			mem := v.Args[2]
  1032			ptr := v.Args[0]
  1033			val := v.Args[1]
  1034			v.reset(OpPPC64LoweredAtomicExchange64)
  1035			v.AddArg(ptr)
  1036			v.AddArg(val)
  1037			v.AddArg(mem)
  1038			return true
  1039		}
  1040	}
  1041	func rewriteValuePPC64_OpAtomicLoad32_0(v *Value) bool {
  1042		// match: (AtomicLoad32 ptr mem)
  1043		// cond:
  1044		// result: (LoweredAtomicLoad32 [1] ptr mem)
  1045		for {
  1046			mem := v.Args[1]
  1047			ptr := v.Args[0]
  1048			v.reset(OpPPC64LoweredAtomicLoad32)
  1049			v.AuxInt = 1
  1050			v.AddArg(ptr)
  1051			v.AddArg(mem)
  1052			return true
  1053		}
  1054	}
  1055	func rewriteValuePPC64_OpAtomicLoad64_0(v *Value) bool {
  1056		// match: (AtomicLoad64 ptr mem)
  1057		// cond:
  1058		// result: (LoweredAtomicLoad64 [1] ptr mem)
  1059		for {
  1060			mem := v.Args[1]
  1061			ptr := v.Args[0]
  1062			v.reset(OpPPC64LoweredAtomicLoad64)
  1063			v.AuxInt = 1
  1064			v.AddArg(ptr)
  1065			v.AddArg(mem)
  1066			return true
  1067		}
  1068	}
  1069	func rewriteValuePPC64_OpAtomicLoad8_0(v *Value) bool {
  1070		// match: (AtomicLoad8 ptr mem)
  1071		// cond:
  1072		// result: (LoweredAtomicLoad8 [1] ptr mem)
  1073		for {
  1074			mem := v.Args[1]
  1075			ptr := v.Args[0]
  1076			v.reset(OpPPC64LoweredAtomicLoad8)
  1077			v.AuxInt = 1
  1078			v.AddArg(ptr)
  1079			v.AddArg(mem)
  1080			return true
  1081		}
  1082	}
  1083	func rewriteValuePPC64_OpAtomicLoadAcq32_0(v *Value) bool {
  1084		// match: (AtomicLoadAcq32 ptr mem)
  1085		// cond:
  1086		// result: (LoweredAtomicLoad32 [0] ptr mem)
  1087		for {
  1088			mem := v.Args[1]
  1089			ptr := v.Args[0]
  1090			v.reset(OpPPC64LoweredAtomicLoad32)
  1091			v.AuxInt = 0
  1092			v.AddArg(ptr)
  1093			v.AddArg(mem)
  1094			return true
  1095		}
  1096	}
  1097	func rewriteValuePPC64_OpAtomicLoadPtr_0(v *Value) bool {
  1098		// match: (AtomicLoadPtr ptr mem)
  1099		// cond:
  1100		// result: (LoweredAtomicLoadPtr [1] ptr mem)
  1101		for {
  1102			mem := v.Args[1]
  1103			ptr := v.Args[0]
  1104			v.reset(OpPPC64LoweredAtomicLoadPtr)
  1105			v.AuxInt = 1
  1106			v.AddArg(ptr)
  1107			v.AddArg(mem)
  1108			return true
  1109		}
  1110	}
  1111	func rewriteValuePPC64_OpAtomicOr8_0(v *Value) bool {
  1112		// match: (AtomicOr8 ptr val mem)
  1113		// cond:
  1114		// result: (LoweredAtomicOr8 ptr val mem)
  1115		for {
  1116			mem := v.Args[2]
  1117			ptr := v.Args[0]
  1118			val := v.Args[1]
  1119			v.reset(OpPPC64LoweredAtomicOr8)
  1120			v.AddArg(ptr)
  1121			v.AddArg(val)
  1122			v.AddArg(mem)
  1123			return true
  1124		}
  1125	}
  1126	func rewriteValuePPC64_OpAtomicStore32_0(v *Value) bool {
  1127		// match: (AtomicStore32 ptr val mem)
  1128		// cond:
  1129		// result: (LoweredAtomicStore32 [1] ptr val mem)
  1130		for {
  1131			mem := v.Args[2]
  1132			ptr := v.Args[0]
  1133			val := v.Args[1]
  1134			v.reset(OpPPC64LoweredAtomicStore32)
  1135			v.AuxInt = 1
  1136			v.AddArg(ptr)
  1137			v.AddArg(val)
  1138			v.AddArg(mem)
  1139			return true
  1140		}
  1141	}
  1142	func rewriteValuePPC64_OpAtomicStore64_0(v *Value) bool {
  1143		// match: (AtomicStore64 ptr val mem)
  1144		// cond:
  1145		// result: (LoweredAtomicStore64 [1] ptr val mem)
  1146		for {
  1147			mem := v.Args[2]
  1148			ptr := v.Args[0]
  1149			val := v.Args[1]
  1150			v.reset(OpPPC64LoweredAtomicStore64)
  1151			v.AuxInt = 1
  1152			v.AddArg(ptr)
  1153			v.AddArg(val)
  1154			v.AddArg(mem)
  1155			return true
  1156		}
  1157	}
  1158	func rewriteValuePPC64_OpAtomicStoreRel32_0(v *Value) bool {
  1159		// match: (AtomicStoreRel32 ptr val mem)
  1160		// cond:
  1161		// result: (LoweredAtomicStore32 [0] ptr val mem)
  1162		for {
  1163			mem := v.Args[2]
  1164			ptr := v.Args[0]
  1165			val := v.Args[1]
  1166			v.reset(OpPPC64LoweredAtomicStore32)
  1167			v.AuxInt = 0
  1168			v.AddArg(ptr)
  1169			v.AddArg(val)
  1170			v.AddArg(mem)
  1171			return true
  1172		}
  1173	}
  1174	func rewriteValuePPC64_OpAvg64u_0(v *Value) bool {
  1175		b := v.Block
  1176		// match: (Avg64u <t> x y)
  1177		// cond:
  1178		// result: (ADD (SRDconst <t> (SUB <t> x y) [1]) y)
  1179		for {
  1180			t := v.Type
  1181			y := v.Args[1]
  1182			x := v.Args[0]
  1183			v.reset(OpPPC64ADD)
  1184			v0 := b.NewValue0(v.Pos, OpPPC64SRDconst, t)
  1185			v0.AuxInt = 1
  1186			v1 := b.NewValue0(v.Pos, OpPPC64SUB, t)
  1187			v1.AddArg(x)
  1188			v1.AddArg(y)
  1189			v0.AddArg(v1)
  1190			v.AddArg(v0)
  1191			v.AddArg(y)
  1192			return true
  1193		}
  1194	}
  1195	func rewriteValuePPC64_OpBitLen32_0(v *Value) bool {
  1196		b := v.Block
  1197		typ := &b.Func.Config.Types
  1198		// match: (BitLen32 x)
  1199		// cond:
  1200		// result: (SUB (MOVDconst [32]) (CNTLZW <typ.Int> x))
  1201		for {
  1202			x := v.Args[0]
  1203			v.reset(OpPPC64SUB)
  1204			v0 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
  1205			v0.AuxInt = 32
  1206			v.AddArg(v0)
  1207			v1 := b.NewValue0(v.Pos, OpPPC64CNTLZW, typ.Int)
  1208			v1.AddArg(x)
  1209			v.AddArg(v1)
  1210			return true
  1211		}
  1212	}
  1213	func rewriteValuePPC64_OpBitLen64_0(v *Value) bool {
  1214		b := v.Block
  1215		typ := &b.Func.Config.Types
  1216		// match: (BitLen64 x)
  1217		// cond:
  1218		// result: (SUB (MOVDconst [64]) (CNTLZD <typ.Int> x))
  1219		for {
  1220			x := v.Args[0]
  1221			v.reset(OpPPC64SUB)
  1222			v0 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
  1223			v0.AuxInt = 64
  1224			v.AddArg(v0)
  1225			v1 := b.NewValue0(v.Pos, OpPPC64CNTLZD, typ.Int)
  1226			v1.AddArg(x)
  1227			v.AddArg(v1)
  1228			return true
  1229		}
  1230	}
  1231	func rewriteValuePPC64_OpCeil_0(v *Value) bool {
  1232		// match: (Ceil x)
  1233		// cond:
  1234		// result: (FCEIL x)
  1235		for {
  1236			x := v.Args[0]
  1237			v.reset(OpPPC64FCEIL)
  1238			v.AddArg(x)
  1239			return true
  1240		}
  1241	}
  1242	func rewriteValuePPC64_OpClosureCall_0(v *Value) bool {
  1243		// match: (ClosureCall [argwid] entry closure mem)
  1244		// cond:
  1245		// result: (CALLclosure [argwid] entry closure mem)
  1246		for {
  1247			argwid := v.AuxInt
  1248			mem := v.Args[2]
  1249			entry := v.Args[0]
  1250			closure := v.Args[1]
  1251			v.reset(OpPPC64CALLclosure)
  1252			v.AuxInt = argwid
  1253			v.AddArg(entry)
  1254			v.AddArg(closure)
  1255			v.AddArg(mem)
  1256			return true
  1257		}
  1258	}
  1259	func rewriteValuePPC64_OpCom16_0(v *Value) bool {
  1260		// match: (Com16 x)
  1261		// cond:
  1262		// result: (NOR x x)
  1263		for {
  1264			x := v.Args[0]
  1265			v.reset(OpPPC64NOR)
  1266			v.AddArg(x)
  1267			v.AddArg(x)
  1268			return true
  1269		}
  1270	}
  1271	func rewriteValuePPC64_OpCom32_0(v *Value) bool {
  1272		// match: (Com32 x)
  1273		// cond:
  1274		// result: (NOR x x)
  1275		for {
  1276			x := v.Args[0]
  1277			v.reset(OpPPC64NOR)
  1278			v.AddArg(x)
  1279			v.AddArg(x)
  1280			return true
  1281		}
  1282	}
  1283	func rewriteValuePPC64_OpCom64_0(v *Value) bool {
  1284		// match: (Com64 x)
  1285		// cond:
  1286		// result: (NOR x x)
  1287		for {
  1288			x := v.Args[0]
  1289			v.reset(OpPPC64NOR)
  1290			v.AddArg(x)
  1291			v.AddArg(x)
  1292			return true
  1293		}
  1294	}
  1295	func rewriteValuePPC64_OpCom8_0(v *Value) bool {
  1296		// match: (Com8 x)
  1297		// cond:
  1298		// result: (NOR x x)
  1299		for {
  1300			x := v.Args[0]
  1301			v.reset(OpPPC64NOR)
  1302			v.AddArg(x)
  1303			v.AddArg(x)
  1304			return true
  1305		}
  1306	}
  1307	func rewriteValuePPC64_OpConst16_0(v *Value) bool {
  1308		// match: (Const16 [val])
  1309		// cond:
  1310		// result: (MOVDconst [val])
  1311		for {
  1312			val := v.AuxInt
  1313			v.reset(OpPPC64MOVDconst)
  1314			v.AuxInt = val
  1315			return true
  1316		}
  1317	}
  1318	func rewriteValuePPC64_OpConst32_0(v *Value) bool {
  1319		// match: (Const32 [val])
  1320		// cond:
  1321		// result: (MOVDconst [val])
  1322		for {
  1323			val := v.AuxInt
  1324			v.reset(OpPPC64MOVDconst)
  1325			v.AuxInt = val
  1326			return true
  1327		}
  1328	}
  1329	func rewriteValuePPC64_OpConst32F_0(v *Value) bool {
  1330		// match: (Const32F [val])
  1331		// cond:
  1332		// result: (FMOVSconst [val])
  1333		for {
  1334			val := v.AuxInt
  1335			v.reset(OpPPC64FMOVSconst)
  1336			v.AuxInt = val
  1337			return true
  1338		}
  1339	}
  1340	func rewriteValuePPC64_OpConst64_0(v *Value) bool {
  1341		// match: (Const64 [val])
  1342		// cond:
  1343		// result: (MOVDconst [val])
  1344		for {
  1345			val := v.AuxInt
  1346			v.reset(OpPPC64MOVDconst)
  1347			v.AuxInt = val
  1348			return true
  1349		}
  1350	}
  1351	func rewriteValuePPC64_OpConst64F_0(v *Value) bool {
  1352		// match: (Const64F [val])
  1353		// cond:
  1354		// result: (FMOVDconst [val])
  1355		for {
  1356			val := v.AuxInt
  1357			v.reset(OpPPC64FMOVDconst)
  1358			v.AuxInt = val
  1359			return true
  1360		}
  1361	}
  1362	func rewriteValuePPC64_OpConst8_0(v *Value) bool {
  1363		// match: (Const8 [val])
  1364		// cond:
  1365		// result: (MOVDconst [val])
  1366		for {
  1367			val := v.AuxInt
  1368			v.reset(OpPPC64MOVDconst)
  1369			v.AuxInt = val
  1370			return true
  1371		}
  1372	}
  1373	func rewriteValuePPC64_OpConstBool_0(v *Value) bool {
  1374		// match: (ConstBool [b])
  1375		// cond:
  1376		// result: (MOVDconst [b])
  1377		for {
  1378			b := v.AuxInt
  1379			v.reset(OpPPC64MOVDconst)
  1380			v.AuxInt = b
  1381			return true
  1382		}
  1383	}
  1384	func rewriteValuePPC64_OpConstNil_0(v *Value) bool {
  1385		// match: (ConstNil)
  1386		// cond:
  1387		// result: (MOVDconst [0])
  1388		for {
  1389			v.reset(OpPPC64MOVDconst)
  1390			v.AuxInt = 0
  1391			return true
  1392		}
  1393	}
  1394	func rewriteValuePPC64_OpCopysign_0(v *Value) bool {
  1395		// match: (Copysign x y)
  1396		// cond:
  1397		// result: (FCPSGN y x)
  1398		for {
  1399			y := v.Args[1]
  1400			x := v.Args[0]
  1401			v.reset(OpPPC64FCPSGN)
  1402			v.AddArg(y)
  1403			v.AddArg(x)
  1404			return true
  1405		}
  1406	}
  1407	func rewriteValuePPC64_OpCtz16_0(v *Value) bool {
  1408		b := v.Block
  1409		typ := &b.Func.Config.Types
  1410		// match: (Ctz16 x)
  1411		// cond:
  1412		// result: (POPCNTW (MOVHZreg (ANDN <typ.Int16> (ADDconst <typ.Int16> [-1] x) x)))
  1413		for {
  1414			x := v.Args[0]
  1415			v.reset(OpPPC64POPCNTW)
  1416			v0 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
  1417			v1 := b.NewValue0(v.Pos, OpPPC64ANDN, typ.Int16)
  1418			v2 := b.NewValue0(v.Pos, OpPPC64ADDconst, typ.Int16)
  1419			v2.AuxInt = -1
  1420			v2.AddArg(x)
  1421			v1.AddArg(v2)
  1422			v1.AddArg(x)
  1423			v0.AddArg(v1)
  1424			v.AddArg(v0)
  1425			return true
  1426		}
  1427	}
  1428	func rewriteValuePPC64_OpCtz32_0(v *Value) bool {
  1429		b := v.Block
  1430		typ := &b.Func.Config.Types
  1431		// match: (Ctz32 x)
  1432		// cond: objabi.GOPPC64<=8
  1433		// result: (POPCNTW (MOVWZreg (ANDN <typ.Int> (ADDconst <typ.Int> [-1] x) x)))
  1434		for {
  1435			x := v.Args[0]
  1436			if !(objabi.GOPPC64 <= 8) {
  1437				break
  1438			}
  1439			v.reset(OpPPC64POPCNTW)
  1440			v0 := b.NewValue0(v.Pos, OpPPC64MOVWZreg, typ.Int64)
  1441			v1 := b.NewValue0(v.Pos, OpPPC64ANDN, typ.Int)
  1442			v2 := b.NewValue0(v.Pos, OpPPC64ADDconst, typ.Int)
  1443			v2.AuxInt = -1
  1444			v2.AddArg(x)
  1445			v1.AddArg(v2)
  1446			v1.AddArg(x)
  1447			v0.AddArg(v1)
  1448			v.AddArg(v0)
  1449			return true
  1450		}
  1451		// match: (Ctz32 x)
  1452		// cond:
  1453		// result: (CNTTZW (MOVWZreg x))
  1454		for {
  1455			x := v.Args[0]
  1456			v.reset(OpPPC64CNTTZW)
  1457			v0 := b.NewValue0(v.Pos, OpPPC64MOVWZreg, typ.Int64)
  1458			v0.AddArg(x)
  1459			v.AddArg(v0)
  1460			return true
  1461		}
  1462	}
  1463	func rewriteValuePPC64_OpCtz32NonZero_0(v *Value) bool {
  1464		// match: (Ctz32NonZero x)
  1465		// cond:
  1466		// result: (Ctz32 x)
  1467		for {
  1468			x := v.Args[0]
  1469			v.reset(OpCtz32)
  1470			v.AddArg(x)
  1471			return true
  1472		}
  1473	}
  1474	func rewriteValuePPC64_OpCtz64_0(v *Value) bool {
  1475		b := v.Block
  1476		typ := &b.Func.Config.Types
  1477		// match: (Ctz64 x)
  1478		// cond: objabi.GOPPC64<=8
  1479		// result: (POPCNTD (ANDN <typ.Int64> (ADDconst <typ.Int64> [-1] x) x))
  1480		for {
  1481			x := v.Args[0]
  1482			if !(objabi.GOPPC64 <= 8) {
  1483				break
  1484			}
  1485			v.reset(OpPPC64POPCNTD)
  1486			v0 := b.NewValue0(v.Pos, OpPPC64ANDN, typ.Int64)
  1487			v1 := b.NewValue0(v.Pos, OpPPC64ADDconst, typ.Int64)
  1488			v1.AuxInt = -1
  1489			v1.AddArg(x)
  1490			v0.AddArg(v1)
  1491			v0.AddArg(x)
  1492			v.AddArg(v0)
  1493			return true
  1494		}
  1495		// match: (Ctz64 x)
  1496		// cond:
  1497		// result: (CNTTZD x)
  1498		for {
  1499			x := v.Args[0]
  1500			v.reset(OpPPC64CNTTZD)
  1501			v.AddArg(x)
  1502			return true
  1503		}
  1504	}
  1505	func rewriteValuePPC64_OpCtz64NonZero_0(v *Value) bool {
  1506		// match: (Ctz64NonZero x)
  1507		// cond:
  1508		// result: (Ctz64 x)
  1509		for {
  1510			x := v.Args[0]
  1511			v.reset(OpCtz64)
  1512			v.AddArg(x)
  1513			return true
  1514		}
  1515	}
  1516	func rewriteValuePPC64_OpCtz8_0(v *Value) bool {
  1517		b := v.Block
  1518		typ := &b.Func.Config.Types
  1519		// match: (Ctz8 x)
  1520		// cond:
  1521		// result: (POPCNTB (MOVBZreg (ANDN <typ.UInt8> (ADDconst <typ.UInt8> [-1] x) x)))
  1522		for {
  1523			x := v.Args[0]
  1524			v.reset(OpPPC64POPCNTB)
  1525			v0 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
  1526			v1 := b.NewValue0(v.Pos, OpPPC64ANDN, typ.UInt8)
  1527			v2 := b.NewValue0(v.Pos, OpPPC64ADDconst, typ.UInt8)
  1528			v2.AuxInt = -1
  1529			v2.AddArg(x)
  1530			v1.AddArg(v2)
  1531			v1.AddArg(x)
  1532			v0.AddArg(v1)
  1533			v.AddArg(v0)
  1534			return true
  1535		}
  1536	}
  1537	func rewriteValuePPC64_OpCvt32Fto32_0(v *Value) bool {
  1538		b := v.Block
  1539		typ := &b.Func.Config.Types
  1540		// match: (Cvt32Fto32 x)
  1541		// cond:
  1542		// result: (MFVSRD (FCTIWZ x))
  1543		for {
  1544			x := v.Args[0]
  1545			v.reset(OpPPC64MFVSRD)
  1546			v0 := b.NewValue0(v.Pos, OpPPC64FCTIWZ, typ.Float64)
  1547			v0.AddArg(x)
  1548			v.AddArg(v0)
  1549			return true
  1550		}
  1551	}
  1552	func rewriteValuePPC64_OpCvt32Fto64_0(v *Value) bool {
  1553		b := v.Block
  1554		typ := &b.Func.Config.Types
  1555		// match: (Cvt32Fto64 x)
  1556		// cond:
  1557		// result: (MFVSRD (FCTIDZ x))
  1558		for {
  1559			x := v.Args[0]
  1560			v.reset(OpPPC64MFVSRD)
  1561			v0 := b.NewValue0(v.Pos, OpPPC64FCTIDZ, typ.Float64)
  1562			v0.AddArg(x)
  1563			v.AddArg(v0)
  1564			return true
  1565		}
  1566	}
  1567	func rewriteValuePPC64_OpCvt32Fto64F_0(v *Value) bool {
  1568		// match: (Cvt32Fto64F x)
  1569		// cond:
  1570		// result: x
  1571		for {
  1572			x := v.Args[0]
  1573			v.reset(OpCopy)
  1574			v.Type = x.Type
  1575			v.AddArg(x)
  1576			return true
  1577		}
  1578	}
  1579	func rewriteValuePPC64_OpCvt32to32F_0(v *Value) bool {
  1580		b := v.Block
  1581		typ := &b.Func.Config.Types
  1582		// match: (Cvt32to32F x)
  1583		// cond:
  1584		// result: (FCFIDS (MTVSRD (SignExt32to64 x)))
  1585		for {
  1586			x := v.Args[0]
  1587			v.reset(OpPPC64FCFIDS)
  1588			v0 := b.NewValue0(v.Pos, OpPPC64MTVSRD, typ.Float64)
  1589			v1 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
  1590			v1.AddArg(x)
  1591			v0.AddArg(v1)
  1592			v.AddArg(v0)
  1593			return true
  1594		}
  1595	}
  1596	func rewriteValuePPC64_OpCvt32to64F_0(v *Value) bool {
  1597		b := v.Block
  1598		typ := &b.Func.Config.Types
  1599		// match: (Cvt32to64F x)
  1600		// cond:
  1601		// result: (FCFID (MTVSRD (SignExt32to64 x)))
  1602		for {
  1603			x := v.Args[0]
  1604			v.reset(OpPPC64FCFID)
  1605			v0 := b.NewValue0(v.Pos, OpPPC64MTVSRD, typ.Float64)
  1606			v1 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
  1607			v1.AddArg(x)
  1608			v0.AddArg(v1)
  1609			v.AddArg(v0)
  1610			return true
  1611		}
  1612	}
  1613	func rewriteValuePPC64_OpCvt64Fto32_0(v *Value) bool {
  1614		b := v.Block
  1615		typ := &b.Func.Config.Types
  1616		// match: (Cvt64Fto32 x)
  1617		// cond:
  1618		// result: (MFVSRD (FCTIWZ x))
  1619		for {
  1620			x := v.Args[0]
  1621			v.reset(OpPPC64MFVSRD)
  1622			v0 := b.NewValue0(v.Pos, OpPPC64FCTIWZ, typ.Float64)
  1623			v0.AddArg(x)
  1624			v.AddArg(v0)
  1625			return true
  1626		}
  1627	}
  1628	func rewriteValuePPC64_OpCvt64Fto32F_0(v *Value) bool {
  1629		// match: (Cvt64Fto32F x)
  1630		// cond:
  1631		// result: (FRSP x)
  1632		for {
  1633			x := v.Args[0]
  1634			v.reset(OpPPC64FRSP)
  1635			v.AddArg(x)
  1636			return true
  1637		}
  1638	}
  1639	func rewriteValuePPC64_OpCvt64Fto64_0(v *Value) bool {
  1640		b := v.Block
  1641		typ := &b.Func.Config.Types
  1642		// match: (Cvt64Fto64 x)
  1643		// cond:
  1644		// result: (MFVSRD (FCTIDZ x))
  1645		for {
  1646			x := v.Args[0]
  1647			v.reset(OpPPC64MFVSRD)
  1648			v0 := b.NewValue0(v.Pos, OpPPC64FCTIDZ, typ.Float64)
  1649			v0.AddArg(x)
  1650			v.AddArg(v0)
  1651			return true
  1652		}
  1653	}
  1654	func rewriteValuePPC64_OpCvt64to32F_0(v *Value) bool {
  1655		b := v.Block
  1656		typ := &b.Func.Config.Types
  1657		// match: (Cvt64to32F x)
  1658		// cond:
  1659		// result: (FCFIDS (MTVSRD x))
  1660		for {
  1661			x := v.Args[0]
  1662			v.reset(OpPPC64FCFIDS)
  1663			v0 := b.NewValue0(v.Pos, OpPPC64MTVSRD, typ.Float64)
  1664			v0.AddArg(x)
  1665			v.AddArg(v0)
  1666			return true
  1667		}
  1668	}
  1669	func rewriteValuePPC64_OpCvt64to64F_0(v *Value) bool {
  1670		b := v.Block
  1671		typ := &b.Func.Config.Types
  1672		// match: (Cvt64to64F x)
  1673		// cond:
  1674		// result: (FCFID (MTVSRD x))
  1675		for {
  1676			x := v.Args[0]
  1677			v.reset(OpPPC64FCFID)
  1678			v0 := b.NewValue0(v.Pos, OpPPC64MTVSRD, typ.Float64)
  1679			v0.AddArg(x)
  1680			v.AddArg(v0)
  1681			return true
  1682		}
  1683	}
  1684	func rewriteValuePPC64_OpDiv16_0(v *Value) bool {
  1685		b := v.Block
  1686		typ := &b.Func.Config.Types
  1687		// match: (Div16 x y)
  1688		// cond:
  1689		// result: (DIVW (SignExt16to32 x) (SignExt16to32 y))
  1690		for {
  1691			y := v.Args[1]
  1692			x := v.Args[0]
  1693			v.reset(OpPPC64DIVW)
  1694			v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1695			v0.AddArg(x)
  1696			v.AddArg(v0)
  1697			v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1698			v1.AddArg(y)
  1699			v.AddArg(v1)
  1700			return true
  1701		}
  1702	}
  1703	func rewriteValuePPC64_OpDiv16u_0(v *Value) bool {
  1704		b := v.Block
  1705		typ := &b.Func.Config.Types
  1706		// match: (Div16u x y)
  1707		// cond:
  1708		// result: (DIVWU (ZeroExt16to32 x) (ZeroExt16to32 y))
  1709		for {
  1710			y := v.Args[1]
  1711			x := v.Args[0]
  1712			v.reset(OpPPC64DIVWU)
  1713			v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1714			v0.AddArg(x)
  1715			v.AddArg(v0)
  1716			v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1717			v1.AddArg(y)
  1718			v.AddArg(v1)
  1719			return true
  1720		}
  1721	}
  1722	func rewriteValuePPC64_OpDiv32_0(v *Value) bool {
  1723		// match: (Div32 x y)
  1724		// cond:
  1725		// result: (DIVW x y)
  1726		for {
  1727			y := v.Args[1]
  1728			x := v.Args[0]
  1729			v.reset(OpPPC64DIVW)
  1730			v.AddArg(x)
  1731			v.AddArg(y)
  1732			return true
  1733		}
  1734	}
  1735	func rewriteValuePPC64_OpDiv32F_0(v *Value) bool {
  1736		// match: (Div32F x y)
  1737		// cond:
  1738		// result: (FDIVS x y)
  1739		for {
  1740			y := v.Args[1]
  1741			x := v.Args[0]
  1742			v.reset(OpPPC64FDIVS)
  1743			v.AddArg(x)
  1744			v.AddArg(y)
  1745			return true
  1746		}
  1747	}
  1748	func rewriteValuePPC64_OpDiv32u_0(v *Value) bool {
  1749		// match: (Div32u x y)
  1750		// cond:
  1751		// result: (DIVWU x y)
  1752		for {
  1753			y := v.Args[1]
  1754			x := v.Args[0]
  1755			v.reset(OpPPC64DIVWU)
  1756			v.AddArg(x)
  1757			v.AddArg(y)
  1758			return true
  1759		}
  1760	}
  1761	func rewriteValuePPC64_OpDiv64_0(v *Value) bool {
  1762		// match: (Div64 x y)
  1763		// cond:
  1764		// result: (DIVD x y)
  1765		for {
  1766			y := v.Args[1]
  1767			x := v.Args[0]
  1768			v.reset(OpPPC64DIVD)
  1769			v.AddArg(x)
  1770			v.AddArg(y)
  1771			return true
  1772		}
  1773	}
  1774	func rewriteValuePPC64_OpDiv64F_0(v *Value) bool {
  1775		// match: (Div64F x y)
  1776		// cond:
  1777		// result: (FDIV x y)
  1778		for {
  1779			y := v.Args[1]
  1780			x := v.Args[0]
  1781			v.reset(OpPPC64FDIV)
  1782			v.AddArg(x)
  1783			v.AddArg(y)
  1784			return true
  1785		}
  1786	}
  1787	func rewriteValuePPC64_OpDiv64u_0(v *Value) bool {
  1788		// match: (Div64u x y)
  1789		// cond:
  1790		// result: (DIVDU x y)
  1791		for {
  1792			y := v.Args[1]
  1793			x := v.Args[0]
  1794			v.reset(OpPPC64DIVDU)
  1795			v.AddArg(x)
  1796			v.AddArg(y)
  1797			return true
  1798		}
  1799	}
  1800	func rewriteValuePPC64_OpDiv8_0(v *Value) bool {
  1801		b := v.Block
  1802		typ := &b.Func.Config.Types
  1803		// match: (Div8 x y)
  1804		// cond:
  1805		// result: (DIVW (SignExt8to32 x) (SignExt8to32 y))
  1806		for {
  1807			y := v.Args[1]
  1808			x := v.Args[0]
  1809			v.reset(OpPPC64DIVW)
  1810			v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1811			v0.AddArg(x)
  1812			v.AddArg(v0)
  1813			v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1814			v1.AddArg(y)
  1815			v.AddArg(v1)
  1816			return true
  1817		}
  1818	}
  1819	func rewriteValuePPC64_OpDiv8u_0(v *Value) bool {
  1820		b := v.Block
  1821		typ := &b.Func.Config.Types
  1822		// match: (Div8u x y)
  1823		// cond:
  1824		// result: (DIVWU (ZeroExt8to32 x) (ZeroExt8to32 y))
  1825		for {
  1826			y := v.Args[1]
  1827			x := v.Args[0]
  1828			v.reset(OpPPC64DIVWU)
  1829			v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1830			v0.AddArg(x)
  1831			v.AddArg(v0)
  1832			v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1833			v1.AddArg(y)
  1834			v.AddArg(v1)
  1835			return true
  1836		}
  1837	}
  1838	func rewriteValuePPC64_OpEq16_0(v *Value) bool {
  1839		b := v.Block
  1840		typ := &b.Func.Config.Types
  1841		// match: (Eq16 x y)
  1842		// cond: isSigned(x.Type) && isSigned(y.Type)
  1843		// result: (Equal (CMPW (SignExt16to32 x) (SignExt16to32 y)))
  1844		for {
  1845			y := v.Args[1]
  1846			x := v.Args[0]
  1847			if !(isSigned(x.Type) && isSigned(y.Type)) {
  1848				break
  1849			}
  1850			v.reset(OpPPC64Equal)
  1851			v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  1852			v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1853			v1.AddArg(x)
  1854			v0.AddArg(v1)
  1855			v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1856			v2.AddArg(y)
  1857			v0.AddArg(v2)
  1858			v.AddArg(v0)
  1859			return true
  1860		}
  1861		// match: (Eq16 x y)
  1862		// cond:
  1863		// result: (Equal (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y)))
  1864		for {
  1865			y := v.Args[1]
  1866			x := v.Args[0]
  1867			v.reset(OpPPC64Equal)
  1868			v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  1869			v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1870			v1.AddArg(x)
  1871			v0.AddArg(v1)
  1872			v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1873			v2.AddArg(y)
  1874			v0.AddArg(v2)
  1875			v.AddArg(v0)
  1876			return true
  1877		}
  1878	}
  1879	func rewriteValuePPC64_OpEq32_0(v *Value) bool {
  1880		b := v.Block
  1881		// match: (Eq32 x y)
  1882		// cond:
  1883		// result: (Equal (CMPW x y))
  1884		for {
  1885			y := v.Args[1]
  1886			x := v.Args[0]
  1887			v.reset(OpPPC64Equal)
  1888			v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  1889			v0.AddArg(x)
  1890			v0.AddArg(y)
  1891			v.AddArg(v0)
  1892			return true
  1893		}
  1894	}
  1895	func rewriteValuePPC64_OpEq32F_0(v *Value) bool {
  1896		b := v.Block
  1897		// match: (Eq32F x y)
  1898		// cond:
  1899		// result: (Equal (FCMPU x y))
  1900		for {
  1901			y := v.Args[1]
  1902			x := v.Args[0]
  1903			v.reset(OpPPC64Equal)
  1904			v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  1905			v0.AddArg(x)
  1906			v0.AddArg(y)
  1907			v.AddArg(v0)
  1908			return true
  1909		}
  1910	}
  1911	func rewriteValuePPC64_OpEq64_0(v *Value) bool {
  1912		b := v.Block
  1913		// match: (Eq64 x y)
  1914		// cond:
  1915		// result: (Equal (CMP x y))
  1916		for {
  1917			y := v.Args[1]
  1918			x := v.Args[0]
  1919			v.reset(OpPPC64Equal)
  1920			v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
  1921			v0.AddArg(x)
  1922			v0.AddArg(y)
  1923			v.AddArg(v0)
  1924			return true
  1925		}
  1926	}
  1927	func rewriteValuePPC64_OpEq64F_0(v *Value) bool {
  1928		b := v.Block
  1929		// match: (Eq64F x y)
  1930		// cond:
  1931		// result: (Equal (FCMPU x y))
  1932		for {
  1933			y := v.Args[1]
  1934			x := v.Args[0]
  1935			v.reset(OpPPC64Equal)
  1936			v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  1937			v0.AddArg(x)
  1938			v0.AddArg(y)
  1939			v.AddArg(v0)
  1940			return true
  1941		}
  1942	}
  1943	func rewriteValuePPC64_OpEq8_0(v *Value) bool {
  1944		b := v.Block
  1945		typ := &b.Func.Config.Types
  1946		// match: (Eq8 x y)
  1947		// cond: isSigned(x.Type) && isSigned(y.Type)
  1948		// result: (Equal (CMPW (SignExt8to32 x) (SignExt8to32 y)))
  1949		for {
  1950			y := v.Args[1]
  1951			x := v.Args[0]
  1952			if !(isSigned(x.Type) && isSigned(y.Type)) {
  1953				break
  1954			}
  1955			v.reset(OpPPC64Equal)
  1956			v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  1957			v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1958			v1.AddArg(x)
  1959			v0.AddArg(v1)
  1960			v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1961			v2.AddArg(y)
  1962			v0.AddArg(v2)
  1963			v.AddArg(v0)
  1964			return true
  1965		}
  1966		// match: (Eq8 x y)
  1967		// cond:
  1968		// result: (Equal (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y)))
  1969		for {
  1970			y := v.Args[1]
  1971			x := v.Args[0]
  1972			v.reset(OpPPC64Equal)
  1973			v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  1974			v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1975			v1.AddArg(x)
  1976			v0.AddArg(v1)
  1977			v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1978			v2.AddArg(y)
  1979			v0.AddArg(v2)
  1980			v.AddArg(v0)
  1981			return true
  1982		}
  1983	}
  1984	func rewriteValuePPC64_OpEqB_0(v *Value) bool {
  1985		b := v.Block
  1986		typ := &b.Func.Config.Types
  1987		// match: (EqB x y)
  1988		// cond:
  1989		// result: (ANDconst [1] (EQV x y))
  1990		for {
  1991			y := v.Args[1]
  1992			x := v.Args[0]
  1993			v.reset(OpPPC64ANDconst)
  1994			v.AuxInt = 1
  1995			v0 := b.NewValue0(v.Pos, OpPPC64EQV, typ.Int64)
  1996			v0.AddArg(x)
  1997			v0.AddArg(y)
  1998			v.AddArg(v0)
  1999			return true
  2000		}
  2001	}
  2002	func rewriteValuePPC64_OpEqPtr_0(v *Value) bool {
  2003		b := v.Block
  2004		// match: (EqPtr x y)
  2005		// cond:
  2006		// result: (Equal (CMP x y))
  2007		for {
  2008			y := v.Args[1]
  2009			x := v.Args[0]
  2010			v.reset(OpPPC64Equal)
  2011			v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
  2012			v0.AddArg(x)
  2013			v0.AddArg(y)
  2014			v.AddArg(v0)
  2015			return true
  2016		}
  2017	}
  2018	func rewriteValuePPC64_OpFloor_0(v *Value) bool {
  2019		// match: (Floor x)
  2020		// cond:
  2021		// result: (FFLOOR x)
  2022		for {
  2023			x := v.Args[0]
  2024			v.reset(OpPPC64FFLOOR)
  2025			v.AddArg(x)
  2026			return true
  2027		}
  2028	}
  2029	func rewriteValuePPC64_OpGeq16_0(v *Value) bool {
  2030		b := v.Block
  2031		typ := &b.Func.Config.Types
  2032		// match: (Geq16 x y)
  2033		// cond:
  2034		// result: (GreaterEqual (CMPW (SignExt16to32 x) (SignExt16to32 y)))
  2035		for {
  2036			y := v.Args[1]
  2037			x := v.Args[0]
  2038			v.reset(OpPPC64GreaterEqual)
  2039			v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2040			v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  2041			v1.AddArg(x)
  2042			v0.AddArg(v1)
  2043			v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  2044			v2.AddArg(y)
  2045			v0.AddArg(v2)
  2046			v.AddArg(v0)
  2047			return true
  2048		}
  2049	}
  2050	func rewriteValuePPC64_OpGeq16U_0(v *Value) bool {
  2051		b := v.Block
  2052		typ := &b.Func.Config.Types
  2053		// match: (Geq16U x y)
  2054		// cond:
  2055		// result: (GreaterEqual (CMPWU (ZeroExt16to32 x) (ZeroExt16to32 y)))
  2056		for {
  2057			y := v.Args[1]
  2058			x := v.Args[0]
  2059			v.reset(OpPPC64GreaterEqual)
  2060			v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2061			v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  2062			v1.AddArg(x)
  2063			v0.AddArg(v1)
  2064			v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  2065			v2.AddArg(y)
  2066			v0.AddArg(v2)
  2067			v.AddArg(v0)
  2068			return true
  2069		}
  2070	}
  2071	func rewriteValuePPC64_OpGeq32_0(v *Value) bool {
  2072		b := v.Block
  2073		// match: (Geq32 x y)
  2074		// cond:
  2075		// result: (GreaterEqual (CMPW x y))
  2076		for {
  2077			y := v.Args[1]
  2078			x := v.Args[0]
  2079			v.reset(OpPPC64GreaterEqual)
  2080			v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2081			v0.AddArg(x)
  2082			v0.AddArg(y)
  2083			v.AddArg(v0)
  2084			return true
  2085		}
  2086	}
  2087	func rewriteValuePPC64_OpGeq32F_0(v *Value) bool {
  2088		b := v.Block
  2089		// match: (Geq32F x y)
  2090		// cond:
  2091		// result: (FGreaterEqual (FCMPU x y))
  2092		for {
  2093			y := v.Args[1]
  2094			x := v.Args[0]
  2095			v.reset(OpPPC64FGreaterEqual)
  2096			v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  2097			v0.AddArg(x)
  2098			v0.AddArg(y)
  2099			v.AddArg(v0)
  2100			return true
  2101		}
  2102	}
  2103	func rewriteValuePPC64_OpGeq32U_0(v *Value) bool {
  2104		b := v.Block
  2105		// match: (Geq32U x y)
  2106		// cond:
  2107		// result: (GreaterEqual (CMPWU x y))
  2108		for {
  2109			y := v.Args[1]
  2110			x := v.Args[0]
  2111			v.reset(OpPPC64GreaterEqual)
  2112			v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2113			v0.AddArg(x)
  2114			v0.AddArg(y)
  2115			v.AddArg(v0)
  2116			return true
  2117		}
  2118	}
  2119	func rewriteValuePPC64_OpGeq64_0(v *Value) bool {
  2120		b := v.Block
  2121		// match: (Geq64 x y)
  2122		// cond:
  2123		// result: (GreaterEqual (CMP x y))
  2124		for {
  2125			y := v.Args[1]
  2126			x := v.Args[0]
  2127			v.reset(OpPPC64GreaterEqual)
  2128			v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
  2129			v0.AddArg(x)
  2130			v0.AddArg(y)
  2131			v.AddArg(v0)
  2132			return true
  2133		}
  2134	}
  2135	func rewriteValuePPC64_OpGeq64F_0(v *Value) bool {
  2136		b := v.Block
  2137		// match: (Geq64F x y)
  2138		// cond:
  2139		// result: (FGreaterEqual (FCMPU x y))
  2140		for {
  2141			y := v.Args[1]
  2142			x := v.Args[0]
  2143			v.reset(OpPPC64FGreaterEqual)
  2144			v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  2145			v0.AddArg(x)
  2146			v0.AddArg(y)
  2147			v.AddArg(v0)
  2148			return true
  2149		}
  2150	}
  2151	func rewriteValuePPC64_OpGeq64U_0(v *Value) bool {
  2152		b := v.Block
  2153		// match: (Geq64U x y)
  2154		// cond:
  2155		// result: (GreaterEqual (CMPU x y))
  2156		for {
  2157			y := v.Args[1]
  2158			x := v.Args[0]
  2159			v.reset(OpPPC64GreaterEqual)
  2160			v0 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
  2161			v0.AddArg(x)
  2162			v0.AddArg(y)
  2163			v.AddArg(v0)
  2164			return true
  2165		}
  2166	}
  2167	func rewriteValuePPC64_OpGeq8_0(v *Value) bool {
  2168		b := v.Block
  2169		typ := &b.Func.Config.Types
  2170		// match: (Geq8 x y)
  2171		// cond:
  2172		// result: (GreaterEqual (CMPW (SignExt8to32 x) (SignExt8to32 y)))
  2173		for {
  2174			y := v.Args[1]
  2175			x := v.Args[0]
  2176			v.reset(OpPPC64GreaterEqual)
  2177			v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2178			v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  2179			v1.AddArg(x)
  2180			v0.AddArg(v1)
  2181			v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  2182			v2.AddArg(y)
  2183			v0.AddArg(v2)
  2184			v.AddArg(v0)
  2185			return true
  2186		}
  2187	}
  2188	func rewriteValuePPC64_OpGeq8U_0(v *Value) bool {
  2189		b := v.Block
  2190		typ := &b.Func.Config.Types
  2191		// match: (Geq8U x y)
  2192		// cond:
  2193		// result: (GreaterEqual (CMPWU (ZeroExt8to32 x) (ZeroExt8to32 y)))
  2194		for {
  2195			y := v.Args[1]
  2196			x := v.Args[0]
  2197			v.reset(OpPPC64GreaterEqual)
  2198			v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2199			v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  2200			v1.AddArg(x)
  2201			v0.AddArg(v1)
  2202			v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  2203			v2.AddArg(y)
  2204			v0.AddArg(v2)
  2205			v.AddArg(v0)
  2206			return true
  2207		}
  2208	}
  2209	func rewriteValuePPC64_OpGetCallerPC_0(v *Value) bool {
  2210		// match: (GetCallerPC)
  2211		// cond:
  2212		// result: (LoweredGetCallerPC)
  2213		for {
  2214			v.reset(OpPPC64LoweredGetCallerPC)
  2215			return true
  2216		}
  2217	}
  2218	func rewriteValuePPC64_OpGetCallerSP_0(v *Value) bool {
  2219		// match: (GetCallerSP)
  2220		// cond:
  2221		// result: (LoweredGetCallerSP)
  2222		for {
  2223			v.reset(OpPPC64LoweredGetCallerSP)
  2224			return true
  2225		}
  2226	}
  2227	func rewriteValuePPC64_OpGetClosurePtr_0(v *Value) bool {
  2228		// match: (GetClosurePtr)
  2229		// cond:
  2230		// result: (LoweredGetClosurePtr)
  2231		for {
  2232			v.reset(OpPPC64LoweredGetClosurePtr)
  2233			return true
  2234		}
  2235	}
  2236	func rewriteValuePPC64_OpGreater16_0(v *Value) bool {
  2237		b := v.Block
  2238		typ := &b.Func.Config.Types
  2239		// match: (Greater16 x y)
  2240		// cond:
  2241		// result: (GreaterThan (CMPW (SignExt16to32 x) (SignExt16to32 y)))
  2242		for {
  2243			y := v.Args[1]
  2244			x := v.Args[0]
  2245			v.reset(OpPPC64GreaterThan)
  2246			v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2247			v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  2248			v1.AddArg(x)
  2249			v0.AddArg(v1)
  2250			v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  2251			v2.AddArg(y)
  2252			v0.AddArg(v2)
  2253			v.AddArg(v0)
  2254			return true
  2255		}
  2256	}
  2257	func rewriteValuePPC64_OpGreater16U_0(v *Value) bool {
  2258		b := v.Block
  2259		typ := &b.Func.Config.Types
  2260		// match: (Greater16U x y)
  2261		// cond:
  2262		// result: (GreaterThan (CMPWU (ZeroExt16to32 x) (ZeroExt16to32 y)))
  2263		for {
  2264			y := v.Args[1]
  2265			x := v.Args[0]
  2266			v.reset(OpPPC64GreaterThan)
  2267			v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2268			v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  2269			v1.AddArg(x)
  2270			v0.AddArg(v1)
  2271			v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  2272			v2.AddArg(y)
  2273			v0.AddArg(v2)
  2274			v.AddArg(v0)
  2275			return true
  2276		}
  2277	}
  2278	func rewriteValuePPC64_OpGreater32_0(v *Value) bool {
  2279		b := v.Block
  2280		// match: (Greater32 x y)
  2281		// cond:
  2282		// result: (GreaterThan (CMPW x y))
  2283		for {
  2284			y := v.Args[1]
  2285			x := v.Args[0]
  2286			v.reset(OpPPC64GreaterThan)
  2287			v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2288			v0.AddArg(x)
  2289			v0.AddArg(y)
  2290			v.AddArg(v0)
  2291			return true
  2292		}
  2293	}
  2294	func rewriteValuePPC64_OpGreater32F_0(v *Value) bool {
  2295		b := v.Block
  2296		// match: (Greater32F x y)
  2297		// cond:
  2298		// result: (FGreaterThan (FCMPU x y))
  2299		for {
  2300			y := v.Args[1]
  2301			x := v.Args[0]
  2302			v.reset(OpPPC64FGreaterThan)
  2303			v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  2304			v0.AddArg(x)
  2305			v0.AddArg(y)
  2306			v.AddArg(v0)
  2307			return true
  2308		}
  2309	}
  2310	func rewriteValuePPC64_OpGreater32U_0(v *Value) bool {
  2311		b := v.Block
  2312		// match: (Greater32U x y)
  2313		// cond:
  2314		// result: (GreaterThan (CMPWU x y))
  2315		for {
  2316			y := v.Args[1]
  2317			x := v.Args[0]
  2318			v.reset(OpPPC64GreaterThan)
  2319			v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2320			v0.AddArg(x)
  2321			v0.AddArg(y)
  2322			v.AddArg(v0)
  2323			return true
  2324		}
  2325	}
  2326	func rewriteValuePPC64_OpGreater64_0(v *Value) bool {
  2327		b := v.Block
  2328		// match: (Greater64 x y)
  2329		// cond:
  2330		// result: (GreaterThan (CMP x y))
  2331		for {
  2332			y := v.Args[1]
  2333			x := v.Args[0]
  2334			v.reset(OpPPC64GreaterThan)
  2335			v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
  2336			v0.AddArg(x)
  2337			v0.AddArg(y)
  2338			v.AddArg(v0)
  2339			return true
  2340		}
  2341	}
  2342	func rewriteValuePPC64_OpGreater64F_0(v *Value) bool {
  2343		b := v.Block
  2344		// match: (Greater64F x y)
  2345		// cond:
  2346		// result: (FGreaterThan (FCMPU x y))
  2347		for {
  2348			y := v.Args[1]
  2349			x := v.Args[0]
  2350			v.reset(OpPPC64FGreaterThan)
  2351			v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  2352			v0.AddArg(x)
  2353			v0.AddArg(y)
  2354			v.AddArg(v0)
  2355			return true
  2356		}
  2357	}
  2358	func rewriteValuePPC64_OpGreater64U_0(v *Value) bool {
  2359		b := v.Block
  2360		// match: (Greater64U x y)
  2361		// cond:
  2362		// result: (GreaterThan (CMPU x y))
  2363		for {
  2364			y := v.Args[1]
  2365			x := v.Args[0]
  2366			v.reset(OpPPC64GreaterThan)
  2367			v0 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
  2368			v0.AddArg(x)
  2369			v0.AddArg(y)
  2370			v.AddArg(v0)
  2371			return true
  2372		}
  2373	}
  2374	func rewriteValuePPC64_OpGreater8_0(v *Value) bool {
  2375		b := v.Block
  2376		typ := &b.Func.Config.Types
  2377		// match: (Greater8 x y)
  2378		// cond:
  2379		// result: (GreaterThan (CMPW (SignExt8to32 x) (SignExt8to32 y)))
  2380		for {
  2381			y := v.Args[1]
  2382			x := v.Args[0]
  2383			v.reset(OpPPC64GreaterThan)
  2384			v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2385			v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  2386			v1.AddArg(x)
  2387			v0.AddArg(v1)
  2388			v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  2389			v2.AddArg(y)
  2390			v0.AddArg(v2)
  2391			v.AddArg(v0)
  2392			return true
  2393		}
  2394	}
  2395	func rewriteValuePPC64_OpGreater8U_0(v *Value) bool {
  2396		b := v.Block
  2397		typ := &b.Func.Config.Types
  2398		// match: (Greater8U x y)
  2399		// cond:
  2400		// result: (GreaterThan (CMPWU (ZeroExt8to32 x) (ZeroExt8to32 y)))
  2401		for {
  2402			y := v.Args[1]
  2403			x := v.Args[0]
  2404			v.reset(OpPPC64GreaterThan)
  2405			v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2406			v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  2407			v1.AddArg(x)
  2408			v0.AddArg(v1)
  2409			v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  2410			v2.AddArg(y)
  2411			v0.AddArg(v2)
  2412			v.AddArg(v0)
  2413			return true
  2414		}
  2415	}
  2416	func rewriteValuePPC64_OpHmul32_0(v *Value) bool {
  2417		// match: (Hmul32 x y)
  2418		// cond:
  2419		// result: (MULHW x y)
  2420		for {
  2421			y := v.Args[1]
  2422			x := v.Args[0]
  2423			v.reset(OpPPC64MULHW)
  2424			v.AddArg(x)
  2425			v.AddArg(y)
  2426			return true
  2427		}
  2428	}
  2429	func rewriteValuePPC64_OpHmul32u_0(v *Value) bool {
  2430		// match: (Hmul32u x y)
  2431		// cond:
  2432		// result: (MULHWU x y)
  2433		for {
  2434			y := v.Args[1]
  2435			x := v.Args[0]
  2436			v.reset(OpPPC64MULHWU)
  2437			v.AddArg(x)
  2438			v.AddArg(y)
  2439			return true
  2440		}
  2441	}
  2442	func rewriteValuePPC64_OpHmul64_0(v *Value) bool {
  2443		// match: (Hmul64 x y)
  2444		// cond:
  2445		// result: (MULHD x y)
  2446		for {
  2447			y := v.Args[1]
  2448			x := v.Args[0]
  2449			v.reset(OpPPC64MULHD)
  2450			v.AddArg(x)
  2451			v.AddArg(y)
  2452			return true
  2453		}
  2454	}
  2455	func rewriteValuePPC64_OpHmul64u_0(v *Value) bool {
  2456		// match: (Hmul64u x y)
  2457		// cond:
  2458		// result: (MULHDU x y)
  2459		for {
  2460			y := v.Args[1]
  2461			x := v.Args[0]
  2462			v.reset(OpPPC64MULHDU)
  2463			v.AddArg(x)
  2464			v.AddArg(y)
  2465			return true
  2466		}
  2467	}
  2468	func rewriteValuePPC64_OpInterCall_0(v *Value) bool {
  2469		// match: (InterCall [argwid] entry mem)
  2470		// cond:
  2471		// result: (CALLinter [argwid] entry mem)
  2472		for {
  2473			argwid := v.AuxInt
  2474			mem := v.Args[1]
  2475			entry := v.Args[0]
  2476			v.reset(OpPPC64CALLinter)
  2477			v.AuxInt = argwid
  2478			v.AddArg(entry)
  2479			v.AddArg(mem)
  2480			return true
  2481		}
  2482	}
  2483	func rewriteValuePPC64_OpIsInBounds_0(v *Value) bool {
  2484		b := v.Block
  2485		// match: (IsInBounds idx len)
  2486		// cond:
  2487		// result: (LessThan (CMPU idx len))
  2488		for {
  2489			len := v.Args[1]
  2490			idx := v.Args[0]
  2491			v.reset(OpPPC64LessThan)
  2492			v0 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
  2493			v0.AddArg(idx)
  2494			v0.AddArg(len)
  2495			v.AddArg(v0)
  2496			return true
  2497		}
  2498	}
  2499	func rewriteValuePPC64_OpIsNonNil_0(v *Value) bool {
  2500		b := v.Block
  2501		// match: (IsNonNil ptr)
  2502		// cond:
  2503		// result: (NotEqual (CMPconst [0] ptr))
  2504		for {
  2505			ptr := v.Args[0]
  2506			v.reset(OpPPC64NotEqual)
  2507			v0 := b.NewValue0(v.Pos, OpPPC64CMPconst, types.TypeFlags)
  2508			v0.AuxInt = 0
  2509			v0.AddArg(ptr)
  2510			v.AddArg(v0)
  2511			return true
  2512		}
  2513	}
  2514	func rewriteValuePPC64_OpIsSliceInBounds_0(v *Value) bool {
  2515		b := v.Block
  2516		// match: (IsSliceInBounds idx len)
  2517		// cond:
  2518		// result: (LessEqual (CMPU idx len))
  2519		for {
  2520			len := v.Args[1]
  2521			idx := v.Args[0]
  2522			v.reset(OpPPC64LessEqual)
  2523			v0 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
  2524			v0.AddArg(idx)
  2525			v0.AddArg(len)
  2526			v.AddArg(v0)
  2527			return true
  2528		}
  2529	}
  2530	func rewriteValuePPC64_OpLeq16_0(v *Value) bool {
  2531		b := v.Block
  2532		typ := &b.Func.Config.Types
  2533		// match: (Leq16 x y)
  2534		// cond:
  2535		// result: (LessEqual (CMPW (SignExt16to32 x) (SignExt16to32 y)))
  2536		for {
  2537			y := v.Args[1]
  2538			x := v.Args[0]
  2539			v.reset(OpPPC64LessEqual)
  2540			v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2541			v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  2542			v1.AddArg(x)
  2543			v0.AddArg(v1)
  2544			v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  2545			v2.AddArg(y)
  2546			v0.AddArg(v2)
  2547			v.AddArg(v0)
  2548			return true
  2549		}
  2550	}
  2551	func rewriteValuePPC64_OpLeq16U_0(v *Value) bool {
  2552		b := v.Block
  2553		typ := &b.Func.Config.Types
  2554		// match: (Leq16U x y)
  2555		// cond:
  2556		// result: (LessEqual (CMPWU (ZeroExt16to32 x) (ZeroExt16to32 y)))
  2557		for {
  2558			y := v.Args[1]
  2559			x := v.Args[0]
  2560			v.reset(OpPPC64LessEqual)
  2561			v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2562			v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  2563			v1.AddArg(x)
  2564			v0.AddArg(v1)
  2565			v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  2566			v2.AddArg(y)
  2567			v0.AddArg(v2)
  2568			v.AddArg(v0)
  2569			return true
  2570		}
  2571	}
  2572	func rewriteValuePPC64_OpLeq32_0(v *Value) bool {
  2573		b := v.Block
  2574		// match: (Leq32 x y)
  2575		// cond:
  2576		// result: (LessEqual (CMPW x y))
  2577		for {
  2578			y := v.Args[1]
  2579			x := v.Args[0]
  2580			v.reset(OpPPC64LessEqual)
  2581			v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2582			v0.AddArg(x)
  2583			v0.AddArg(y)
  2584			v.AddArg(v0)
  2585			return true
  2586		}
  2587	}
  2588	func rewriteValuePPC64_OpLeq32F_0(v *Value) bool {
  2589		b := v.Block
  2590		// match: (Leq32F x y)
  2591		// cond:
  2592		// result: (FLessEqual (FCMPU x y))
  2593		for {
  2594			y := v.Args[1]
  2595			x := v.Args[0]
  2596			v.reset(OpPPC64FLessEqual)
  2597			v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  2598			v0.AddArg(x)
  2599			v0.AddArg(y)
  2600			v.AddArg(v0)
  2601			return true
  2602		}
  2603	}
  2604	func rewriteValuePPC64_OpLeq32U_0(v *Value) bool {
  2605		b := v.Block
  2606		// match: (Leq32U x y)
  2607		// cond:
  2608		// result: (LessEqual (CMPWU x y))
  2609		for {
  2610			y := v.Args[1]
  2611			x := v.Args[0]
  2612			v.reset(OpPPC64LessEqual)
  2613			v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2614			v0.AddArg(x)
  2615			v0.AddArg(y)
  2616			v.AddArg(v0)
  2617			return true
  2618		}
  2619	}
  2620	func rewriteValuePPC64_OpLeq64_0(v *Value) bool {
  2621		b := v.Block
  2622		// match: (Leq64 x y)
  2623		// cond:
  2624		// result: (LessEqual (CMP x y))
  2625		for {
  2626			y := v.Args[1]
  2627			x := v.Args[0]
  2628			v.reset(OpPPC64LessEqual)
  2629			v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
  2630			v0.AddArg(x)
  2631			v0.AddArg(y)
  2632			v.AddArg(v0)
  2633			return true
  2634		}
  2635	}
  2636	func rewriteValuePPC64_OpLeq64F_0(v *Value) bool {
  2637		b := v.Block
  2638		// match: (Leq64F x y)
  2639		// cond:
  2640		// result: (FLessEqual (FCMPU x y))
  2641		for {
  2642			y := v.Args[1]
  2643			x := v.Args[0]
  2644			v.reset(OpPPC64FLessEqual)
  2645			v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  2646			v0.AddArg(x)
  2647			v0.AddArg(y)
  2648			v.AddArg(v0)
  2649			return true
  2650		}
  2651	}
  2652	func rewriteValuePPC64_OpLeq64U_0(v *Value) bool {
  2653		b := v.Block
  2654		// match: (Leq64U x y)
  2655		// cond:
  2656		// result: (LessEqual (CMPU x y))
  2657		for {
  2658			y := v.Args[1]
  2659			x := v.Args[0]
  2660			v.reset(OpPPC64LessEqual)
  2661			v0 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
  2662			v0.AddArg(x)
  2663			v0.AddArg(y)
  2664			v.AddArg(v0)
  2665			return true
  2666		}
  2667	}
  2668	func rewriteValuePPC64_OpLeq8_0(v *Value) bool {
  2669		b := v.Block
  2670		typ := &b.Func.Config.Types
  2671		// match: (Leq8 x y)
  2672		// cond:
  2673		// result: (LessEqual (CMPW (SignExt8to32 x) (SignExt8to32 y)))
  2674		for {
  2675			y := v.Args[1]
  2676			x := v.Args[0]
  2677			v.reset(OpPPC64LessEqual)
  2678			v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2679			v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  2680			v1.AddArg(x)
  2681			v0.AddArg(v1)
  2682			v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  2683			v2.AddArg(y)
  2684			v0.AddArg(v2)
  2685			v.AddArg(v0)
  2686			return true
  2687		}
  2688	}
  2689	func rewriteValuePPC64_OpLeq8U_0(v *Value) bool {
  2690		b := v.Block
  2691		typ := &b.Func.Config.Types
  2692		// match: (Leq8U x y)
  2693		// cond:
  2694		// result: (LessEqual (CMPWU (ZeroExt8to32 x) (ZeroExt8to32 y)))
  2695		for {
  2696			y := v.Args[1]
  2697			x := v.Args[0]
  2698			v.reset(OpPPC64LessEqual)
  2699			v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2700			v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  2701			v1.AddArg(x)
  2702			v0.AddArg(v1)
  2703			v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  2704			v2.AddArg(y)
  2705			v0.AddArg(v2)
  2706			v.AddArg(v0)
  2707			return true
  2708		}
  2709	}
  2710	func rewriteValuePPC64_OpLess16_0(v *Value) bool {
  2711		b := v.Block
  2712		typ := &b.Func.Config.Types
  2713		// match: (Less16 x y)
  2714		// cond:
  2715		// result: (LessThan (CMPW (SignExt16to32 x) (SignExt16to32 y)))
  2716		for {
  2717			y := v.Args[1]
  2718			x := v.Args[0]
  2719			v.reset(OpPPC64LessThan)
  2720			v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2721			v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  2722			v1.AddArg(x)
  2723			v0.AddArg(v1)
  2724			v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  2725			v2.AddArg(y)
  2726			v0.AddArg(v2)
  2727			v.AddArg(v0)
  2728			return true
  2729		}
  2730	}
  2731	func rewriteValuePPC64_OpLess16U_0(v *Value) bool {
  2732		b := v.Block
  2733		typ := &b.Func.Config.Types
  2734		// match: (Less16U x y)
  2735		// cond:
  2736		// result: (LessThan (CMPWU (ZeroExt16to32 x) (ZeroExt16to32 y)))
  2737		for {
  2738			y := v.Args[1]
  2739			x := v.Args[0]
  2740			v.reset(OpPPC64LessThan)
  2741			v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2742			v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  2743			v1.AddArg(x)
  2744			v0.AddArg(v1)
  2745			v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  2746			v2.AddArg(y)
  2747			v0.AddArg(v2)
  2748			v.AddArg(v0)
  2749			return true
  2750		}
  2751	}
  2752	func rewriteValuePPC64_OpLess32_0(v *Value) bool {
  2753		b := v.Block
  2754		// match: (Less32 x y)
  2755		// cond:
  2756		// result: (LessThan (CMPW x y))
  2757		for {
  2758			y := v.Args[1]
  2759			x := v.Args[0]
  2760			v.reset(OpPPC64LessThan)
  2761			v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2762			v0.AddArg(x)
  2763			v0.AddArg(y)
  2764			v.AddArg(v0)
  2765			return true
  2766		}
  2767	}
  2768	func rewriteValuePPC64_OpLess32F_0(v *Value) bool {
  2769		b := v.Block
  2770		// match: (Less32F x y)
  2771		// cond:
  2772		// result: (FLessThan (FCMPU x y))
  2773		for {
  2774			y := v.Args[1]
  2775			x := v.Args[0]
  2776			v.reset(OpPPC64FLessThan)
  2777			v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  2778			v0.AddArg(x)
  2779			v0.AddArg(y)
  2780			v.AddArg(v0)
  2781			return true
  2782		}
  2783	}
  2784	func rewriteValuePPC64_OpLess32U_0(v *Value) bool {
  2785		b := v.Block
  2786		// match: (Less32U x y)
  2787		// cond:
  2788		// result: (LessThan (CMPWU x y))
  2789		for {
  2790			y := v.Args[1]
  2791			x := v.Args[0]
  2792			v.reset(OpPPC64LessThan)
  2793			v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2794			v0.AddArg(x)
  2795			v0.AddArg(y)
  2796			v.AddArg(v0)
  2797			return true
  2798		}
  2799	}
  2800	func rewriteValuePPC64_OpLess64_0(v *Value) bool {
  2801		b := v.Block
  2802		// match: (Less64 x y)
  2803		// cond:
  2804		// result: (LessThan (CMP x y))
  2805		for {
  2806			y := v.Args[1]
  2807			x := v.Args[0]
  2808			v.reset(OpPPC64LessThan)
  2809			v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
  2810			v0.AddArg(x)
  2811			v0.AddArg(y)
  2812			v.AddArg(v0)
  2813			return true
  2814		}
  2815	}
  2816	func rewriteValuePPC64_OpLess64F_0(v *Value) bool {
  2817		b := v.Block
  2818		// match: (Less64F x y)
  2819		// cond:
  2820		// result: (FLessThan (FCMPU x y))
  2821		for {
  2822			y := v.Args[1]
  2823			x := v.Args[0]
  2824			v.reset(OpPPC64FLessThan)
  2825			v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  2826			v0.AddArg(x)
  2827			v0.AddArg(y)
  2828			v.AddArg(v0)
  2829			return true
  2830		}
  2831	}
  2832	func rewriteValuePPC64_OpLess64U_0(v *Value) bool {
  2833		b := v.Block
  2834		// match: (Less64U x y)
  2835		// cond:
  2836		// result: (LessThan (CMPU x y))
  2837		for {
  2838			y := v.Args[1]
  2839			x := v.Args[0]
  2840			v.reset(OpPPC64LessThan)
  2841			v0 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
  2842			v0.AddArg(x)
  2843			v0.AddArg(y)
  2844			v.AddArg(v0)
  2845			return true
  2846		}
  2847	}
  2848	func rewriteValuePPC64_OpLess8_0(v *Value) bool {
  2849		b := v.Block
  2850		typ := &b.Func.Config.Types
  2851		// match: (Less8 x y)
  2852		// cond:
  2853		// result: (LessThan (CMPW (SignExt8to32 x) (SignExt8to32 y)))
  2854		for {
  2855			y := v.Args[1]
  2856			x := v.Args[0]
  2857			v.reset(OpPPC64LessThan)
  2858			v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2859			v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  2860			v1.AddArg(x)
  2861			v0.AddArg(v1)
  2862			v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  2863			v2.AddArg(y)
  2864			v0.AddArg(v2)
  2865			v.AddArg(v0)
  2866			return true
  2867		}
  2868	}
  2869	func rewriteValuePPC64_OpLess8U_0(v *Value) bool {
  2870		b := v.Block
  2871		typ := &b.Func.Config.Types
  2872		// match: (Less8U x y)
  2873		// cond:
  2874		// result: (LessThan (CMPWU (ZeroExt8to32 x) (ZeroExt8to32 y)))
  2875		for {
  2876			y := v.Args[1]
  2877			x := v.Args[0]
  2878			v.reset(OpPPC64LessThan)
  2879			v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2880			v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  2881			v1.AddArg(x)
  2882			v0.AddArg(v1)
  2883			v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  2884			v2.AddArg(y)
  2885			v0.AddArg(v2)
  2886			v.AddArg(v0)
  2887			return true
  2888		}
  2889	}
  2890	func rewriteValuePPC64_OpLoad_0(v *Value) bool {
  2891		b := v.Block
  2892		typ := &b.Func.Config.Types
  2893		// match: (Load <t> ptr mem)
  2894		// cond: (is64BitInt(t) || isPtr(t))
  2895		// result: (MOVDload ptr mem)
  2896		for {
  2897			t := v.Type
  2898			mem := v.Args[1]
  2899			ptr := v.Args[0]
  2900			if !(is64BitInt(t) || isPtr(t)) {
  2901				break
  2902			}
  2903			v.reset(OpPPC64MOVDload)
  2904			v.AddArg(ptr)
  2905			v.AddArg(mem)
  2906			return true
  2907		}
  2908		// match: (Load <t> ptr mem)
  2909		// cond: is32BitInt(t) && isSigned(t)
  2910		// result: (MOVWload ptr mem)
  2911		for {
  2912			t := v.Type
  2913			mem := v.Args[1]
  2914			ptr := v.Args[0]
  2915			if !(is32BitInt(t) && isSigned(t)) {
  2916				break
  2917			}
  2918			v.reset(OpPPC64MOVWload)
  2919			v.AddArg(ptr)
  2920			v.AddArg(mem)
  2921			return true
  2922		}
  2923		// match: (Load <t> ptr mem)
  2924		// cond: is32BitInt(t) && !isSigned(t)
  2925		// result: (MOVWZload ptr mem)
  2926		for {
  2927			t := v.Type
  2928			mem := v.Args[1]
  2929			ptr := v.Args[0]
  2930			if !(is32BitInt(t) && !isSigned(t)) {
  2931				break
  2932			}
  2933			v.reset(OpPPC64MOVWZload)
  2934			v.AddArg(ptr)
  2935			v.AddArg(mem)
  2936			return true
  2937		}
  2938		// match: (Load <t> ptr mem)
  2939		// cond: is16BitInt(t) && isSigned(t)
  2940		// result: (MOVHload ptr mem)
  2941		for {
  2942			t := v.Type
  2943			mem := v.Args[1]
  2944			ptr := v.Args[0]
  2945			if !(is16BitInt(t) && isSigned(t)) {
  2946				break
  2947			}
  2948			v.reset(OpPPC64MOVHload)
  2949			v.AddArg(ptr)
  2950			v.AddArg(mem)
  2951			return true
  2952		}
  2953		// match: (Load <t> ptr mem)
  2954		// cond: is16BitInt(t) && !isSigned(t)
  2955		// result: (MOVHZload ptr mem)
  2956		for {
  2957			t := v.Type
  2958			mem := v.Args[1]
  2959			ptr := v.Args[0]
  2960			if !(is16BitInt(t) && !isSigned(t)) {
  2961				break
  2962			}
  2963			v.reset(OpPPC64MOVHZload)
  2964			v.AddArg(ptr)
  2965			v.AddArg(mem)
  2966			return true
  2967		}
  2968		// match: (Load <t> ptr mem)
  2969		// cond: t.IsBoolean()
  2970		// result: (MOVBZload ptr mem)
  2971		for {
  2972			t := v.Type
  2973			mem := v.Args[1]
  2974			ptr := v.Args[0]
  2975			if !(t.IsBoolean()) {
  2976				break
  2977			}
  2978			v.reset(OpPPC64MOVBZload)
  2979			v.AddArg(ptr)
  2980			v.AddArg(mem)
  2981			return true
  2982		}
  2983		// match: (Load <t> ptr mem)
  2984		// cond: is8BitInt(t) && isSigned(t)
  2985		// result: (MOVBreg (MOVBZload ptr mem))
  2986		for {
  2987			t := v.Type
  2988			mem := v.Args[1]
  2989			ptr := v.Args[0]
  2990			if !(is8BitInt(t) && isSigned(t)) {
  2991				break
  2992			}
  2993			v.reset(OpPPC64MOVBreg)
  2994			v0 := b.NewValue0(v.Pos, OpPPC64MOVBZload, typ.UInt8)
  2995			v0.AddArg(ptr)
  2996			v0.AddArg(mem)
  2997			v.AddArg(v0)
  2998			return true
  2999		}
  3000		// match: (Load <t> ptr mem)
  3001		// cond: is8BitInt(t) && !isSigned(t)
  3002		// result: (MOVBZload ptr mem)
  3003		for {
  3004			t := v.Type
  3005			mem := v.Args[1]
  3006			ptr := v.Args[0]
  3007			if !(is8BitInt(t) && !isSigned(t)) {
  3008				break
  3009			}
  3010			v.reset(OpPPC64MOVBZload)
  3011			v.AddArg(ptr)
  3012			v.AddArg(mem)
  3013			return true
  3014		}
  3015		// match: (Load <t> ptr mem)
  3016		// cond: is32BitFloat(t)
  3017		// result: (FMOVSload ptr mem)
  3018		for {
  3019			t := v.Type
  3020			mem := v.Args[1]
  3021			ptr := v.Args[0]
  3022			if !(is32BitFloat(t)) {
  3023				break
  3024			}
  3025			v.reset(OpPPC64FMOVSload)
  3026			v.AddArg(ptr)
  3027			v.AddArg(mem)
  3028			return true
  3029		}
  3030		// match: (Load <t> ptr mem)
  3031		// cond: is64BitFloat(t)
  3032		// result: (FMOVDload ptr mem)
  3033		for {
  3034			t := v.Type
  3035			mem := v.Args[1]
  3036			ptr := v.Args[0]
  3037			if !(is64BitFloat(t)) {
  3038				break
  3039			}
  3040			v.reset(OpPPC64FMOVDload)
  3041			v.AddArg(ptr)
  3042			v.AddArg(mem)
  3043			return true
  3044		}
  3045		return false
  3046	}
  3047	func rewriteValuePPC64_OpLocalAddr_0(v *Value) bool {
  3048		// match: (LocalAddr {sym} base _)
  3049		// cond:
  3050		// result: (MOVDaddr {sym} base)
  3051		for {
  3052			sym := v.Aux
  3053			_ = v.Args[1]
  3054			base := v.Args[0]
  3055			v.reset(OpPPC64MOVDaddr)
  3056			v.Aux = sym
  3057			v.AddArg(base)
  3058			return true
  3059		}
  3060	}
  3061	func rewriteValuePPC64_OpLsh16x16_0(v *Value) bool {
  3062		b := v.Block
  3063		typ := &b.Func.Config.Types
  3064		// match: (Lsh16x16 x y)
  3065		// cond: shiftIsBounded(v)
  3066		// result: (SLW x y)
  3067		for {
  3068			y := v.Args[1]
  3069			x := v.Args[0]
  3070			if !(shiftIsBounded(v)) {
  3071				break
  3072			}
  3073			v.reset(OpPPC64SLW)
  3074			v.AddArg(x)
  3075			v.AddArg(y)
  3076			return true
  3077		}
  3078		// match: (Lsh16x16 x y)
  3079		// cond:
  3080		// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt16to64 y)))))
  3081		for {
  3082			y := v.Args[1]
  3083			x := v.Args[0]
  3084			v.reset(OpPPC64SLW)
  3085			v.AddArg(x)
  3086			v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3087			v0.AddArg(y)
  3088			v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3089			v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3090			v2.AuxInt = -16
  3091			v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
  3092			v3.AddArg(y)
  3093			v2.AddArg(v3)
  3094			v1.AddArg(v2)
  3095			v0.AddArg(v1)
  3096			v.AddArg(v0)
  3097			return true
  3098		}
  3099	}
  3100	func rewriteValuePPC64_OpLsh16x32_0(v *Value) bool {
  3101		b := v.Block
  3102		typ := &b.Func.Config.Types
  3103		// match: (Lsh16x32 x (Const64 [c]))
  3104		// cond: uint32(c) < 16
  3105		// result: (SLWconst x [c])
  3106		for {
  3107			_ = v.Args[1]
  3108			x := v.Args[0]
  3109			v_1 := v.Args[1]
  3110			if v_1.Op != OpConst64 {
  3111				break
  3112			}
  3113			c := v_1.AuxInt
  3114			if !(uint32(c) < 16) {
  3115				break
  3116			}
  3117			v.reset(OpPPC64SLWconst)
  3118			v.AuxInt = c
  3119			v.AddArg(x)
  3120			return true
  3121		}
  3122		// match: (Lsh16x32 x (MOVDconst [c]))
  3123		// cond: uint32(c) < 16
  3124		// result: (SLWconst x [c])
  3125		for {
  3126			_ = v.Args[1]
  3127			x := v.Args[0]
  3128			v_1 := v.Args[1]
  3129			if v_1.Op != OpPPC64MOVDconst {
  3130				break
  3131			}
  3132			c := v_1.AuxInt
  3133			if !(uint32(c) < 16) {
  3134				break
  3135			}
  3136			v.reset(OpPPC64SLWconst)
  3137			v.AuxInt = c
  3138			v.AddArg(x)
  3139			return true
  3140		}
  3141		// match: (Lsh16x32 x y)
  3142		// cond: shiftIsBounded(v)
  3143		// result: (SLW x y)
  3144		for {
  3145			y := v.Args[1]
  3146			x := v.Args[0]
  3147			if !(shiftIsBounded(v)) {
  3148				break
  3149			}
  3150			v.reset(OpPPC64SLW)
  3151			v.AddArg(x)
  3152			v.AddArg(y)
  3153			return true
  3154		}
  3155		// match: (Lsh16x32 x y)
  3156		// cond:
  3157		// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt32to64 y)))))
  3158		for {
  3159			y := v.Args[1]
  3160			x := v.Args[0]
  3161			v.reset(OpPPC64SLW)
  3162			v.AddArg(x)
  3163			v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3164			v0.AddArg(y)
  3165			v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3166			v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3167			v2.AuxInt = -16
  3168			v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
  3169			v3.AddArg(y)
  3170			v2.AddArg(v3)
  3171			v1.AddArg(v2)
  3172			v0.AddArg(v1)
  3173			v.AddArg(v0)
  3174			return true
  3175		}
  3176	}
  3177	func rewriteValuePPC64_OpLsh16x64_0(v *Value) bool {
  3178		b := v.Block
  3179		typ := &b.Func.Config.Types
  3180		// match: (Lsh16x64 x (Const64 [c]))
  3181		// cond: uint64(c) < 16
  3182		// result: (SLWconst x [c])
  3183		for {
  3184			_ = v.Args[1]
  3185			x := v.Args[0]
  3186			v_1 := v.Args[1]
  3187			if v_1.Op != OpConst64 {
  3188				break
  3189			}
  3190			c := v_1.AuxInt
  3191			if !(uint64(c) < 16) {
  3192				break
  3193			}
  3194			v.reset(OpPPC64SLWconst)
  3195			v.AuxInt = c
  3196			v.AddArg(x)
  3197			return true
  3198		}
  3199		// match: (Lsh16x64 _ (Const64 [c]))
  3200		// cond: uint64(c) >= 16
  3201		// result: (MOVDconst [0])
  3202		for {
  3203			_ = v.Args[1]
  3204			v_1 := v.Args[1]
  3205			if v_1.Op != OpConst64 {
  3206				break
  3207			}
  3208			c := v_1.AuxInt
  3209			if !(uint64(c) >= 16) {
  3210				break
  3211			}
  3212			v.reset(OpPPC64MOVDconst)
  3213			v.AuxInt = 0
  3214			return true
  3215		}
  3216		// match: (Lsh16x64 x (MOVDconst [c]))
  3217		// cond: uint64(c) < 16
  3218		// result: (SLWconst x [c])
  3219		for {
  3220			_ = v.Args[1]
  3221			x := v.Args[0]
  3222			v_1 := v.Args[1]
  3223			if v_1.Op != OpPPC64MOVDconst {
  3224				break
  3225			}
  3226			c := v_1.AuxInt
  3227			if !(uint64(c) < 16) {
  3228				break
  3229			}
  3230			v.reset(OpPPC64SLWconst)
  3231			v.AuxInt = c
  3232			v.AddArg(x)
  3233			return true
  3234		}
  3235		// match: (Lsh16x64 x y)
  3236		// cond: shiftIsBounded(v)
  3237		// result: (SLW x y)
  3238		for {
  3239			y := v.Args[1]
  3240			x := v.Args[0]
  3241			if !(shiftIsBounded(v)) {
  3242				break
  3243			}
  3244			v.reset(OpPPC64SLW)
  3245			v.AddArg(x)
  3246			v.AddArg(y)
  3247			return true
  3248		}
  3249		// match: (Lsh16x64 x y)
  3250		// cond:
  3251		// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] y))))
  3252		for {
  3253			y := v.Args[1]
  3254			x := v.Args[0]
  3255			v.reset(OpPPC64SLW)
  3256			v.AddArg(x)
  3257			v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3258			v0.AddArg(y)
  3259			v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3260			v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3261			v2.AuxInt = -16
  3262			v2.AddArg(y)
  3263			v1.AddArg(v2)
  3264			v0.AddArg(v1)
  3265			v.AddArg(v0)
  3266			return true
  3267		}
  3268	}
  3269	func rewriteValuePPC64_OpLsh16x8_0(v *Value) bool {
  3270		b := v.Block
  3271		typ := &b.Func.Config.Types
  3272		// match: (Lsh16x8 x y)
  3273		// cond: shiftIsBounded(v)
  3274		// result: (SLW x y)
  3275		for {
  3276			y := v.Args[1]
  3277			x := v.Args[0]
  3278			if !(shiftIsBounded(v)) {
  3279				break
  3280			}
  3281			v.reset(OpPPC64SLW)
  3282			v.AddArg(x)
  3283			v.AddArg(y)
  3284			return true
  3285		}
  3286		// match: (Lsh16x8 x y)
  3287		// cond:
  3288		// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt8to64 y)))))
  3289		for {
  3290			y := v.Args[1]
  3291			x := v.Args[0]
  3292			v.reset(OpPPC64SLW)
  3293			v.AddArg(x)
  3294			v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3295			v0.AddArg(y)
  3296			v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3297			v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3298			v2.AuxInt = -16
  3299			v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
  3300			v3.AddArg(y)
  3301			v2.AddArg(v3)
  3302			v1.AddArg(v2)
  3303			v0.AddArg(v1)
  3304			v.AddArg(v0)
  3305			return true
  3306		}
  3307	}
  3308	func rewriteValuePPC64_OpLsh32x16_0(v *Value) bool {
  3309		b := v.Block
  3310		typ := &b.Func.Config.Types
  3311		// match: (Lsh32x16 x y)
  3312		// cond: shiftIsBounded(v)
  3313		// result: (SLW x y)
  3314		for {
  3315			y := v.Args[1]
  3316			x := v.Args[0]
  3317			if !(shiftIsBounded(v)) {
  3318				break
  3319			}
  3320			v.reset(OpPPC64SLW)
  3321			v.AddArg(x)
  3322			v.AddArg(y)
  3323			return true
  3324		}
  3325		// match: (Lsh32x16 x y)
  3326		// cond:
  3327		// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt16to64 y)))))
  3328		for {
  3329			y := v.Args[1]
  3330			x := v.Args[0]
  3331			v.reset(OpPPC64SLW)
  3332			v.AddArg(x)
  3333			v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3334			v0.AddArg(y)
  3335			v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3336			v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3337			v2.AuxInt = -32
  3338			v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
  3339			v3.AddArg(y)
  3340			v2.AddArg(v3)
  3341			v1.AddArg(v2)
  3342			v0.AddArg(v1)
  3343			v.AddArg(v0)
  3344			return true
  3345		}
  3346	}
  3347	func rewriteValuePPC64_OpLsh32x32_0(v *Value) bool {
  3348		b := v.Block
  3349		typ := &b.Func.Config.Types
  3350		// match: (Lsh32x32 x (Const64 [c]))
  3351		// cond: uint32(c) < 32
  3352		// result: (SLWconst x [c])
  3353		for {
  3354			_ = v.Args[1]
  3355			x := v.Args[0]
  3356			v_1 := v.Args[1]
  3357			if v_1.Op != OpConst64 {
  3358				break
  3359			}
  3360			c := v_1.AuxInt
  3361			if !(uint32(c) < 32) {
  3362				break
  3363			}
  3364			v.reset(OpPPC64SLWconst)
  3365			v.AuxInt = c
  3366			v.AddArg(x)
  3367			return true
  3368		}
  3369		// match: (Lsh32x32 x (MOVDconst [c]))
  3370		// cond: uint32(c) < 32
  3371		// result: (SLWconst x [c])
  3372		for {
  3373			_ = v.Args[1]
  3374			x := v.Args[0]
  3375			v_1 := v.Args[1]
  3376			if v_1.Op != OpPPC64MOVDconst {
  3377				break
  3378			}
  3379			c := v_1.AuxInt
  3380			if !(uint32(c) < 32) {
  3381				break
  3382			}
  3383			v.reset(OpPPC64SLWconst)
  3384			v.AuxInt = c
  3385			v.AddArg(x)
  3386			return true
  3387		}
  3388		// match: (Lsh32x32 x y)
  3389		// cond: shiftIsBounded(v)
  3390		// result: (SLW x y)
  3391		for {
  3392			y := v.Args[1]
  3393			x := v.Args[0]
  3394			if !(shiftIsBounded(v)) {
  3395				break
  3396			}
  3397			v.reset(OpPPC64SLW)
  3398			v.AddArg(x)
  3399			v.AddArg(y)
  3400			return true
  3401		}
  3402		// match: (Lsh32x32 x y)
  3403		// cond:
  3404		// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt32to64 y)))))
  3405		for {
  3406			y := v.Args[1]
  3407			x := v.Args[0]
  3408			v.reset(OpPPC64SLW)
  3409			v.AddArg(x)
  3410			v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3411			v0.AddArg(y)
  3412			v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3413			v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3414			v2.AuxInt = -32
  3415			v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
  3416			v3.AddArg(y)
  3417			v2.AddArg(v3)
  3418			v1.AddArg(v2)
  3419			v0.AddArg(v1)
  3420			v.AddArg(v0)
  3421			return true
  3422		}
  3423	}
  3424	func rewriteValuePPC64_OpLsh32x64_0(v *Value) bool {
  3425		b := v.Block
  3426		typ := &b.Func.Config.Types
  3427		// match: (Lsh32x64 x (Const64 [c]))
  3428		// cond: uint64(c) < 32
  3429		// result: (SLWconst x [c])
  3430		for {
  3431			_ = v.Args[1]
  3432			x := v.Args[0]
  3433			v_1 := v.Args[1]
  3434			if v_1.Op != OpConst64 {
  3435				break
  3436			}
  3437			c := v_1.AuxInt
  3438			if !(uint64(c) < 32) {
  3439				break
  3440			}
  3441			v.reset(OpPPC64SLWconst)
  3442			v.AuxInt = c
  3443			v.AddArg(x)
  3444			return true
  3445		}
  3446		// match: (Lsh32x64 _ (Const64 [c]))
  3447		// cond: uint64(c) >= 32
  3448		// result: (MOVDconst [0])
  3449		for {
  3450			_ = v.Args[1]
  3451			v_1 := v.Args[1]
  3452			if v_1.Op != OpConst64 {
  3453				break
  3454			}
  3455			c := v_1.AuxInt
  3456			if !(uint64(c) >= 32) {
  3457				break
  3458			}
  3459			v.reset(OpPPC64MOVDconst)
  3460			v.AuxInt = 0
  3461			return true
  3462		}
  3463		// match: (Lsh32x64 x (MOVDconst [c]))
  3464		// cond: uint64(c) < 32
  3465		// result: (SLWconst x [c])
  3466		for {
  3467			_ = v.Args[1]
  3468			x := v.Args[0]
  3469			v_1 := v.Args[1]
  3470			if v_1.Op != OpPPC64MOVDconst {
  3471				break
  3472			}
  3473			c := v_1.AuxInt
  3474			if !(uint64(c) < 32) {
  3475				break
  3476			}
  3477			v.reset(OpPPC64SLWconst)
  3478			v.AuxInt = c
  3479			v.AddArg(x)
  3480			return true
  3481		}
  3482		// match: (Lsh32x64 x y)
  3483		// cond: shiftIsBounded(v)
  3484		// result: (SLW x y)
  3485		for {
  3486			y := v.Args[1]
  3487			x := v.Args[0]
  3488			if !(shiftIsBounded(v)) {
  3489				break
  3490			}
  3491			v.reset(OpPPC64SLW)
  3492			v.AddArg(x)
  3493			v.AddArg(y)
  3494			return true
  3495		}
  3496		// match: (Lsh32x64 x (AND y (MOVDconst [31])))
  3497		// cond:
  3498		// result: (SLW x (ANDconst <typ.Int32> [31] y))
  3499		for {
  3500			_ = v.Args[1]
  3501			x := v.Args[0]
  3502			v_1 := v.Args[1]
  3503			if v_1.Op != OpPPC64AND {
  3504				break
  3505			}
  3506			_ = v_1.Args[1]
  3507			y := v_1.Args[0]
  3508			v_1_1 := v_1.Args[1]
  3509			if v_1_1.Op != OpPPC64MOVDconst {
  3510				break
  3511			}
  3512			if v_1_1.AuxInt != 31 {
  3513				break
  3514			}
  3515			v.reset(OpPPC64SLW)
  3516			v.AddArg(x)
  3517			v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int32)
  3518			v0.AuxInt = 31
  3519			v0.AddArg(y)
  3520			v.AddArg(v0)
  3521			return true
  3522		}
  3523		// match: (Lsh32x64 x (AND (MOVDconst [31]) y))
  3524		// cond:
  3525		// result: (SLW x (ANDconst <typ.Int32> [31] y))
  3526		for {
  3527			_ = v.Args[1]
  3528			x := v.Args[0]
  3529			v_1 := v.Args[1]
  3530			if v_1.Op != OpPPC64AND {
  3531				break
  3532			}
  3533			y := v_1.Args[1]
  3534			v_1_0 := v_1.Args[0]
  3535			if v_1_0.Op != OpPPC64MOVDconst {
  3536				break
  3537			}
  3538			if v_1_0.AuxInt != 31 {
  3539				break
  3540			}
  3541			v.reset(OpPPC64SLW)
  3542			v.AddArg(x)
  3543			v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int32)
  3544			v0.AuxInt = 31
  3545			v0.AddArg(y)
  3546			v.AddArg(v0)
  3547			return true
  3548		}
  3549		// match: (Lsh32x64 x (ANDconst <typ.Int32> [31] y))
  3550		// cond:
  3551		// result: (SLW x (ANDconst <typ.Int32> [31] y))
  3552		for {
  3553			_ = v.Args[1]
  3554			x := v.Args[0]
  3555			v_1 := v.Args[1]
  3556			if v_1.Op != OpPPC64ANDconst {
  3557				break
  3558			}
  3559			if v_1.Type != typ.Int32 {
  3560				break
  3561			}
  3562			if v_1.AuxInt != 31 {
  3563				break
  3564			}
  3565			y := v_1.Args[0]
  3566			v.reset(OpPPC64SLW)
  3567			v.AddArg(x)
  3568			v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int32)
  3569			v0.AuxInt = 31
  3570			v0.AddArg(y)
  3571			v.AddArg(v0)
  3572			return true
  3573		}
  3574		// match: (Lsh32x64 x y)
  3575		// cond:
  3576		// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] y))))
  3577		for {
  3578			y := v.Args[1]
  3579			x := v.Args[0]
  3580			v.reset(OpPPC64SLW)
  3581			v.AddArg(x)
  3582			v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3583			v0.AddArg(y)
  3584			v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3585			v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3586			v2.AuxInt = -32
  3587			v2.AddArg(y)
  3588			v1.AddArg(v2)
  3589			v0.AddArg(v1)
  3590			v.AddArg(v0)
  3591			return true
  3592		}
  3593	}
  3594	func rewriteValuePPC64_OpLsh32x8_0(v *Value) bool {
  3595		b := v.Block
  3596		typ := &b.Func.Config.Types
  3597		// match: (Lsh32x8 x y)
  3598		// cond: shiftIsBounded(v)
  3599		// result: (SLW x y)
  3600		for {
  3601			y := v.Args[1]
  3602			x := v.Args[0]
  3603			if !(shiftIsBounded(v)) {
  3604				break
  3605			}
  3606			v.reset(OpPPC64SLW)
  3607			v.AddArg(x)
  3608			v.AddArg(y)
  3609			return true
  3610		}
  3611		// match: (Lsh32x8 x y)
  3612		// cond:
  3613		// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt8to64 y)))))
  3614		for {
  3615			y := v.Args[1]
  3616			x := v.Args[0]
  3617			v.reset(OpPPC64SLW)
  3618			v.AddArg(x)
  3619			v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3620			v0.AddArg(y)
  3621			v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3622			v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3623			v2.AuxInt = -32
  3624			v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
  3625			v3.AddArg(y)
  3626			v2.AddArg(v3)
  3627			v1.AddArg(v2)
  3628			v0.AddArg(v1)
  3629			v.AddArg(v0)
  3630			return true
  3631		}
  3632	}
  3633	func rewriteValuePPC64_OpLsh64x16_0(v *Value) bool {
  3634		b := v.Block
  3635		typ := &b.Func.Config.Types
  3636		// match: (Lsh64x16 x y)
  3637		// cond: shiftIsBounded(v)
  3638		// result: (SLD x y)
  3639		for {
  3640			y := v.Args[1]
  3641			x := v.Args[0]
  3642			if !(shiftIsBounded(v)) {
  3643				break
  3644			}
  3645			v.reset(OpPPC64SLD)
  3646			v.AddArg(x)
  3647			v.AddArg(y)
  3648			return true
  3649		}
  3650		// match: (Lsh64x16 x y)
  3651		// cond:
  3652		// result: (SLD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt16to64 y)))))
  3653		for {
  3654			y := v.Args[1]
  3655			x := v.Args[0]
  3656			v.reset(OpPPC64SLD)
  3657			v.AddArg(x)
  3658			v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3659			v0.AddArg(y)
  3660			v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3661			v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3662			v2.AuxInt = -64
  3663			v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
  3664			v3.AddArg(y)
  3665			v2.AddArg(v3)
  3666			v1.AddArg(v2)
  3667			v0.AddArg(v1)
  3668			v.AddArg(v0)
  3669			return true
  3670		}
  3671	}
  3672	func rewriteValuePPC64_OpLsh64x32_0(v *Value) bool {
  3673		b := v.Block
  3674		typ := &b.Func.Config.Types
  3675		// match: (Lsh64x32 x (Const64 [c]))
  3676		// cond: uint32(c) < 64
  3677		// result: (SLDconst x [c])
  3678		for {
  3679			_ = v.Args[1]
  3680			x := v.Args[0]
  3681			v_1 := v.Args[1]
  3682			if v_1.Op != OpConst64 {
  3683				break
  3684			}
  3685			c := v_1.AuxInt
  3686			if !(uint32(c) < 64) {
  3687				break
  3688			}
  3689			v.reset(OpPPC64SLDconst)
  3690			v.AuxInt = c
  3691			v.AddArg(x)
  3692			return true
  3693		}
  3694		// match: (Lsh64x32 x (MOVDconst [c]))
  3695		// cond: uint32(c) < 64
  3696		// result: (SLDconst x [c])
  3697		for {
  3698			_ = v.Args[1]
  3699			x := v.Args[0]
  3700			v_1 := v.Args[1]
  3701			if v_1.Op != OpPPC64MOVDconst {
  3702				break
  3703			}
  3704			c := v_1.AuxInt
  3705			if !(uint32(c) < 64) {
  3706				break
  3707			}
  3708			v.reset(OpPPC64SLDconst)
  3709			v.AuxInt = c
  3710			v.AddArg(x)
  3711			return true
  3712		}
  3713		// match: (Lsh64x32 x y)
  3714		// cond: shiftIsBounded(v)
  3715		// result: (SLD x y)
  3716		for {
  3717			y := v.Args[1]
  3718			x := v.Args[0]
  3719			if !(shiftIsBounded(v)) {
  3720				break
  3721			}
  3722			v.reset(OpPPC64SLD)
  3723			v.AddArg(x)
  3724			v.AddArg(y)
  3725			return true
  3726		}
  3727		// match: (Lsh64x32 x y)
  3728		// cond:
  3729		// result: (SLD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt32to64 y)))))
  3730		for {
  3731			y := v.Args[1]
  3732			x := v.Args[0]
  3733			v.reset(OpPPC64SLD)
  3734			v.AddArg(x)
  3735			v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3736			v0.AddArg(y)
  3737			v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3738			v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3739			v2.AuxInt = -64
  3740			v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
  3741			v3.AddArg(y)
  3742			v2.AddArg(v3)
  3743			v1.AddArg(v2)
  3744			v0.AddArg(v1)
  3745			v.AddArg(v0)
  3746			return true
  3747		}
  3748	}
  3749	func rewriteValuePPC64_OpLsh64x64_0(v *Value) bool {
  3750		b := v.Block
  3751		typ := &b.Func.Config.Types
  3752		// match: (Lsh64x64 x (Const64 [c]))
  3753		// cond: uint64(c) < 64
  3754		// result: (SLDconst x [c])
  3755		for {
  3756			_ = v.Args[1]
  3757			x := v.Args[0]
  3758			v_1 := v.Args[1]
  3759			if v_1.Op != OpConst64 {
  3760				break
  3761			}
  3762			c := v_1.AuxInt
  3763			if !(uint64(c) < 64) {
  3764				break
  3765			}
  3766			v.reset(OpPPC64SLDconst)
  3767			v.AuxInt = c
  3768			v.AddArg(x)
  3769			return true
  3770		}
  3771		// match: (Lsh64x64 _ (Const64 [c]))
  3772		// cond: uint64(c) >= 64
  3773		// result: (MOVDconst [0])
  3774		for {
  3775			_ = v.Args[1]
  3776			v_1 := v.Args[1]
  3777			if v_1.Op != OpConst64 {
  3778				break
  3779			}
  3780			c := v_1.AuxInt
  3781			if !(uint64(c) >= 64) {
  3782				break
  3783			}
  3784			v.reset(OpPPC64MOVDconst)
  3785			v.AuxInt = 0
  3786			return true
  3787		}
  3788		// match: (Lsh64x64 x (MOVDconst [c]))
  3789		// cond: uint64(c) < 64
  3790		// result: (SLDconst x [c])
  3791		for {
  3792			_ = v.Args[1]
  3793			x := v.Args[0]
  3794			v_1 := v.Args[1]
  3795			if v_1.Op != OpPPC64MOVDconst {
  3796				break
  3797			}
  3798			c := v_1.AuxInt
  3799			if !(uint64(c) < 64) {
  3800				break
  3801			}
  3802			v.reset(OpPPC64SLDconst)
  3803			v.AuxInt = c
  3804			v.AddArg(x)
  3805			return true
  3806		}
  3807		// match: (Lsh64x64 x y)
  3808		// cond: shiftIsBounded(v)
  3809		// result: (SLD x y)
  3810		for {
  3811			y := v.Args[1]
  3812			x := v.Args[0]
  3813			if !(shiftIsBounded(v)) {
  3814				break
  3815			}
  3816			v.reset(OpPPC64SLD)
  3817			v.AddArg(x)
  3818			v.AddArg(y)
  3819			return true
  3820		}
  3821		// match: (Lsh64x64 x (AND y (MOVDconst [63])))
  3822		// cond:
  3823		// result: (SLD x (ANDconst <typ.Int64> [63] y))
  3824		for {
  3825			_ = v.Args[1]
  3826			x := v.Args[0]
  3827			v_1 := v.Args[1]
  3828			if v_1.Op != OpPPC64AND {
  3829				break
  3830			}
  3831			_ = v_1.Args[1]
  3832			y := v_1.Args[0]
  3833			v_1_1 := v_1.Args[1]
  3834			if v_1_1.Op != OpPPC64MOVDconst {
  3835				break
  3836			}
  3837			if v_1_1.AuxInt != 63 {
  3838				break
  3839			}
  3840			v.reset(OpPPC64SLD)
  3841			v.AddArg(x)
  3842			v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int64)
  3843			v0.AuxInt = 63
  3844			v0.AddArg(y)
  3845			v.AddArg(v0)
  3846			return true
  3847		}
  3848		// match: (Lsh64x64 x (AND (MOVDconst [63]) y))
  3849		// cond:
  3850		// result: (SLD x (ANDconst <typ.Int64> [63] y))
  3851		for {
  3852			_ = v.Args[1]
  3853			x := v.Args[0]
  3854			v_1 := v.Args[1]
  3855			if v_1.Op != OpPPC64AND {
  3856				break
  3857			}
  3858			y := v_1.Args[1]
  3859			v_1_0 := v_1.Args[0]
  3860			if v_1_0.Op != OpPPC64MOVDconst {
  3861				break
  3862			}
  3863			if v_1_0.AuxInt != 63 {
  3864				break
  3865			}
  3866			v.reset(OpPPC64SLD)
  3867			v.AddArg(x)
  3868			v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int64)
  3869			v0.AuxInt = 63
  3870			v0.AddArg(y)
  3871			v.AddArg(v0)
  3872			return true
  3873		}
  3874		// match: (Lsh64x64 x (ANDconst <typ.Int64> [63] y))
  3875		// cond:
  3876		// result: (SLD x (ANDconst <typ.Int64> [63] y))
  3877		for {
  3878			_ = v.Args[1]
  3879			x := v.Args[0]
  3880			v_1 := v.Args[1]
  3881			if v_1.Op != OpPPC64ANDconst {
  3882				break
  3883			}
  3884			if v_1.Type != typ.Int64 {
  3885				break
  3886			}
  3887			if v_1.AuxInt != 63 {
  3888				break
  3889			}
  3890			y := v_1.Args[0]
  3891			v.reset(OpPPC64SLD)
  3892			v.AddArg(x)
  3893			v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int64)
  3894			v0.AuxInt = 63
  3895			v0.AddArg(y)
  3896			v.AddArg(v0)
  3897			return true
  3898		}
  3899		// match: (Lsh64x64 x y)
  3900		// cond:
  3901		// result: (SLD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] y))))
  3902		for {
  3903			y := v.Args[1]
  3904			x := v.Args[0]
  3905			v.reset(OpPPC64SLD)
  3906			v.AddArg(x)
  3907			v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3908			v0.AddArg(y)
  3909			v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3910			v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3911			v2.AuxInt = -64
  3912			v2.AddArg(y)
  3913			v1.AddArg(v2)
  3914			v0.AddArg(v1)
  3915			v.AddArg(v0)
  3916			return true
  3917		}
  3918	}
  3919	func rewriteValuePPC64_OpLsh64x8_0(v *Value) bool {
  3920		b := v.Block
  3921		typ := &b.Func.Config.Types
  3922		// match: (Lsh64x8 x y)
  3923		// cond: shiftIsBounded(v)
  3924		// result: (SLD x y)
  3925		for {
  3926			y := v.Args[1]
  3927			x := v.Args[0]
  3928			if !(shiftIsBounded(v)) {
  3929				break
  3930			}
  3931			v.reset(OpPPC64SLD)
  3932			v.AddArg(x)
  3933			v.AddArg(y)
  3934			return true
  3935		}
  3936		// match: (Lsh64x8 x y)
  3937		// cond:
  3938		// result: (SLD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt8to64 y)))))
  3939		for {
  3940			y := v.Args[1]
  3941			x := v.Args[0]
  3942			v.reset(OpPPC64SLD)
  3943			v.AddArg(x)
  3944			v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3945			v0.AddArg(y)
  3946			v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3947			v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3948			v2.AuxInt = -64
  3949			v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
  3950			v3.AddArg(y)
  3951			v2.AddArg(v3)
  3952			v1.AddArg(v2)
  3953			v0.AddArg(v1)
  3954			v.AddArg(v0)
  3955			return true
  3956		}
  3957	}
  3958	func rewriteValuePPC64_OpLsh8x16_0(v *Value) bool {
  3959		b := v.Block
  3960		typ := &b.Func.Config.Types
  3961		// match: (Lsh8x16 x y)
  3962		// cond: shiftIsBounded(v)
  3963		// result: (SLW x y)
  3964		for {
  3965			y := v.Args[1]
  3966			x := v.Args[0]
  3967			if !(shiftIsBounded(v)) {
  3968				break
  3969			}
  3970			v.reset(OpPPC64SLW)
  3971			v.AddArg(x)
  3972			v.AddArg(y)
  3973			return true
  3974		}
  3975		// match: (Lsh8x16 x y)
  3976		// cond:
  3977		// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt16to64 y)))))
  3978		for {
  3979			y := v.Args[1]
  3980			x := v.Args[0]
  3981			v.reset(OpPPC64SLW)
  3982			v.AddArg(x)
  3983			v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3984			v0.AddArg(y)
  3985			v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3986			v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3987			v2.AuxInt = -8
  3988			v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
  3989			v3.AddArg(y)
  3990			v2.AddArg(v3)
  3991			v1.AddArg(v2)
  3992			v0.AddArg(v1)
  3993			v.AddArg(v0)
  3994			return true
  3995		}
  3996	}
  3997	func rewriteValuePPC64_OpLsh8x32_0(v *Value) bool {
  3998		b := v.Block
  3999		typ := &b.Func.Config.Types
  4000		// match: (Lsh8x32 x (Const64 [c]))
  4001		// cond: uint32(c) < 8
  4002		// result: (SLWconst x [c])
  4003		for {
  4004			_ = v.Args[1]
  4005			x := v.Args[0]
  4006			v_1 := v.Args[1]
  4007			if v_1.Op != OpConst64 {
  4008				break
  4009			}
  4010			c := v_1.AuxInt
  4011			if !(uint32(c) < 8) {
  4012				break
  4013			}
  4014			v.reset(OpPPC64SLWconst)
  4015			v.AuxInt = c
  4016			v.AddArg(x)
  4017			return true
  4018		}
  4019		// match: (Lsh8x32 x (MOVDconst [c]))
  4020		// cond: uint32(c) < 8
  4021		// result: (SLWconst x [c])
  4022		for {
  4023			_ = v.Args[1]
  4024			x := v.Args[0]
  4025			v_1 := v.Args[1]
  4026			if v_1.Op != OpPPC64MOVDconst {
  4027				break
  4028			}
  4029			c := v_1.AuxInt
  4030			if !(uint32(c) < 8) {
  4031				break
  4032			}
  4033			v.reset(OpPPC64SLWconst)
  4034			v.AuxInt = c
  4035			v.AddArg(x)
  4036			return true
  4037		}
  4038		// match: (Lsh8x32 x y)
  4039		// cond: shiftIsBounded(v)
  4040		// result: (SLW x y)
  4041		for {
  4042			y := v.Args[1]
  4043			x := v.Args[0]
  4044			if !(shiftIsBounded(v)) {
  4045				break
  4046			}
  4047			v.reset(OpPPC64SLW)
  4048			v.AddArg(x)
  4049			v.AddArg(y)
  4050			return true
  4051		}
  4052		// match: (Lsh8x32 x y)
  4053		// cond:
  4054		// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt32to64 y)))))
  4055		for {
  4056			y := v.Args[1]
  4057			x := v.Args[0]
  4058			v.reset(OpPPC64SLW)
  4059			v.AddArg(x)
  4060			v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  4061			v0.AddArg(y)
  4062			v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  4063			v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  4064			v2.AuxInt = -8
  4065			v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
  4066			v3.AddArg(y)
  4067			v2.AddArg(v3)
  4068			v1.AddArg(v2)
  4069			v0.AddArg(v1)
  4070			v.AddArg(v0)
  4071			return true
  4072		}
  4073	}
  4074	func rewriteValuePPC64_OpLsh8x64_0(v *Value) bool {
  4075		b := v.Block
  4076		typ := &b.Func.Config.Types
  4077		// match: (Lsh8x64 x (Const64 [c]))
  4078		// cond: uint64(c) < 8
  4079		// result: (SLWconst x [c])
  4080		for {
  4081			_ = v.Args[1]
  4082			x := v.Args[0]
  4083			v_1 := v.Args[1]
  4084			if v_1.Op != OpConst64 {
  4085				break
  4086			}
  4087			c := v_1.AuxInt
  4088			if !(uint64(c) < 8) {
  4089				break
  4090			}
  4091			v.reset(OpPPC64SLWconst)
  4092			v.AuxInt = c
  4093			v.AddArg(x)
  4094			return true
  4095		}
  4096		// match: (Lsh8x64 _ (Const64 [c]))
  4097		// cond: uint64(c) >= 8
  4098		// result: (MOVDconst [0])
  4099		for {
  4100			_ = v.Args[1]
  4101			v_1 := v.Args[1]
  4102			if v_1.Op != OpConst64 {
  4103				break
  4104			}
  4105			c := v_1.AuxInt
  4106			if !(uint64(c) >= 8) {
  4107				break
  4108			}
  4109			v.reset(OpPPC64MOVDconst)
  4110			v.AuxInt = 0
  4111			return true
  4112		}
  4113		// match: (Lsh8x64 x (MOVDconst [c]))
  4114		// cond: uint64(c) < 8
  4115		// result: (SLWconst x [c])
  4116		for {
  4117			_ = v.Args[1]
  4118			x := v.Args[0]
  4119			v_1 := v.Args[1]
  4120			if v_1.Op != OpPPC64MOVDconst {
  4121				break
  4122			}
  4123			c := v_1.AuxInt
  4124			if !(uint64(c) < 8) {
  4125				break
  4126			}
  4127			v.reset(OpPPC64SLWconst)
  4128			v.AuxInt = c
  4129			v.AddArg(x)
  4130			return true
  4131		}
  4132		// match: (Lsh8x64 x y)
  4133		// cond: shiftIsBounded(v)
  4134		// result: (SLW x y)
  4135		for {
  4136			y := v.Args[1]
  4137			x := v.Args[0]
  4138			if !(shiftIsBounded(v)) {
  4139				break
  4140			}
  4141			v.reset(OpPPC64SLW)
  4142			v.AddArg(x)
  4143			v.AddArg(y)
  4144			return true
  4145		}
  4146		// match: (Lsh8x64 x y)
  4147		// cond:
  4148		// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] y))))
  4149		for {
  4150			y := v.Args[1]
  4151			x := v.Args[0]
  4152			v.reset(OpPPC64SLW)
  4153			v.AddArg(x)
  4154			v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  4155			v0.AddArg(y)
  4156			v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  4157			v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  4158			v2.AuxInt = -8
  4159			v2.AddArg(y)
  4160			v1.AddArg(v2)
  4161			v0.AddArg(v1)
  4162			v.AddArg(v0)
  4163			return true
  4164		}
  4165	}
  4166	func rewriteValuePPC64_OpLsh8x8_0(v *Value) bool {
  4167		b := v.Block
  4168		typ := &b.Func.Config.Types
  4169		// match: (Lsh8x8 x y)
  4170		// cond: shiftIsBounded(v)
  4171		// result: (SLW x y)
  4172		for {
  4173			y := v.Args[1]
  4174			x := v.Args[0]
  4175			if !(shiftIsBounded(v)) {
  4176				break
  4177			}
  4178			v.reset(OpPPC64SLW)
  4179			v.AddArg(x)
  4180			v.AddArg(y)
  4181			return true
  4182		}
  4183		// match: (Lsh8x8 x y)
  4184		// cond:
  4185		// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt8to64 y)))))
  4186		for {
  4187			y := v.Args[1]
  4188			x := v.Args[0]
  4189			v.reset(OpPPC64SLW)
  4190			v.AddArg(x)
  4191			v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  4192			v0.AddArg(y)
  4193			v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  4194			v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  4195			v2.AuxInt = -8
  4196			v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
  4197			v3.AddArg(y)
  4198			v2.AddArg(v3)
  4199			v1.AddArg(v2)
  4200			v0.AddArg(v1)
  4201			v.AddArg(v0)
  4202			return true
  4203		}
  4204	}
  4205	func rewriteValuePPC64_OpMod16_0(v *Value) bool {
  4206		b := v.Block
  4207		typ := &b.Func.Config.Types
  4208		// match: (Mod16 x y)
  4209		// cond:
  4210		// result: (Mod32 (SignExt16to32 x) (SignExt16to32 y))
  4211		for {
  4212			y := v.Args[1]
  4213			x := v.Args[0]
  4214			v.reset(OpMod32)
  4215			v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  4216			v0.AddArg(x)
  4217			v.AddArg(v0)
  4218			v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  4219			v1.AddArg(y)
  4220			v.AddArg(v1)
  4221			return true
  4222		}
  4223	}
  4224	func rewriteValuePPC64_OpMod16u_0(v *Value) bool {
  4225		b := v.Block
  4226		typ := &b.Func.Config.Types
  4227		// match: (Mod16u x y)
  4228		// cond:
  4229		// result: (Mod32u (ZeroExt16to32 x) (ZeroExt16to32 y))
  4230		for {
  4231			y := v.Args[1]
  4232			x := v.Args[0]
  4233			v.reset(OpMod32u)
  4234			v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  4235			v0.AddArg(x)
  4236			v.AddArg(v0)
  4237			v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  4238			v1.AddArg(y)
  4239			v.AddArg(v1)
  4240			return true
  4241		}
  4242	}
  4243	func rewriteValuePPC64_OpMod32_0(v *Value) bool {
  4244		b := v.Block
  4245		typ := &b.Func.Config.Types
  4246		// match: (Mod32 x y)
  4247		// cond:
  4248		// result: (SUB x (MULLW y (DIVW x y)))
  4249		for {
  4250			y := v.Args[1]
  4251			x := v.Args[0]
  4252			v.reset(OpPPC64SUB)
  4253			v.AddArg(x)
  4254			v0 := b.NewValue0(v.Pos, OpPPC64MULLW, typ.Int32)
  4255			v0.AddArg(y)
  4256			v1 := b.NewValue0(v.Pos, OpPPC64DIVW, typ.Int32)
  4257			v1.AddArg(x)
  4258			v1.AddArg(y)
  4259			v0.AddArg(v1)
  4260			v.AddArg(v0)
  4261			return true
  4262		}
  4263	}
  4264	func rewriteValuePPC64_OpMod32u_0(v *Value) bool {
  4265		b := v.Block
  4266		typ := &b.Func.Config.Types
  4267		// match: (Mod32u x y)
  4268		// cond:
  4269		// result: (SUB x (MULLW y (DIVWU x y)))
  4270		for {
  4271			y := v.Args[1]
  4272			x := v.Args[0]
  4273			v.reset(OpPPC64SUB)
  4274			v.AddArg(x)
  4275			v0 := b.NewValue0(v.Pos, OpPPC64MULLW, typ.Int32)
  4276			v0.AddArg(y)
  4277			v1 := b.NewValue0(v.Pos, OpPPC64DIVWU, typ.Int32)
  4278			v1.AddArg(x)
  4279			v1.AddArg(y)
  4280			v0.AddArg(v1)
  4281			v.AddArg(v0)
  4282			return true
  4283		}
  4284	}
  4285	func rewriteValuePPC64_OpMod64_0(v *Value) bool {
  4286		b := v.Block
  4287		typ := &b.Func.Config.Types
  4288		// match: (Mod64 x y)
  4289		// cond:
  4290		// result: (SUB x (MULLD y (DIVD x y)))
  4291		for {
  4292			y := v.Args[1]
  4293			x := v.Args[0]
  4294			v.reset(OpPPC64SUB)
  4295			v.AddArg(x)
  4296			v0 := b.NewValue0(v.Pos, OpPPC64MULLD, typ.Int64)
  4297			v0.AddArg(y)
  4298			v1 := b.NewValue0(v.Pos, OpPPC64DIVD, typ.Int64)
  4299			v1.AddArg(x)
  4300			v1.AddArg(y)
  4301			v0.AddArg(v1)
  4302			v.AddArg(v0)
  4303			return true
  4304		}
  4305	}
  4306	func rewriteValuePPC64_OpMod64u_0(v *Value) bool {
  4307		b := v.Block
  4308		typ := &b.Func.Config.Types
  4309		// match: (Mod64u x y)
  4310		// cond:
  4311		// result: (SUB x (MULLD y (DIVDU x y)))
  4312		for {
  4313			y := v.Args[1]
  4314			x := v.Args[0]
  4315			v.reset(OpPPC64SUB)
  4316			v.AddArg(x)
  4317			v0 := b.NewValue0(v.Pos, OpPPC64MULLD, typ.Int64)
  4318			v0.AddArg(y)
  4319			v1 := b.NewValue0(v.Pos, OpPPC64DIVDU, typ.Int64)
  4320			v1.AddArg(x)
  4321			v1.AddArg(y)
  4322			v0.AddArg(v1)
  4323			v.AddArg(v0)
  4324			return true
  4325		}
  4326	}
  4327	func rewriteValuePPC64_OpMod8_0(v *Value) bool {
  4328		b := v.Block
  4329		typ := &b.Func.Config.Types
  4330		// match: (Mod8 x y)
  4331		// cond:
  4332		// result: (Mod32 (SignExt8to32 x) (SignExt8to32 y))
  4333		for {
  4334			y := v.Args[1]
  4335			x := v.Args[0]
  4336			v.reset(OpMod32)
  4337			v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  4338			v0.AddArg(x)
  4339			v.AddArg(v0)
  4340			v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  4341			v1.AddArg(y)
  4342			v.AddArg(v1)
  4343			return true
  4344		}
  4345	}
  4346	func rewriteValuePPC64_OpMod8u_0(v *Value) bool {
  4347		b := v.Block
  4348		typ := &b.Func.Config.Types
  4349		// match: (Mod8u x y)
  4350		// cond:
  4351		// result: (Mod32u (ZeroExt8to32 x) (ZeroExt8to32 y))
  4352		for {
  4353			y := v.Args[1]
  4354			x := v.Args[0]
  4355			v.reset(OpMod32u)
  4356			v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  4357			v0.AddArg(x)
  4358			v.AddArg(v0)
  4359			v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  4360			v1.AddArg(y)
  4361			v.AddArg(v1)
  4362			return true
  4363		}
  4364	}
  4365	func rewriteValuePPC64_OpMove_0(v *Value) bool {
  4366		b := v.Block
  4367		typ := &b.Func.Config.Types
  4368		// match: (Move [0] _ _ mem)
  4369		// cond:
  4370		// result: mem
  4371		for {
  4372			if v.AuxInt != 0 {
  4373				break
  4374			}
  4375			mem := v.Args[2]
  4376			v.reset(OpCopy)
  4377			v.Type = mem.Type
  4378			v.AddArg(mem)
  4379			return true
  4380		}
  4381		// match: (Move [1] dst src mem)
  4382		// cond:
  4383		// result: (MOVBstore dst (MOVBZload src mem) mem)
  4384		for {
  4385			if v.AuxInt != 1 {
  4386				break
  4387			}
  4388			mem := v.Args[2]
  4389			dst := v.Args[0]
  4390			src := v.Args[1]
  4391			v.reset(OpPPC64MOVBstore)
  4392			v.AddArg(dst)
  4393			v0 := b.NewValue0(v.Pos, OpPPC64MOVBZload, typ.UInt8)
  4394			v0.AddArg(src)
  4395			v0.AddArg(mem)
  4396			v.AddArg(v0)
  4397			v.AddArg(mem)
  4398			return true
  4399		}
  4400		// match: (Move [2] dst src mem)
  4401		// cond:
  4402		// result: (MOVHstore dst (MOVHZload src mem) mem)
  4403		for {
  4404			if v.AuxInt != 2 {
  4405				break
  4406			}
  4407			mem := v.Args[2]
  4408			dst := v.Args[0]
  4409			src := v.Args[1]
  4410			v.reset(OpPPC64MOVHstore)
  4411			v.AddArg(dst)
  4412			v0 := b.NewValue0(v.Pos, OpPPC64MOVHZload, typ.UInt16)
  4413			v0.AddArg(src)
  4414			v0.AddArg(mem)
  4415			v.AddArg(v0)
  4416			v.AddArg(mem)
  4417			return true
  4418		}
  4419		// match: (Move [4] dst src mem)
  4420		// cond:
  4421		// result: (MOVWstore dst (MOVWZload src mem) mem)
  4422		for {
  4423			if v.AuxInt != 4 {
  4424				break
  4425			}
  4426			mem := v.Args[2]
  4427			dst := v.Args[0]
  4428			src := v.Args[1]
  4429			v.reset(OpPPC64MOVWstore)
  4430			v.AddArg(dst)
  4431			v0 := b.NewValue0(v.Pos, OpPPC64MOVWZload, typ.UInt32)
  4432			v0.AddArg(src)
  4433			v0.AddArg(mem)
  4434			v.AddArg(v0)
  4435			v.AddArg(mem)
  4436			return true
  4437		}
  4438		// match: (Move [8] {t} dst src mem)
  4439		// cond: t.(*types.Type).Alignment()%4 == 0
  4440		// result: (MOVDstore dst (MOVDload src mem) mem)
  4441		for {
  4442			if v.AuxInt != 8 {
  4443				break
  4444			}
  4445			t := v.Aux
  4446			mem := v.Args[2]
  4447			dst := v.Args[0]
  4448			src := v.Args[1]
  4449			if !(t.(*types.Type).Alignment()%4 == 0) {
  4450				break
  4451			}
  4452			v.reset(OpPPC64MOVDstore)
  4453			v.AddArg(dst)
  4454			v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, typ.Int64)
  4455			v0.AddArg(src)
  4456			v0.AddArg(mem)
  4457			v.AddArg(v0)
  4458			v.AddArg(mem)
  4459			return true
  4460		}
  4461		// match: (Move [8] dst src mem)
  4462		// cond:
  4463		// result: (MOVWstore [4] dst (MOVWZload [4] src mem) (MOVWstore dst (MOVWZload src mem) mem))
  4464		for {
  4465			if v.AuxInt != 8 {
  4466				break
  4467			}
  4468			mem := v.Args[2]
  4469			dst := v.Args[0]
  4470			src := v.Args[1]
  4471			v.reset(OpPPC64MOVWstore)
  4472			v.AuxInt = 4
  4473			v.AddArg(dst)
  4474			v0 := b.NewValue0(v.Pos, OpPPC64MOVWZload, typ.UInt32)
  4475			v0.AuxInt = 4
  4476			v0.AddArg(src)
  4477			v0.AddArg(mem)
  4478			v.AddArg(v0)
  4479			v1 := b.NewValue0(v.Pos, OpPPC64MOVWstore, types.TypeMem)
  4480			v1.AddArg(dst)
  4481			v2 := b.NewValue0(v.Pos, OpPPC64MOVWZload, typ.UInt32)
  4482			v2.AddArg(src)
  4483			v2.AddArg(mem)
  4484			v1.AddArg(v2)
  4485			v1.AddArg(mem)
  4486			v.AddArg(v1)
  4487			return true
  4488		}
  4489		// match: (Move [3] dst src mem)
  4490		// cond:
  4491		// result: (MOVBstore [2] dst (MOVBZload [2] src mem) (MOVHstore dst (MOVHload src mem) mem))
  4492		for {
  4493			if v.AuxInt != 3 {
  4494				break
  4495			}
  4496			mem := v.Args[2]
  4497			dst := v.Args[0]
  4498			src := v.Args[1]
  4499			v.reset(OpPPC64MOVBstore)
  4500			v.AuxInt = 2
  4501			v.AddArg(dst)
  4502			v0 := b.NewValue0(v.Pos, OpPPC64MOVBZload, typ.UInt8)
  4503			v0.AuxInt = 2
  4504			v0.AddArg(src)
  4505			v0.AddArg(mem)
  4506			v.AddArg(v0)
  4507			v1 := b.NewValue0(v.Pos, OpPPC64MOVHstore, types.TypeMem)
  4508			v1.AddArg(dst)
  4509			v2 := b.NewValue0(v.Pos, OpPPC64MOVHload, typ.Int16)
  4510			v2.AddArg(src)
  4511			v2.AddArg(mem)
  4512			v1.AddArg(v2)
  4513			v1.AddArg(mem)
  4514			v.AddArg(v1)
  4515			return true
  4516		}
  4517		// match: (Move [5] dst src mem)
  4518		// cond:
  4519		// result: (MOVBstore [4] dst (MOVBZload [4] src mem) (MOVWstore dst (MOVWZload src mem) mem))
  4520		for {
  4521			if v.AuxInt != 5 {
  4522				break
  4523			}
  4524			mem := v.Args[2]
  4525			dst := v.Args[0]
  4526			src := v.Args[1]
  4527			v.reset(OpPPC64MOVBstore)
  4528			v.AuxInt = 4
  4529			v.AddArg(dst)
  4530			v0 := b.NewValue0(v.Pos, OpPPC64MOVBZload, typ.UInt8)
  4531			v0.AuxInt = 4
  4532			v0.AddArg(src)
  4533			v0.AddArg(mem)
  4534			v.AddArg(v0)
  4535			v1 := b.NewValue0(v.Pos, OpPPC64MOVWstore, types.TypeMem)
  4536			v1.AddArg(dst)
  4537			v2 := b.NewValue0(v.Pos, OpPPC64MOVWZload, typ.UInt32)
  4538			v2.AddArg(src)
  4539			v2.AddArg(mem)
  4540			v1.AddArg(v2)
  4541			v1.AddArg(mem)
  4542			v.AddArg(v1)
  4543			return true
  4544		}
  4545		// match: (Move [6] dst src mem)
  4546		// cond:
  4547		// result: (MOVHstore [4] dst (MOVHZload [4] src mem) (MOVWstore dst (MOVWZload src mem) mem))
  4548		for {
  4549			if v.AuxInt != 6 {
  4550				break
  4551			}
  4552			mem := v.Args[2]
  4553			dst := v.Args[0]
  4554			src := v.Args[1]
  4555			v.reset(OpPPC64MOVHstore)
  4556			v.AuxInt = 4
  4557			v.AddArg(dst)
  4558			v0 := b.NewValue0(v.Pos, OpPPC64MOVHZload, typ.UInt16)
  4559			v0.AuxInt = 4
  4560			v0.AddArg(src)
  4561			v0.AddArg(mem)
  4562			v.AddArg(v0)
  4563			v1 := b.NewValue0(v.Pos, OpPPC64MOVWstore, types.TypeMem)
  4564			v1.AddArg(dst)
  4565			v2 := b.NewValue0(v.Pos, OpPPC64MOVWZload, typ.UInt32)
  4566			v2.AddArg(src)
  4567			v2.AddArg(mem)
  4568			v1.AddArg(v2)
  4569			v1.AddArg(mem)
  4570			v.AddArg(v1)
  4571			return true
  4572		}
  4573		// match: (Move [7] dst src mem)
  4574		// cond:
  4575		// result: (MOVBstore [6] dst (MOVBZload [6] src mem) (MOVHstore [4] dst (MOVHZload [4] src mem) (MOVWstore dst (MOVWZload src mem) mem)))
  4576		for {
  4577			if v.AuxInt != 7 {
  4578				break
  4579			}
  4580			mem := v.Args[2]
  4581			dst := v.Args[0]
  4582			src := v.Args[1]
  4583			v.reset(OpPPC64MOVBstore)
  4584			v.AuxInt = 6
  4585			v.AddArg(dst)
  4586			v0 := b.NewValue0(v.Pos, OpPPC64MOVBZload, typ.UInt8)
  4587			v0.AuxInt = 6
  4588			v0.AddArg(src)
  4589			v0.AddArg(mem)
  4590			v.AddArg(v0)
  4591			v1 := b.NewValue0(v.Pos, OpPPC64MOVHstore, types.TypeMem)
  4592			v1.AuxInt = 4
  4593			v1.AddArg(dst)
  4594			v2 := b.NewValue0(v.Pos, OpPPC64MOVHZload, typ.UInt16)
  4595			v2.AuxInt = 4
  4596			v2.AddArg(src)
  4597			v2.AddArg(mem)
  4598			v1.AddArg(v2)
  4599			v3 := b.NewValue0(v.Pos, OpPPC64MOVWstore, types.TypeMem)
  4600			v3.AddArg(dst)
  4601			v4 := b.NewValue0(v.Pos, OpPPC64MOVWZload, typ.UInt32)
  4602			v4.AddArg(src)
  4603			v4.AddArg(mem)
  4604			v3.AddArg(v4)
  4605			v3.AddArg(mem)
  4606			v1.AddArg(v3)
  4607			v.AddArg(v1)
  4608			return true
  4609		}
  4610		return false
  4611	}
  4612	func rewriteValuePPC64_OpMove_10(v *Value) bool {
  4613		// match: (Move [s] dst src mem)
  4614		// cond: s > 8
  4615		// result: (LoweredMove [s] dst src mem)
  4616		for {
  4617			s := v.AuxInt
  4618			mem := v.Args[2]
  4619			dst := v.Args[0]
  4620			src := v.Args[1]
  4621			if !(s > 8) {
  4622				break
  4623			}
  4624			v.reset(OpPPC64LoweredMove)
  4625			v.AuxInt = s
  4626			v.AddArg(dst)
  4627			v.AddArg(src)
  4628			v.AddArg(mem)
  4629			return true
  4630		}
  4631		return false
  4632	}
  4633	func rewriteValuePPC64_OpMul16_0(v *Value) bool {
  4634		// match: (Mul16 x y)
  4635		// cond:
  4636		// result: (MULLW x y)
  4637		for {
  4638			y := v.Args[1]
  4639			x := v.Args[0]
  4640			v.reset(OpPPC64MULLW)
  4641			v.AddArg(x)
  4642			v.AddArg(y)
  4643			return true
  4644		}
  4645	}
  4646	func rewriteValuePPC64_OpMul32_0(v *Value) bool {
  4647		// match: (Mul32 x y)
  4648		// cond:
  4649		// result: (MULLW x y)
  4650		for {
  4651			y := v.Args[1]
  4652			x := v.Args[0]
  4653			v.reset(OpPPC64MULLW)
  4654			v.AddArg(x)
  4655			v.AddArg(y)
  4656			return true
  4657		}
  4658	}
  4659	func rewriteValuePPC64_OpMul32F_0(v *Value) bool {
  4660		// match: (Mul32F x y)
  4661		// cond:
  4662		// result: (FMULS x y)
  4663		for {
  4664			y := v.Args[1]
  4665			x := v.Args[0]
  4666			v.reset(OpPPC64FMULS)
  4667			v.AddArg(x)
  4668			v.AddArg(y)
  4669			return true
  4670		}
  4671	}
  4672	func rewriteValuePPC64_OpMul64_0(v *Value) bool {
  4673		// match: (Mul64 x y)
  4674		// cond:
  4675		// result: (MULLD x y)
  4676		for {
  4677			y := v.Args[1]
  4678			x := v.Args[0]
  4679			v.reset(OpPPC64MULLD)
  4680			v.AddArg(x)
  4681			v.AddArg(y)
  4682			return true
  4683		}
  4684	}
  4685	func rewriteValuePPC64_OpMul64F_0(v *Value) bool {
  4686		// match: (Mul64F x y)
  4687		// cond:
  4688		// result: (FMUL x y)
  4689		for {
  4690			y := v.Args[1]
  4691			x := v.Args[0]
  4692			v.reset(OpPPC64FMUL)
  4693			v.AddArg(x)
  4694			v.AddArg(y)
  4695			return true
  4696		}
  4697	}
  4698	func rewriteValuePPC64_OpMul64uhilo_0(v *Value) bool {
  4699		// match: (Mul64uhilo x y)
  4700		// cond:
  4701		// result: (LoweredMuluhilo x y)
  4702		for {
  4703			y := v.Args[1]
  4704			x := v.Args[0]
  4705			v.reset(OpPPC64LoweredMuluhilo)
  4706			v.AddArg(x)
  4707			v.AddArg(y)
  4708			return true
  4709		}
  4710	}
  4711	func rewriteValuePPC64_OpMul8_0(v *Value) bool {
  4712		// match: (Mul8 x y)
  4713		// cond:
  4714		// result: (MULLW x y)
  4715		for {
  4716			y := v.Args[1]
  4717			x := v.Args[0]
  4718			v.reset(OpPPC64MULLW)
  4719			v.AddArg(x)
  4720			v.AddArg(y)
  4721			return true
  4722		}
  4723	}
  4724	func rewriteValuePPC64_OpNeg16_0(v *Value) bool {
  4725		// match: (Neg16 x)
  4726		// cond:
  4727		// result: (NEG x)
  4728		for {
  4729			x := v.Args[0]
  4730			v.reset(OpPPC64NEG)
  4731			v.AddArg(x)
  4732			return true
  4733		}
  4734	}
  4735	func rewriteValuePPC64_OpNeg32_0(v *Value) bool {
  4736		// match: (Neg32 x)
  4737		// cond:
  4738		// result: (NEG x)
  4739		for {
  4740			x := v.Args[0]
  4741			v.reset(OpPPC64NEG)
  4742			v.AddArg(x)
  4743			return true
  4744		}
  4745	}
  4746	func rewriteValuePPC64_OpNeg32F_0(v *Value) bool {
  4747		// match: (Neg32F x)
  4748		// cond:
  4749		// result: (FNEG x)
  4750		for {
  4751			x := v.Args[0]
  4752			v.reset(OpPPC64FNEG)
  4753			v.AddArg(x)
  4754			return true
  4755		}
  4756	}
  4757	func rewriteValuePPC64_OpNeg64_0(v *Value) bool {
  4758		// match: (Neg64 x)
  4759		// cond:
  4760		// result: (NEG x)
  4761		for {
  4762			x := v.Args[0]
  4763			v.reset(OpPPC64NEG)
  4764			v.AddArg(x)
  4765			return true
  4766		}
  4767	}
  4768	func rewriteValuePPC64_OpNeg64F_0(v *Value) bool {
  4769		// match: (Neg64F x)
  4770		// cond:
  4771		// result: (FNEG x)
  4772		for {
  4773			x := v.Args[0]
  4774			v.reset(OpPPC64FNEG)
  4775			v.AddArg(x)
  4776			return true
  4777		}
  4778	}
  4779	func rewriteValuePPC64_OpNeg8_0(v *Value) bool {
  4780		// match: (Neg8 x)
  4781		// cond:
  4782		// result: (NEG x)
  4783		for {
  4784			x := v.Args[0]
  4785			v.reset(OpPPC64NEG)
  4786			v.AddArg(x)
  4787			return true
  4788		}
  4789	}
  4790	func rewriteValuePPC64_OpNeq16_0(v *Value) bool {
  4791		b := v.Block
  4792		typ := &b.Func.Config.Types
  4793		// match: (Neq16 x y)
  4794		// cond: isSigned(x.Type) && isSigned(y.Type)
  4795		// result: (NotEqual (CMPW (SignExt16to32 x) (SignExt16to32 y)))
  4796		for {
  4797			y := v.Args[1]
  4798			x := v.Args[0]
  4799			if !(isSigned(x.Type) && isSigned(y.Type)) {
  4800				break
  4801			}
  4802			v.reset(OpPPC64NotEqual)
  4803			v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  4804			v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  4805			v1.AddArg(x)
  4806			v0.AddArg(v1)
  4807			v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  4808			v2.AddArg(y)
  4809			v0.AddArg(v2)
  4810			v.AddArg(v0)
  4811			return true
  4812		}
  4813		// match: (Neq16 x y)
  4814		// cond:
  4815		// result: (NotEqual (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y)))
  4816		for {
  4817			y := v.Args[1]
  4818			x := v.Args[0]
  4819			v.reset(OpPPC64NotEqual)
  4820			v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  4821			v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  4822			v1.AddArg(x)
  4823			v0.AddArg(v1)
  4824			v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  4825			v2.AddArg(y)
  4826			v0.AddArg(v2)
  4827			v.AddArg(v0)
  4828			return true
  4829		}
  4830	}
  4831	func rewriteValuePPC64_OpNeq32_0(v *Value) bool {
  4832		b := v.Block
  4833		// match: (Neq32 x y)
  4834		// cond:
  4835		// result: (NotEqual (CMPW x y))
  4836		for {
  4837			y := v.Args[1]
  4838			x := v.Args[0]
  4839			v.reset(OpPPC64NotEqual)
  4840			v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  4841			v0.AddArg(x)
  4842			v0.AddArg(y)
  4843			v.AddArg(v0)
  4844			return true
  4845		}
  4846	}
  4847	func rewriteValuePPC64_OpNeq32F_0(v *Value) bool {
  4848		b := v.Block
  4849		// match: (Neq32F x y)
  4850		// cond:
  4851		// result: (NotEqual (FCMPU x y))
  4852		for {
  4853			y := v.Args[1]
  4854			x := v.Args[0]
  4855			v.reset(OpPPC64NotEqual)
  4856			v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  4857			v0.AddArg(x)
  4858			v0.AddArg(y)
  4859			v.AddArg(v0)
  4860			return true
  4861		}
  4862	}
  4863	func rewriteValuePPC64_OpNeq64_0(v *Value) bool {
  4864		b := v.Block
  4865		// match: (Neq64 x y)
  4866		// cond:
  4867		// result: (NotEqual (CMP x y))
  4868		for {
  4869			y := v.Args[1]
  4870			x := v.Args[0]
  4871			v.reset(OpPPC64NotEqual)
  4872			v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
  4873			v0.AddArg(x)
  4874			v0.AddArg(y)
  4875			v.AddArg(v0)
  4876			return true
  4877		}
  4878	}
  4879	func rewriteValuePPC64_OpNeq64F_0(v *Value) bool {
  4880		b := v.Block
  4881		// match: (Neq64F x y)
  4882		// cond:
  4883		// result: (NotEqual (FCMPU x y))
  4884		for {
  4885			y := v.Args[1]
  4886			x := v.Args[0]
  4887			v.reset(OpPPC64NotEqual)
  4888			v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  4889			v0.AddArg(x)
  4890			v0.AddArg(y)
  4891			v.AddArg(v0)
  4892			return true
  4893		}
  4894	}
  4895	func rewriteValuePPC64_OpNeq8_0(v *Value) bool {
  4896		b := v.Block
  4897		typ := &b.Func.Config.Types
  4898		// match: (Neq8 x y)
  4899		// cond: isSigned(x.Type) && isSigned(y.Type)
  4900		// result: (NotEqual (CMPW (SignExt8to32 x) (SignExt8to32 y)))
  4901		for {
  4902			y := v.Args[1]
  4903			x := v.Args[0]
  4904			if !(isSigned(x.Type) && isSigned(y.Type)) {
  4905				break
  4906			}
  4907			v.reset(OpPPC64NotEqual)
  4908			v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  4909			v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  4910			v1.AddArg(x)
  4911			v0.AddArg(v1)
  4912			v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  4913			v2.AddArg(y)
  4914			v0.AddArg(v2)
  4915			v.AddArg(v0)
  4916			return true
  4917		}
  4918		// match: (Neq8 x y)
  4919		// cond:
  4920		// result: (NotEqual (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y)))
  4921		for {
  4922			y := v.Args[1]
  4923			x := v.Args[0]
  4924			v.reset(OpPPC64NotEqual)
  4925			v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  4926			v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  4927			v1.AddArg(x)
  4928			v0.AddArg(v1)
  4929			v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  4930			v2.AddArg(y)
  4931			v0.AddArg(v2)
  4932			v.AddArg(v0)
  4933			return true
  4934		}
  4935	}
  4936	func rewriteValuePPC64_OpNeqB_0(v *Value) bool {
  4937		// match: (NeqB x y)
  4938		// cond:
  4939		// result: (XOR x y)
  4940		for {
  4941			y := v.Args[1]
  4942			x := v.Args[0]
  4943			v.reset(OpPPC64XOR)
  4944			v.AddArg(x)
  4945			v.AddArg(y)
  4946			return true
  4947		}
  4948	}
  4949	func rewriteValuePPC64_OpNeqPtr_0(v *Value) bool {
  4950		b := v.Block
  4951		// match: (NeqPtr x y)
  4952		// cond:
  4953		// result: (NotEqual (CMP x y))
  4954		for {
  4955			y := v.Args[1]
  4956			x := v.Args[0]
  4957			v.reset(OpPPC64NotEqual)
  4958			v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
  4959			v0.AddArg(x)
  4960			v0.AddArg(y)
  4961			v.AddArg(v0)
  4962			return true
  4963		}
  4964	}
  4965	func rewriteValuePPC64_OpNilCheck_0(v *Value) bool {
  4966		// match: (NilCheck ptr mem)
  4967		// cond:
  4968		// result: (LoweredNilCheck ptr mem)
  4969		for {
  4970			mem := v.Args[1]
  4971			ptr := v.Args[0]
  4972			v.reset(OpPPC64LoweredNilCheck)
  4973			v.AddArg(ptr)
  4974			v.AddArg(mem)
  4975			return true
  4976		}
  4977	}
  4978	func rewriteValuePPC64_OpNot_0(v *Value) bool {
  4979		// match: (Not x)
  4980		// cond:
  4981		// result: (XORconst [1] x)
  4982		for {
  4983			x := v.Args[0]
  4984			v.reset(OpPPC64XORconst)
  4985			v.AuxInt = 1
  4986			v.AddArg(x)
  4987			return true
  4988		}
  4989	}
  4990	func rewriteValuePPC64_OpOffPtr_0(v *Value) bool {
  4991		b := v.Block
  4992		typ := &b.Func.Config.Types
  4993		// match: (OffPtr [off] ptr)
  4994		// cond:
  4995		// result: (ADD (MOVDconst <typ.Int64> [off]) ptr)
  4996		for {
  4997			off := v.AuxInt
  4998			ptr := v.Args[0]
  4999			v.reset(OpPPC64ADD)
  5000			v0 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
  5001			v0.AuxInt = off
  5002			v.AddArg(v0)
  5003			v.AddArg(ptr)
  5004			return true
  5005		}
  5006	}
  5007	func rewriteValuePPC64_OpOr16_0(v *Value) bool {
  5008		// match: (Or16 x y)
  5009		// cond:
  5010		// result: (OR x y)
  5011		for {
  5012			y := v.Args[1]
  5013			x := v.Args[0]
  5014			v.reset(OpPPC64OR)
  5015			v.AddArg(x)
  5016			v.AddArg(y)
  5017			return true
  5018		}
  5019	}
  5020	func rewriteValuePPC64_OpOr32_0(v *Value) bool {
  5021		// match: (Or32 x y)
  5022		// cond:
  5023		// result: (OR x y)
  5024		for {
  5025			y := v.Args[1]
  5026			x := v.Args[0]
  5027			v.reset(OpPPC64OR)
  5028			v.AddArg(x)
  5029			v.AddArg(y)
  5030			return true
  5031		}
  5032	}
  5033	func rewriteValuePPC64_OpOr64_0(v *Value) bool {
  5034		// match: (Or64 x y)
  5035		// cond:
  5036		// result: (OR x y)
  5037		for {
  5038			y := v.Args[1]
  5039			x := v.Args[0]
  5040			v.reset(OpPPC64OR)
  5041			v.AddArg(x)
  5042			v.AddArg(y)
  5043			return true
  5044		}
  5045	}
  5046	func rewriteValuePPC64_OpOr8_0(v *Value) bool {
  5047		// match: (Or8 x y)
  5048		// cond:
  5049		// result: (OR x y)
  5050		for {
  5051			y := v.Args[1]
  5052			x := v.Args[0]
  5053			v.reset(OpPPC64OR)
  5054			v.AddArg(x)
  5055			v.AddArg(y)
  5056			return true
  5057		}
  5058	}
  5059	func rewriteValuePPC64_OpOrB_0(v *Value) bool {
  5060		// match: (OrB x y)
  5061		// cond:
  5062		// result: (OR x y)
  5063		for {
  5064			y := v.Args[1]
  5065			x := v.Args[0]
  5066			v.reset(OpPPC64OR)
  5067			v.AddArg(x)
  5068			v.AddArg(y)
  5069			return true
  5070		}
  5071	}
  5072	func rewriteValuePPC64_OpPPC64ADD_0(v *Value) bool {
  5073		b := v.Block
  5074		typ := &b.Func.Config.Types
  5075		// match: (ADD (SLDconst x [c]) (SRDconst x [d]))
  5076		// cond: d == 64-c
  5077		// result: (ROTLconst [c] x)
  5078		for {
  5079			_ = v.Args[1]
  5080			v_0 := v.Args[0]
  5081			if v_0.Op != OpPPC64SLDconst {
  5082				break
  5083			}
  5084			c := v_0.AuxInt
  5085			x := v_0.Args[0]
  5086			v_1 := v.Args[1]
  5087			if v_1.Op != OpPPC64SRDconst {
  5088				break
  5089			}
  5090			d := v_1.AuxInt
  5091			if x != v_1.Args[0] {
  5092				break
  5093			}
  5094			if !(d == 64-c) {
  5095				break
  5096			}
  5097			v.reset(OpPPC64ROTLconst)
  5098			v.AuxInt = c
  5099			v.AddArg(x)
  5100			return true
  5101		}
  5102		// match: (ADD (SRDconst x [d]) (SLDconst x [c]))
  5103		// cond: d == 64-c
  5104		// result: (ROTLconst [c] x)
  5105		for {
  5106			_ = v.Args[1]
  5107			v_0 := v.Args[0]
  5108			if v_0.Op != OpPPC64SRDconst {
  5109				break
  5110			}
  5111			d := v_0.AuxInt
  5112			x := v_0.Args[0]
  5113			v_1 := v.Args[1]
  5114			if v_1.Op != OpPPC64SLDconst {
  5115				break
  5116			}
  5117			c := v_1.AuxInt
  5118			if x != v_1.Args[0] {
  5119				break
  5120			}
  5121			if !(d == 64-c) {
  5122				break
  5123			}
  5124			v.reset(OpPPC64ROTLconst)
  5125			v.AuxInt = c
  5126			v.AddArg(x)
  5127			return true
  5128		}
  5129		// match: (ADD (SLWconst x [c]) (SRWconst x [d]))
  5130		// cond: d == 32-c
  5131		// result: (ROTLWconst [c] x)
  5132		for {
  5133			_ = v.Args[1]
  5134			v_0 := v.Args[0]
  5135			if v_0.Op != OpPPC64SLWconst {
  5136				break
  5137			}
  5138			c := v_0.AuxInt
  5139			x := v_0.Args[0]
  5140			v_1 := v.Args[1]
  5141			if v_1.Op != OpPPC64SRWconst {
  5142				break
  5143			}
  5144			d := v_1.AuxInt
  5145			if x != v_1.Args[0] {
  5146				break
  5147			}
  5148			if !(d == 32-c) {
  5149				break
  5150			}
  5151			v.reset(OpPPC64ROTLWconst)
  5152			v.AuxInt = c
  5153			v.AddArg(x)
  5154			return true
  5155		}
  5156		// match: (ADD (SRWconst x [d]) (SLWconst x [c]))
  5157		// cond: d == 32-c
  5158		// result: (ROTLWconst [c] x)
  5159		for {
  5160			_ = v.Args[1]
  5161			v_0 := v.Args[0]
  5162			if v_0.Op != OpPPC64SRWconst {
  5163				break
  5164			}
  5165			d := v_0.AuxInt
  5166			x := v_0.Args[0]
  5167			v_1 := v.Args[1]
  5168			if v_1.Op != OpPPC64SLWconst {
  5169				break
  5170			}
  5171			c := v_1.AuxInt
  5172			if x != v_1.Args[0] {
  5173				break
  5174			}
  5175			if !(d == 32-c) {
  5176				break
  5177			}
  5178			v.reset(OpPPC64ROTLWconst)
  5179			v.AuxInt = c
  5180			v.AddArg(x)
  5181			return true
  5182		}
  5183		// match: (ADD (SLD x (ANDconst <typ.Int64> [63] y)) (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y))))
  5184		// cond:
  5185		// result: (ROTL x y)
  5186		for {
  5187			_ = v.Args[1]
  5188			v_0 := v.Args[0]
  5189			if v_0.Op != OpPPC64SLD {
  5190				break
  5191			}
  5192			_ = v_0.Args[1]
  5193			x := v_0.Args[0]
  5194			v_0_1 := v_0.Args[1]
  5195			if v_0_1.Op != OpPPC64ANDconst {
  5196				break
  5197			}
  5198			if v_0_1.Type != typ.Int64 {
  5199				break
  5200			}
  5201			if v_0_1.AuxInt != 63 {
  5202				break
  5203			}
  5204			y := v_0_1.Args[0]
  5205			v_1 := v.Args[1]
  5206			if v_1.Op != OpPPC64SRD {
  5207				break
  5208			}
  5209			_ = v_1.Args[1]
  5210			if x != v_1.Args[0] {
  5211				break
  5212			}
  5213			v_1_1 := v_1.Args[1]
  5214			if v_1_1.Op != OpPPC64SUB {
  5215				break
  5216			}
  5217			if v_1_1.Type != typ.UInt {
  5218				break
  5219			}
  5220			_ = v_1_1.Args[1]
  5221			v_1_1_0 := v_1_1.Args[0]
  5222			if v_1_1_0.Op != OpPPC64MOVDconst {
  5223				break
  5224			}
  5225			if v_1_1_0.AuxInt != 64 {
  5226				break
  5227			}
  5228			v_1_1_1 := v_1_1.Args[1]
  5229			if v_1_1_1.Op != OpPPC64ANDconst {
  5230				break
  5231			}
  5232			if v_1_1_1.Type != typ.UInt {
  5233				break
  5234			}
  5235			if v_1_1_1.AuxInt != 63 {
  5236				break
  5237			}
  5238			if y != v_1_1_1.Args[0] {
  5239				break
  5240			}
  5241			v.reset(OpPPC64ROTL)
  5242			v.AddArg(x)
  5243			v.AddArg(y)
  5244			return true
  5245		}
  5246		// match: (ADD (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y))) (SLD x (ANDconst <typ.Int64> [63] y)))
  5247		// cond:
  5248		// result: (ROTL x y)
  5249		for {
  5250			_ = v.Args[1]
  5251			v_0 := v.Args[0]
  5252			if v_0.Op != OpPPC64SRD {
  5253				break
  5254			}
  5255			_ = v_0.Args[1]
  5256			x := v_0.Args[0]
  5257			v_0_1 := v_0.Args[1]
  5258			if v_0_1.Op != OpPPC64SUB {
  5259				break
  5260			}
  5261			if v_0_1.Type != typ.UInt {
  5262				break
  5263			}
  5264			_ = v_0_1.Args[1]
  5265			v_0_1_0 := v_0_1.Args[0]
  5266			if v_0_1_0.Op != OpPPC64MOVDconst {
  5267				break
  5268			}
  5269			if v_0_1_0.AuxInt != 64 {
  5270				break
  5271			}
  5272			v_0_1_1 := v_0_1.Args[1]
  5273			if v_0_1_1.Op != OpPPC64ANDconst {
  5274				break
  5275			}
  5276			if v_0_1_1.Type != typ.UInt {
  5277				break
  5278			}
  5279			if v_0_1_1.AuxInt != 63 {
  5280				break
  5281			}
  5282			y := v_0_1_1.Args[0]
  5283			v_1 := v.Args[1]
  5284			if v_1.Op != OpPPC64SLD {
  5285				break
  5286			}
  5287			_ = v_1.Args[1]
  5288			if x != v_1.Args[0] {
  5289				break
  5290			}
  5291			v_1_1 := v_1.Args[1]
  5292			if v_1_1.Op != OpPPC64ANDconst {
  5293				break
  5294			}
  5295			if v_1_1.Type != typ.Int64 {
  5296				break
  5297			}
  5298			if v_1_1.AuxInt != 63 {
  5299				break
  5300			}
  5301			if y != v_1_1.Args[0] {
  5302				break
  5303			}
  5304			v.reset(OpPPC64ROTL)
  5305			v.AddArg(x)
  5306			v.AddArg(y)
  5307			return true
  5308		}
  5309		// match: (ADD (SLW x (ANDconst <typ.Int32> [31] y)) (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y))))
  5310		// cond:
  5311		// result: (ROTLW x y)
  5312		for {
  5313			_ = v.Args[1]
  5314			v_0 := v.Args[0]
  5315			if v_0.Op != OpPPC64SLW {
  5316				break
  5317			}
  5318			_ = v_0.Args[1]
  5319			x := v_0.Args[0]
  5320			v_0_1 := v_0.Args[1]
  5321			if v_0_1.Op != OpPPC64ANDconst {
  5322				break
  5323			}
  5324			if v_0_1.Type != typ.Int32 {
  5325				break
  5326			}
  5327			if v_0_1.AuxInt != 31 {
  5328				break
  5329			}
  5330			y := v_0_1.Args[0]
  5331			v_1 := v.Args[1]
  5332			if v_1.Op != OpPPC64SRW {
  5333				break
  5334			}
  5335			_ = v_1.Args[1]
  5336			if x != v_1.Args[0] {
  5337				break
  5338			}
  5339			v_1_1 := v_1.Args[1]
  5340			if v_1_1.Op != OpPPC64SUB {
  5341				break
  5342			}
  5343			if v_1_1.Type != typ.UInt {
  5344				break
  5345			}
  5346			_ = v_1_1.Args[1]
  5347			v_1_1_0 := v_1_1.Args[0]
  5348			if v_1_1_0.Op != OpPPC64MOVDconst {
  5349				break
  5350			}
  5351			if v_1_1_0.AuxInt != 32 {
  5352				break
  5353			}
  5354			v_1_1_1 := v_1_1.Args[1]
  5355			if v_1_1_1.Op != OpPPC64ANDconst {
  5356				break
  5357			}
  5358			if v_1_1_1.Type != typ.UInt {
  5359				break
  5360			}
  5361			if v_1_1_1.AuxInt != 31 {
  5362				break
  5363			}
  5364			if y != v_1_1_1.Args[0] {
  5365				break
  5366			}
  5367			v.reset(OpPPC64ROTLW)
  5368			v.AddArg(x)
  5369			v.AddArg(y)
  5370			return true
  5371		}
  5372		// match: (ADD (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y))) (SLW x (ANDconst <typ.Int32> [31] y)))
  5373		// cond:
  5374		// result: (ROTLW x y)
  5375		for {
  5376			_ = v.Args[1]
  5377			v_0 := v.Args[0]
  5378			if v_0.Op != OpPPC64SRW {
  5379				break
  5380			}
  5381			_ = v_0.Args[1]
  5382			x := v_0.Args[0]
  5383			v_0_1 := v_0.Args[1]
  5384			if v_0_1.Op != OpPPC64SUB {
  5385				break
  5386			}
  5387			if v_0_1.Type != typ.UInt {
  5388				break
  5389			}
  5390			_ = v_0_1.Args[1]
  5391			v_0_1_0 := v_0_1.Args[0]
  5392			if v_0_1_0.Op != OpPPC64MOVDconst {
  5393				break
  5394			}
  5395			if v_0_1_0.AuxInt != 32 {
  5396				break
  5397			}
  5398			v_0_1_1 := v_0_1.Args[1]
  5399			if v_0_1_1.Op != OpPPC64ANDconst {
  5400				break
  5401			}
  5402			if v_0_1_1.Type != typ.UInt {
  5403				break
  5404			}
  5405			if v_0_1_1.AuxInt != 31 {
  5406				break
  5407			}
  5408			y := v_0_1_1.Args[0]
  5409			v_1 := v.Args[1]
  5410			if v_1.Op != OpPPC64SLW {
  5411				break
  5412			}
  5413			_ = v_1.Args[1]
  5414			if x != v_1.Args[0] {
  5415				break
  5416			}
  5417			v_1_1 := v_1.Args[1]
  5418			if v_1_1.Op != OpPPC64ANDconst {
  5419				break
  5420			}
  5421			if v_1_1.Type != typ.Int32 {
  5422				break
  5423			}
  5424			if v_1_1.AuxInt != 31 {
  5425				break
  5426			}
  5427			if y != v_1_1.Args[0] {
  5428				break
  5429			}
  5430			v.reset(OpPPC64ROTLW)
  5431			v.AddArg(x)
  5432			v.AddArg(y)
  5433			return true
  5434		}
  5435		// match: (ADD x (MOVDconst [c]))
  5436		// cond: is32Bit(c)
  5437		// result: (ADDconst [c] x)
  5438		for {
  5439			_ = v.Args[1]
  5440			x := v.Args[0]
  5441			v_1 := v.Args[1]
  5442			if v_1.Op != OpPPC64MOVDconst {
  5443				break
  5444			}
  5445			c := v_1.AuxInt
  5446			if !(is32Bit(c)) {
  5447				break
  5448			}
  5449			v.reset(OpPPC64ADDconst)
  5450			v.AuxInt = c
  5451			v.AddArg(x)
  5452			return true
  5453		}
  5454		// match: (ADD (MOVDconst [c]) x)
  5455		// cond: is32Bit(c)
  5456		// result: (ADDconst [c] x)
  5457		for {
  5458			x := v.Args[1]
  5459			v_0 := v.Args[0]
  5460			if v_0.Op != OpPPC64MOVDconst {
  5461				break
  5462			}
  5463			c := v_0.AuxInt
  5464			if !(is32Bit(c)) {
  5465				break
  5466			}
  5467			v.reset(OpPPC64ADDconst)
  5468			v.AuxInt = c
  5469			v.AddArg(x)
  5470			return true
  5471		}
  5472		return false
  5473	}
  5474	func rewriteValuePPC64_OpPPC64ADDconst_0(v *Value) bool {
  5475		// match: (ADDconst [c] (ADDconst [d] x))
  5476		// cond: is32Bit(c+d)
  5477		// result: (ADDconst [c+d] x)
  5478		for {
  5479			c := v.AuxInt
  5480			v_0 := v.Args[0]
  5481			if v_0.Op != OpPPC64ADDconst {
  5482				break
  5483			}
  5484			d := v_0.AuxInt
  5485			x := v_0.Args[0]
  5486			if !(is32Bit(c + d)) {
  5487				break
  5488			}
  5489			v.reset(OpPPC64ADDconst)
  5490			v.AuxInt = c + d
  5491			v.AddArg(x)
  5492			return true
  5493		}
  5494		// match: (ADDconst [0] x)
  5495		// cond:
  5496		// result: x
  5497		for {
  5498			if v.AuxInt != 0 {
  5499				break
  5500			}
  5501			x := v.Args[0]
  5502			v.reset(OpCopy)
  5503			v.Type = x.Type
  5504			v.AddArg(x)
  5505			return true
  5506		}
  5507		// match: (ADDconst [c] (MOVDaddr [d] {sym} x))
  5508		// cond:
  5509		// result: (MOVDaddr [c+d] {sym} x)
  5510		for {
  5511			c := v.AuxInt
  5512			v_0 := v.Args[0]
  5513			if v_0.Op != OpPPC64MOVDaddr {
  5514				break
  5515			}
  5516			d := v_0.AuxInt
  5517			sym := v_0.Aux
  5518			x := v_0.Args[0]
  5519			v.reset(OpPPC64MOVDaddr)
  5520			v.AuxInt = c + d
  5521			v.Aux = sym
  5522			v.AddArg(x)
  5523			return true
  5524		}
  5525		return false
  5526	}
  5527	func rewriteValuePPC64_OpPPC64AND_0(v *Value) bool {
  5528		// match: (AND x (NOR y y))
  5529		// cond:
  5530		// result: (ANDN x y)
  5531		for {
  5532			_ = v.Args[1]
  5533			x := v.Args[0]
  5534			v_1 := v.Args[1]
  5535			if v_1.Op != OpPPC64NOR {
  5536				break
  5537			}
  5538			y := v_1.Args[1]
  5539			if y != v_1.Args[0] {
  5540				break
  5541			}
  5542			v.reset(OpPPC64ANDN)
  5543			v.AddArg(x)
  5544			v.AddArg(y)
  5545			return true
  5546		}
  5547		// match: (AND (NOR y y) x)
  5548		// cond:
  5549		// result: (ANDN x y)
  5550		for {
  5551			x := v.Args[1]
  5552			v_0 := v.Args[0]
  5553			if v_0.Op != OpPPC64NOR {
  5554				break
  5555			}
  5556			y := v_0.Args[1]
  5557			if y != v_0.Args[0] {
  5558				break
  5559			}
  5560			v.reset(OpPPC64ANDN)
  5561			v.AddArg(x)
  5562			v.AddArg(y)
  5563			return true
  5564		}
  5565		// match: (AND (MOVDconst [c]) (MOVDconst [d]))
  5566		// cond:
  5567		// result: (MOVDconst [c&d])
  5568		for {
  5569			_ = v.Args[1]
  5570			v_0 := v.Args[0]
  5571			if v_0.Op != OpPPC64MOVDconst {
  5572				break
  5573			}
  5574			c := v_0.AuxInt
  5575			v_1 := v.Args[1]
  5576			if v_1.Op != OpPPC64MOVDconst {
  5577				break
  5578			}
  5579			d := v_1.AuxInt
  5580			v.reset(OpPPC64MOVDconst)
  5581			v.AuxInt = c & d
  5582			return true
  5583		}
  5584		// match: (AND (MOVDconst [d]) (MOVDconst [c]))
  5585		// cond:
  5586		// result: (MOVDconst [c&d])
  5587		for {
  5588			_ = v.Args[1]
  5589			v_0 := v.Args[0]
  5590			if v_0.Op != OpPPC64MOVDconst {
  5591				break
  5592			}
  5593			d := v_0.AuxInt
  5594			v_1 := v.Args[1]
  5595			if v_1.Op != OpPPC64MOVDconst {
  5596				break
  5597			}
  5598			c := v_1.AuxInt
  5599			v.reset(OpPPC64MOVDconst)
  5600			v.AuxInt = c & d
  5601			return true
  5602		}
  5603		// match: (AND x (MOVDconst [c]))
  5604		// cond: isU16Bit(c)
  5605		// result: (ANDconst [c] x)
  5606		for {
  5607			_ = v.Args[1]
  5608			x := v.Args[0]
  5609			v_1 := v.Args[1]
  5610			if v_1.Op != OpPPC64MOVDconst {
  5611				break
  5612			}
  5613			c := v_1.AuxInt
  5614			if !(isU16Bit(c)) {
  5615				break
  5616			}
  5617			v.reset(OpPPC64ANDconst)
  5618			v.AuxInt = c
  5619			v.AddArg(x)
  5620			return true
  5621		}
  5622		// match: (AND (MOVDconst [c]) x)
  5623		// cond: isU16Bit(c)
  5624		// result: (ANDconst [c] x)
  5625		for {
  5626			x := v.Args[1]
  5627			v_0 := v.Args[0]
  5628			if v_0.Op != OpPPC64MOVDconst {
  5629				break
  5630			}
  5631			c := v_0.AuxInt
  5632			if !(isU16Bit(c)) {
  5633				break
  5634			}
  5635			v.reset(OpPPC64ANDconst)
  5636			v.AuxInt = c
  5637			v.AddArg(x)
  5638			return true
  5639		}
  5640		// match: (AND (MOVDconst [c]) y:(MOVWZreg _))
  5641		// cond: c&0xFFFFFFFF == 0xFFFFFFFF
  5642		// result: y
  5643		for {
  5644			_ = v.Args[1]
  5645			v_0 := v.Args[0]
  5646			if v_0.Op != OpPPC64MOVDconst {
  5647				break
  5648			}
  5649			c := v_0.AuxInt
  5650			y := v.Args[1]
  5651			if y.Op != OpPPC64MOVWZreg {
  5652				break
  5653			}
  5654			if !(c&0xFFFFFFFF == 0xFFFFFFFF) {
  5655				break
  5656			}
  5657			v.reset(OpCopy)
  5658			v.Type = y.Type
  5659			v.AddArg(y)
  5660			return true
  5661		}
  5662		// match: (AND y:(MOVWZreg _) (MOVDconst [c]))
  5663		// cond: c&0xFFFFFFFF == 0xFFFFFFFF
  5664		// result: y
  5665		for {
  5666			_ = v.Args[1]
  5667			y := v.Args[0]
  5668			if y.Op != OpPPC64MOVWZreg {
  5669				break
  5670			}
  5671			v_1 := v.Args[1]
  5672			if v_1.Op != OpPPC64MOVDconst {
  5673				break
  5674			}
  5675			c := v_1.AuxInt
  5676			if !(c&0xFFFFFFFF == 0xFFFFFFFF) {
  5677				break
  5678			}
  5679			v.reset(OpCopy)
  5680			v.Type = y.Type
  5681			v.AddArg(y)
  5682			return true
  5683		}
  5684		// match: (AND (MOVDconst [0xFFFFFFFF]) y:(MOVWreg x))
  5685		// cond:
  5686		// result: (MOVWZreg x)
  5687		for {
  5688			_ = v.Args[1]
  5689			v_0 := v.Args[0]
  5690			if v_0.Op != OpPPC64MOVDconst {
  5691				break
  5692			}
  5693			if v_0.AuxInt != 0xFFFFFFFF {
  5694				break
  5695			}
  5696			y := v.Args[1]
  5697			if y.Op != OpPPC64MOVWreg {
  5698				break
  5699			}
  5700			x := y.Args[0]
  5701			v.reset(OpPPC64MOVWZreg)
  5702			v.AddArg(x)
  5703			return true
  5704		}
  5705		// match: (AND y:(MOVWreg x) (MOVDconst [0xFFFFFFFF]))
  5706		// cond:
  5707		// result: (MOVWZreg x)
  5708		for {
  5709			_ = v.Args[1]
  5710			y := v.Args[0]
  5711			if y.Op != OpPPC64MOVWreg {
  5712				break
  5713			}
  5714			x := y.Args[0]
  5715			v_1 := v.Args[1]
  5716			if v_1.Op != OpPPC64MOVDconst {
  5717				break
  5718			}
  5719			if v_1.AuxInt != 0xFFFFFFFF {
  5720				break
  5721			}
  5722			v.reset(OpPPC64MOVWZreg)
  5723			v.AddArg(x)
  5724			return true
  5725		}
  5726		return false
  5727	}
  5728	func rewriteValuePPC64_OpPPC64AND_10(v *Value) bool {
  5729		// match: (AND (MOVDconst [c]) x:(MOVBZload _ _))
  5730		// cond:
  5731		// result: (ANDconst [c&0xFF] x)
  5732		for {
  5733			_ = v.Args[1]
  5734			v_0 := v.Args[0]
  5735			if v_0.Op != OpPPC64MOVDconst {
  5736				break
  5737			}
  5738			c := v_0.AuxInt
  5739			x := v.Args[1]
  5740			if x.Op != OpPPC64MOVBZload {
  5741				break
  5742			}
  5743			_ = x.Args[1]
  5744			v.reset(OpPPC64ANDconst)
  5745			v.AuxInt = c & 0xFF
  5746			v.AddArg(x)
  5747			return true
  5748		}
  5749		// match: (AND x:(MOVBZload _ _) (MOVDconst [c]))
  5750		// cond:
  5751		// result: (ANDconst [c&0xFF] x)
  5752		for {
  5753			_ = v.Args[1]
  5754			x := v.Args[0]
  5755			if x.Op != OpPPC64MOVBZload {
  5756				break
  5757			}
  5758			_ = x.Args[1]
  5759			v_1 := v.Args[1]
  5760			if v_1.Op != OpPPC64MOVDconst {
  5761				break
  5762			}
  5763			c := v_1.AuxInt
  5764			v.reset(OpPPC64ANDconst)
  5765			v.AuxInt = c & 0xFF
  5766			v.AddArg(x)
  5767			return true
  5768		}
  5769		// match: (AND x:(MOVBZload _ _) (MOVDconst [c]))
  5770		// cond:
  5771		// result: (ANDconst [c&0xFF] x)
  5772		for {
  5773			_ = v.Args[1]
  5774			x := v.Args[0]
  5775			if x.Op != OpPPC64MOVBZload {
  5776				break
  5777			}
  5778			_ = x.Args[1]
  5779			v_1 := v.Args[1]
  5780			if v_1.Op != OpPPC64MOVDconst {
  5781				break
  5782			}
  5783			c := v_1.AuxInt
  5784			v.reset(OpPPC64ANDconst)
  5785			v.AuxInt = c & 0xFF
  5786			v.AddArg(x)
  5787			return true
  5788		}
  5789		// match: (AND (MOVDconst [c]) x:(MOVBZload _ _))
  5790		// cond:
  5791		// result: (ANDconst [c&0xFF] x)
  5792		for {
  5793			_ = v.Args[1]
  5794			v_0 := v.Args[0]
  5795			if v_0.Op != OpPPC64MOVDconst {
  5796				break
  5797			}
  5798			c := v_0.AuxInt
  5799			x := v.Args[1]
  5800			if x.Op != OpPPC64MOVBZload {
  5801				break
  5802			}
  5803			_ = x.Args[1]
  5804			v.reset(OpPPC64ANDconst)
  5805			v.AuxInt = c & 0xFF
  5806			v.AddArg(x)
  5807			return true
  5808		}
  5809		return false
  5810	}
  5811	func rewriteValuePPC64_OpPPC64ANDconst_0(v *Value) bool {
  5812		// match: (ANDconst [c] (ANDconst [d] x))
  5813		// cond:
  5814		// result: (ANDconst [c&d] x)
  5815		for {
  5816			c := v.AuxInt
  5817			v_0 := v.Args[0]
  5818			if v_0.Op != OpPPC64ANDconst {
  5819				break
  5820			}
  5821			d := v_0.AuxInt
  5822			x := v_0.Args[0]
  5823			v.reset(OpPPC64ANDconst)
  5824			v.AuxInt = c & d
  5825			v.AddArg(x)
  5826			return true
  5827		}
  5828		// match: (ANDconst [-1] x)
  5829		// cond:
  5830		// result: x
  5831		for {
  5832			if v.AuxInt != -1 {
  5833				break
  5834			}
  5835			x := v.Args[0]
  5836			v.reset(OpCopy)
  5837			v.Type = x.Type
  5838			v.AddArg(x)
  5839			return true
  5840		}
  5841		// match: (ANDconst [0] _)
  5842		// cond:
  5843		// result: (MOVDconst [0])
  5844		for {
  5845			if v.AuxInt != 0 {
  5846				break
  5847			}
  5848			v.reset(OpPPC64MOVDconst)
  5849			v.AuxInt = 0
  5850			return true
  5851		}
  5852		// match: (ANDconst [c] y:(MOVBZreg _))
  5853		// cond: c&0xFF == 0xFF
  5854		// result: y
  5855		for {
  5856			c := v.AuxInt
  5857			y := v.Args[0]
  5858			if y.Op != OpPPC64MOVBZreg {
  5859				break
  5860			}
  5861			if !(c&0xFF == 0xFF) {
  5862				break
  5863			}
  5864			v.reset(OpCopy)
  5865			v.Type = y.Type
  5866			v.AddArg(y)
  5867			return true
  5868		}
  5869		// match: (ANDconst [0xFF] y:(MOVBreg _))
  5870		// cond:
  5871		// result: y
  5872		for {
  5873			if v.AuxInt != 0xFF {
  5874				break
  5875			}
  5876			y := v.Args[0]
  5877			if y.Op != OpPPC64MOVBreg {
  5878				break
  5879			}
  5880			v.reset(OpCopy)
  5881			v.Type = y.Type
  5882			v.AddArg(y)
  5883			return true
  5884		}
  5885		// match: (ANDconst [c] y:(MOVHZreg _))
  5886		// cond: c&0xFFFF == 0xFFFF
  5887		// result: y
  5888		for {
  5889			c := v.AuxInt
  5890			y := v.Args[0]
  5891			if y.Op != OpPPC64MOVHZreg {
  5892				break
  5893			}
  5894			if !(c&0xFFFF == 0xFFFF) {
  5895				break
  5896			}
  5897			v.reset(OpCopy)
  5898			v.Type = y.Type
  5899			v.AddArg(y)
  5900			return true
  5901		}
  5902		// match: (ANDconst [0xFFFF] y:(MOVHreg _))
  5903		// cond:
  5904		// result: y
  5905		for {
  5906			if v.AuxInt != 0xFFFF {
  5907				break
  5908			}
  5909			y := v.Args[0]
  5910			if y.Op != OpPPC64MOVHreg {
  5911				break
  5912			}
  5913			v.reset(OpCopy)
  5914			v.Type = y.Type
  5915			v.AddArg(y)
  5916			return true
  5917		}
  5918		// match: (ANDconst [c] (MOVBreg x))
  5919		// cond:
  5920		// result: (ANDconst [c&0xFF] x)
  5921		for {
  5922			c := v.AuxInt
  5923			v_0 := v.Args[0]
  5924			if v_0.Op != OpPPC64MOVBreg {
  5925				break
  5926			}
  5927			x := v_0.Args[0]
  5928			v.reset(OpPPC64ANDconst)
  5929			v.AuxInt = c & 0xFF
  5930			v.AddArg(x)
  5931			return true
  5932		}
  5933		// match: (ANDconst [c] (MOVBZreg x))
  5934		// cond:
  5935		// result: (ANDconst [c&0xFF] x)
  5936		for {
  5937			c := v.AuxInt
  5938			v_0 := v.Args[0]
  5939			if v_0.Op != OpPPC64MOVBZreg {
  5940				break
  5941			}
  5942			x := v_0.Args[0]
  5943			v.reset(OpPPC64ANDconst)
  5944			v.AuxInt = c & 0xFF
  5945			v.AddArg(x)
  5946			return true
  5947		}
  5948		// match: (ANDconst [c] (MOVHreg x))
  5949		// cond:
  5950		// result: (ANDconst [c&0xFFFF] x)
  5951		for {
  5952			c := v.AuxInt
  5953			v_0 := v.Args[0]
  5954			if v_0.Op != OpPPC64MOVHreg {
  5955				break
  5956			}
  5957			x := v_0.Args[0]
  5958			v.reset(OpPPC64ANDconst)
  5959			v.AuxInt = c & 0xFFFF
  5960			v.AddArg(x)
  5961			return true
  5962		}
  5963		return false
  5964	}
  5965	func rewriteValuePPC64_OpPPC64ANDconst_10(v *Value) bool {
  5966		// match: (ANDconst [c] (MOVHZreg x))
  5967		// cond:
  5968		// result: (ANDconst [c&0xFFFF] x)
  5969		for {
  5970			c := v.AuxInt
  5971			v_0 := v.Args[0]
  5972			if v_0.Op != OpPPC64MOVHZreg {
  5973				break
  5974			}
  5975			x := v_0.Args[0]
  5976			v.reset(OpPPC64ANDconst)
  5977			v.AuxInt = c & 0xFFFF
  5978			v.AddArg(x)
  5979			return true
  5980		}
  5981		// match: (ANDconst [c] (MOVWreg x))
  5982		// cond:
  5983		// result: (ANDconst [c&0xFFFFFFFF] x)
  5984		for {
  5985			c := v.AuxInt
  5986			v_0 := v.Args[0]
  5987			if v_0.Op != OpPPC64MOVWreg {
  5988				break
  5989			}
  5990			x := v_0.Args[0]
  5991			v.reset(OpPPC64ANDconst)
  5992			v.AuxInt = c & 0xFFFFFFFF
  5993			v.AddArg(x)
  5994			return true
  5995		}
  5996		// match: (ANDconst [c] (MOVWZreg x))
  5997		// cond:
  5998		// result: (ANDconst [c&0xFFFFFFFF] x)
  5999		for {
  6000			c := v.AuxInt
  6001			v_0 := v.Args[0]
  6002			if v_0.Op != OpPPC64MOVWZreg {
  6003				break
  6004			}
  6005			x := v_0.Args[0]
  6006			v.reset(OpPPC64ANDconst)
  6007			v.AuxInt = c & 0xFFFFFFFF
  6008			v.AddArg(x)
  6009			return true
  6010		}
  6011		return false
  6012	}
  6013	func rewriteValuePPC64_OpPPC64CMP_0(v *Value) bool {
  6014		b := v.Block
  6015		// match: (CMP x (MOVDconst [c]))
  6016		// cond: is16Bit(c)
  6017		// result: (CMPconst x [c])
  6018		for {
  6019			_ = v.Args[1]
  6020			x := v.Args[0]
  6021			v_1 := v.Args[1]
  6022			if v_1.Op != OpPPC64MOVDconst {
  6023				break
  6024			}
  6025			c := v_1.AuxInt
  6026			if !(is16Bit(c)) {
  6027				break
  6028			}
  6029			v.reset(OpPPC64CMPconst)
  6030			v.AuxInt = c
  6031			v.AddArg(x)
  6032			return true
  6033		}
  6034		// match: (CMP (MOVDconst [c]) y)
  6035		// cond: is16Bit(c)
  6036		// result: (InvertFlags (CMPconst y [c]))
  6037		for {
  6038			y := v.Args[1]
  6039			v_0 := v.Args[0]
  6040			if v_0.Op != OpPPC64MOVDconst {
  6041				break
  6042			}
  6043			c := v_0.AuxInt
  6044			if !(is16Bit(c)) {
  6045				break
  6046			}
  6047			v.reset(OpPPC64InvertFlags)
  6048			v0 := b.NewValue0(v.Pos, OpPPC64CMPconst, types.TypeFlags)
  6049			v0.AuxInt = c
  6050			v0.AddArg(y)
  6051			v.AddArg(v0)
  6052			return true
  6053		}
  6054		return false
  6055	}
  6056	func rewriteValuePPC64_OpPPC64CMPU_0(v *Value) bool {
  6057		b := v.Block
  6058		// match: (CMPU x (MOVDconst [c]))
  6059		// cond: isU16Bit(c)
  6060		// result: (CMPUconst x [c])
  6061		for {
  6062			_ = v.Args[1]
  6063			x := v.Args[0]
  6064			v_1 := v.Args[1]
  6065			if v_1.Op != OpPPC64MOVDconst {
  6066				break
  6067			}
  6068			c := v_1.AuxInt
  6069			if !(isU16Bit(c)) {
  6070				break
  6071			}
  6072			v.reset(OpPPC64CMPUconst)
  6073			v.AuxInt = c
  6074			v.AddArg(x)
  6075			return true
  6076		}
  6077		// match: (CMPU (MOVDconst [c]) y)
  6078		// cond: isU16Bit(c)
  6079		// result: (InvertFlags (CMPUconst y [c]))
  6080		for {
  6081			y := v.Args[1]
  6082			v_0 := v.Args[0]
  6083			if v_0.Op != OpPPC64MOVDconst {
  6084				break
  6085			}
  6086			c := v_0.AuxInt
  6087			if !(isU16Bit(c)) {
  6088				break
  6089			}
  6090			v.reset(OpPPC64InvertFlags)
  6091			v0 := b.NewValue0(v.Pos, OpPPC64CMPUconst, types.TypeFlags)
  6092			v0.AuxInt = c
  6093			v0.AddArg(y)
  6094			v.AddArg(v0)
  6095			return true
  6096		}
  6097		return false
  6098	}
  6099	func rewriteValuePPC64_OpPPC64CMPUconst_0(v *Value) bool {
  6100		// match: (CMPUconst (MOVDconst [x]) [y])
  6101		// cond: x==y
  6102		// result: (FlagEQ)
  6103		for {
  6104			y := v.AuxInt
  6105			v_0 := v.Args[0]
  6106			if v_0.Op != OpPPC64MOVDconst {
  6107				break
  6108			}
  6109			x := v_0.AuxInt
  6110			if !(x == y) {
  6111				break
  6112			}
  6113			v.reset(OpPPC64FlagEQ)
  6114			return true
  6115		}
  6116		// match: (CMPUconst (MOVDconst [x]) [y])
  6117		// cond: uint64(x)<uint64(y)
  6118		// result: (FlagLT)
  6119		for {
  6120			y := v.AuxInt
  6121			v_0 := v.Args[0]
  6122			if v_0.Op != OpPPC64MOVDconst {
  6123				break
  6124			}
  6125			x := v_0.AuxInt
  6126			if !(uint64(x) < uint64(y)) {
  6127				break
  6128			}
  6129			v.reset(OpPPC64FlagLT)
  6130			return true
  6131		}
  6132		// match: (CMPUconst (MOVDconst [x]) [y])
  6133		// cond: uint64(x)>uint64(y)
  6134		// result: (FlagGT)
  6135		for {
  6136			y := v.AuxInt
  6137			v_0 := v.Args[0]
  6138			if v_0.Op != OpPPC64MOVDconst {
  6139				break
  6140			}
  6141			x := v_0.AuxInt
  6142			if !(uint64(x) > uint64(y)) {
  6143				break
  6144			}
  6145			v.reset(OpPPC64FlagGT)
  6146			return true
  6147		}
  6148		return false
  6149	}
  6150	func rewriteValuePPC64_OpPPC64CMPW_0(v *Value) bool {
  6151		b := v.Block
  6152		// match: (CMPW x (MOVWreg y))
  6153		// cond:
  6154		// result: (CMPW x y)
  6155		for {
  6156			_ = v.Args[1]
  6157			x := v.Args[0]
  6158			v_1 := v.Args[1]
  6159			if v_1.Op != OpPPC64MOVWreg {
  6160				break
  6161			}
  6162			y := v_1.Args[0]
  6163			v.reset(OpPPC64CMPW)
  6164			v.AddArg(x)
  6165			v.AddArg(y)
  6166			return true
  6167		}
  6168		// match: (CMPW (MOVWreg x) y)
  6169		// cond:
  6170		// result: (CMPW x y)
  6171		for {
  6172			y := v.Args[1]
  6173			v_0 := v.Args[0]
  6174			if v_0.Op != OpPPC64MOVWreg {
  6175				break
  6176			}
  6177			x := v_0.Args[0]
  6178			v.reset(OpPPC64CMPW)
  6179			v.AddArg(x)
  6180			v.AddArg(y)
  6181			return true
  6182		}
  6183		// match: (CMPW x (MOVDconst [c]))
  6184		// cond: is16Bit(c)
  6185		// result: (CMPWconst x [c])
  6186		for {
  6187			_ = v.Args[1]
  6188			x := v.Args[0]
  6189			v_1 := v.Args[1]
  6190			if v_1.Op != OpPPC64MOVDconst {
  6191				break
  6192			}
  6193			c := v_1.AuxInt
  6194			if !(is16Bit(c)) {
  6195				break
  6196			}
  6197			v.reset(OpPPC64CMPWconst)
  6198			v.AuxInt = c
  6199			v.AddArg(x)
  6200			return true
  6201		}
  6202		// match: (CMPW (MOVDconst [c]) y)
  6203		// cond: is16Bit(c)
  6204		// result: (InvertFlags (CMPWconst y [c]))
  6205		for {
  6206			y := v.Args[1]
  6207			v_0 := v.Args[0]
  6208			if v_0.Op != OpPPC64MOVDconst {
  6209				break
  6210			}
  6211			c := v_0.AuxInt
  6212			if !(is16Bit(c)) {
  6213				break
  6214			}
  6215			v.reset(OpPPC64InvertFlags)
  6216			v0 := b.NewValue0(v.Pos, OpPPC64CMPWconst, types.TypeFlags)
  6217			v0.AuxInt = c
  6218			v0.AddArg(y)
  6219			v.AddArg(v0)
  6220			return true
  6221		}
  6222		return false
  6223	}
  6224	func rewriteValuePPC64_OpPPC64CMPWU_0(v *Value) bool {
  6225		b := v.Block
  6226		// match: (CMPWU x (MOVWZreg y))
  6227		// cond:
  6228		// result: (CMPWU x y)
  6229		for {
  6230			_ = v.Args[1]
  6231			x := v.Args[0]
  6232			v_1 := v.Args[1]
  6233			if v_1.Op != OpPPC64MOVWZreg {
  6234				break
  6235			}
  6236			y := v_1.Args[0]
  6237			v.reset(OpPPC64CMPWU)
  6238			v.AddArg(x)
  6239			v.AddArg(y)
  6240			return true
  6241		}
  6242		// match: (CMPWU (MOVWZreg x) y)
  6243		// cond:
  6244		// result: (CMPWU x y)
  6245		for {
  6246			y := v.Args[1]
  6247			v_0 := v.Args[0]
  6248			if v_0.Op != OpPPC64MOVWZreg {
  6249				break
  6250			}
  6251			x := v_0.Args[0]
  6252			v.reset(OpPPC64CMPWU)
  6253			v.AddArg(x)
  6254			v.AddArg(y)
  6255			return true
  6256		}
  6257		// match: (CMPWU x (MOVDconst [c]))
  6258		// cond: isU16Bit(c)
  6259		// result: (CMPWUconst x [c])
  6260		for {
  6261			_ = v.Args[1]
  6262			x := v.Args[0]
  6263			v_1 := v.Args[1]
  6264			if v_1.Op != OpPPC64MOVDconst {
  6265				break
  6266			}
  6267			c := v_1.AuxInt
  6268			if !(isU16Bit(c)) {
  6269				break
  6270			}
  6271			v.reset(OpPPC64CMPWUconst)
  6272			v.AuxInt = c
  6273			v.AddArg(x)
  6274			return true
  6275		}
  6276		// match: (CMPWU (MOVDconst [c]) y)
  6277		// cond: isU16Bit(c)
  6278		// result: (InvertFlags (CMPWUconst y [c]))
  6279		for {
  6280			y := v.Args[1]
  6281			v_0 := v.Args[0]
  6282			if v_0.Op != OpPPC64MOVDconst {
  6283				break
  6284			}
  6285			c := v_0.AuxInt
  6286			if !(isU16Bit(c)) {
  6287				break
  6288			}
  6289			v.reset(OpPPC64InvertFlags)
  6290			v0 := b.NewValue0(v.Pos, OpPPC64CMPWUconst, types.TypeFlags)
  6291			v0.AuxInt = c
  6292			v0.AddArg(y)
  6293			v.AddArg(v0)
  6294			return true
  6295		}
  6296		return false
  6297	}
  6298	func rewriteValuePPC64_OpPPC64CMPWUconst_0(v *Value) bool {
  6299		// match: (CMPWUconst (MOVDconst [x]) [y])
  6300		// cond: int32(x)==int32(y)
  6301		// result: (FlagEQ)
  6302		for {
  6303			y := v.AuxInt
  6304			v_0 := v.Args[0]
  6305			if v_0.Op != OpPPC64MOVDconst {
  6306				break
  6307			}
  6308			x := v_0.AuxInt
  6309			if !(int32(x) == int32(y)) {
  6310				break
  6311			}
  6312			v.reset(OpPPC64FlagEQ)
  6313			return true
  6314		}
  6315		// match: (CMPWUconst (MOVDconst [x]) [y])
  6316		// cond: uint32(x)<uint32(y)
  6317		// result: (FlagLT)
  6318		for {
  6319			y := v.AuxInt
  6320			v_0 := v.Args[0]
  6321			if v_0.Op != OpPPC64MOVDconst {
  6322				break
  6323			}
  6324			x := v_0.AuxInt
  6325			if !(uint32(x) < uint32(y)) {
  6326				break
  6327			}
  6328			v.reset(OpPPC64FlagLT)
  6329			return true
  6330		}
  6331		// match: (CMPWUconst (MOVDconst [x]) [y])
  6332		// cond: uint32(x)>uint32(y)
  6333		// result: (FlagGT)
  6334		for {
  6335			y := v.AuxInt
  6336			v_0 := v.Args[0]
  6337			if v_0.Op != OpPPC64MOVDconst {
  6338				break
  6339			}
  6340			x := v_0.AuxInt
  6341			if !(uint32(x) > uint32(y)) {
  6342				break
  6343			}
  6344			v.reset(OpPPC64FlagGT)
  6345			return true
  6346		}
  6347		return false
  6348	}
  6349	func rewriteValuePPC64_OpPPC64CMPWconst_0(v *Value) bool {
  6350		// match: (CMPWconst (MOVDconst [x]) [y])
  6351		// cond: int32(x)==int32(y)
  6352		// result: (FlagEQ)
  6353		for {
  6354			y := v.AuxInt
  6355			v_0 := v.Args[0]
  6356			if v_0.Op != OpPPC64MOVDconst {
  6357				break
  6358			}
  6359			x := v_0.AuxInt
  6360			if !(int32(x) == int32(y)) {
  6361				break
  6362			}
  6363			v.reset(OpPPC64FlagEQ)
  6364			return true
  6365		}
  6366		// match: (CMPWconst (MOVDconst [x]) [y])
  6367		// cond: int32(x)<int32(y)
  6368		// result: (FlagLT)
  6369		for {
  6370			y := v.AuxInt
  6371			v_0 := v.Args[0]
  6372			if v_0.Op != OpPPC64MOVDconst {
  6373				break
  6374			}
  6375			x := v_0.AuxInt
  6376			if !(int32(x) < int32(y)) {
  6377				break
  6378			}
  6379			v.reset(OpPPC64FlagLT)
  6380			return true
  6381		}
  6382		// match: (CMPWconst (MOVDconst [x]) [y])
  6383		// cond: int32(x)>int32(y)
  6384		// result: (FlagGT)
  6385		for {
  6386			y := v.AuxInt
  6387			v_0 := v.Args[0]
  6388			if v_0.Op != OpPPC64MOVDconst {
  6389				break
  6390			}
  6391			x := v_0.AuxInt
  6392			if !(int32(x) > int32(y)) {
  6393				break
  6394			}
  6395			v.reset(OpPPC64FlagGT)
  6396			return true
  6397		}
  6398		return false
  6399	}
  6400	func rewriteValuePPC64_OpPPC64CMPconst_0(v *Value) bool {
  6401		// match: (CMPconst (MOVDconst [x]) [y])
  6402		// cond: x==y
  6403		// result: (FlagEQ)
  6404		for {
  6405			y := v.AuxInt
  6406			v_0 := v.Args[0]
  6407			if v_0.Op != OpPPC64MOVDconst {
  6408				break
  6409			}
  6410			x := v_0.AuxInt
  6411			if !(x == y) {
  6412				break
  6413			}
  6414			v.reset(OpPPC64FlagEQ)
  6415			return true
  6416		}
  6417		// match: (CMPconst (MOVDconst [x]) [y])
  6418		// cond: x<y
  6419		// result: (FlagLT)
  6420		for {
  6421			y := v.AuxInt
  6422			v_0 := v.Args[0]
  6423			if v_0.Op != OpPPC64MOVDconst {
  6424				break
  6425			}
  6426			x := v_0.AuxInt
  6427			if !(x < y) {
  6428				break
  6429			}
  6430			v.reset(OpPPC64FlagLT)
  6431			return true
  6432		}
  6433		// match: (CMPconst (MOVDconst [x]) [y])
  6434		// cond: x>y
  6435		// result: (FlagGT)
  6436		for {
  6437			y := v.AuxInt
  6438			v_0 := v.Args[0]
  6439			if v_0.Op != OpPPC64MOVDconst {
  6440				break
  6441			}
  6442			x := v_0.AuxInt
  6443			if !(x > y) {
  6444				break
  6445			}
  6446			v.reset(OpPPC64FlagGT)
  6447			return true
  6448		}
  6449		return false
  6450	}
  6451	func rewriteValuePPC64_OpPPC64Equal_0(v *Value) bool {
  6452		// match: (Equal (FlagEQ))
  6453		// cond:
  6454		// result: (MOVDconst [1])
  6455		for {
  6456			v_0 := v.Args[0]
  6457			if v_0.Op != OpPPC64FlagEQ {
  6458				break
  6459			}
  6460			v.reset(OpPPC64MOVDconst)
  6461			v.AuxInt = 1
  6462			return true
  6463		}
  6464		// match: (Equal (FlagLT))
  6465		// cond:
  6466		// result: (MOVDconst [0])
  6467		for {
  6468			v_0 := v.Args[0]
  6469			if v_0.Op != OpPPC64FlagLT {
  6470				break
  6471			}
  6472			v.reset(OpPPC64MOVDconst)
  6473			v.AuxInt = 0
  6474			return true
  6475		}
  6476		// match: (Equal (FlagGT))
  6477		// cond:
  6478		// result: (MOVDconst [0])
  6479		for {
  6480			v_0 := v.Args[0]
  6481			if v_0.Op != OpPPC64FlagGT {
  6482				break
  6483			}
  6484			v.reset(OpPPC64MOVDconst)
  6485			v.AuxInt = 0
  6486			return true
  6487		}
  6488		// match: (Equal (InvertFlags x))
  6489		// cond:
  6490		// result: (Equal x)
  6491		for {
  6492			v_0 := v.Args[0]
  6493			if v_0.Op != OpPPC64InvertFlags {
  6494				break
  6495			}
  6496			x := v_0.Args[0]
  6497			v.reset(OpPPC64Equal)
  6498			v.AddArg(x)
  6499			return true
  6500		}
  6501		return false
  6502	}
  6503	func rewriteValuePPC64_OpPPC64FABS_0(v *Value) bool {
  6504		// match: (FABS (FMOVDconst [x]))
  6505		// cond:
  6506		// result: (FMOVDconst [auxFrom64F(math.Abs(auxTo64F(x)))])
  6507		for {
  6508			v_0 := v.Args[0]
  6509			if v_0.Op != OpPPC64FMOVDconst {
  6510				break
  6511			}
  6512			x := v_0.AuxInt
  6513			v.reset(OpPPC64FMOVDconst)
  6514			v.AuxInt = auxFrom64F(math.Abs(auxTo64F(x)))
  6515			return true
  6516		}
  6517		return false
  6518	}
  6519	func rewriteValuePPC64_OpPPC64FADD_0(v *Value) bool {
  6520		// match: (FADD (FMUL x y) z)
  6521		// cond:
  6522		// result: (FMADD x y z)
  6523		for {
  6524			z := v.Args[1]
  6525			v_0 := v.Args[0]
  6526			if v_0.Op != OpPPC64FMUL {
  6527				break
  6528			}
  6529			y := v_0.Args[1]
  6530			x := v_0.Args[0]
  6531			v.reset(OpPPC64FMADD)
  6532			v.AddArg(x)
  6533			v.AddArg(y)
  6534			v.AddArg(z)
  6535			return true
  6536		}
  6537		// match: (FADD z (FMUL x y))
  6538		// cond:
  6539		// result: (FMADD x y z)
  6540		for {
  6541			_ = v.Args[1]
  6542			z := v.Args[0]
  6543			v_1 := v.Args[1]
  6544			if v_1.Op != OpPPC64FMUL {
  6545				break
  6546			}
  6547			y := v_1.Args[1]
  6548			x := v_1.Args[0]
  6549			v.reset(OpPPC64FMADD)
  6550			v.AddArg(x)
  6551			v.AddArg(y)
  6552			v.AddArg(z)
  6553			return true
  6554		}
  6555		return false
  6556	}
  6557	func rewriteValuePPC64_OpPPC64FADDS_0(v *Value) bool {
  6558		// match: (FADDS (FMULS x y) z)
  6559		// cond:
  6560		// result: (FMADDS x y z)
  6561		for {
  6562			z := v.Args[1]
  6563			v_0 := v.Args[0]
  6564			if v_0.Op != OpPPC64FMULS {
  6565				break
  6566			}
  6567			y := v_0.Args[1]
  6568			x := v_0.Args[0]
  6569			v.reset(OpPPC64FMADDS)
  6570			v.AddArg(x)
  6571			v.AddArg(y)
  6572			v.AddArg(z)
  6573			return true
  6574		}
  6575		// match: (FADDS z (FMULS x y))
  6576		// cond:
  6577		// result: (FMADDS x y z)
  6578		for {
  6579			_ = v.Args[1]
  6580			z := v.Args[0]
  6581			v_1 := v.Args[1]
  6582			if v_1.Op != OpPPC64FMULS {
  6583				break
  6584			}
  6585			y := v_1.Args[1]
  6586			x := v_1.Args[0]
  6587			v.reset(OpPPC64FMADDS)
  6588			v.AddArg(x)
  6589			v.AddArg(y)
  6590			v.AddArg(z)
  6591			return true
  6592		}
  6593		return false
  6594	}
  6595	func rewriteValuePPC64_OpPPC64FCEIL_0(v *Value) bool {
  6596		// match: (FCEIL (FMOVDconst [x]))
  6597		// cond:
  6598		// result: (FMOVDconst [auxFrom64F(math.Ceil(auxTo64F(x)))])
  6599		for {
  6600			v_0 := v.Args[0]
  6601			if v_0.Op != OpPPC64FMOVDconst {
  6602				break
  6603			}
  6604			x := v_0.AuxInt
  6605			v.reset(OpPPC64FMOVDconst)
  6606			v.AuxInt = auxFrom64F(math.Ceil(auxTo64F(x)))
  6607			return true
  6608		}
  6609		return false
  6610	}
  6611	func rewriteValuePPC64_OpPPC64FFLOOR_0(v *Value) bool {
  6612		// match: (FFLOOR (FMOVDconst [x]))
  6613		// cond:
  6614		// result: (FMOVDconst [auxFrom64F(math.Floor(auxTo64F(x)))])
  6615		for {
  6616			v_0 := v.Args[0]
  6617			if v_0.Op != OpPPC64FMOVDconst {
  6618				break
  6619			}
  6620			x := v_0.AuxInt
  6621			v.reset(OpPPC64FMOVDconst)
  6622			v.AuxInt = auxFrom64F(math.Floor(auxTo64F(x)))
  6623			return true
  6624		}
  6625		return false
  6626	}
  6627	func rewriteValuePPC64_OpPPC64FMOVDload_0(v *Value) bool {
  6628		// match: (FMOVDload [off] {sym} ptr (MOVDstore [off] {sym} ptr x _))
  6629		// cond:
  6630		// result: (MTVSRD x)
  6631		for {
  6632			off := v.AuxInt
  6633			sym := v.Aux
  6634			_ = v.Args[1]
  6635			ptr := v.Args[0]
  6636			v_1 := v.Args[1]
  6637			if v_1.Op != OpPPC64MOVDstore {
  6638				break
  6639			}
  6640			if v_1.AuxInt != off {
  6641				break
  6642			}
  6643			if v_1.Aux != sym {
  6644				break
  6645			}
  6646			_ = v_1.Args[2]
  6647			if ptr != v_1.Args[0] {
  6648				break
  6649			}
  6650			x := v_1.Args[1]
  6651			v.reset(OpPPC64MTVSRD)
  6652			v.AddArg(x)
  6653			return true
  6654		}
  6655		// match: (FMOVDload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
  6656		// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
  6657		// result: (FMOVDload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  6658		for {
  6659			off1 := v.AuxInt
  6660			sym1 := v.Aux
  6661			mem := v.Args[1]
  6662			p := v.Args[0]
  6663			if p.Op != OpPPC64MOVDaddr {
  6664				break
  6665			}
  6666			off2 := p.AuxInt
  6667			sym2 := p.Aux
  6668			ptr := p.Args[0]
  6669			if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  6670				break
  6671			}
  6672			v.reset(OpPPC64FMOVDload)
  6673			v.AuxInt = off1 + off2
  6674			v.Aux = mergeSym(sym1, sym2)
  6675			v.AddArg(ptr)
  6676			v.AddArg(mem)
  6677			return true
  6678		}
  6679		// match: (FMOVDload [off1] {sym} (ADDconst [off2] ptr) mem)
  6680		// cond: is16Bit(off1+off2)
  6681		// result: (FMOVDload [off1+off2] {sym} ptr mem)
  6682		for {
  6683			off1 := v.AuxInt
  6684			sym := v.Aux
  6685			mem := v.Args[1]
  6686			v_0 := v.Args[0]
  6687			if v_0.Op != OpPPC64ADDconst {
  6688				break
  6689			}
  6690			off2 := v_0.AuxInt
  6691			ptr := v_0.Args[0]
  6692			if !(is16Bit(off1 + off2)) {
  6693				break
  6694			}
  6695			v.reset(OpPPC64FMOVDload)
  6696			v.AuxInt = off1 + off2
  6697			v.Aux = sym
  6698			v.AddArg(ptr)
  6699			v.AddArg(mem)
  6700			return true
  6701		}
  6702		return false
  6703	}
  6704	func rewriteValuePPC64_OpPPC64FMOVDstore_0(v *Value) bool {
  6705		// match: (FMOVDstore [off] {sym} ptr (MTVSRD x) mem)
  6706		// cond:
  6707		// result: (MOVDstore [off] {sym} ptr x mem)
  6708		for {
  6709			off := v.AuxInt
  6710			sym := v.Aux
  6711			mem := v.Args[2]
  6712			ptr := v.Args[0]
  6713			v_1 := v.Args[1]
  6714			if v_1.Op != OpPPC64MTVSRD {
  6715				break
  6716			}
  6717			x := v_1.Args[0]
  6718			v.reset(OpPPC64MOVDstore)
  6719			v.AuxInt = off
  6720			v.Aux = sym
  6721			v.AddArg(ptr)
  6722			v.AddArg(x)
  6723			v.AddArg(mem)
  6724			return true
  6725		}
  6726		// match: (FMOVDstore [off1] {sym} (ADDconst [off2] ptr) val mem)
  6727		// cond: is16Bit(off1+off2)
  6728		// result: (FMOVDstore [off1+off2] {sym} ptr val mem)
  6729		for {
  6730			off1 := v.AuxInt
  6731			sym := v.Aux
  6732			mem := v.Args[2]
  6733			v_0 := v.Args[0]
  6734			if v_0.Op != OpPPC64ADDconst {
  6735				break
  6736			}
  6737			off2 := v_0.AuxInt
  6738			ptr := v_0.Args[0]
  6739			val := v.Args[1]
  6740			if !(is16Bit(off1 + off2)) {
  6741				break
  6742			}
  6743			v.reset(OpPPC64FMOVDstore)
  6744			v.AuxInt = off1 + off2
  6745			v.Aux = sym
  6746			v.AddArg(ptr)
  6747			v.AddArg(val)
  6748			v.AddArg(mem)
  6749			return true
  6750		}
  6751		// match: (FMOVDstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem)
  6752		// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
  6753		// result: (FMOVDstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  6754		for {
  6755			off1 := v.AuxInt
  6756			sym1 := v.Aux
  6757			mem := v.Args[2]
  6758			p := v.Args[0]
  6759			if p.Op != OpPPC64MOVDaddr {
  6760				break
  6761			}
  6762			off2 := p.AuxInt
  6763			sym2 := p.Aux
  6764			ptr := p.Args[0]
  6765			val := v.Args[1]
  6766			if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  6767				break
  6768			}
  6769			v.reset(OpPPC64FMOVDstore)
  6770			v.AuxInt = off1 + off2
  6771			v.Aux = mergeSym(sym1, sym2)
  6772			v.AddArg(ptr)
  6773			v.AddArg(val)
  6774			v.AddArg(mem)
  6775			return true
  6776		}
  6777		return false
  6778	}
  6779	func rewriteValuePPC64_OpPPC64FMOVSload_0(v *Value) bool {
  6780		// match: (FMOVSload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
  6781		// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
  6782		// result: (FMOVSload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  6783		for {
  6784			off1 := v.AuxInt
  6785			sym1 := v.Aux
  6786			mem := v.Args[1]
  6787			p := v.Args[0]
  6788			if p.Op != OpPPC64MOVDaddr {
  6789				break
  6790			}
  6791			off2 := p.AuxInt
  6792			sym2 := p.Aux
  6793			ptr := p.Args[0]
  6794			if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  6795				break
  6796			}
  6797			v.reset(OpPPC64FMOVSload)
  6798			v.AuxInt = off1 + off2
  6799			v.Aux = mergeSym(sym1, sym2)
  6800			v.AddArg(ptr)
  6801			v.AddArg(mem)
  6802			return true
  6803		}
  6804		// match: (FMOVSload [off1] {sym} (ADDconst [off2] ptr) mem)
  6805		// cond: is16Bit(off1+off2)
  6806		// result: (FMOVSload [off1+off2] {sym} ptr mem)
  6807		for {
  6808			off1 := v.AuxInt
  6809			sym := v.Aux
  6810			mem := v.Args[1]
  6811			v_0 := v.Args[0]
  6812			if v_0.Op != OpPPC64ADDconst {
  6813				break
  6814			}
  6815			off2 := v_0.AuxInt
  6816			ptr := v_0.Args[0]
  6817			if !(is16Bit(off1 + off2)) {
  6818				break
  6819			}
  6820			v.reset(OpPPC64FMOVSload)
  6821			v.AuxInt = off1 + off2
  6822			v.Aux = sym
  6823			v.AddArg(ptr)
  6824			v.AddArg(mem)
  6825			return true
  6826		}
  6827		return false
  6828	}
  6829	func rewriteValuePPC64_OpPPC64FMOVSstore_0(v *Value) bool {
  6830		// match: (FMOVSstore [off1] {sym} (ADDconst [off2] ptr) val mem)
  6831		// cond: is16Bit(off1+off2)
  6832		// result: (FMOVSstore [off1+off2] {sym} ptr val mem)
  6833		for {
  6834			off1 := v.AuxInt
  6835			sym := v.Aux
  6836			mem := v.Args[2]
  6837			v_0 := v.Args[0]
  6838			if v_0.Op != OpPPC64ADDconst {
  6839				break
  6840			}
  6841			off2 := v_0.AuxInt
  6842			ptr := v_0.Args[0]
  6843			val := v.Args[1]
  6844			if !(is16Bit(off1 + off2)) {
  6845				break
  6846			}
  6847			v.reset(OpPPC64FMOVSstore)
  6848			v.AuxInt = off1 + off2
  6849			v.Aux = sym
  6850			v.AddArg(ptr)
  6851			v.AddArg(val)
  6852			v.AddArg(mem)
  6853			return true
  6854		}
  6855		// match: (FMOVSstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem)
  6856		// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
  6857		// result: (FMOVSstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  6858		for {
  6859			off1 := v.AuxInt
  6860			sym1 := v.Aux
  6861			mem := v.Args[2]
  6862			p := v.Args[0]
  6863			if p.Op != OpPPC64MOVDaddr {
  6864				break
  6865			}
  6866			off2 := p.AuxInt
  6867			sym2 := p.Aux
  6868			ptr := p.Args[0]
  6869			val := v.Args[1]
  6870			if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  6871				break
  6872			}
  6873			v.reset(OpPPC64FMOVSstore)
  6874			v.AuxInt = off1 + off2
  6875			v.Aux = mergeSym(sym1, sym2)
  6876			v.AddArg(ptr)
  6877			v.AddArg(val)
  6878			v.AddArg(mem)
  6879			return true
  6880		}
  6881		return false
  6882	}
  6883	func rewriteValuePPC64_OpPPC64FNEG_0(v *Value) bool {
  6884		// match: (FNEG (FABS x))
  6885		// cond:
  6886		// result: (FNABS x)
  6887		for {
  6888			v_0 := v.Args[0]
  6889			if v_0.Op != OpPPC64FABS {
  6890				break
  6891			}
  6892			x := v_0.Args[0]
  6893			v.reset(OpPPC64FNABS)
  6894			v.AddArg(x)
  6895			return true
  6896		}
  6897		// match: (FNEG (FNABS x))
  6898		// cond:
  6899		// result: (FABS x)
  6900		for {
  6901			v_0 := v.Args[0]
  6902			if v_0.Op != OpPPC64FNABS {
  6903				break
  6904			}
  6905			x := v_0.Args[0]
  6906			v.reset(OpPPC64FABS)
  6907			v.AddArg(x)
  6908			return true
  6909		}
  6910		return false
  6911	}
  6912	func rewriteValuePPC64_OpPPC64FSQRT_0(v *Value) bool {
  6913		// match: (FSQRT (FMOVDconst [x]))
  6914		// cond:
  6915		// result: (FMOVDconst [auxFrom64F(math.Sqrt(auxTo64F(x)))])
  6916		for {
  6917			v_0 := v.Args[0]
  6918			if v_0.Op != OpPPC64FMOVDconst {
  6919				break
  6920			}
  6921			x := v_0.AuxInt
  6922			v.reset(OpPPC64FMOVDconst)
  6923			v.AuxInt = auxFrom64F(math.Sqrt(auxTo64F(x)))
  6924			return true
  6925		}
  6926		return false
  6927	}
  6928	func rewriteValuePPC64_OpPPC64FSUB_0(v *Value) bool {
  6929		// match: (FSUB (FMUL x y) z)
  6930		// cond:
  6931		// result: (FMSUB x y z)
  6932		for {
  6933			z := v.Args[1]
  6934			v_0 := v.Args[0]
  6935			if v_0.Op != OpPPC64FMUL {
  6936				break
  6937			}
  6938			y := v_0.Args[1]
  6939			x := v_0.Args[0]
  6940			v.reset(OpPPC64FMSUB)
  6941			v.AddArg(x)
  6942			v.AddArg(y)
  6943			v.AddArg(z)
  6944			return true
  6945		}
  6946		return false
  6947	}
  6948	func rewriteValuePPC64_OpPPC64FSUBS_0(v *Value) bool {
  6949		// match: (FSUBS (FMULS x y) z)
  6950		// cond:
  6951		// result: (FMSUBS x y z)
  6952		for {
  6953			z := v.Args[1]
  6954			v_0 := v.Args[0]
  6955			if v_0.Op != OpPPC64FMULS {
  6956				break
  6957			}
  6958			y := v_0.Args[1]
  6959			x := v_0.Args[0]
  6960			v.reset(OpPPC64FMSUBS)
  6961			v.AddArg(x)
  6962			v.AddArg(y)
  6963			v.AddArg(z)
  6964			return true
  6965		}
  6966		return false
  6967	}
  6968	func rewriteValuePPC64_OpPPC64FTRUNC_0(v *Value) bool {
  6969		// match: (FTRUNC (FMOVDconst [x]))
  6970		// cond:
  6971		// result: (FMOVDconst [auxFrom64F(math.Trunc(auxTo64F(x)))])
  6972		for {
  6973			v_0 := v.Args[0]
  6974			if v_0.Op != OpPPC64FMOVDconst {
  6975				break
  6976			}
  6977			x := v_0.AuxInt
  6978			v.reset(OpPPC64FMOVDconst)
  6979			v.AuxInt = auxFrom64F(math.Trunc(auxTo64F(x)))
  6980			return true
  6981		}
  6982		return false
  6983	}
  6984	func rewriteValuePPC64_OpPPC64GreaterEqual_0(v *Value) bool {
  6985		// match: (GreaterEqual (FlagEQ))
  6986		// cond:
  6987		// result: (MOVDconst [1])
  6988		for {
  6989			v_0 := v.Args[0]
  6990			if v_0.Op != OpPPC64FlagEQ {
  6991				break
  6992			}
  6993			v.reset(OpPPC64MOVDconst)
  6994			v.AuxInt = 1
  6995			return true
  6996		}
  6997		// match: (GreaterEqual (FlagLT))
  6998		// cond:
  6999		// result: (MOVDconst [0])
  7000		for {
  7001			v_0 := v.Args[0]
  7002			if v_0.Op != OpPPC64FlagLT {
  7003				break
  7004			}
  7005			v.reset(OpPPC64MOVDconst)
  7006			v.AuxInt = 0
  7007			return true
  7008		}
  7009		// match: (GreaterEqual (FlagGT))
  7010		// cond:
  7011		// result: (MOVDconst [1])
  7012		for {
  7013			v_0 := v.Args[0]
  7014			if v_0.Op != OpPPC64FlagGT {
  7015				break
  7016			}
  7017			v.reset(OpPPC64MOVDconst)
  7018			v.AuxInt = 1
  7019			return true
  7020		}
  7021		// match: (GreaterEqual (InvertFlags x))
  7022		// cond:
  7023		// result: (LessEqual x)
  7024		for {
  7025			v_0 := v.Args[0]
  7026			if v_0.Op != OpPPC64InvertFlags {
  7027				break
  7028			}
  7029			x := v_0.Args[0]
  7030			v.reset(OpPPC64LessEqual)
  7031			v.AddArg(x)
  7032			return true
  7033		}
  7034		return false
  7035	}
  7036	func rewriteValuePPC64_OpPPC64GreaterThan_0(v *Value) bool {
  7037		// match: (GreaterThan (FlagEQ))
  7038		// cond:
  7039		// result: (MOVDconst [0])
  7040		for {
  7041			v_0 := v.Args[0]
  7042			if v_0.Op != OpPPC64FlagEQ {
  7043				break
  7044			}
  7045			v.reset(OpPPC64MOVDconst)
  7046			v.AuxInt = 0
  7047			return true
  7048		}
  7049		// match: (GreaterThan (FlagLT))
  7050		// cond:
  7051		// result: (MOVDconst [0])
  7052		for {
  7053			v_0 := v.Args[0]
  7054			if v_0.Op != OpPPC64FlagLT {
  7055				break
  7056			}
  7057			v.reset(OpPPC64MOVDconst)
  7058			v.AuxInt = 0
  7059			return true
  7060		}
  7061		// match: (GreaterThan (FlagGT))
  7062		// cond:
  7063		// result: (MOVDconst [1])
  7064		for {
  7065			v_0 := v.Args[0]
  7066			if v_0.Op != OpPPC64FlagGT {
  7067				break
  7068			}
  7069			v.reset(OpPPC64MOVDconst)
  7070			v.AuxInt = 1
  7071			return true
  7072		}
  7073		// match: (GreaterThan (InvertFlags x))
  7074		// cond:
  7075		// result: (LessThan x)
  7076		for {
  7077			v_0 := v.Args[0]
  7078			if v_0.Op != OpPPC64InvertFlags {
  7079				break
  7080			}
  7081			x := v_0.Args[0]
  7082			v.reset(OpPPC64LessThan)
  7083			v.AddArg(x)
  7084			return true
  7085		}
  7086		return false
  7087	}
  7088	func rewriteValuePPC64_OpPPC64LessEqual_0(v *Value) bool {
  7089		// match: (LessEqual (FlagEQ))
  7090		// cond:
  7091		// result: (MOVDconst [1])
  7092		for {
  7093			v_0 := v.Args[0]
  7094			if v_0.Op != OpPPC64FlagEQ {
  7095				break
  7096			}
  7097			v.reset(OpPPC64MOVDconst)
  7098			v.AuxInt = 1
  7099			return true
  7100		}
  7101		// match: (LessEqual (FlagLT))
  7102		// cond:
  7103		// result: (MOVDconst [1])
  7104		for {
  7105			v_0 := v.Args[0]
  7106			if v_0.Op != OpPPC64FlagLT {
  7107				break
  7108			}
  7109			v.reset(OpPPC64MOVDconst)
  7110			v.AuxInt = 1
  7111			return true
  7112		}
  7113		// match: (LessEqual (FlagGT))
  7114		// cond:
  7115		// result: (MOVDconst [0])
  7116		for {
  7117			v_0 := v.Args[0]
  7118			if v_0.Op != OpPPC64FlagGT {
  7119				break
  7120			}
  7121			v.reset(OpPPC64MOVDconst)
  7122			v.AuxInt = 0
  7123			return true
  7124		}
  7125		// match: (LessEqual (InvertFlags x))
  7126		// cond:
  7127		// result: (GreaterEqual x)
  7128		for {
  7129			v_0 := v.Args[0]
  7130			if v_0.Op != OpPPC64InvertFlags {
  7131				break
  7132			}
  7133			x := v_0.Args[0]
  7134			v.reset(OpPPC64GreaterEqual)
  7135			v.AddArg(x)
  7136			return true
  7137		}
  7138		return false
  7139	}
  7140	func rewriteValuePPC64_OpPPC64LessThan_0(v *Value) bool {
  7141		// match: (LessThan (FlagEQ))
  7142		// cond:
  7143		// result: (MOVDconst [0])
  7144		for {
  7145			v_0 := v.Args[0]
  7146			if v_0.Op != OpPPC64FlagEQ {
  7147				break
  7148			}
  7149			v.reset(OpPPC64MOVDconst)
  7150			v.AuxInt = 0
  7151			return true
  7152		}
  7153		// match: (LessThan (FlagLT))
  7154		// cond:
  7155		// result: (MOVDconst [1])
  7156		for {
  7157			v_0 := v.Args[0]
  7158			if v_0.Op != OpPPC64FlagLT {
  7159				break
  7160			}
  7161			v.reset(OpPPC64MOVDconst)
  7162			v.AuxInt = 1
  7163			return true
  7164		}
  7165		// match: (LessThan (FlagGT))
  7166		// cond:
  7167		// result: (MOVDconst [0])
  7168		for {
  7169			v_0 := v.Args[0]
  7170			if v_0.Op != OpPPC64FlagGT {
  7171				break
  7172			}
  7173			v.reset(OpPPC64MOVDconst)
  7174			v.AuxInt = 0
  7175			return true
  7176		}
  7177		// match: (LessThan (InvertFlags x))
  7178		// cond:
  7179		// result: (GreaterThan x)
  7180		for {
  7181			v_0 := v.Args[0]
  7182			if v_0.Op != OpPPC64InvertFlags {
  7183				break
  7184			}
  7185			x := v_0.Args[0]
  7186			v.reset(OpPPC64GreaterThan)
  7187			v.AddArg(x)
  7188			return true
  7189		}
  7190		return false
  7191	}
  7192	func rewriteValuePPC64_OpPPC64MFVSRD_0(v *Value) bool {
  7193		b := v.Block
  7194		typ := &b.Func.Config.Types
  7195		// match: (MFVSRD (FMOVDconst [c]))
  7196		// cond:
  7197		// result: (MOVDconst [c])
  7198		for {
  7199			v_0 := v.Args[0]
  7200			if v_0.Op != OpPPC64FMOVDconst {
  7201				break
  7202			}
  7203			c := v_0.AuxInt
  7204			v.reset(OpPPC64MOVDconst)
  7205			v.AuxInt = c
  7206			return true
  7207		}
  7208		// match: (MFVSRD x:(FMOVDload [off] {sym} ptr mem))
  7209		// cond: x.Uses == 1 && clobber(x)
  7210		// result: @x.Block (MOVDload [off] {sym} ptr mem)
  7211		for {
  7212			x := v.Args[0]
  7213			if x.Op != OpPPC64FMOVDload {
  7214				break
  7215			}
  7216			off := x.AuxInt
  7217			sym := x.Aux
  7218			mem := x.Args[1]
  7219			ptr := x.Args[0]
  7220			if !(x.Uses == 1 && clobber(x)) {
  7221				break
  7222			}
  7223			b = x.Block
  7224			v0 := b.NewValue0(x.Pos, OpPPC64MOVDload, typ.Int64)
  7225			v.reset(OpCopy)
  7226			v.AddArg(v0)
  7227			v0.AuxInt = off
  7228			v0.Aux = sym
  7229			v0.AddArg(ptr)
  7230			v0.AddArg(mem)
  7231			return true
  7232		}
  7233		return false
  7234	}
  7235	func rewriteValuePPC64_OpPPC64MOVBZload_0(v *Value) bool {
  7236		// match: (MOVBZload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
  7237		// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
  7238		// result: (MOVBZload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  7239		for {
  7240			off1 := v.AuxInt
  7241			sym1 := v.Aux
  7242			mem := v.Args[1]
  7243			p := v.Args[0]
  7244			if p.Op != OpPPC64MOVDaddr {
  7245				break
  7246			}
  7247			off2 := p.AuxInt
  7248			sym2 := p.Aux
  7249			ptr := p.Args[0]
  7250			if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  7251				break
  7252			}
  7253			v.reset(OpPPC64MOVBZload)
  7254			v.AuxInt = off1 + off2
  7255			v.Aux = mergeSym(sym1, sym2)
  7256			v.AddArg(ptr)
  7257			v.AddArg(mem)
  7258			return true
  7259		}
  7260		// match: (MOVBZload [off1] {sym} (ADDconst [off2] x) mem)
  7261		// cond: is16Bit(off1+off2)
  7262		// result: (MOVBZload [off1+off2] {sym} x mem)
  7263		for {
  7264			off1 := v.AuxInt
  7265			sym := v.Aux
  7266			mem := v.Args[1]
  7267			v_0 := v.Args[0]
  7268			if v_0.Op != OpPPC64ADDconst {
  7269				break
  7270			}
  7271			off2 := v_0.AuxInt
  7272			x := v_0.Args[0]
  7273			if !(is16Bit(off1 + off2)) {
  7274				break
  7275			}
  7276			v.reset(OpPPC64MOVBZload)
  7277			v.AuxInt = off1 + off2
  7278			v.Aux = sym
  7279			v.AddArg(x)
  7280			v.AddArg(mem)
  7281			return true
  7282		}
  7283		// match: (MOVBZload [0] {sym} p:(ADD ptr idx) mem)
  7284		// cond: sym == nil && p.Uses == 1
  7285		// result: (MOVBZloadidx ptr idx mem)
  7286		for {
  7287			if v.AuxInt != 0 {
  7288				break
  7289			}
  7290			sym := v.Aux
  7291			mem := v.Args[1]
  7292			p := v.Args[0]
  7293			if p.Op != OpPPC64ADD {
  7294				break
  7295			}
  7296			idx := p.Args[1]
  7297			ptr := p.Args[0]
  7298			if !(sym == nil && p.Uses == 1) {
  7299				break
  7300			}
  7301			v.reset(OpPPC64MOVBZloadidx)
  7302			v.AddArg(ptr)
  7303			v.AddArg(idx)
  7304			v.AddArg(mem)
  7305			return true
  7306		}
  7307		return false
  7308	}
  7309	func rewriteValuePPC64_OpPPC64MOVBZloadidx_0(v *Value) bool {
  7310		// match: (MOVBZloadidx ptr (MOVDconst [c]) mem)
  7311		// cond: is16Bit(c)
  7312		// result: (MOVBZload [c] ptr mem)
  7313		for {
  7314			mem := v.Args[2]
  7315			ptr := v.Args[0]
  7316			v_1 := v.Args[1]
  7317			if v_1.Op != OpPPC64MOVDconst {
  7318				break
  7319			}
  7320			c := v_1.AuxInt
  7321			if !(is16Bit(c)) {
  7322				break
  7323			}
  7324			v.reset(OpPPC64MOVBZload)
  7325			v.AuxInt = c
  7326			v.AddArg(ptr)
  7327			v.AddArg(mem)
  7328			return true
  7329		}
  7330		// match: (MOVBZloadidx (MOVDconst [c]) ptr mem)
  7331		// cond: is16Bit(c)
  7332		// result: (MOVBZload [c] ptr mem)
  7333		for {
  7334			mem := v.Args[2]
  7335			v_0 := v.Args[0]
  7336			if v_0.Op != OpPPC64MOVDconst {
  7337				break
  7338			}
  7339			c := v_0.AuxInt
  7340			ptr := v.Args[1]
  7341			if !(is16Bit(c)) {
  7342				break
  7343			}
  7344			v.reset(OpPPC64MOVBZload)
  7345			v.AuxInt = c
  7346			v.AddArg(ptr)
  7347			v.AddArg(mem)
  7348			return true
  7349		}
  7350		return false
  7351	}
  7352	func rewriteValuePPC64_OpPPC64MOVBZreg_0(v *Value) bool {
  7353		b := v.Block
  7354		typ := &b.Func.Config.Types
  7355		// match: (MOVBZreg y:(ANDconst [c] _))
  7356		// cond: uint64(c) <= 0xFF
  7357		// result: y
  7358		for {
  7359			y := v.Args[0]
  7360			if y.Op != OpPPC64ANDconst {
  7361				break
  7362			}
  7363			c := y.AuxInt
  7364			if !(uint64(c) <= 0xFF) {
  7365				break
  7366			}
  7367			v.reset(OpCopy)
  7368			v.Type = y.Type
  7369			v.AddArg(y)
  7370			return true
  7371		}
  7372		// match: (MOVBZreg (SRWconst [c] (MOVBZreg x)))
  7373		// cond:
  7374		// result: (SRWconst [c] (MOVBZreg x))
  7375		for {
  7376			v_0 := v.Args[0]
  7377			if v_0.Op != OpPPC64SRWconst {
  7378				break
  7379			}
  7380			c := v_0.AuxInt
  7381			v_0_0 := v_0.Args[0]
  7382			if v_0_0.Op != OpPPC64MOVBZreg {
  7383				break
  7384			}
  7385			x := v_0_0.Args[0]
  7386			v.reset(OpPPC64SRWconst)
  7387			v.AuxInt = c
  7388			v0 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
  7389			v0.AddArg(x)
  7390			v.AddArg(v0)
  7391			return true
  7392		}
  7393		// match: (MOVBZreg (SRWconst [c] x))
  7394		// cond: sizeof(x.Type) == 8
  7395		// result: (SRWconst [c] x)
  7396		for {
  7397			v_0 := v.Args[0]
  7398			if v_0.Op != OpPPC64SRWconst {
  7399				break
  7400			}
  7401			c := v_0.AuxInt
  7402			x := v_0.Args[0]
  7403			if !(sizeof(x.Type) == 8) {
  7404				break
  7405			}
  7406			v.reset(OpPPC64SRWconst)
  7407			v.AuxInt = c
  7408			v.AddArg(x)
  7409			return true
  7410		}
  7411		// match: (MOVBZreg (SRDconst [c] x))
  7412		// cond: c>=56
  7413		// result: (SRDconst [c] x)
  7414		for {
  7415			v_0 := v.Args[0]
  7416			if v_0.Op != OpPPC64SRDconst {
  7417				break
  7418			}
  7419			c := v_0.AuxInt
  7420			x := v_0.Args[0]
  7421			if !(c >= 56) {
  7422				break
  7423			}
  7424			v.reset(OpPPC64SRDconst)
  7425			v.AuxInt = c
  7426			v.AddArg(x)
  7427			return true
  7428		}
  7429		// match: (MOVBZreg (SRWconst [c] x))
  7430		// cond: c>=24
  7431		// result: (SRWconst [c] x)
  7432		for {
  7433			v_0 := v.Args[0]
  7434			if v_0.Op != OpPPC64SRWconst {
  7435				break
  7436			}
  7437			c := v_0.AuxInt
  7438			x := v_0.Args[0]
  7439			if !(c >= 24) {
  7440				break
  7441			}
  7442			v.reset(OpPPC64SRWconst)
  7443			v.AuxInt = c
  7444			v.AddArg(x)
  7445			return true
  7446		}
  7447		// match: (MOVBZreg y:(MOVBZreg _))
  7448		// cond:
  7449		// result: y
  7450		for {
  7451			y := v.Args[0]
  7452			if y.Op != OpPPC64MOVBZreg {
  7453				break
  7454			}
  7455			v.reset(OpCopy)
  7456			v.Type = y.Type
  7457			v.AddArg(y)
  7458			return true
  7459		}
  7460		// match: (MOVBZreg (MOVBreg x))
  7461		// cond:
  7462		// result: (MOVBZreg x)
  7463		for {
  7464			v_0 := v.Args[0]
  7465			if v_0.Op != OpPPC64MOVBreg {
  7466				break
  7467			}
  7468			x := v_0.Args[0]
  7469			v.reset(OpPPC64MOVBZreg)
  7470			v.AddArg(x)
  7471			return true
  7472		}
  7473		// match: (MOVBZreg x:(MOVBZload _ _))
  7474		// cond:
  7475		// result: x
  7476		for {
  7477			x := v.Args[0]
  7478			if x.Op != OpPPC64MOVBZload {
  7479				break
  7480			}
  7481			_ = x.Args[1]
  7482			v.reset(OpCopy)
  7483			v.Type = x.Type
  7484			v.AddArg(x)
  7485			return true
  7486		}
  7487		// match: (MOVBZreg x:(MOVBZloadidx _ _ _))
  7488		// cond:
  7489		// result: x
  7490		for {
  7491			x := v.Args[0]
  7492			if x.Op != OpPPC64MOVBZloadidx {
  7493				break
  7494			}
  7495			_ = x.Args[2]
  7496			v.reset(OpCopy)
  7497			v.Type = x.Type
  7498			v.AddArg(x)
  7499			return true
  7500		}
  7501		// match: (MOVBZreg x:(Arg <t>))
  7502		// cond: is8BitInt(t) && !isSigned(t)
  7503		// result: x
  7504		for {
  7505			x := v.Args[0]
  7506			if x.Op != OpArg {
  7507				break
  7508			}
  7509			t := x.Type
  7510			if !(is8BitInt(t) && !isSigned(t)) {
  7511				break
  7512			}
  7513			v.reset(OpCopy)
  7514			v.Type = x.Type
  7515			v.AddArg(x)
  7516			return true
  7517		}
  7518		return false
  7519	}
  7520	func rewriteValuePPC64_OpPPC64MOVBZreg_10(v *Value) bool {
  7521		// match: (MOVBZreg (MOVDconst [c]))
  7522		// cond:
  7523		// result: (MOVDconst [int64(uint8(c))])
  7524		for {
  7525			v_0 := v.Args[0]
  7526			if v_0.Op != OpPPC64MOVDconst {
  7527				break
  7528			}
  7529			c := v_0.AuxInt
  7530			v.reset(OpPPC64MOVDconst)
  7531			v.AuxInt = int64(uint8(c))
  7532			return true
  7533		}
  7534		return false
  7535	}
  7536	func rewriteValuePPC64_OpPPC64MOVBreg_0(v *Value) bool {
  7537		b := v.Block
  7538		typ := &b.Func.Config.Types
  7539		// match: (MOVBreg y:(ANDconst [c] _))
  7540		// cond: uint64(c) <= 0x7F
  7541		// result: y
  7542		for {
  7543			y := v.Args[0]
  7544			if y.Op != OpPPC64ANDconst {
  7545				break
  7546			}
  7547			c := y.AuxInt
  7548			if !(uint64(c) <= 0x7F) {
  7549				break
  7550			}
  7551			v.reset(OpCopy)
  7552			v.Type = y.Type
  7553			v.AddArg(y)
  7554			return true
  7555		}
  7556		// match: (MOVBreg (SRAWconst [c] (MOVBreg x)))
  7557		// cond:
  7558		// result: (SRAWconst [c] (MOVBreg x))
  7559		for {
  7560			v_0 := v.Args[0]
  7561			if v_0.Op != OpPPC64SRAWconst {
  7562				break
  7563			}
  7564			c := v_0.AuxInt
  7565			v_0_0 := v_0.Args[0]
  7566			if v_0_0.Op != OpPPC64MOVBreg {
  7567				break
  7568			}
  7569			x := v_0_0.Args[0]
  7570			v.reset(OpPPC64SRAWconst)
  7571			v.AuxInt = c
  7572			v0 := b.NewValue0(v.Pos, OpPPC64MOVBreg, typ.Int64)
  7573			v0.AddArg(x)
  7574			v.AddArg(v0)
  7575			return true
  7576		}
  7577		// match: (MOVBreg (SRAWconst [c] x))
  7578		// cond: sizeof(x.Type) == 8
  7579		// result: (SRAWconst [c] x)
  7580		for {
  7581			v_0 := v.Args[0]
  7582			if v_0.Op != OpPPC64SRAWconst {
  7583				break
  7584			}
  7585			c := v_0.AuxInt
  7586			x := v_0.Args[0]
  7587			if !(sizeof(x.Type) == 8) {
  7588				break
  7589			}
  7590			v.reset(OpPPC64SRAWconst)
  7591			v.AuxInt = c
  7592			v.AddArg(x)
  7593			return true
  7594		}
  7595		// match: (MOVBreg (SRDconst [c] x))
  7596		// cond: c>56
  7597		// result: (SRDconst [c] x)
  7598		for {
  7599			v_0 := v.Args[0]
  7600			if v_0.Op != OpPPC64SRDconst {
  7601				break
  7602			}
  7603			c := v_0.AuxInt
  7604			x := v_0.Args[0]
  7605			if !(c > 56) {
  7606				break
  7607			}
  7608			v.reset(OpPPC64SRDconst)
  7609			v.AuxInt = c
  7610			v.AddArg(x)
  7611			return true
  7612		}
  7613		// match: (MOVBreg (SRDconst [c] x))
  7614		// cond: c==56
  7615		// result: (SRADconst [c] x)
  7616		for {
  7617			v_0 := v.Args[0]
  7618			if v_0.Op != OpPPC64SRDconst {
  7619				break
  7620			}
  7621			c := v_0.AuxInt
  7622			x := v_0.Args[0]
  7623			if !(c == 56) {
  7624				break
  7625			}
  7626			v.reset(OpPPC64SRADconst)
  7627			v.AuxInt = c
  7628			v.AddArg(x)
  7629			return true
  7630		}
  7631		// match: (MOVBreg (SRWconst [c] x))
  7632		// cond: c>24
  7633		// result: (SRWconst [c] x)
  7634		for {
  7635			v_0 := v.Args[0]
  7636			if v_0.Op != OpPPC64SRWconst {
  7637				break
  7638			}
  7639			c := v_0.AuxInt
  7640			x := v_0.Args[0]
  7641			if !(c > 24) {
  7642				break
  7643			}
  7644			v.reset(OpPPC64SRWconst)
  7645			v.AuxInt = c
  7646			v.AddArg(x)
  7647			return true
  7648		}
  7649		// match: (MOVBreg (SRWconst [c] x))
  7650		// cond: c==24
  7651		// result: (SRAWconst [c] x)
  7652		for {
  7653			v_0 := v.Args[0]
  7654			if v_0.Op != OpPPC64SRWconst {
  7655				break
  7656			}
  7657			c := v_0.AuxInt
  7658			x := v_0.Args[0]
  7659			if !(c == 24) {
  7660				break
  7661			}
  7662			v.reset(OpPPC64SRAWconst)
  7663			v.AuxInt = c
  7664			v.AddArg(x)
  7665			return true
  7666		}
  7667		// match: (MOVBreg y:(MOVBreg _))
  7668		// cond:
  7669		// result: y
  7670		for {
  7671			y := v.Args[0]
  7672			if y.Op != OpPPC64MOVBreg {
  7673				break
  7674			}
  7675			v.reset(OpCopy)
  7676			v.Type = y.Type
  7677			v.AddArg(y)
  7678			return true
  7679		}
  7680		// match: (MOVBreg (MOVBZreg x))
  7681		// cond:
  7682		// result: (MOVBreg x)
  7683		for {
  7684			v_0 := v.Args[0]
  7685			if v_0.Op != OpPPC64MOVBZreg {
  7686				break
  7687			}
  7688			x := v_0.Args[0]
  7689			v.reset(OpPPC64MOVBreg)
  7690			v.AddArg(x)
  7691			return true
  7692		}
  7693		// match: (MOVBreg x:(Arg <t>))
  7694		// cond: is8BitInt(t) && isSigned(t)
  7695		// result: x
  7696		for {
  7697			x := v.Args[0]
  7698			if x.Op != OpArg {
  7699				break
  7700			}
  7701			t := x.Type
  7702			if !(is8BitInt(t) && isSigned(t)) {
  7703				break
  7704			}
  7705			v.reset(OpCopy)
  7706			v.Type = x.Type
  7707			v.AddArg(x)
  7708			return true
  7709		}
  7710		return false
  7711	}
  7712	func rewriteValuePPC64_OpPPC64MOVBreg_10(v *Value) bool {
  7713		// match: (MOVBreg (MOVDconst [c]))
  7714		// cond:
  7715		// result: (MOVDconst [int64(int8(c))])
  7716		for {
  7717			v_0 := v.Args[0]
  7718			if v_0.Op != OpPPC64MOVDconst {
  7719				break
  7720			}
  7721			c := v_0.AuxInt
  7722			v.reset(OpPPC64MOVDconst)
  7723			v.AuxInt = int64(int8(c))
  7724			return true
  7725		}
  7726		return false
  7727	}
  7728	func rewriteValuePPC64_OpPPC64MOVBstore_0(v *Value) bool {
  7729		// match: (MOVBstore [off1] {sym} (ADDconst [off2] x) val mem)
  7730		// cond: is16Bit(off1+off2)
  7731		// result: (MOVBstore [off1+off2] {sym} x val mem)
  7732		for {
  7733			off1 := v.AuxInt
  7734			sym := v.Aux
  7735			mem := v.Args[2]
  7736			v_0 := v.Args[0]
  7737			if v_0.Op != OpPPC64ADDconst {
  7738				break
  7739			}
  7740			off2 := v_0.AuxInt
  7741			x := v_0.Args[0]
  7742			val := v.Args[1]
  7743			if !(is16Bit(off1 + off2)) {
  7744				break
  7745			}
  7746			v.reset(OpPPC64MOVBstore)
  7747			v.AuxInt = off1 + off2
  7748			v.Aux = sym
  7749			v.AddArg(x)
  7750			v.AddArg(val)
  7751			v.AddArg(mem)
  7752			return true
  7753		}
  7754		// match: (MOVBstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem)
  7755		// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
  7756		// result: (MOVBstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  7757		for {
  7758			off1 := v.AuxInt
  7759			sym1 := v.Aux
  7760			mem := v.Args[2]
  7761			p := v.Args[0]
  7762			if p.Op != OpPPC64MOVDaddr {
  7763				break
  7764			}
  7765			off2 := p.AuxInt
  7766			sym2 := p.Aux
  7767			ptr := p.Args[0]
  7768			val := v.Args[1]
  7769			if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  7770				break
  7771			}
  7772			v.reset(OpPPC64MOVBstore)
  7773			v.AuxInt = off1 + off2
  7774			v.Aux = mergeSym(sym1, sym2)
  7775			v.AddArg(ptr)
  7776			v.AddArg(val)
  7777			v.AddArg(mem)
  7778			return true
  7779		}
  7780		// match: (MOVBstore [off] {sym} ptr (MOVDconst [0]) mem)
  7781		// cond:
  7782		// result: (MOVBstorezero [off] {sym} ptr mem)
  7783		for {
  7784			off := v.AuxInt
  7785			sym := v.Aux
  7786			mem := v.Args[2]
  7787			ptr := v.Args[0]
  7788			v_1 := v.Args[1]
  7789			if v_1.Op != OpPPC64MOVDconst {
  7790				break
  7791			}
  7792			if v_1.AuxInt != 0 {
  7793				break
  7794			}
  7795			v.reset(OpPPC64MOVBstorezero)
  7796			v.AuxInt = off
  7797			v.Aux = sym
  7798			v.AddArg(ptr)
  7799			v.AddArg(mem)
  7800			return true
  7801		}
  7802		// match: (MOVBstore [off] {sym} p:(ADD ptr idx) val mem)
  7803		// cond: off == 0 && sym == nil && p.Uses == 1
  7804		// result: (MOVBstoreidx ptr idx val mem)
  7805		for {
  7806			off := v.AuxInt
  7807			sym := v.Aux
  7808			mem := v.Args[2]
  7809			p := v.Args[0]
  7810			if p.Op != OpPPC64ADD {
  7811				break
  7812			}
  7813			idx := p.Args[1]
  7814			ptr := p.Args[0]
  7815			val := v.Args[1]
  7816			if !(off == 0 && sym == nil && p.Uses == 1) {
  7817				break
  7818			}
  7819			v.reset(OpPPC64MOVBstoreidx)
  7820			v.AddArg(ptr)
  7821			v.AddArg(idx)
  7822			v.AddArg(val)
  7823			v.AddArg(mem)
  7824			return true
  7825		}
  7826		// match: (MOVBstore [off] {sym} ptr (MOVBreg x) mem)
  7827		// cond:
  7828		// result: (MOVBstore [off] {sym} ptr x mem)
  7829		for {
  7830			off := v.AuxInt
  7831			sym := v.Aux
  7832			mem := v.Args[2]
  7833			ptr := v.Args[0]
  7834			v_1 := v.Args[1]
  7835			if v_1.Op != OpPPC64MOVBreg {
  7836				break
  7837			}
  7838			x := v_1.Args[0]
  7839			v.reset(OpPPC64MOVBstore)
  7840			v.AuxInt = off
  7841			v.Aux = sym
  7842			v.AddArg(ptr)
  7843			v.AddArg(x)
  7844			v.AddArg(mem)
  7845			return true
  7846		}
  7847		// match: (MOVBstore [off] {sym} ptr (MOVBZreg x) mem)
  7848		// cond:
  7849		// result: (MOVBstore [off] {sym} ptr x mem)
  7850		for {
  7851			off := v.AuxInt
  7852			sym := v.Aux
  7853			mem := v.Args[2]
  7854			ptr := v.Args[0]
  7855			v_1 := v.Args[1]
  7856			if v_1.Op != OpPPC64MOVBZreg {
  7857				break
  7858			}
  7859			x := v_1.Args[0]
  7860			v.reset(OpPPC64MOVBstore)
  7861			v.AuxInt = off
  7862			v.Aux = sym
  7863			v.AddArg(ptr)
  7864			v.AddArg(x)
  7865			v.AddArg(mem)
  7866			return true
  7867		}
  7868		// match: (MOVBstore [off] {sym} ptr (MOVHreg x) mem)
  7869		// cond:
  7870		// result: (MOVBstore [off] {sym} ptr x mem)
  7871		for {
  7872			off := v.AuxInt
  7873			sym := v.Aux
  7874			mem := v.Args[2]
  7875			ptr := v.Args[0]
  7876			v_1 := v.Args[1]
  7877			if v_1.Op != OpPPC64MOVHreg {
  7878				break
  7879			}
  7880			x := v_1.Args[0]
  7881			v.reset(OpPPC64MOVBstore)
  7882			v.AuxInt = off
  7883			v.Aux = sym
  7884			v.AddArg(ptr)
  7885			v.AddArg(x)
  7886			v.AddArg(mem)
  7887			return true
  7888		}
  7889		// match: (MOVBstore [off] {sym} ptr (MOVHZreg x) mem)
  7890		// cond:
  7891		// result: (MOVBstore [off] {sym} ptr x mem)
  7892		for {
  7893			off := v.AuxInt
  7894			sym := v.Aux
  7895			mem := v.Args[2]
  7896			ptr := v.Args[0]
  7897			v_1 := v.Args[1]
  7898			if v_1.Op != OpPPC64MOVHZreg {
  7899				break
  7900			}
  7901			x := v_1.Args[0]
  7902			v.reset(OpPPC64MOVBstore)
  7903			v.AuxInt = off
  7904			v.Aux = sym
  7905			v.AddArg(ptr)
  7906			v.AddArg(x)
  7907			v.AddArg(mem)
  7908			return true
  7909		}
  7910		// match: (MOVBstore [off] {sym} ptr (MOVWreg x) mem)
  7911		// cond:
  7912		// result: (MOVBstore [off] {sym} ptr x mem)
  7913		for {
  7914			off := v.AuxInt
  7915			sym := v.Aux
  7916			mem := v.Args[2]
  7917			ptr := v.Args[0]
  7918			v_1 := v.Args[1]
  7919			if v_1.Op != OpPPC64MOVWreg {
  7920				break
  7921			}
  7922			x := v_1.Args[0]
  7923			v.reset(OpPPC64MOVBstore)
  7924			v.AuxInt = off
  7925			v.Aux = sym
  7926			v.AddArg(ptr)
  7927			v.AddArg(x)
  7928			v.AddArg(mem)
  7929			return true
  7930		}
  7931		// match: (MOVBstore [off] {sym} ptr (MOVWZreg x) mem)
  7932		// cond:
  7933		// result: (MOVBstore [off] {sym} ptr x mem)
  7934		for {
  7935			off := v.AuxInt
  7936			sym := v.Aux
  7937			mem := v.Args[2]
  7938			ptr := v.Args[0]
  7939			v_1 := v.Args[1]
  7940			if v_1.Op != OpPPC64MOVWZreg {
  7941				break
  7942			}
  7943			x := v_1.Args[0]
  7944			v.reset(OpPPC64MOVBstore)
  7945			v.AuxInt = off
  7946			v.Aux = sym
  7947			v.AddArg(ptr)
  7948			v.AddArg(x)
  7949			v.AddArg(mem)
  7950			return true
  7951		}
  7952		return false
  7953	}
  7954	func rewriteValuePPC64_OpPPC64MOVBstore_10(v *Value) bool {
  7955		b := v.Block
  7956		config := b.Func.Config
  7957		typ := &b.Func.Config.Types
  7958		// match: (MOVBstore [off] {sym} ptr (SRWconst (MOVHreg x) [c]) mem)
  7959		// cond: c <= 8
  7960		// result: (MOVBstore [off] {sym} ptr (SRWconst <typ.UInt32> x [c]) mem)
  7961		for {
  7962			off := v.AuxInt
  7963			sym := v.Aux
  7964			mem := v.Args[2]
  7965			ptr := v.Args[0]
  7966			v_1 := v.Args[1]
  7967			if v_1.Op != OpPPC64SRWconst {
  7968				break
  7969			}
  7970			c := v_1.AuxInt
  7971			v_1_0 := v_1.Args[0]
  7972			if v_1_0.Op != OpPPC64MOVHreg {
  7973				break
  7974			}
  7975			x := v_1_0.Args[0]
  7976			if !(c <= 8) {
  7977				break
  7978			}
  7979			v.reset(OpPPC64MOVBstore)
  7980			v.AuxInt = off
  7981			v.Aux = sym
  7982			v.AddArg(ptr)
  7983			v0 := b.NewValue0(v.Pos, OpPPC64SRWconst, typ.UInt32)
  7984			v0.AuxInt = c
  7985			v0.AddArg(x)
  7986			v.AddArg(v0)
  7987			v.AddArg(mem)
  7988			return true
  7989		}
  7990		// match: (MOVBstore [off] {sym} ptr (SRWconst (MOVHZreg x) [c]) mem)
  7991		// cond: c <= 8
  7992		// result: (MOVBstore [off] {sym} ptr (SRWconst <typ.UInt32> x [c]) mem)
  7993		for {
  7994			off := v.AuxInt
  7995			sym := v.Aux
  7996			mem := v.Args[2]
  7997			ptr := v.Args[0]
  7998			v_1 := v.Args[1]
  7999			if v_1.Op != OpPPC64SRWconst {
  8000				break
  8001			}
  8002			c := v_1.AuxInt
  8003			v_1_0 := v_1.Args[0]
  8004			if v_1_0.Op != OpPPC64MOVHZreg {
  8005				break
  8006			}
  8007			x := v_1_0.Args[0]
  8008			if !(c <= 8) {
  8009				break
  8010			}
  8011			v.reset(OpPPC64MOVBstore)
  8012			v.AuxInt = off
  8013			v.Aux = sym
  8014			v.AddArg(ptr)
  8015			v0 := b.NewValue0(v.Pos, OpPPC64SRWconst, typ.UInt32)
  8016			v0.AuxInt = c
  8017			v0.AddArg(x)
  8018			v.AddArg(v0)
  8019			v.AddArg(mem)
  8020			return true
  8021		}
  8022		// match: (MOVBstore [off] {sym} ptr (SRWconst (MOVWreg x) [c]) mem)
  8023		// cond: c <= 24
  8024		// result: (MOVBstore [off] {sym} ptr (SRWconst <typ.UInt32> x [c]) mem)
  8025		for {
  8026			off := v.AuxInt
  8027			sym := v.Aux
  8028			mem := v.Args[2]
  8029			ptr := v.Args[0]
  8030			v_1 := v.Args[1]
  8031			if v_1.Op != OpPPC64SRWconst {
  8032				break
  8033			}
  8034			c := v_1.AuxInt
  8035			v_1_0 := v_1.Args[0]
  8036			if v_1_0.Op != OpPPC64MOVWreg {
  8037				break
  8038			}
  8039			x := v_1_0.Args[0]
  8040			if !(c <= 24) {
  8041				break
  8042			}
  8043			v.reset(OpPPC64MOVBstore)
  8044			v.AuxInt = off
  8045			v.Aux = sym
  8046			v.AddArg(ptr)
  8047			v0 := b.NewValue0(v.Pos, OpPPC64SRWconst, typ.UInt32)
  8048			v0.AuxInt = c
  8049			v0.AddArg(x)
  8050			v.AddArg(v0)
  8051			v.AddArg(mem)
  8052			return true
  8053		}
  8054		// match: (MOVBstore [off] {sym} ptr (SRWconst (MOVWZreg x) [c]) mem)
  8055		// cond: c <= 24
  8056		// result: (MOVBstore [off] {sym} ptr (SRWconst <typ.UInt32> x [c]) mem)
  8057		for {
  8058			off := v.AuxInt
  8059			sym := v.Aux
  8060			mem := v.Args[2]
  8061			ptr := v.Args[0]
  8062			v_1 := v.Args[1]
  8063			if v_1.Op != OpPPC64SRWconst {
  8064				break
  8065			}
  8066			c := v_1.AuxInt
  8067			v_1_0 := v_1.Args[0]
  8068			if v_1_0.Op != OpPPC64MOVWZreg {
  8069				break
  8070			}
  8071			x := v_1_0.Args[0]
  8072			if !(c <= 24) {
  8073				break
  8074			}
  8075			v.reset(OpPPC64MOVBstore)
  8076			v.AuxInt = off
  8077			v.Aux = sym
  8078			v.AddArg(ptr)
  8079			v0 := b.NewValue0(v.Pos, OpPPC64SRWconst, typ.UInt32)
  8080			v0.AuxInt = c
  8081			v0.AddArg(x)
  8082			v.AddArg(v0)
  8083			v.AddArg(mem)
  8084			return true
  8085		}
  8086		// match: (MOVBstore [i1] {s} p (SRWconst w [24]) x0:(MOVBstore [i0] {s} p (SRWconst w [16]) mem))
  8087		// cond: !config.BigEndian && x0.Uses == 1 && i1 == i0+1 && clobber(x0)
  8088		// result: (MOVHstore [i0] {s} p (SRWconst <typ.UInt16> w [16]) mem)
  8089		for {
  8090			i1 := v.AuxInt
  8091			s := v.Aux
  8092			_ = v.Args[2]
  8093			p := v.Args[0]
  8094			v_1 := v.Args[1]
  8095			if v_1.Op != OpPPC64SRWconst {
  8096				break
  8097			}
  8098			if v_1.AuxInt != 24 {
  8099				break
  8100			}
  8101			w := v_1.Args[0]
  8102			x0 := v.Args[2]
  8103			if x0.Op != OpPPC64MOVBstore {
  8104				break
  8105			}
  8106			i0 := x0.AuxInt
  8107			if x0.Aux != s {
  8108				break
  8109			}
  8110			mem := x0.Args[2]
  8111			if p != x0.Args[0] {
  8112				break
  8113			}
  8114			x0_1 := x0.Args[1]
  8115			if x0_1.Op != OpPPC64SRWconst {
  8116				break
  8117			}
  8118			if x0_1.AuxInt != 16 {
  8119				break
  8120			}
  8121			if w != x0_1.Args[0] {
  8122				break
  8123			}
  8124			if !(!config.BigEndian && x0.Uses == 1 && i1 == i0+1 && clobber(x0)) {
  8125				break
  8126			}
  8127			v.reset(OpPPC64MOVHstore)
  8128			v.AuxInt = i0
  8129			v.Aux = s
  8130			v.AddArg(p)
  8131			v0 := b.NewValue0(x0.Pos, OpPPC64SRWconst, typ.UInt16)
  8132			v0.AuxInt = 16
  8133			v0.AddArg(w)
  8134			v.AddArg(v0)
  8135			v.AddArg(mem)
  8136			return true
  8137		}
  8138		// match: (MOVBstore [i1] {s} p (SRDconst w [24]) x0:(MOVBstore [i0] {s} p (SRDconst w [16]) mem))
  8139		// cond: !config.BigEndian && x0.Uses == 1 && i1 == i0+1 && clobber(x0)
  8140		// result: (MOVHstore [i0] {s} p (SRWconst <typ.UInt16> w [16]) mem)
  8141		for {
  8142			i1 := v.AuxInt
  8143			s := v.Aux
  8144			_ = v.Args[2]
  8145			p := v.Args[0]
  8146			v_1 := v.Args[1]
  8147			if v_1.Op != OpPPC64SRDconst {
  8148				break
  8149			}
  8150			if v_1.AuxInt != 24 {
  8151				break
  8152			}
  8153			w := v_1.Args[0]
  8154			x0 := v.Args[2]
  8155			if x0.Op != OpPPC64MOVBstore {
  8156				break
  8157			}
  8158			i0 := x0.AuxInt
  8159			if x0.Aux != s {
  8160				break
  8161			}
  8162			mem := x0.Args[2]
  8163			if p != x0.Args[0] {
  8164				break
  8165			}
  8166			x0_1 := x0.Args[1]
  8167			if x0_1.Op != OpPPC64SRDconst {
  8168				break
  8169			}
  8170			if x0_1.AuxInt != 16 {
  8171				break
  8172			}
  8173			if w != x0_1.Args[0] {
  8174				break
  8175			}
  8176			if !(!config.BigEndian && x0.Uses == 1 && i1 == i0+1 && clobber(x0)) {
  8177				break
  8178			}
  8179			v.reset(OpPPC64MOVHstore)
  8180			v.AuxInt = i0
  8181			v.Aux = s
  8182			v.AddArg(p)
  8183			v0 := b.NewValue0(x0.Pos, OpPPC64SRWconst, typ.UInt16)
  8184			v0.AuxInt = 16
  8185			v0.AddArg(w)
  8186			v.AddArg(v0)
  8187			v.AddArg(mem)
  8188			return true
  8189		}
  8190		// match: (MOVBstore [i1] {s} p (SRWconst w [8]) x0:(MOVBstore [i0] {s} p w mem))
  8191		// cond: !config.BigEndian && x0.Uses == 1 && i1 == i0+1 && clobber(x0)
  8192		// result: (MOVHstore [i0] {s} p w mem)
  8193		for {
  8194			i1 := v.AuxInt
  8195			s := v.Aux
  8196			_ = v.Args[2]
  8197			p := v.Args[0]
  8198			v_1 := v.Args[1]
  8199			if v_1.Op != OpPPC64SRWconst {
  8200				break
  8201			}
  8202			if v_1.AuxInt != 8 {
  8203				break
  8204			}
  8205			w := v_1.Args[0]
  8206			x0 := v.Args[2]
  8207			if x0.Op != OpPPC64MOVBstore {
  8208				break
  8209			}
  8210			i0 := x0.AuxInt
  8211			if x0.Aux != s {
  8212				break
  8213			}
  8214			mem := x0.Args[2]
  8215			if p != x0.Args[0] {
  8216				break
  8217			}
  8218			if w != x0.Args[1] {
  8219				break
  8220			}
  8221			if !(!config.BigEndian && x0.Uses == 1 && i1 == i0+1 && clobber(x0)) {
  8222				break
  8223			}
  8224			v.reset(OpPPC64MOVHstore)
  8225			v.AuxInt = i0
  8226			v.Aux = s
  8227			v.AddArg(p)
  8228			v.AddArg(w)
  8229			v.AddArg(mem)
  8230			return true
  8231		}
  8232		// match: (MOVBstore [i1] {s} p (SRDconst w [8]) x0:(MOVBstore [i0] {s} p w mem))
  8233		// cond: !config.BigEndian && x0.Uses == 1 && i1 == i0+1 && clobber(x0)
  8234		// result: (MOVHstore [i0] {s} p w mem)
  8235		for {
  8236			i1 := v.AuxInt
  8237			s := v.Aux
  8238			_ = v.Args[2]
  8239			p := v.Args[0]
  8240			v_1 := v.Args[1]
  8241			if v_1.Op != OpPPC64SRDconst {
  8242				break
  8243			}
  8244			if v_1.AuxInt != 8 {
  8245				break
  8246			}
  8247			w := v_1.Args[0]
  8248			x0 := v.Args[2]
  8249			if x0.Op != OpPPC64MOVBstore {
  8250				break
  8251			}
  8252			i0 := x0.AuxInt
  8253			if x0.Aux != s {
  8254				break
  8255			}
  8256			mem := x0.Args[2]
  8257			if p != x0.Args[0] {
  8258				break
  8259			}
  8260			if w != x0.Args[1] {
  8261				break
  8262			}
  8263			if !(!config.BigEndian && x0.Uses == 1 && i1 == i0+1 && clobber(x0)) {
  8264				break
  8265			}
  8266			v.reset(OpPPC64MOVHstore)
  8267			v.AuxInt = i0
  8268			v.Aux = s
  8269			v.AddArg(p)
  8270			v.AddArg(w)
  8271			v.AddArg(mem)
  8272			return true
  8273		}
  8274		// match: (MOVBstore [i3] {s} p w x0:(MOVBstore [i2] {s} p (SRWconst w [8]) x1:(MOVBstore [i1] {s} p (SRWconst w [16]) x2:(MOVBstore [i0] {s} p (SRWconst w [24]) mem))))
  8275		// cond: !config.BigEndian && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && clobber(x0) && clobber(x1) && clobber(x2)
  8276		// result: (MOVWBRstore (MOVDaddr <typ.Uintptr> [i0] {s} p) w mem)
  8277		for {
  8278			i3 := v.AuxInt
  8279			s := v.Aux
  8280			_ = v.Args[2]
  8281			p := v.Args[0]
  8282			w := v.Args[1]
  8283			x0 := v.Args[2]
  8284			if x0.Op != OpPPC64MOVBstore {
  8285				break
  8286			}
  8287			i2 := x0.AuxInt
  8288			if x0.Aux != s {
  8289				break
  8290			}
  8291			_ = x0.Args[2]
  8292			if p != x0.Args[0] {
  8293				break
  8294			}
  8295			x0_1 := x0.Args[1]
  8296			if x0_1.Op != OpPPC64SRWconst {
  8297				break
  8298			}
  8299			if x0_1.AuxInt != 8 {
  8300				break
  8301			}
  8302			if w != x0_1.Args[0] {
  8303				break
  8304			}
  8305			x1 := x0.Args[2]
  8306			if x1.Op != OpPPC64MOVBstore {
  8307				break
  8308			}
  8309			i1 := x1.AuxInt
  8310			if x1.Aux != s {
  8311				break
  8312			}
  8313			_ = x1.Args[2]
  8314			if p != x1.Args[0] {
  8315				break
  8316			}
  8317			x1_1 := x1.Args[1]
  8318			if x1_1.Op != OpPPC64SRWconst {
  8319				break
  8320			}
  8321			if x1_1.AuxInt != 16 {
  8322				break
  8323			}
  8324			if w != x1_1.Args[0] {
  8325				break
  8326			}
  8327			x2 := x1.Args[2]
  8328			if x2.Op != OpPPC64MOVBstore {
  8329				break
  8330			}
  8331			i0 := x2.AuxInt
  8332			if x2.Aux != s {
  8333				break
  8334			}
  8335			mem := x2.Args[2]
  8336			if p != x2.Args[0] {
  8337				break
  8338			}
  8339			x2_1 := x2.Args[1]
  8340			if x2_1.Op != OpPPC64SRWconst {
  8341				break
  8342			}
  8343			if x2_1.AuxInt != 24 {
  8344				break
  8345			}
  8346			if w != x2_1.Args[0] {
  8347				break
  8348			}
  8349			if !(!config.BigEndian && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && clobber(x0) && clobber(x1) && clobber(x2)) {
  8350				break
  8351			}
  8352			v.reset(OpPPC64MOVWBRstore)
  8353			v0 := b.NewValue0(x2.Pos, OpPPC64MOVDaddr, typ.Uintptr)
  8354			v0.AuxInt = i0
  8355			v0.Aux = s
  8356			v0.AddArg(p)
  8357			v.AddArg(v0)
  8358			v.AddArg(w)
  8359			v.AddArg(mem)
  8360			return true
  8361		}
  8362		// match: (MOVBstore [i1] {s} p w x0:(MOVBstore [i0] {s} p (SRWconst w [8]) mem))
  8363		// cond: !config.BigEndian && x0.Uses == 1 && i1 == i0+1 && clobber(x0)
  8364		// result: (MOVHBRstore (MOVDaddr <typ.Uintptr> [i0] {s} p) w mem)
  8365		for {
  8366			i1 := v.AuxInt
  8367			s := v.Aux
  8368			_ = v.Args[2]
  8369			p := v.Args[0]
  8370			w := v.Args[1]
  8371			x0 := v.Args[2]
  8372			if x0.Op != OpPPC64MOVBstore {
  8373				break
  8374			}
  8375			i0 := x0.AuxInt
  8376			if x0.Aux != s {
  8377				break
  8378			}
  8379			mem := x0.Args[2]
  8380			if p != x0.Args[0] {
  8381				break
  8382			}
  8383			x0_1 := x0.Args[1]
  8384			if x0_1.Op != OpPPC64SRWconst {
  8385				break
  8386			}
  8387			if x0_1.AuxInt != 8 {
  8388				break
  8389			}
  8390			if w != x0_1.Args[0] {
  8391				break
  8392			}
  8393			if !(!config.BigEndian && x0.Uses == 1 && i1 == i0+1 && clobber(x0)) {
  8394				break
  8395			}
  8396			v.reset(OpPPC64MOVHBRstore)
  8397			v0 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
  8398			v0.AuxInt = i0
  8399			v0.Aux = s
  8400			v0.AddArg(p)
  8401			v.AddArg(v0)
  8402			v.AddArg(w)
  8403			v.AddArg(mem)
  8404			return true
  8405		}
  8406		return false
  8407	}
  8408	func rewriteValuePPC64_OpPPC64MOVBstore_20(v *Value) bool {
  8409		b := v.Block
  8410		config := b.Func.Config
  8411		typ := &b.Func.Config.Types
  8412		// match: (MOVBstore [i7] {s} p (SRDconst w [56]) x0:(MOVBstore [i6] {s} p (SRDconst w [48]) x1:(MOVBstore [i5] {s} p (SRDconst w [40]) x2:(MOVBstore [i4] {s} p (SRDconst w [32]) x3:(MOVWstore [i0] {s} p w mem)))))
  8413		// cond: !config.BigEndian && i0%4 == 0 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3)
  8414		// result: (MOVDstore [i0] {s} p w mem)
  8415		for {
  8416			i7 := v.AuxInt
  8417			s := v.Aux
  8418			_ = v.Args[2]
  8419			p := v.Args[0]
  8420			v_1 := v.Args[1]
  8421			if v_1.Op != OpPPC64SRDconst {
  8422				break
  8423			}
  8424			if v_1.AuxInt != 56 {
  8425				break
  8426			}
  8427			w := v_1.Args[0]
  8428			x0 := v.Args[2]
  8429			if x0.Op != OpPPC64MOVBstore {
  8430				break
  8431			}
  8432			i6 := x0.AuxInt
  8433			if x0.Aux != s {
  8434				break
  8435			}
  8436			_ = x0.Args[2]
  8437			if p != x0.Args[0] {
  8438				break
  8439			}
  8440			x0_1 := x0.Args[1]
  8441			if x0_1.Op != OpPPC64SRDconst {
  8442				break
  8443			}
  8444			if x0_1.AuxInt != 48 {
  8445				break
  8446			}
  8447			if w != x0_1.Args[0] {
  8448				break
  8449			}
  8450			x1 := x0.Args[2]
  8451			if x1.Op != OpPPC64MOVBstore {
  8452				break
  8453			}
  8454			i5 := x1.AuxInt
  8455			if x1.Aux != s {
  8456				break
  8457			}
  8458			_ = x1.Args[2]
  8459			if p != x1.Args[0] {
  8460				break
  8461			}
  8462			x1_1 := x1.Args[1]
  8463			if x1_1.Op != OpPPC64SRDconst {
  8464				break
  8465			}
  8466			if x1_1.AuxInt != 40 {
  8467				break
  8468			}
  8469			if w != x1_1.Args[0] {
  8470				break
  8471			}
  8472			x2 := x1.Args[2]
  8473			if x2.Op != OpPPC64MOVBstore {
  8474				break
  8475			}
  8476			i4 := x2.AuxInt
  8477			if x2.Aux != s {
  8478				break
  8479			}
  8480			_ = x2.Args[2]
  8481			if p != x2.Args[0] {
  8482				break
  8483			}
  8484			x2_1 := x2.Args[1]
  8485			if x2_1.Op != OpPPC64SRDconst {
  8486				break
  8487			}
  8488			if x2_1.AuxInt != 32 {
  8489				break
  8490			}
  8491			if w != x2_1.Args[0] {
  8492				break
  8493			}
  8494			x3 := x2.Args[2]
  8495			if x3.Op != OpPPC64MOVWstore {
  8496				break
  8497			}
  8498			i0 := x3.AuxInt
  8499			if x3.Aux != s {
  8500				break
  8501			}
  8502			mem := x3.Args[2]
  8503			if p != x3.Args[0] {
  8504				break
  8505			}
  8506			if w != x3.Args[1] {
  8507				break
  8508			}
  8509			if !(!config.BigEndian && i0%4 == 0 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3)) {
  8510				break
  8511			}
  8512			v.reset(OpPPC64MOVDstore)
  8513			v.AuxInt = i0
  8514			v.Aux = s
  8515			v.AddArg(p)
  8516			v.AddArg(w)
  8517			v.AddArg(mem)
  8518			return true
  8519		}
  8520		// match: (MOVBstore [i7] {s} p w x0:(MOVBstore [i6] {s} p (SRDconst w [8]) x1:(MOVBstore [i5] {s} p (SRDconst w [16]) x2:(MOVBstore [i4] {s} p (SRDconst w [24]) x3:(MOVBstore [i3] {s} p (SRDconst w [32]) x4:(MOVBstore [i2] {s} p (SRDconst w [40]) x5:(MOVBstore [i1] {s} p (SRDconst w [48]) x6:(MOVBstore [i0] {s} p (SRDconst w [56]) mem))))))))
  8521		// cond: !config.BigEndian && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6)
  8522		// result: (MOVDBRstore (MOVDaddr <typ.Uintptr> [i0] {s} p) w mem)
  8523		for {
  8524			i7 := v.AuxInt
  8525			s := v.Aux
  8526			_ = v.Args[2]
  8527			p := v.Args[0]
  8528			w := v.Args[1]
  8529			x0 := v.Args[2]
  8530			if x0.Op != OpPPC64MOVBstore {
  8531				break
  8532			}
  8533			i6 := x0.AuxInt
  8534			if x0.Aux != s {
  8535				break
  8536			}
  8537			_ = x0.Args[2]
  8538			if p != x0.Args[0] {
  8539				break
  8540			}
  8541			x0_1 := x0.Args[1]
  8542			if x0_1.Op != OpPPC64SRDconst {
  8543				break
  8544			}
  8545			if x0_1.AuxInt != 8 {
  8546				break
  8547			}
  8548			if w != x0_1.Args[0] {
  8549				break
  8550			}
  8551			x1 := x0.Args[2]
  8552			if x1.Op != OpPPC64MOVBstore {
  8553				break
  8554			}
  8555			i5 := x1.AuxInt
  8556			if x1.Aux != s {
  8557				break
  8558			}
  8559			_ = x1.Args[2]
  8560			if p != x1.Args[0] {
  8561				break
  8562			}
  8563			x1_1 := x1.Args[1]
  8564			if x1_1.Op != OpPPC64SRDconst {
  8565				break
  8566			}
  8567			if x1_1.AuxInt != 16 {
  8568				break
  8569			}
  8570			if w != x1_1.Args[0] {
  8571				break
  8572			}
  8573			x2 := x1.Args[2]
  8574			if x2.Op != OpPPC64MOVBstore {
  8575				break
  8576			}
  8577			i4 := x2.AuxInt
  8578			if x2.Aux != s {
  8579				break
  8580			}
  8581			_ = x2.Args[2]
  8582			if p != x2.Args[0] {
  8583				break
  8584			}
  8585			x2_1 := x2.Args[1]
  8586			if x2_1.Op != OpPPC64SRDconst {
  8587				break
  8588			}
  8589			if x2_1.AuxInt != 24 {
  8590				break
  8591			}
  8592			if w != x2_1.Args[0] {
  8593				break
  8594			}
  8595			x3 := x2.Args[2]
  8596			if x3.Op != OpPPC64MOVBstore {
  8597				break
  8598			}
  8599			i3 := x3.AuxInt
  8600			if x3.Aux != s {
  8601				break
  8602			}
  8603			_ = x3.Args[2]
  8604			if p != x3.Args[0] {
  8605				break
  8606			}
  8607			x3_1 := x3.Args[1]
  8608			if x3_1.Op != OpPPC64SRDconst {
  8609				break
  8610			}
  8611			if x3_1.AuxInt != 32 {
  8612				break
  8613			}
  8614			if w != x3_1.Args[0] {
  8615				break
  8616			}
  8617			x4 := x3.Args[2]
  8618			if x4.Op != OpPPC64MOVBstore {
  8619				break
  8620			}
  8621			i2 := x4.AuxInt
  8622			if x4.Aux != s {
  8623				break
  8624			}
  8625			_ = x4.Args[2]
  8626			if p != x4.Args[0] {
  8627				break
  8628			}
  8629			x4_1 := x4.Args[1]
  8630			if x4_1.Op != OpPPC64SRDconst {
  8631				break
  8632			}
  8633			if x4_1.AuxInt != 40 {
  8634				break
  8635			}
  8636			if w != x4_1.Args[0] {
  8637				break
  8638			}
  8639			x5 := x4.Args[2]
  8640			if x5.Op != OpPPC64MOVBstore {
  8641				break
  8642			}
  8643			i1 := x5.AuxInt
  8644			if x5.Aux != s {
  8645				break
  8646			}
  8647			_ = x5.Args[2]
  8648			if p != x5.Args[0] {
  8649				break
  8650			}
  8651			x5_1 := x5.Args[1]
  8652			if x5_1.Op != OpPPC64SRDconst {
  8653				break
  8654			}
  8655			if x5_1.AuxInt != 48 {
  8656				break
  8657			}
  8658			if w != x5_1.Args[0] {
  8659				break
  8660			}
  8661			x6 := x5.Args[2]
  8662			if x6.Op != OpPPC64MOVBstore {
  8663				break
  8664			}
  8665			i0 := x6.AuxInt
  8666			if x6.Aux != s {
  8667				break
  8668			}
  8669			mem := x6.Args[2]
  8670			if p != x6.Args[0] {
  8671				break
  8672			}
  8673			x6_1 := x6.Args[1]
  8674			if x6_1.Op != OpPPC64SRDconst {
  8675				break
  8676			}
  8677			if x6_1.AuxInt != 56 {
  8678				break
  8679			}
  8680			if w != x6_1.Args[0] {
  8681				break
  8682			}
  8683			if !(!config.BigEndian && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6)) {
  8684				break
  8685			}
  8686			v.reset(OpPPC64MOVDBRstore)
  8687			v0 := b.NewValue0(x6.Pos, OpPPC64MOVDaddr, typ.Uintptr)
  8688			v0.AuxInt = i0
  8689			v0.Aux = s
  8690			v0.AddArg(p)
  8691			v.AddArg(v0)
  8692			v.AddArg(w)
  8693			v.AddArg(mem)
  8694			return true
  8695		}
  8696		return false
  8697	}
  8698	func rewriteValuePPC64_OpPPC64MOVBstoreidx_0(v *Value) bool {
  8699		b := v.Block
  8700		typ := &b.Func.Config.Types
  8701		// match: (MOVBstoreidx ptr (MOVDconst [c]) val mem)
  8702		// cond: is16Bit(c)
  8703		// result: (MOVBstore [c] ptr val mem)
  8704		for {
  8705			mem := v.Args[3]
  8706			ptr := v.Args[0]
  8707			v_1 := v.Args[1]
  8708			if v_1.Op != OpPPC64MOVDconst {
  8709				break
  8710			}
  8711			c := v_1.AuxInt
  8712			val := v.Args[2]
  8713			if !(is16Bit(c)) {
  8714				break
  8715			}
  8716			v.reset(OpPPC64MOVBstore)
  8717			v.AuxInt = c
  8718			v.AddArg(ptr)
  8719			v.AddArg(val)
  8720			v.AddArg(mem)
  8721			return true
  8722		}
  8723		// match: (MOVBstoreidx (MOVDconst [c]) ptr val mem)
  8724		// cond: is16Bit(c)
  8725		// result: (MOVBstore [c] ptr val mem)
  8726		for {
  8727			mem := v.Args[3]
  8728			v_0 := v.Args[0]
  8729			if v_0.Op != OpPPC64MOVDconst {
  8730				break
  8731			}
  8732			c := v_0.AuxInt
  8733			ptr := v.Args[1]
  8734			val := v.Args[2]
  8735			if !(is16Bit(c)) {
  8736				break
  8737			}
  8738			v.reset(OpPPC64MOVBstore)
  8739			v.AuxInt = c
  8740			v.AddArg(ptr)
  8741			v.AddArg(val)
  8742			v.AddArg(mem)
  8743			return true
  8744		}
  8745		// match: (MOVBstoreidx [off] {sym} ptr idx (MOVBreg x) mem)
  8746		// cond:
  8747		// result: (MOVBstoreidx [off] {sym} ptr idx x mem)
  8748		for {
  8749			off := v.AuxInt
  8750			sym := v.Aux
  8751			mem := v.Args[3]
  8752			ptr := v.Args[0]
  8753			idx := v.Args[1]
  8754			v_2 := v.Args[2]
  8755			if v_2.Op != OpPPC64MOVBreg {
  8756				break
  8757			}
  8758			x := v_2.Args[0]
  8759			v.reset(OpPPC64MOVBstoreidx)
  8760			v.AuxInt = off
  8761			v.Aux = sym
  8762			v.AddArg(ptr)
  8763			v.AddArg(idx)
  8764			v.AddArg(x)
  8765			v.AddArg(mem)
  8766			return true
  8767		}
  8768		// match: (MOVBstoreidx [off] {sym} ptr idx (MOVBZreg x) mem)
  8769		// cond:
  8770		// result: (MOVBstoreidx [off] {sym} ptr idx x mem)
  8771		for {
  8772			off := v.AuxInt
  8773			sym := v.Aux
  8774			mem := v.Args[3]
  8775			ptr := v.Args[0]
  8776			idx := v.Args[1]
  8777			v_2 := v.Args[2]
  8778			if v_2.Op != OpPPC64MOVBZreg {
  8779				break
  8780			}
  8781			x := v_2.Args[0]
  8782			v.reset(OpPPC64MOVBstoreidx)
  8783			v.AuxInt = off
  8784			v.Aux = sym
  8785			v.AddArg(ptr)
  8786			v.AddArg(idx)
  8787			v.AddArg(x)
  8788			v.AddArg(mem)
  8789			return true
  8790		}
  8791		// match: (MOVBstoreidx [off] {sym} ptr idx (MOVHreg x) mem)
  8792		// cond:
  8793		// result: (MOVBstoreidx [off] {sym} ptr idx x mem)
  8794		for {
  8795			off := v.AuxInt
  8796			sym := v.Aux
  8797			mem := v.Args[3]
  8798			ptr := v.Args[0]
  8799			idx := v.Args[1]
  8800			v_2 := v.Args[2]
  8801			if v_2.Op != OpPPC64MOVHreg {
  8802				break
  8803			}
  8804			x := v_2.Args[0]
  8805			v.reset(OpPPC64MOVBstoreidx)
  8806			v.AuxInt = off
  8807			v.Aux = sym
  8808			v.AddArg(ptr)
  8809			v.AddArg(idx)
  8810			v.AddArg(x)
  8811			v.AddArg(mem)
  8812			return true
  8813		}
  8814		// match: (MOVBstoreidx [off] {sym} ptr idx (MOVHZreg x) mem)
  8815		// cond:
  8816		// result: (MOVBstoreidx [off] {sym} ptr idx x mem)
  8817		for {
  8818			off := v.AuxInt
  8819			sym := v.Aux
  8820			mem := v.Args[3]
  8821			ptr := v.Args[0]
  8822			idx := v.Args[1]
  8823			v_2 := v.Args[2]
  8824			if v_2.Op != OpPPC64MOVHZreg {
  8825				break
  8826			}
  8827			x := v_2.Args[0]
  8828			v.reset(OpPPC64MOVBstoreidx)
  8829			v.AuxInt = off
  8830			v.Aux = sym
  8831			v.AddArg(ptr)
  8832			v.AddArg(idx)
  8833			v.AddArg(x)
  8834			v.AddArg(mem)
  8835			return true
  8836		}
  8837		// match: (MOVBstoreidx [off] {sym} ptr idx (MOVWreg x) mem)
  8838		// cond:
  8839		// result: (MOVBstoreidx [off] {sym} ptr idx x mem)
  8840		for {
  8841			off := v.AuxInt
  8842			sym := v.Aux
  8843			mem := v.Args[3]
  8844			ptr := v.Args[0]
  8845			idx := v.Args[1]
  8846			v_2 := v.Args[2]
  8847			if v_2.Op != OpPPC64MOVWreg {
  8848				break
  8849			}
  8850			x := v_2.Args[0]
  8851			v.reset(OpPPC64MOVBstoreidx)
  8852			v.AuxInt = off
  8853			v.Aux = sym
  8854			v.AddArg(ptr)
  8855			v.AddArg(idx)
  8856			v.AddArg(x)
  8857			v.AddArg(mem)
  8858			return true
  8859		}
  8860		// match: (MOVBstoreidx [off] {sym} ptr idx (MOVWZreg x) mem)
  8861		// cond:
  8862		// result: (MOVBstoreidx [off] {sym} ptr idx x mem)
  8863		for {
  8864			off := v.AuxInt
  8865			sym := v.Aux
  8866			mem := v.Args[3]
  8867			ptr := v.Args[0]
  8868			idx := v.Args[1]
  8869			v_2 := v.Args[2]
  8870			if v_2.Op != OpPPC64MOVWZreg {
  8871				break
  8872			}
  8873			x := v_2.Args[0]
  8874			v.reset(OpPPC64MOVBstoreidx)
  8875			v.AuxInt = off
  8876			v.Aux = sym
  8877			v.AddArg(ptr)
  8878			v.AddArg(idx)
  8879			v.AddArg(x)
  8880			v.AddArg(mem)
  8881			return true
  8882		}
  8883		// match: (MOVBstoreidx [off] {sym} ptr idx (SRWconst (MOVHreg x) [c]) mem)
  8884		// cond: c <= 8
  8885		// result: (MOVBstoreidx [off] {sym} ptr idx (SRWconst <typ.UInt32> x [c]) mem)
  8886		for {
  8887			off := v.AuxInt
  8888			sym := v.Aux
  8889			mem := v.Args[3]
  8890			ptr := v.Args[0]
  8891			idx := v.Args[1]
  8892			v_2 := v.Args[2]
  8893			if v_2.Op != OpPPC64SRWconst {
  8894				break
  8895			}
  8896			c := v_2.AuxInt
  8897			v_2_0 := v_2.Args[0]
  8898			if v_2_0.Op != OpPPC64MOVHreg {
  8899				break
  8900			}
  8901			x := v_2_0.Args[0]
  8902			if !(c <= 8) {
  8903				break
  8904			}
  8905			v.reset(OpPPC64MOVBstoreidx)
  8906			v.AuxInt = off
  8907			v.Aux = sym
  8908			v.AddArg(ptr)
  8909			v.AddArg(idx)
  8910			v0 := b.NewValue0(v.Pos, OpPPC64SRWconst, typ.UInt32)
  8911			v0.AuxInt = c
  8912			v0.AddArg(x)
  8913			v.AddArg(v0)
  8914			v.AddArg(mem)
  8915			return true
  8916		}
  8917		// match: (MOVBstoreidx [off] {sym} ptr idx (SRWconst (MOVHZreg x) [c]) mem)
  8918		// cond: c <= 8
  8919		// result: (MOVBstoreidx [off] {sym} ptr idx (SRWconst <typ.UInt32> x [c]) mem)
  8920		for {
  8921			off := v.AuxInt
  8922			sym := v.Aux
  8923			mem := v.Args[3]
  8924			ptr := v.Args[0]
  8925			idx := v.Args[1]
  8926			v_2 := v.Args[2]
  8927			if v_2.Op != OpPPC64SRWconst {
  8928				break
  8929			}
  8930			c := v_2.AuxInt
  8931			v_2_0 := v_2.Args[0]
  8932			if v_2_0.Op != OpPPC64MOVHZreg {
  8933				break
  8934			}
  8935			x := v_2_0.Args[0]
  8936			if !(c <= 8) {
  8937				break
  8938			}
  8939			v.reset(OpPPC64MOVBstoreidx)
  8940			v.AuxInt = off
  8941			v.Aux = sym
  8942			v.AddArg(ptr)
  8943			v.AddArg(idx)
  8944			v0 := b.NewValue0(v.Pos, OpPPC64SRWconst, typ.UInt32)
  8945			v0.AuxInt = c
  8946			v0.AddArg(x)
  8947			v.AddArg(v0)
  8948			v.AddArg(mem)
  8949			return true
  8950		}
  8951		return false
  8952	}
  8953	func rewriteValuePPC64_OpPPC64MOVBstoreidx_10(v *Value) bool {
  8954		b := v.Block
  8955		typ := &b.Func.Config.Types
  8956		// match: (MOVBstoreidx [off] {sym} ptr idx (SRWconst (MOVWreg x) [c]) mem)
  8957		// cond: c <= 24
  8958		// result: (MOVBstoreidx [off] {sym} ptr idx (SRWconst <typ.UInt32> x [c]) mem)
  8959		for {
  8960			off := v.AuxInt
  8961			sym := v.Aux
  8962			mem := v.Args[3]
  8963			ptr := v.Args[0]
  8964			idx := v.Args[1]
  8965			v_2 := v.Args[2]
  8966			if v_2.Op != OpPPC64SRWconst {
  8967				break
  8968			}
  8969			c := v_2.AuxInt
  8970			v_2_0 := v_2.Args[0]
  8971			if v_2_0.Op != OpPPC64MOVWreg {
  8972				break
  8973			}
  8974			x := v_2_0.Args[0]
  8975			if !(c <= 24) {
  8976				break
  8977			}
  8978			v.reset(OpPPC64MOVBstoreidx)
  8979			v.AuxInt = off
  8980			v.Aux = sym
  8981			v.AddArg(ptr)
  8982			v.AddArg(idx)
  8983			v0 := b.NewValue0(v.Pos, OpPPC64SRWconst, typ.UInt32)
  8984			v0.AuxInt = c
  8985			v0.AddArg(x)
  8986			v.AddArg(v0)
  8987			v.AddArg(mem)
  8988			return true
  8989		}
  8990		// match: (MOVBstoreidx [off] {sym} ptr idx (SRWconst (MOVWZreg x) [c]) mem)
  8991		// cond: c <= 24
  8992		// result: (MOVBstoreidx [off] {sym} ptr idx (SRWconst <typ.UInt32> x [c]) mem)
  8993		for {
  8994			off := v.AuxInt
  8995			sym := v.Aux
  8996			mem := v.Args[3]
  8997			ptr := v.Args[0]
  8998			idx := v.Args[1]
  8999			v_2 := v.Args[2]
  9000			if v_2.Op != OpPPC64SRWconst {
  9001				break
  9002			}
  9003			c := v_2.AuxInt
  9004			v_2_0 := v_2.Args[0]
  9005			if v_2_0.Op != OpPPC64MOVWZreg {
  9006				break
  9007			}
  9008			x := v_2_0.Args[0]
  9009			if !(c <= 24) {
  9010				break
  9011			}
  9012			v.reset(OpPPC64MOVBstoreidx)
  9013			v.AuxInt = off
  9014			v.Aux = sym
  9015			v.AddArg(ptr)
  9016			v.AddArg(idx)
  9017			v0 := b.NewValue0(v.Pos, OpPPC64SRWconst, typ.UInt32)
  9018			v0.AuxInt = c
  9019			v0.AddArg(x)
  9020			v.AddArg(v0)
  9021			v.AddArg(mem)
  9022			return true
  9023		}
  9024		return false
  9025	}
  9026	func rewriteValuePPC64_OpPPC64MOVBstorezero_0(v *Value) bool {
  9027		// match: (MOVBstorezero [off1] {sym} (ADDconst [off2] x) mem)
  9028		// cond: is16Bit(off1+off2)
  9029		// result: (MOVBstorezero [off1+off2] {sym} x mem)
  9030		for {
  9031			off1 := v.AuxInt
  9032			sym := v.Aux
  9033			mem := v.Args[1]
  9034			v_0 := v.Args[0]
  9035			if v_0.Op != OpPPC64ADDconst {
  9036				break
  9037			}
  9038			off2 := v_0.AuxInt
  9039			x := v_0.Args[0]
  9040			if !(is16Bit(off1 + off2)) {
  9041				break
  9042			}
  9043			v.reset(OpPPC64MOVBstorezero)
  9044			v.AuxInt = off1 + off2
  9045			v.Aux = sym
  9046			v.AddArg(x)
  9047			v.AddArg(mem)
  9048			return true
  9049		}
  9050		// match: (MOVBstorezero [off1] {sym1} p:(MOVDaddr [off2] {sym2} x) mem)
  9051		// cond: canMergeSym(sym1,sym2) && (x.Op != OpSB || p.Uses == 1)
  9052		// result: (MOVBstorezero [off1+off2] {mergeSym(sym1,sym2)} x mem)
  9053		for {
  9054			off1 := v.AuxInt
  9055			sym1 := v.Aux
  9056			mem := v.Args[1]
  9057			p := v.Args[0]
  9058			if p.Op != OpPPC64MOVDaddr {
  9059				break
  9060			}
  9061			off2 := p.AuxInt
  9062			sym2 := p.Aux
  9063			x := p.Args[0]
  9064			if !(canMergeSym(sym1, sym2) && (x.Op != OpSB || p.Uses == 1)) {
  9065				break
  9066			}
  9067			v.reset(OpPPC64MOVBstorezero)
  9068			v.AuxInt = off1 + off2
  9069			v.Aux = mergeSym(sym1, sym2)
  9070			v.AddArg(x)
  9071			v.AddArg(mem)
  9072			return true
  9073		}
  9074		return false
  9075	}
  9076	func rewriteValuePPC64_OpPPC64MOVDload_0(v *Value) bool {
  9077		// match: (MOVDload [off] {sym} ptr (FMOVDstore [off] {sym} ptr x _))
  9078		// cond:
  9079		// result: (MFVSRD x)
  9080		for {
  9081			off := v.AuxInt
  9082			sym := v.Aux
  9083			_ = v.Args[1]
  9084			ptr := v.Args[0]
  9085			v_1 := v.Args[1]
  9086			if v_1.Op != OpPPC64FMOVDstore {
  9087				break
  9088			}
  9089			if v_1.AuxInt != off {
  9090				break
  9091			}
  9092			if v_1.Aux != sym {
  9093				break
  9094			}
  9095			_ = v_1.Args[2]
  9096			if ptr != v_1.Args[0] {
  9097				break
  9098			}
  9099			x := v_1.Args[1]
  9100			v.reset(OpPPC64MFVSRD)
  9101			v.AddArg(x)
  9102			return true
  9103		}
  9104		// match: (MOVDload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
  9105		// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
  9106		// result: (MOVDload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  9107		for {
  9108			off1 := v.AuxInt
  9109			sym1 := v.Aux
  9110			mem := v.Args[1]
  9111			p := v.Args[0]
  9112			if p.Op != OpPPC64MOVDaddr {
  9113				break
  9114			}
  9115			off2 := p.AuxInt
  9116			sym2 := p.Aux
  9117			ptr := p.Args[0]
  9118			if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  9119				break
  9120			}
  9121			v.reset(OpPPC64MOVDload)
  9122			v.AuxInt = off1 + off2
  9123			v.Aux = mergeSym(sym1, sym2)
  9124			v.AddArg(ptr)
  9125			v.AddArg(mem)
  9126			return true
  9127		}
  9128		// match: (MOVDload [off1] {sym} (ADDconst [off2] x) mem)
  9129		// cond: is16Bit(off1+off2)
  9130		// result: (MOVDload [off1+off2] {sym} x mem)
  9131		for {
  9132			off1 := v.AuxInt
  9133			sym := v.Aux
  9134			mem := v.Args[1]
  9135			v_0 := v.Args[0]
  9136			if v_0.Op != OpPPC64ADDconst {
  9137				break
  9138			}
  9139			off2 := v_0.AuxInt
  9140			x := v_0.Args[0]
  9141			if !(is16Bit(off1 + off2)) {
  9142				break
  9143			}
  9144			v.reset(OpPPC64MOVDload)
  9145			v.AuxInt = off1 + off2
  9146			v.Aux = sym
  9147			v.AddArg(x)
  9148			v.AddArg(mem)
  9149			return true
  9150		}
  9151		// match: (MOVDload [0] {sym} p:(ADD ptr idx) mem)
  9152		// cond: sym == nil && p.Uses == 1
  9153		// result: (MOVDloadidx ptr idx mem)
  9154		for {
  9155			if v.AuxInt != 0 {
  9156				break
  9157			}
  9158			sym := v.Aux
  9159			mem := v.Args[1]
  9160			p := v.Args[0]
  9161			if p.Op != OpPPC64ADD {
  9162				break
  9163			}
  9164			idx := p.Args[1]
  9165			ptr := p.Args[0]
  9166			if !(sym == nil && p.Uses == 1) {
  9167				break
  9168			}
  9169			v.reset(OpPPC64MOVDloadidx)
  9170			v.AddArg(ptr)
  9171			v.AddArg(idx)
  9172			v.AddArg(mem)
  9173			return true
  9174		}
  9175		return false
  9176	}
  9177	func rewriteValuePPC64_OpPPC64MOVDloadidx_0(v *Value) bool {
  9178		// match: (MOVDloadidx ptr (MOVDconst [c]) mem)
  9179		// cond: is16Bit(c)
  9180		// result: (MOVDload [c] ptr mem)
  9181		for {
  9182			mem := v.Args[2]
  9183			ptr := v.Args[0]
  9184			v_1 := v.Args[1]
  9185			if v_1.Op != OpPPC64MOVDconst {
  9186				break
  9187			}
  9188			c := v_1.AuxInt
  9189			if !(is16Bit(c)) {
  9190				break
  9191			}
  9192			v.reset(OpPPC64MOVDload)
  9193			v.AuxInt = c
  9194			v.AddArg(ptr)
  9195			v.AddArg(mem)
  9196			return true
  9197		}
  9198		// match: (MOVDloadidx (MOVDconst [c]) ptr mem)
  9199		// cond: is16Bit(c)
  9200		// result: (MOVDload [c] ptr mem)
  9201		for {
  9202			mem := v.Args[2]
  9203			v_0 := v.Args[0]
  9204			if v_0.Op != OpPPC64MOVDconst {
  9205				break
  9206			}
  9207			c := v_0.AuxInt
  9208			ptr := v.Args[1]
  9209			if !(is16Bit(c)) {
  9210				break
  9211			}
  9212			v.reset(OpPPC64MOVDload)
  9213			v.AuxInt = c
  9214			v.AddArg(ptr)
  9215			v.AddArg(mem)
  9216			return true
  9217		}
  9218		return false
  9219	}
  9220	func rewriteValuePPC64_OpPPC64MOVDstore_0(v *Value) bool {
  9221		// match: (MOVDstore [off] {sym} ptr (MFVSRD x) mem)
  9222		// cond:
  9223		// result: (FMOVDstore [off] {sym} ptr x mem)
  9224		for {
  9225			off := v.AuxInt
  9226			sym := v.Aux
  9227			mem := v.Args[2]
  9228			ptr := v.Args[0]
  9229			v_1 := v.Args[1]
  9230			if v_1.Op != OpPPC64MFVSRD {
  9231				break
  9232			}
  9233			x := v_1.Args[0]
  9234			v.reset(OpPPC64FMOVDstore)
  9235			v.AuxInt = off
  9236			v.Aux = sym
  9237			v.AddArg(ptr)
  9238			v.AddArg(x)
  9239			v.AddArg(mem)
  9240			return true
  9241		}
  9242		// match: (MOVDstore [off1] {sym} (ADDconst [off2] x) val mem)
  9243		// cond: is16Bit(off1+off2)
  9244		// result: (MOVDstore [off1+off2] {sym} x val mem)
  9245		for {
  9246			off1 := v.AuxInt
  9247			sym := v.Aux
  9248			mem := v.Args[2]
  9249			v_0 := v.Args[0]
  9250			if v_0.Op != OpPPC64ADDconst {
  9251				break
  9252			}
  9253			off2 := v_0.AuxInt
  9254			x := v_0.Args[0]
  9255			val := v.Args[1]
  9256			if !(is16Bit(off1 + off2)) {
  9257				break
  9258			}
  9259			v.reset(OpPPC64MOVDstore)
  9260			v.AuxInt = off1 + off2
  9261			v.Aux = sym
  9262			v.AddArg(x)
  9263			v.AddArg(val)
  9264			v.AddArg(mem)
  9265			return true
  9266		}
  9267		// match: (MOVDstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem)
  9268		// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
  9269		// result: (MOVDstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  9270		for {
  9271			off1 := v.AuxInt
  9272			sym1 := v.Aux
  9273			mem := v.Args[2]
  9274			p := v.Args[0]
  9275			if p.Op != OpPPC64MOVDaddr {
  9276				break
  9277			}
  9278			off2 := p.AuxInt
  9279			sym2 := p.Aux
  9280			ptr := p.Args[0]
  9281			val := v.Args[1]
  9282			if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  9283				break
  9284			}
  9285			v.reset(OpPPC64MOVDstore)
  9286			v.AuxInt = off1 + off2
  9287			v.Aux = mergeSym(sym1, sym2)
  9288			v.AddArg(ptr)
  9289			v.AddArg(val)
  9290			v.AddArg(mem)
  9291			return true
  9292		}
  9293		// match: (MOVDstore [off] {sym} ptr (MOVDconst [0]) mem)
  9294		// cond:
  9295		// result: (MOVDstorezero [off] {sym} ptr mem)
  9296		for {
  9297			off := v.AuxInt
  9298			sym := v.Aux
  9299			mem := v.Args[2]
  9300			ptr := v.Args[0]
  9301			v_1 := v.Args[1]
  9302			if v_1.Op != OpPPC64MOVDconst {
  9303				break
  9304			}
  9305			if v_1.AuxInt != 0 {
  9306				break
  9307			}
  9308			v.reset(OpPPC64MOVDstorezero)
  9309			v.AuxInt = off
  9310			v.Aux = sym
  9311			v.AddArg(ptr)
  9312			v.AddArg(mem)
  9313			return true
  9314		}
  9315		// match: (MOVDstore [off] {sym} p:(ADD ptr idx) val mem)
  9316		// cond: off == 0 && sym == nil && p.Uses == 1
  9317		// result: (MOVDstoreidx ptr idx val mem)
  9318		for {
  9319			off := v.AuxInt
  9320			sym := v.Aux
  9321			mem := v.Args[2]
  9322			p := v.Args[0]
  9323			if p.Op != OpPPC64ADD {
  9324				break
  9325			}
  9326			idx := p.Args[1]
  9327			ptr := p.Args[0]
  9328			val := v.Args[1]
  9329			if !(off == 0 && sym == nil && p.Uses == 1) {
  9330				break
  9331			}
  9332			v.reset(OpPPC64MOVDstoreidx)
  9333			v.AddArg(ptr)
  9334			v.AddArg(idx)
  9335			v.AddArg(val)
  9336			v.AddArg(mem)
  9337			return true
  9338		}
  9339		return false
  9340	}
  9341	func rewriteValuePPC64_OpPPC64MOVDstoreidx_0(v *Value) bool {
  9342		// match: (MOVDstoreidx ptr (MOVDconst [c]) val mem)
  9343		// cond: is16Bit(c)
  9344		// result: (MOVDstore [c] ptr val mem)
  9345		for {
  9346			mem := v.Args[3]
  9347			ptr := v.Args[0]
  9348			v_1 := v.Args[1]
  9349			if v_1.Op != OpPPC64MOVDconst {
  9350				break
  9351			}
  9352			c := v_1.AuxInt
  9353			val := v.Args[2]
  9354			if !(is16Bit(c)) {
  9355				break
  9356			}
  9357			v.reset(OpPPC64MOVDstore)
  9358			v.AuxInt = c
  9359			v.AddArg(ptr)
  9360			v.AddArg(val)
  9361			v.AddArg(mem)
  9362			return true
  9363		}
  9364		// match: (MOVDstoreidx (MOVDconst [c]) ptr val mem)
  9365		// cond: is16Bit(c)
  9366		// result: (MOVDstore [c] ptr val mem)
  9367		for {
  9368			mem := v.Args[3]
  9369			v_0 := v.Args[0]
  9370			if v_0.Op != OpPPC64MOVDconst {
  9371				break
  9372			}
  9373			c := v_0.AuxInt
  9374			ptr := v.Args[1]
  9375			val := v.Args[2]
  9376			if !(is16Bit(c)) {
  9377				break
  9378			}
  9379			v.reset(OpPPC64MOVDstore)
  9380			v.AuxInt = c
  9381			v.AddArg(ptr)
  9382			v.AddArg(val)
  9383			v.AddArg(mem)
  9384			return true
  9385		}
  9386		return false
  9387	}
  9388	func rewriteValuePPC64_OpPPC64MOVDstorezero_0(v *Value) bool {
  9389		// match: (MOVDstorezero [off1] {sym} (ADDconst [off2] x) mem)
  9390		// cond: is16Bit(off1+off2)
  9391		// result: (MOVDstorezero [off1+off2] {sym} x mem)
  9392		for {
  9393			off1 := v.AuxInt
  9394			sym := v.Aux
  9395			mem := v.Args[1]
  9396			v_0 := v.Args[0]
  9397			if v_0.Op != OpPPC64ADDconst {
  9398				break
  9399			}
  9400			off2 := v_0.AuxInt
  9401			x := v_0.Args[0]
  9402			if !(is16Bit(off1 + off2)) {
  9403				break
  9404			}
  9405			v.reset(OpPPC64MOVDstorezero)
  9406			v.AuxInt = off1 + off2
  9407			v.Aux = sym
  9408			v.AddArg(x)
  9409			v.AddArg(mem)
  9410			return true
  9411		}
  9412		// match: (MOVDstorezero [off1] {sym1} p:(MOVDaddr [off2] {sym2} x) mem)
  9413		// cond: canMergeSym(sym1,sym2) && (x.Op != OpSB || p.Uses == 1)
  9414		// result: (MOVDstorezero [off1+off2] {mergeSym(sym1,sym2)} x mem)
  9415		for {
  9416			off1 := v.AuxInt
  9417			sym1 := v.Aux
  9418			mem := v.Args[1]
  9419			p := v.Args[0]
  9420			if p.Op != OpPPC64MOVDaddr {
  9421				break
  9422			}
  9423			off2 := p.AuxInt
  9424			sym2 := p.Aux
  9425			x := p.Args[0]
  9426			if !(canMergeSym(sym1, sym2) && (x.Op != OpSB || p.Uses == 1)) {
  9427				break
  9428			}
  9429			v.reset(OpPPC64MOVDstorezero)
  9430			v.AuxInt = off1 + off2
  9431			v.Aux = mergeSym(sym1, sym2)
  9432			v.AddArg(x)
  9433			v.AddArg(mem)
  9434			return true
  9435		}
  9436		return false
  9437	}
  9438	func rewriteValuePPC64_OpPPC64MOVHBRstore_0(v *Value) bool {
  9439		// match: (MOVHBRstore {sym} ptr (MOVHreg x) mem)
  9440		// cond:
  9441		// result: (MOVHBRstore {sym} ptr x mem)
  9442		for {
  9443			sym := v.Aux
  9444			mem := v.Args[2]
  9445			ptr := v.Args[0]
  9446			v_1 := v.Args[1]
  9447			if v_1.Op != OpPPC64MOVHreg {
  9448				break
  9449			}
  9450			x := v_1.Args[0]
  9451			v.reset(OpPPC64MOVHBRstore)
  9452			v.Aux = sym
  9453			v.AddArg(ptr)
  9454			v.AddArg(x)
  9455			v.AddArg(mem)
  9456			return true
  9457		}
  9458		// match: (MOVHBRstore {sym} ptr (MOVHZreg x) mem)
  9459		// cond:
  9460		// result: (MOVHBRstore {sym} ptr x mem)
  9461		for {
  9462			sym := v.Aux
  9463			mem := v.Args[2]
  9464			ptr := v.Args[0]
  9465			v_1 := v.Args[1]
  9466			if v_1.Op != OpPPC64MOVHZreg {
  9467				break
  9468			}
  9469			x := v_1.Args[0]
  9470			v.reset(OpPPC64MOVHBRstore)
  9471			v.Aux = sym
  9472			v.AddArg(ptr)
  9473			v.AddArg(x)
  9474			v.AddArg(mem)
  9475			return true
  9476		}
  9477		// match: (MOVHBRstore {sym} ptr (MOVWreg x) mem)
  9478		// cond:
  9479		// result: (MOVHBRstore {sym} ptr x mem)
  9480		for {
  9481			sym := v.Aux
  9482			mem := v.Args[2]
  9483			ptr := v.Args[0]
  9484			v_1 := v.Args[1]
  9485			if v_1.Op != OpPPC64MOVWreg {
  9486				break
  9487			}
  9488			x := v_1.Args[0]
  9489			v.reset(OpPPC64MOVHBRstore)
  9490			v.Aux = sym
  9491			v.AddArg(ptr)
  9492			v.AddArg(x)
  9493			v.AddArg(mem)
  9494			return true
  9495		}
  9496		// match: (MOVHBRstore {sym} ptr (MOVWZreg x) mem)
  9497		// cond:
  9498		// result: (MOVHBRstore {sym} ptr x mem)
  9499		for {
  9500			sym := v.Aux
  9501			mem := v.Args[2]
  9502			ptr := v.Args[0]
  9503			v_1 := v.Args[1]
  9504			if v_1.Op != OpPPC64MOVWZreg {
  9505				break
  9506			}
  9507			x := v_1.Args[0]
  9508			v.reset(OpPPC64MOVHBRstore)
  9509			v.Aux = sym
  9510			v.AddArg(ptr)
  9511			v.AddArg(x)
  9512			v.AddArg(mem)
  9513			return true
  9514		}
  9515		return false
  9516	}
  9517	func rewriteValuePPC64_OpPPC64MOVHZload_0(v *Value) bool {
  9518		// match: (MOVHZload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
  9519		// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
  9520		// result: (MOVHZload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  9521		for {
  9522			off1 := v.AuxInt
  9523			sym1 := v.Aux
  9524			mem := v.Args[1]
  9525			p := v.Args[0]
  9526			if p.Op != OpPPC64MOVDaddr {
  9527				break
  9528			}
  9529			off2 := p.AuxInt
  9530			sym2 := p.Aux
  9531			ptr := p.Args[0]
  9532			if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  9533				break
  9534			}
  9535			v.reset(OpPPC64MOVHZload)
  9536			v.AuxInt = off1 + off2
  9537			v.Aux = mergeSym(sym1, sym2)
  9538			v.AddArg(ptr)
  9539			v.AddArg(mem)
  9540			return true
  9541		}
  9542		// match: (MOVHZload [off1] {sym} (ADDconst [off2] x) mem)
  9543		// cond: is16Bit(off1+off2)
  9544		// result: (MOVHZload [off1+off2] {sym} x mem)
  9545		for {
  9546			off1 := v.AuxInt
  9547			sym := v.Aux
  9548			mem := v.Args[1]
  9549			v_0 := v.Args[0]
  9550			if v_0.Op != OpPPC64ADDconst {
  9551				break
  9552			}
  9553			off2 := v_0.AuxInt
  9554			x := v_0.Args[0]
  9555			if !(is16Bit(off1 + off2)) {
  9556				break
  9557			}
  9558			v.reset(OpPPC64MOVHZload)
  9559			v.AuxInt = off1 + off2
  9560			v.Aux = sym
  9561			v.AddArg(x)
  9562			v.AddArg(mem)
  9563			return true
  9564		}
  9565		// match: (MOVHZload [0] {sym} p:(ADD ptr idx) mem)
  9566		// cond: sym == nil && p.Uses == 1
  9567		// result: (MOVHZloadidx ptr idx mem)
  9568		for {
  9569			if v.AuxInt != 0 {
  9570				break
  9571			}
  9572			sym := v.Aux
  9573			mem := v.Args[1]
  9574			p := v.Args[0]
  9575			if p.Op != OpPPC64ADD {
  9576				break
  9577			}
  9578			idx := p.Args[1]
  9579			ptr := p.Args[0]
  9580			if !(sym == nil && p.Uses == 1) {
  9581				break
  9582			}
  9583			v.reset(OpPPC64MOVHZloadidx)
  9584			v.AddArg(ptr)
  9585			v.AddArg(idx)
  9586			v.AddArg(mem)
  9587			return true
  9588		}
  9589		return false
  9590	}
  9591	func rewriteValuePPC64_OpPPC64MOVHZloadidx_0(v *Value) bool {
  9592		// match: (MOVHZloadidx ptr (MOVDconst [c]) mem)
  9593		// cond: is16Bit(c)
  9594		// result: (MOVHZload [c] ptr mem)
  9595		for {
  9596			mem := v.Args[2]
  9597			ptr := v.Args[0]
  9598			v_1 := v.Args[1]
  9599			if v_1.Op != OpPPC64MOVDconst {
  9600				break
  9601			}
  9602			c := v_1.AuxInt
  9603			if !(is16Bit(c)) {
  9604				break
  9605			}
  9606			v.reset(OpPPC64MOVHZload)
  9607			v.AuxInt = c
  9608			v.AddArg(ptr)
  9609			v.AddArg(mem)
  9610			return true
  9611		}
  9612		// match: (MOVHZloadidx (MOVDconst [c]) ptr mem)
  9613		// cond: is16Bit(c)
  9614		// result: (MOVHZload [c] ptr mem)
  9615		for {
  9616			mem := v.Args[2]
  9617			v_0 := v.Args[0]
  9618			if v_0.Op != OpPPC64MOVDconst {
  9619				break
  9620			}
  9621			c := v_0.AuxInt
  9622			ptr := v.Args[1]
  9623			if !(is16Bit(c)) {
  9624				break
  9625			}
  9626			v.reset(OpPPC64MOVHZload)
  9627			v.AuxInt = c
  9628			v.AddArg(ptr)
  9629			v.AddArg(mem)
  9630			return true
  9631		}
  9632		return false
  9633	}
  9634	func rewriteValuePPC64_OpPPC64MOVHZreg_0(v *Value) bool {
  9635		b := v.Block
  9636		typ := &b.Func.Config.Types
  9637		// match: (MOVHZreg y:(ANDconst [c] _))
  9638		// cond: uint64(c) <= 0xFFFF
  9639		// result: y
  9640		for {
  9641			y := v.Args[0]
  9642			if y.Op != OpPPC64ANDconst {
  9643				break
  9644			}
  9645			c := y.AuxInt
  9646			if !(uint64(c) <= 0xFFFF) {
  9647				break
  9648			}
  9649			v.reset(OpCopy)
  9650			v.Type = y.Type
  9651			v.AddArg(y)
  9652			return true
  9653		}
  9654		// match: (MOVHZreg (SRWconst [c] (MOVBZreg x)))
  9655		// cond:
  9656		// result: (SRWconst [c] (MOVBZreg x))
  9657		for {
  9658			v_0 := v.Args[0]
  9659			if v_0.Op != OpPPC64SRWconst {
  9660				break
  9661			}
  9662			c := v_0.AuxInt
  9663			v_0_0 := v_0.Args[0]
  9664			if v_0_0.Op != OpPPC64MOVBZreg {
  9665				break
  9666			}
  9667			x := v_0_0.Args[0]
  9668			v.reset(OpPPC64SRWconst)
  9669			v.AuxInt = c
  9670			v0 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
  9671			v0.AddArg(x)
  9672			v.AddArg(v0)
  9673			return true
  9674		}
  9675		// match: (MOVHZreg (SRWconst [c] (MOVHZreg x)))
  9676		// cond:
  9677		// result: (SRWconst [c] (MOVHZreg x))
  9678		for {
  9679			v_0 := v.Args[0]
  9680			if v_0.Op != OpPPC64SRWconst {
  9681				break
  9682			}
  9683			c := v_0.AuxInt
  9684			v_0_0 := v_0.Args[0]
  9685			if v_0_0.Op != OpPPC64MOVHZreg {
  9686				break
  9687			}
  9688			x := v_0_0.Args[0]
  9689			v.reset(OpPPC64SRWconst)
  9690			v.AuxInt = c
  9691			v0 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
  9692			v0.AddArg(x)
  9693			v.AddArg(v0)
  9694			return true
  9695		}
  9696		// match: (MOVHZreg (SRWconst [c] x))
  9697		// cond: sizeof(x.Type) <= 16
  9698		// result: (SRWconst [c] x)
  9699		for {
  9700			v_0 := v.Args[0]
  9701			if v_0.Op != OpPPC64SRWconst {
  9702				break
  9703			}
  9704			c := v_0.AuxInt
  9705			x := v_0.Args[0]
  9706			if !(sizeof(x.Type) <= 16) {
  9707				break
  9708			}
  9709			v.reset(OpPPC64SRWconst)
  9710			v.AuxInt = c
  9711			v.AddArg(x)
  9712			return true
  9713		}
  9714		// match: (MOVHZreg (SRDconst [c] x))
  9715		// cond: c>=48
  9716		// result: (SRDconst [c] x)
  9717		for {
  9718			v_0 := v.Args[0]
  9719			if v_0.Op != OpPPC64SRDconst {
  9720				break
  9721			}
  9722			c := v_0.AuxInt
  9723			x := v_0.Args[0]
  9724			if !(c >= 48) {
  9725				break
  9726			}
  9727			v.reset(OpPPC64SRDconst)
  9728			v.AuxInt = c
  9729			v.AddArg(x)
  9730			return true
  9731		}
  9732		// match: (MOVHZreg (SRWconst [c] x))
  9733		// cond: c>=16
  9734		// result: (SRWconst [c] x)
  9735		for {
  9736			v_0 := v.Args[0]
  9737			if v_0.Op != OpPPC64SRWconst {
  9738				break
  9739			}
  9740			c := v_0.AuxInt
  9741			x := v_0.Args[0]
  9742			if !(c >= 16) {
  9743				break
  9744			}
  9745			v.reset(OpPPC64SRWconst)
  9746			v.AuxInt = c
  9747			v.AddArg(x)
  9748			return true
  9749		}
  9750		// match: (MOVHZreg y:(MOVHZreg _))
  9751		// cond:
  9752		// result: y
  9753		for {
  9754			y := v.Args[0]
  9755			if y.Op != OpPPC64MOVHZreg {
  9756				break
  9757			}
  9758			v.reset(OpCopy)
  9759			v.Type = y.Type
  9760			v.AddArg(y)
  9761			return true
  9762		}
  9763		// match: (MOVHZreg y:(MOVBZreg _))
  9764		// cond:
  9765		// result: y
  9766		for {
  9767			y := v.Args[0]
  9768			if y.Op != OpPPC64MOVBZreg {
  9769				break
  9770			}
  9771			v.reset(OpCopy)
  9772			v.Type = y.Type
  9773			v.AddArg(y)
  9774			return true
  9775		}
  9776		// match: (MOVHZreg y:(MOVHBRload _ _))
  9777		// cond:
  9778		// result: y
  9779		for {
  9780			y := v.Args[0]
  9781			if y.Op != OpPPC64MOVHBRload {
  9782				break
  9783			}
  9784			_ = y.Args[1]
  9785			v.reset(OpCopy)
  9786			v.Type = y.Type
  9787			v.AddArg(y)
  9788			return true
  9789		}
  9790		// match: (MOVHZreg y:(MOVHreg x))
  9791		// cond:
  9792		// result: (MOVHZreg x)
  9793		for {
  9794			y := v.Args[0]
  9795			if y.Op != OpPPC64MOVHreg {
  9796				break
  9797			}
  9798			x := y.Args[0]
  9799			v.reset(OpPPC64MOVHZreg)
  9800			v.AddArg(x)
  9801			return true
  9802		}
  9803		return false
  9804	}
  9805	func rewriteValuePPC64_OpPPC64MOVHZreg_10(v *Value) bool {
  9806		// match: (MOVHZreg x:(MOVBZload _ _))
  9807		// cond:
  9808		// result: x
  9809		for {
  9810			x := v.Args[0]
  9811			if x.Op != OpPPC64MOVBZload {
  9812				break
  9813			}
  9814			_ = x.Args[1]
  9815			v.reset(OpCopy)
  9816			v.Type = x.Type
  9817			v.AddArg(x)
  9818			return true
  9819		}
  9820		// match: (MOVHZreg x:(MOVBZloadidx _ _ _))
  9821		// cond:
  9822		// result: x
  9823		for {
  9824			x := v.Args[0]
  9825			if x.Op != OpPPC64MOVBZloadidx {
  9826				break
  9827			}
  9828			_ = x.Args[2]
  9829			v.reset(OpCopy)
  9830			v.Type = x.Type
  9831			v.AddArg(x)
  9832			return true
  9833		}
  9834		// match: (MOVHZreg x:(MOVHZload _ _))
  9835		// cond:
  9836		// result: x
  9837		for {
  9838			x := v.Args[0]
  9839			if x.Op != OpPPC64MOVHZload {
  9840				break
  9841			}
  9842			_ = x.Args[1]
  9843			v.reset(OpCopy)
  9844			v.Type = x.Type
  9845			v.AddArg(x)
  9846			return true
  9847		}
  9848		// match: (MOVHZreg x:(MOVHZloadidx _ _ _))
  9849		// cond:
  9850		// result: x
  9851		for {
  9852			x := v.Args[0]
  9853			if x.Op != OpPPC64MOVHZloadidx {
  9854				break
  9855			}
  9856			_ = x.Args[2]
  9857			v.reset(OpCopy)
  9858			v.Type = x.Type
  9859			v.AddArg(x)
  9860			return true
  9861		}
  9862		// match: (MOVHZreg x:(Arg <t>))
  9863		// cond: (is8BitInt(t) || is16BitInt(t)) && !isSigned(t)
  9864		// result: x
  9865		for {
  9866			x := v.Args[0]
  9867			if x.Op != OpArg {
  9868				break
  9869			}
  9870			t := x.Type
  9871			if !((is8BitInt(t) || is16BitInt(t)) && !isSigned(t)) {
  9872				break
  9873			}
  9874			v.reset(OpCopy)
  9875			v.Type = x.Type
  9876			v.AddArg(x)
  9877			return true
  9878		}
  9879		// match: (MOVHZreg (MOVDconst [c]))
  9880		// cond:
  9881		// result: (MOVDconst [int64(uint16(c))])
  9882		for {
  9883			v_0 := v.Args[0]
  9884			if v_0.Op != OpPPC64MOVDconst {
  9885				break
  9886			}
  9887			c := v_0.AuxInt
  9888			v.reset(OpPPC64MOVDconst)
  9889			v.AuxInt = int64(uint16(c))
  9890			return true
  9891		}
  9892		return false
  9893	}
  9894	func rewriteValuePPC64_OpPPC64MOVHload_0(v *Value) bool {
  9895		// match: (MOVHload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
  9896		// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
  9897		// result: (MOVHload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  9898		for {
  9899			off1 := v.AuxInt
  9900			sym1 := v.Aux
  9901			mem := v.Args[1]
  9902			p := v.Args[0]
  9903			if p.Op != OpPPC64MOVDaddr {
  9904				break
  9905			}
  9906			off2 := p.AuxInt
  9907			sym2 := p.Aux
  9908			ptr := p.Args[0]
  9909			if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  9910				break
  9911			}
  9912			v.reset(OpPPC64MOVHload)
  9913			v.AuxInt = off1 + off2
  9914			v.Aux = mergeSym(sym1, sym2)
  9915			v.AddArg(ptr)
  9916			v.AddArg(mem)
  9917			return true
  9918		}
  9919		// match: (MOVHload [off1] {sym} (ADDconst [off2] x) mem)
  9920		// cond: is16Bit(off1+off2)
  9921		// result: (MOVHload [off1+off2] {sym} x mem)
  9922		for {
  9923			off1 := v.AuxInt
  9924			sym := v.Aux
  9925			mem := v.Args[1]
  9926			v_0 := v.Args[0]
  9927			if v_0.Op != OpPPC64ADDconst {
  9928				break
  9929			}
  9930			off2 := v_0.AuxInt
  9931			x := v_0.Args[0]
  9932			if !(is16Bit(off1 + off2)) {
  9933				break
  9934			}
  9935			v.reset(OpPPC64MOVHload)
  9936			v.AuxInt = off1 + off2
  9937			v.Aux = sym
  9938			v.AddArg(x)
  9939			v.AddArg(mem)
  9940			return true
  9941		}
  9942		// match: (MOVHload [0] {sym} p:(ADD ptr idx) mem)
  9943		// cond: sym == nil && p.Uses == 1
  9944		// result: (MOVHloadidx ptr idx mem)
  9945		for {
  9946			if v.AuxInt != 0 {
  9947				break
  9948			}
  9949			sym := v.Aux
  9950			mem := v.Args[1]
  9951			p := v.Args[0]
  9952			if p.Op != OpPPC64ADD {
  9953				break
  9954			}
  9955			idx := p.Args[1]
  9956			ptr := p.Args[0]
  9957			if !(sym == nil && p.Uses == 1) {
  9958				break
  9959			}
  9960			v.reset(OpPPC64MOVHloadidx)
  9961			v.AddArg(ptr)
  9962			v.AddArg(idx)
  9963			v.AddArg(mem)
  9964			return true
  9965		}
  9966		return false
  9967	}
  9968	func rewriteValuePPC64_OpPPC64MOVHloadidx_0(v *Value) bool {
  9969		// match: (MOVHloadidx ptr (MOVDconst [c]) mem)
  9970		// cond: is16Bit(c)
  9971		// result: (MOVHload [c] ptr mem)
  9972		for {
  9973			mem := v.Args[2]
  9974			ptr := v.Args[0]
  9975			v_1 := v.Args[1]
  9976			if v_1.Op != OpPPC64MOVDconst {
  9977				break
  9978			}
  9979			c := v_1.AuxInt
  9980			if !(is16Bit(c)) {
  9981				break
  9982			}
  9983			v.reset(OpPPC64MOVHload)
  9984			v.AuxInt = c
  9985			v.AddArg(ptr)
  9986			v.AddArg(mem)
  9987			return true
  9988		}
  9989		// match: (MOVHloadidx (MOVDconst [c]) ptr mem)
  9990		// cond: is16Bit(c)
  9991		// result: (MOVHload [c] ptr mem)
  9992		for {
  9993			mem := v.Args[2]
  9994			v_0 := v.Args[0]
  9995			if v_0.Op != OpPPC64MOVDconst {
  9996				break
  9997			}
  9998			c := v_0.AuxInt
  9999			ptr := v.Args[1]
 10000			if !(is16Bit(c)) {
 10001				break
 10002			}
 10003			v.reset(OpPPC64MOVHload)
 10004			v.AuxInt = c
 10005			v.AddArg(ptr)
 10006			v.AddArg(mem)
 10007			return true
 10008		}
 10009		return false
 10010	}
 10011	func rewriteValuePPC64_OpPPC64MOVHreg_0(v *Value) bool {
 10012		b := v.Block
 10013		typ := &b.Func.Config.Types
 10014		// match: (MOVHreg y:(ANDconst [c] _))
 10015		// cond: uint64(c) <= 0x7FFF
 10016		// result: y
 10017		for {
 10018			y := v.Args[0]
 10019			if y.Op != OpPPC64ANDconst {
 10020				break
 10021			}
 10022			c := y.AuxInt
 10023			if !(uint64(c) <= 0x7FFF) {
 10024				break
 10025			}
 10026			v.reset(OpCopy)
 10027			v.Type = y.Type
 10028			v.AddArg(y)
 10029			return true
 10030		}
 10031		// match: (MOVHreg (SRAWconst [c] (MOVBreg x)))
 10032		// cond:
 10033		// result: (SRAWconst [c] (MOVBreg x))
 10034		for {
 10035			v_0 := v.Args[0]
 10036			if v_0.Op != OpPPC64SRAWconst {
 10037				break
 10038			}
 10039			c := v_0.AuxInt
 10040			v_0_0 := v_0.Args[0]
 10041			if v_0_0.Op != OpPPC64MOVBreg {
 10042				break
 10043			}
 10044			x := v_0_0.Args[0]
 10045			v.reset(OpPPC64SRAWconst)
 10046			v.AuxInt = c
 10047			v0 := b.NewValue0(v.Pos, OpPPC64MOVBreg, typ.Int64)
 10048			v0.AddArg(x)
 10049			v.AddArg(v0)
 10050			return true
 10051		}
 10052		// match: (MOVHreg (SRAWconst [c] (MOVHreg x)))
 10053		// cond:
 10054		// result: (SRAWconst [c] (MOVHreg x))
 10055		for {
 10056			v_0 := v.Args[0]
 10057			if v_0.Op != OpPPC64SRAWconst {
 10058				break
 10059			}
 10060			c := v_0.AuxInt
 10061			v_0_0 := v_0.Args[0]
 10062			if v_0_0.Op != OpPPC64MOVHreg {
 10063				break
 10064			}
 10065			x := v_0_0.Args[0]
 10066			v.reset(OpPPC64SRAWconst)
 10067			v.AuxInt = c
 10068			v0 := b.NewValue0(v.Pos, OpPPC64MOVHreg, typ.Int64)
 10069			v0.AddArg(x)
 10070			v.AddArg(v0)
 10071			return true
 10072		}
 10073		// match: (MOVHreg (SRAWconst [c] x))
 10074		// cond: sizeof(x.Type) <= 16
 10075		// result: (SRAWconst [c] x)
 10076		for {
 10077			v_0 := v.Args[0]
 10078			if v_0.Op != OpPPC64SRAWconst {
 10079				break
 10080			}
 10081			c := v_0.AuxInt
 10082			x := v_0.Args[0]
 10083			if !(sizeof(x.Type) <= 16) {
 10084				break
 10085			}
 10086			v.reset(OpPPC64SRAWconst)
 10087			v.AuxInt = c
 10088			v.AddArg(x)
 10089			return true
 10090		}
 10091		// match: (MOVHreg (SRDconst [c] x))
 10092		// cond: c>48
 10093		// result: (SRDconst [c] x)
 10094		for {
 10095			v_0 := v.Args[0]
 10096			if v_0.Op != OpPPC64SRDconst {
 10097				break
 10098			}
 10099			c := v_0.AuxInt
 10100			x := v_0.Args[0]
 10101			if !(c > 48) {
 10102				break
 10103			}
 10104			v.reset(OpPPC64SRDconst)
 10105			v.AuxInt = c
 10106			v.AddArg(x)
 10107			return true
 10108		}
 10109		// match: (MOVHreg (SRDconst [c] x))
 10110		// cond: c==48
 10111		// result: (SRADconst [c] x)
 10112		for {
 10113			v_0 := v.Args[0]
 10114			if v_0.Op != OpPPC64SRDconst {
 10115				break
 10116			}
 10117			c := v_0.AuxInt
 10118			x := v_0.Args[0]
 10119			if !(c == 48) {
 10120				break
 10121			}
 10122			v.reset(OpPPC64SRADconst)
 10123			v.AuxInt = c
 10124			v.AddArg(x)
 10125			return true
 10126		}
 10127		// match: (MOVHreg (SRWconst [c] x))
 10128		// cond: c>16
 10129		// result: (SRWconst [c] x)
 10130		for {
 10131			v_0 := v.Args[0]
 10132			if v_0.Op != OpPPC64SRWconst {
 10133				break
 10134			}
 10135			c := v_0.AuxInt
 10136			x := v_0.Args[0]
 10137			if !(c > 16) {
 10138				break
 10139			}
 10140			v.reset(OpPPC64SRWconst)
 10141			v.AuxInt = c
 10142			v.AddArg(x)
 10143			return true
 10144		}
 10145		// match: (MOVHreg (SRWconst [c] x))
 10146		// cond: c==16
 10147		// result: (SRAWconst [c] x)
 10148		for {
 10149			v_0 := v.Args[0]
 10150			if v_0.Op != OpPPC64SRWconst {
 10151				break
 10152			}
 10153			c := v_0.AuxInt
 10154			x := v_0.Args[0]
 10155			if !(c == 16) {
 10156				break
 10157			}
 10158			v.reset(OpPPC64SRAWconst)
 10159			v.AuxInt = c
 10160			v.AddArg(x)
 10161			return true
 10162		}
 10163		// match: (MOVHreg y:(MOVHreg _))
 10164		// cond:
 10165		// result: y
 10166		for {
 10167			y := v.Args[0]
 10168			if y.Op != OpPPC64MOVHreg {
 10169				break
 10170			}
 10171			v.reset(OpCopy)
 10172			v.Type = y.Type
 10173			v.AddArg(y)
 10174			return true
 10175		}
 10176		// match: (MOVHreg y:(MOVBreg _))
 10177		// cond:
 10178		// result: y
 10179		for {
 10180			y := v.Args[0]
 10181			if y.Op != OpPPC64MOVBreg {
 10182				break
 10183			}
 10184			v.reset(OpCopy)
 10185			v.Type = y.Type
 10186			v.AddArg(y)
 10187			return true
 10188		}
 10189		return false
 10190	}
 10191	func rewriteValuePPC64_OpPPC64MOVHreg_10(v *Value) bool {
 10192		// match: (MOVHreg y:(MOVHZreg x))
 10193		// cond:
 10194		// result: (MOVHreg x)
 10195		for {
 10196			y := v.Args[0]
 10197			if y.Op != OpPPC64MOVHZreg {
 10198				break
 10199			}
 10200			x := y.Args[0]
 10201			v.reset(OpPPC64MOVHreg)
 10202			v.AddArg(x)
 10203			return true
 10204		}
 10205		// match: (MOVHreg x:(MOVHload _ _))
 10206		// cond:
 10207		// result: x
 10208		for {
 10209			x := v.Args[0]
 10210			if x.Op != OpPPC64MOVHload {
 10211				break
 10212			}
 10213			_ = x.Args[1]
 10214			v.reset(OpCopy)
 10215			v.Type = x.Type
 10216			v.AddArg(x)
 10217			return true
 10218		}
 10219		// match: (MOVHreg x:(MOVHloadidx _ _ _))
 10220		// cond:
 10221		// result: x
 10222		for {
 10223			x := v.Args[0]
 10224			if x.Op != OpPPC64MOVHloadidx {
 10225				break
 10226			}
 10227			_ = x.Args[2]
 10228			v.reset(OpCopy)
 10229			v.Type = x.Type
 10230			v.AddArg(x)
 10231			return true
 10232		}
 10233		// match: (MOVHreg x:(Arg <t>))
 10234		// cond: (is8BitInt(t) || is16BitInt(t)) && isSigned(t)
 10235		// result: x
 10236		for {
 10237			x := v.Args[0]
 10238			if x.Op != OpArg {
 10239				break
 10240			}
 10241			t := x.Type
 10242			if !((is8BitInt(t) || is16BitInt(t)) && isSigned(t)) {
 10243				break
 10244			}
 10245			v.reset(OpCopy)
 10246			v.Type = x.Type
 10247			v.AddArg(x)
 10248			return true
 10249		}
 10250		// match: (MOVHreg (MOVDconst [c]))
 10251		// cond:
 10252		// result: (MOVDconst [int64(int16(c))])
 10253		for {
 10254			v_0 := v.Args[0]
 10255			if v_0.Op != OpPPC64MOVDconst {
 10256				break
 10257			}
 10258			c := v_0.AuxInt
 10259			v.reset(OpPPC64MOVDconst)
 10260			v.AuxInt = int64(int16(c))
 10261			return true
 10262		}
 10263		return false
 10264	}
 10265	func rewriteValuePPC64_OpPPC64MOVHstore_0(v *Value) bool {
 10266		b := v.Block
 10267		config := b.Func.Config
 10268		// match: (MOVHstore [off1] {sym} (ADDconst [off2] x) val mem)
 10269		// cond: is16Bit(off1+off2)
 10270		// result: (MOVHstore [off1+off2] {sym} x val mem)
 10271		for {
 10272			off1 := v.AuxInt
 10273			sym := v.Aux
 10274			mem := v.Args[2]
 10275			v_0 := v.Args[0]
 10276			if v_0.Op != OpPPC64ADDconst {
 10277				break
 10278			}
 10279			off2 := v_0.AuxInt
 10280			x := v_0.Args[0]
 10281			val := v.Args[1]
 10282			if !(is16Bit(off1 + off2)) {
 10283				break
 10284			}
 10285			v.reset(OpPPC64MOVHstore)
 10286			v.AuxInt = off1 + off2
 10287			v.Aux = sym
 10288			v.AddArg(x)
 10289			v.AddArg(val)
 10290			v.AddArg(mem)
 10291			return true
 10292		}
 10293		// match: (MOVHstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem)
 10294		// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
 10295		// result: (MOVHstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
 10296		for {
 10297			off1 := v.AuxInt
 10298			sym1 := v.Aux
 10299			mem := v.Args[2]
 10300			p := v.Args[0]
 10301			if p.Op != OpPPC64MOVDaddr {
 10302				break
 10303			}
 10304			off2 := p.AuxInt
 10305			sym2 := p.Aux
 10306			ptr := p.Args[0]
 10307			val := v.Args[1]
 10308			if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
 10309				break
 10310			}
 10311			v.reset(OpPPC64MOVHstore)
 10312			v.AuxInt = off1 + off2
 10313			v.Aux = mergeSym(sym1, sym2)
 10314			v.AddArg(ptr)
 10315			v.AddArg(val)
 10316			v.AddArg(mem)
 10317			return true
 10318		}
 10319		// match: (MOVHstore [off] {sym} ptr (MOVDconst [0]) mem)
 10320		// cond:
 10321		// result: (MOVHstorezero [off] {sym} ptr mem)
 10322		for {
 10323			off := v.AuxInt
 10324			sym := v.Aux
 10325			mem := v.Args[2]
 10326			ptr := v.Args[0]
 10327			v_1 := v.Args[1]
 10328			if v_1.Op != OpPPC64MOVDconst {
 10329				break
 10330			}
 10331			if v_1.AuxInt != 0 {
 10332				break
 10333			}
 10334			v.reset(OpPPC64MOVHstorezero)
 10335			v.AuxInt = off
 10336			v.Aux = sym
 10337			v.AddArg(ptr)
 10338			v.AddArg(mem)
 10339			return true
 10340		}
 10341		// match: (MOVHstore [off] {sym} p:(ADD ptr idx) val mem)
 10342		// cond: off == 0 && sym == nil && p.Uses == 1
 10343		// result: (MOVHstoreidx ptr idx val mem)
 10344		for {
 10345			off := v.AuxInt
 10346			sym := v.Aux
 10347			mem := v.Args[2]
 10348			p := v.Args[0]
 10349			if p.Op != OpPPC64ADD {
 10350				break
 10351			}
 10352			idx := p.Args[1]
 10353			ptr := p.Args[0]
 10354			val := v.Args[1]
 10355			if !(off == 0 && sym == nil && p.Uses == 1) {
 10356				break
 10357			}
 10358			v.reset(OpPPC64MOVHstoreidx)
 10359			v.AddArg(ptr)
 10360			v.AddArg(idx)
 10361			v.AddArg(val)
 10362			v.AddArg(mem)
 10363			return true
 10364		}
 10365		// match: (MOVHstore [off] {sym} ptr (MOVHreg x) mem)
 10366		// cond:
 10367		// result: (MOVHstore [off] {sym} ptr x mem)
 10368		for {
 10369			off := v.AuxInt
 10370			sym := v.Aux
 10371			mem := v.Args[2]
 10372			ptr := v.Args[0]
 10373			v_1 := v.Args[1]
 10374			if v_1.Op != OpPPC64MOVHreg {
 10375				break
 10376			}
 10377			x := v_1.Args[0]
 10378			v.reset(OpPPC64MOVHstore)
 10379			v.AuxInt = off
 10380			v.Aux = sym
 10381			v.AddArg(ptr)
 10382			v.AddArg(x)
 10383			v.AddArg(mem)
 10384			return true
 10385		}
 10386		// match: (MOVHstore [off] {sym} ptr (MOVHZreg x) mem)
 10387		// cond:
 10388		// result: (MOVHstore [off] {sym} ptr x mem)
 10389		for {
 10390			off := v.AuxInt
 10391			sym := v.Aux
 10392			mem := v.Args[2]
 10393			ptr := v.Args[0]
 10394			v_1 := v.Args[1]
 10395			if v_1.Op != OpPPC64MOVHZreg {
 10396				break
 10397			}
 10398			x := v_1.Args[0]
 10399			v.reset(OpPPC64MOVHstore)
 10400			v.AuxInt = off
 10401			v.Aux = sym
 10402			v.AddArg(ptr)
 10403			v.AddArg(x)
 10404			v.AddArg(mem)
 10405			return true
 10406		}
 10407		// match: (MOVHstore [off] {sym} ptr (MOVWreg x) mem)
 10408		// cond:
 10409		// result: (MOVHstore [off] {sym} ptr x mem)
 10410		for {
 10411			off := v.AuxInt
 10412			sym := v.Aux
 10413			mem := v.Args[2]
 10414			ptr := v.Args[0]
 10415			v_1 := v.Args[1]
 10416			if v_1.Op != OpPPC64MOVWreg {
 10417				break
 10418			}
 10419			x := v_1.Args[0]
 10420			v.reset(OpPPC64MOVHstore)
 10421			v.AuxInt = off
 10422			v.Aux = sym
 10423			v.AddArg(ptr)
 10424			v.AddArg(x)
 10425			v.AddArg(mem)
 10426			return true
 10427		}
 10428		// match: (MOVHstore [off] {sym} ptr (MOVWZreg x) mem)
 10429		// cond:
 10430		// result: (MOVHstore [off] {sym} ptr x mem)
 10431		for {
 10432			off := v.AuxInt
 10433			sym := v.Aux
 10434			mem := v.Args[2]
 10435			ptr := v.Args[0]
 10436			v_1 := v.Args[1]
 10437			if v_1.Op != OpPPC64MOVWZreg {
 10438				break
 10439			}
 10440			x := v_1.Args[0]
 10441			v.reset(OpPPC64MOVHstore)
 10442			v.AuxInt = off
 10443			v.Aux = sym
 10444			v.AddArg(ptr)
 10445			v.AddArg(x)
 10446			v.AddArg(mem)
 10447			return true
 10448		}
 10449		// match: (MOVHstore [i1] {s} p (SRWconst w [16]) x0:(MOVHstore [i0] {s} p w mem))
 10450		// cond: !config.BigEndian && x0.Uses == 1 && i1 == i0+2 && clobber(x0)
 10451		// result: (MOVWstore [i0] {s} p w mem)
 10452		for {
 10453			i1 := v.AuxInt
 10454			s := v.Aux
 10455			_ = v.Args[2]
 10456			p := v.Args[0]
 10457			v_1 := v.Args[1]
 10458			if v_1.Op != OpPPC64SRWconst {
 10459				break
 10460			}
 10461			if v_1.AuxInt != 16 {
 10462				break
 10463			}
 10464			w := v_1.Args[0]
 10465			x0 := v.Args[2]
 10466			if x0.Op != OpPPC64MOVHstore {
 10467				break
 10468			}
 10469			i0 := x0.AuxInt
 10470			if x0.Aux != s {
 10471				break
 10472			}
 10473			mem := x0.Args[2]
 10474			if p != x0.Args[0] {
 10475				break
 10476			}
 10477			if w != x0.Args[1] {
 10478				break
 10479			}
 10480			if !(!config.BigEndian && x0.Uses == 1 && i1 == i0+2 && clobber(x0)) {
 10481				break
 10482			}
 10483			v.reset(OpPPC64MOVWstore)
 10484			v.AuxInt = i0
 10485			v.Aux = s
 10486			v.AddArg(p)
 10487			v.AddArg(w)
 10488			v.AddArg(mem)
 10489			return true
 10490		}
 10491		// match: (MOVHstore [i1] {s} p (SRDconst w [16]) x0:(MOVHstore [i0] {s} p w mem))
 10492		// cond: !config.BigEndian && x0.Uses == 1 && i1 == i0+2 && clobber(x0)
 10493		// result: (MOVWstore [i0] {s} p w mem)
 10494		for {
 10495			i1 := v.AuxInt
 10496			s := v.Aux
 10497			_ = v.Args[2]
 10498			p := v.Args[0]
 10499			v_1 := v.Args[1]
 10500			if v_1.Op != OpPPC64SRDconst {
 10501				break
 10502			}
 10503			if v_1.AuxInt != 16 {
 10504				break
 10505			}
 10506			w := v_1.Args[0]
 10507			x0 := v.Args[2]
 10508			if x0.Op != OpPPC64MOVHstore {
 10509				break
 10510			}
 10511			i0 := x0.AuxInt
 10512			if x0.Aux != s {
 10513				break
 10514			}
 10515			mem := x0.Args[2]
 10516			if p != x0.Args[0] {
 10517				break
 10518			}
 10519			if w != x0.Args[1] {
 10520				break
 10521			}
 10522			if !(!config.BigEndian && x0.Uses == 1 && i1 == i0+2 && clobber(x0)) {
 10523				break
 10524			}
 10525			v.reset(OpPPC64MOVWstore)
 10526			v.AuxInt = i0
 10527			v.Aux = s
 10528			v.AddArg(p)
 10529			v.AddArg(w)
 10530			v.AddArg(mem)
 10531			return true
 10532		}
 10533		return false
 10534	}
 10535	func rewriteValuePPC64_OpPPC64MOVHstoreidx_0(v *Value) bool {
 10536		// match: (MOVHstoreidx ptr (MOVDconst [c]) val mem)
 10537		// cond: is16Bit(c)
 10538		// result: (MOVHstore [c] ptr val mem)
 10539		for {
 10540			mem := v.Args[3]
 10541			ptr := v.Args[0]
 10542			v_1 := v.Args[1]
 10543			if v_1.Op != OpPPC64MOVDconst {
 10544				break
 10545			}
 10546			c := v_1.AuxInt
 10547			val := v.Args[2]
 10548			if !(is16Bit(c)) {
 10549				break
 10550			}
 10551			v.reset(OpPPC64MOVHstore)
 10552			v.AuxInt = c
 10553			v.AddArg(ptr)
 10554			v.AddArg(val)
 10555			v.AddArg(mem)
 10556			return true
 10557		}
 10558		// match: (MOVHstoreidx (MOVDconst [c]) ptr val mem)
 10559		// cond: is16Bit(c)
 10560		// result: (MOVHstore [c] ptr val mem)
 10561		for {
 10562			mem := v.Args[3]
 10563			v_0 := v.Args[0]
 10564			if v_0.Op != OpPPC64MOVDconst {
 10565				break
 10566			}
 10567			c := v_0.AuxInt
 10568			ptr := v.Args[1]
 10569			val := v.Args[2]
 10570			if !(is16Bit(c)) {
 10571				break
 10572			}
 10573			v.reset(OpPPC64MOVHstore)
 10574			v.AuxInt = c
 10575			v.AddArg(ptr)
 10576			v.AddArg(val)
 10577			v.AddArg(mem)
 10578			return true
 10579		}
 10580		// match: (MOVHstoreidx [off] {sym} ptr idx (MOVHreg x) mem)
 10581		// cond:
 10582		// result: (MOVHstoreidx [off] {sym} ptr idx x mem)
 10583		for {
 10584			off := v.AuxInt
 10585			sym := v.Aux
 10586			mem := v.Args[3]
 10587			ptr := v.Args[0]
 10588			idx := v.Args[1]
 10589			v_2 := v.Args[2]
 10590			if v_2.Op != OpPPC64MOVHreg {
 10591				break
 10592			}
 10593			x := v_2.Args[0]
 10594			v.reset(OpPPC64MOVHstoreidx)
 10595			v.AuxInt = off
 10596			v.Aux = sym
 10597			v.AddArg(ptr)
 10598			v.AddArg(idx)
 10599			v.AddArg(x)
 10600			v.AddArg(mem)
 10601			return true
 10602		}
 10603		// match: (MOVHstoreidx [off] {sym} ptr idx (MOVHZreg x) mem)
 10604		// cond:
 10605		// result: (MOVHstoreidx [off] {sym} ptr idx x mem)
 10606		for {
 10607			off := v.AuxInt
 10608			sym := v.Aux
 10609			mem := v.Args[3]
 10610			ptr := v.Args[0]
 10611			idx := v.Args[1]
 10612			v_2 := v.Args[2]
 10613			if v_2.Op != OpPPC64MOVHZreg {
 10614				break
 10615			}
 10616			x := v_2.Args[0]
 10617			v.reset(OpPPC64MOVHstoreidx)
 10618			v.AuxInt = off
 10619			v.Aux = sym
 10620			v.AddArg(ptr)
 10621			v.AddArg(idx)
 10622			v.AddArg(x)
 10623			v.AddArg(mem)
 10624			return true
 10625		}
 10626		// match: (MOVHstoreidx [off] {sym} ptr idx (MOVWreg x) mem)
 10627		// cond:
 10628		// result: (MOVHstoreidx [off] {sym} ptr idx x mem)
 10629		for {
 10630			off := v.AuxInt
 10631			sym := v.Aux
 10632			mem := v.Args[3]
 10633			ptr := v.Args[0]
 10634			idx := v.Args[1]
 10635			v_2 := v.Args[2]
 10636			if v_2.Op != OpPPC64MOVWreg {
 10637				break
 10638			}
 10639			x := v_2.Args[0]
 10640			v.reset(OpPPC64MOVHstoreidx)
 10641			v.AuxInt = off
 10642			v.Aux = sym
 10643			v.AddArg(ptr)
 10644			v.AddArg(idx)
 10645			v.AddArg(x)
 10646			v.AddArg(mem)
 10647			return true
 10648		}
 10649		// match: (MOVHstoreidx [off] {sym} ptr idx (MOVWZreg x) mem)
 10650		// cond:
 10651		// result: (MOVHstoreidx [off] {sym} ptr idx x mem)
 10652		for {
 10653			off := v.AuxInt
 10654			sym := v.Aux
 10655			mem := v.Args[3]
 10656			ptr := v.Args[0]
 10657			idx := v.Args[1]
 10658			v_2 := v.Args[2]
 10659			if v_2.Op != OpPPC64MOVWZreg {
 10660				break
 10661			}
 10662			x := v_2.Args[0]
 10663			v.reset(OpPPC64MOVHstoreidx)
 10664			v.AuxInt = off
 10665			v.Aux = sym
 10666			v.AddArg(ptr)
 10667			v.AddArg(idx)
 10668			v.AddArg(x)
 10669			v.AddArg(mem)
 10670			return true
 10671		}
 10672		return false
 10673	}
 10674	func rewriteValuePPC64_OpPPC64MOVHstorezero_0(v *Value) bool {
 10675		// match: (MOVHstorezero [off1] {sym} (ADDconst [off2] x) mem)
 10676		// cond: is16Bit(off1+off2)
 10677		// result: (MOVHstorezero [off1+off2] {sym} x mem)
 10678		for {
 10679			off1 := v.AuxInt
 10680			sym := v.Aux
 10681			mem := v.Args[1]
 10682			v_0 := v.Args[0]
 10683			if v_0.Op != OpPPC64ADDconst {
 10684				break
 10685			}
 10686			off2 := v_0.AuxInt
 10687			x := v_0.Args[0]
 10688			if !(is16Bit(off1 + off2)) {
 10689				break
 10690			}
 10691			v.reset(OpPPC64MOVHstorezero)
 10692			v.AuxInt = off1 + off2
 10693			v.Aux = sym
 10694			v.AddArg(x)
 10695			v.AddArg(mem)
 10696			return true
 10697		}
 10698		// match: (MOVHstorezero [off1] {sym1} p:(MOVDaddr [off2] {sym2} x) mem)
 10699		// cond: canMergeSym(sym1,sym2) && (x.Op != OpSB || p.Uses == 1)
 10700		// result: (MOVHstorezero [off1+off2] {mergeSym(sym1,sym2)} x mem)
 10701		for {
 10702			off1 := v.AuxInt
 10703			sym1 := v.Aux
 10704			mem := v.Args[1]
 10705			p := v.Args[0]
 10706			if p.Op != OpPPC64MOVDaddr {
 10707				break
 10708			}
 10709			off2 := p.AuxInt
 10710			sym2 := p.Aux
 10711			x := p.Args[0]
 10712			if !(canMergeSym(sym1, sym2) && (x.Op != OpSB || p.Uses == 1)) {
 10713				break
 10714			}
 10715			v.reset(OpPPC64MOVHstorezero)
 10716			v.AuxInt = off1 + off2
 10717			v.Aux = mergeSym(sym1, sym2)
 10718			v.AddArg(x)
 10719			v.AddArg(mem)
 10720			return true
 10721		}
 10722		return false
 10723	}
 10724	func rewriteValuePPC64_OpPPC64MOVWBRstore_0(v *Value) bool {
 10725		// match: (MOVWBRstore {sym} ptr (MOVWreg x) mem)
 10726		// cond:
 10727		// result: (MOVWBRstore {sym} ptr x mem)
 10728		for {
 10729			sym := v.Aux
 10730			mem := v.Args[2]
 10731			ptr := v.Args[0]
 10732			v_1 := v.Args[1]
 10733			if v_1.Op != OpPPC64MOVWreg {
 10734				break
 10735			}
 10736			x := v_1.Args[0]
 10737			v.reset(OpPPC64MOVWBRstore)
 10738			v.Aux = sym
 10739			v.AddArg(ptr)
 10740			v.AddArg(x)
 10741			v.AddArg(mem)
 10742			return true
 10743		}
 10744		// match: (MOVWBRstore {sym} ptr (MOVWZreg x) mem)
 10745		// cond:
 10746		// result: (MOVWBRstore {sym} ptr x mem)
 10747		for {
 10748			sym := v.Aux
 10749			mem := v.Args[2]
 10750			ptr := v.Args[0]
 10751			v_1 := v.Args[1]
 10752			if v_1.Op != OpPPC64MOVWZreg {
 10753				break
 10754			}
 10755			x := v_1.Args[0]
 10756			v.reset(OpPPC64MOVWBRstore)
 10757			v.Aux = sym
 10758			v.AddArg(ptr)
 10759			v.AddArg(x)
 10760			v.AddArg(mem)
 10761			return true
 10762		}
 10763		return false
 10764	}
 10765	func rewriteValuePPC64_OpPPC64MOVWZload_0(v *Value) bool {
 10766		// match: (MOVWZload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
 10767		// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
 10768		// result: (MOVWZload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
 10769		for {
 10770			off1 := v.AuxInt
 10771			sym1 := v.Aux
 10772			mem := v.Args[1]
 10773			p := v.Args[0]
 10774			if p.Op != OpPPC64MOVDaddr {
 10775				break
 10776			}
 10777			off2 := p.AuxInt
 10778			sym2 := p.Aux
 10779			ptr := p.Args[0]
 10780			if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
 10781				break
 10782			}
 10783			v.reset(OpPPC64MOVWZload)
 10784			v.AuxInt = off1 + off2
 10785			v.Aux = mergeSym(sym1, sym2)
 10786			v.AddArg(ptr)
 10787			v.AddArg(mem)
 10788			return true
 10789		}
 10790		// match: (MOVWZload [off1] {sym} (ADDconst [off2] x) mem)
 10791		// cond: is16Bit(off1+off2)
 10792		// result: (MOVWZload [off1+off2] {sym} x mem)
 10793		for {
 10794			off1 := v.AuxInt
 10795			sym := v.Aux
 10796			mem := v.Args[1]
 10797			v_0 := v.Args[0]
 10798			if v_0.Op != OpPPC64ADDconst {
 10799				break
 10800			}
 10801			off2 := v_0.AuxInt
 10802			x := v_0.Args[0]
 10803			if !(is16Bit(off1 + off2)) {
 10804				break
 10805			}
 10806			v.reset(OpPPC64MOVWZload)
 10807			v.AuxInt = off1 + off2
 10808			v.Aux = sym
 10809			v.AddArg(x)
 10810			v.AddArg(mem)
 10811			return true
 10812		}
 10813		// match: (MOVWZload [0] {sym} p:(ADD ptr idx) mem)
 10814		// cond: sym == nil && p.Uses == 1
 10815		// result: (MOVWZloadidx ptr idx mem)
 10816		for {
 10817			if v.AuxInt != 0 {
 10818				break
 10819			}
 10820			sym := v.Aux
 10821			mem := v.Args[1]
 10822			p := v.Args[0]
 10823			if p.Op != OpPPC64ADD {
 10824				break
 10825			}
 10826			idx := p.Args[1]
 10827			ptr := p.Args[0]
 10828			if !(sym == nil && p.Uses == 1) {
 10829				break
 10830			}
 10831			v.reset(OpPPC64MOVWZloadidx)
 10832			v.AddArg(ptr)
 10833			v.AddArg(idx)
 10834			v.AddArg(mem)
 10835			return true
 10836		}
 10837		return false
 10838	}
 10839	func rewriteValuePPC64_OpPPC64MOVWZloadidx_0(v *Value) bool {
 10840		// match: (MOVWZloadidx ptr (MOVDconst [c]) mem)
 10841		// cond: is16Bit(c)
 10842		// result: (MOVWZload [c] ptr mem)
 10843		for {
 10844			mem := v.Args[2]
 10845			ptr := v.Args[0]
 10846			v_1 := v.Args[1]
 10847			if v_1.Op != OpPPC64MOVDconst {
 10848				break
 10849			}
 10850			c := v_1.AuxInt
 10851			if !(is16Bit(c)) {
 10852				break
 10853			}
 10854			v.reset(OpPPC64MOVWZload)
 10855			v.AuxInt = c
 10856			v.AddArg(ptr)
 10857			v.AddArg(mem)
 10858			return true
 10859		}
 10860		// match: (MOVWZloadidx (MOVDconst [c]) ptr mem)
 10861		// cond: is16Bit(c)
 10862		// result: (MOVWZload [c] ptr mem)
 10863		for {
 10864			mem := v.Args[2]
 10865			v_0 := v.Args[0]
 10866			if v_0.Op != OpPPC64MOVDconst {
 10867				break
 10868			}
 10869			c := v_0.AuxInt
 10870			ptr := v.Args[1]
 10871			if !(is16Bit(c)) {
 10872				break
 10873			}
 10874			v.reset(OpPPC64MOVWZload)
 10875			v.AuxInt = c
 10876			v.AddArg(ptr)
 10877			v.AddArg(mem)
 10878			return true
 10879		}
 10880		return false
 10881	}
 10882	func rewriteValuePPC64_OpPPC64MOVWZreg_0(v *Value) bool {
 10883		b := v.Block
 10884		typ := &b.Func.Config.Types
 10885		// match: (MOVWZreg y:(ANDconst [c] _))
 10886		// cond: uint64(c) <= 0xFFFFFFFF
 10887		// result: y
 10888		for {
 10889			y := v.Args[0]
 10890			if y.Op != OpPPC64ANDconst {
 10891				break
 10892			}
 10893			c := y.AuxInt
 10894			if !(uint64(c) <= 0xFFFFFFFF) {
 10895				break
 10896			}
 10897			v.reset(OpCopy)
 10898			v.Type = y.Type
 10899			v.AddArg(y)
 10900			return true
 10901		}
 10902		// match: (MOVWZreg y:(AND (MOVDconst [c]) _))
 10903		// cond: uint64(c) <= 0xFFFFFFFF
 10904		// result: y
 10905		for {
 10906			y := v.Args[0]
 10907			if y.Op != OpPPC64AND {
 10908				break
 10909			}
 10910			_ = y.Args[1]
 10911			y_0 := y.Args[0]
 10912			if y_0.Op != OpPPC64MOVDconst {
 10913				break
 10914			}
 10915			c := y_0.AuxInt
 10916			if !(uint64(c) <= 0xFFFFFFFF) {
 10917				break
 10918			}
 10919			v.reset(OpCopy)
 10920			v.Type = y.Type
 10921			v.AddArg(y)
 10922			return true
 10923		}
 10924		// match: (MOVWZreg y:(AND _ (MOVDconst [c])))
 10925		// cond: uint64(c) <= 0xFFFFFFFF
 10926		// result: y
 10927		for {
 10928			y := v.Args[0]
 10929			if y.Op != OpPPC64AND {
 10930				break
 10931			}
 10932			_ = y.Args[1]
 10933			y_1 := y.Args[1]
 10934			if y_1.Op != OpPPC64MOVDconst {
 10935				break
 10936			}
 10937			c := y_1.AuxInt
 10938			if !(uint64(c) <= 0xFFFFFFFF) {
 10939				break
 10940			}
 10941			v.reset(OpCopy)
 10942			v.Type = y.Type
 10943			v.AddArg(y)
 10944			return true
 10945		}
 10946		// match: (MOVWZreg (SRWconst [c] (MOVBZreg x)))
 10947		// cond:
 10948		// result: (SRWconst [c] (MOVBZreg x))
 10949		for {
 10950			v_0 := v.Args[0]
 10951			if v_0.Op != OpPPC64SRWconst {
 10952				break
 10953			}
 10954			c := v_0.AuxInt
 10955			v_0_0 := v_0.Args[0]
 10956			if v_0_0.Op != OpPPC64MOVBZreg {
 10957				break
 10958			}
 10959			x := v_0_0.Args[0]
 10960			v.reset(OpPPC64SRWconst)
 10961			v.AuxInt = c
 10962			v0 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
 10963			v0.AddArg(x)
 10964			v.AddArg(v0)
 10965			return true
 10966		}
 10967		// match: (MOVWZreg (SRWconst [c] (MOVHZreg x)))
 10968		// cond:
 10969		// result: (SRWconst [c] (MOVHZreg x))
 10970		for {
 10971			v_0 := v.Args[0]
 10972			if v_0.Op != OpPPC64SRWconst {
 10973				break
 10974			}
 10975			c := v_0.AuxInt
 10976			v_0_0 := v_0.Args[0]
 10977			if v_0_0.Op != OpPPC64MOVHZreg {
 10978				break
 10979			}
 10980			x := v_0_0.Args[0]
 10981			v.reset(OpPPC64SRWconst)
 10982			v.AuxInt = c
 10983			v0 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
 10984			v0.AddArg(x)
 10985			v.AddArg(v0)
 10986			return true
 10987		}
 10988		// match: (MOVWZreg (SRWconst [c] (MOVWZreg x)))
 10989		// cond:
 10990		// result: (SRWconst [c] (MOVWZreg x))
 10991		for {
 10992			v_0 := v.Args[0]
 10993			if v_0.Op != OpPPC64SRWconst {
 10994				break
 10995			}
 10996			c := v_0.AuxInt
 10997			v_0_0 := v_0.Args[0]
 10998			if v_0_0.Op != OpPPC64MOVWZreg {
 10999				break
 11000			}
 11001			x := v_0_0.Args[0]
 11002			v.reset(OpPPC64SRWconst)
 11003			v.AuxInt = c
 11004			v0 := b.NewValue0(v.Pos, OpPPC64MOVWZreg, typ.Int64)
 11005			v0.AddArg(x)
 11006			v.AddArg(v0)
 11007			return true
 11008		}
 11009		// match: (MOVWZreg (SRWconst [c] x))
 11010		// cond: sizeof(x.Type) <= 32
 11011		// result: (SRWconst [c] x)
 11012		for {
 11013			v_0 := v.Args[0]
 11014			if v_0.Op != OpPPC64SRWconst {
 11015				break
 11016			}
 11017			c := v_0.AuxInt
 11018			x := v_0.Args[0]
 11019			if !(sizeof(x.Type) <= 32) {
 11020				break
 11021			}
 11022			v.reset(OpPPC64SRWconst)
 11023			v.AuxInt = c
 11024			v.AddArg(x)
 11025			return true
 11026		}
 11027		// match: (MOVWZreg (SRDconst [c] x))
 11028		// cond: c>=32
 11029		// result: (SRDconst [c] x)
 11030		for {
 11031			v_0 := v.Args[0]
 11032			if v_0.Op != OpPPC64SRDconst {
 11033				break
 11034			}
 11035			c := v_0.AuxInt
 11036			x := v_0.Args[0]
 11037			if !(c >= 32) {
 11038				break
 11039			}
 11040			v.reset(OpPPC64SRDconst)
 11041			v.AuxInt = c
 11042			v.AddArg(x)
 11043			return true
 11044		}
 11045		// match: (MOVWZreg y:(MOVWZreg _))
 11046		// cond:
 11047		// result: y
 11048		for {
 11049			y := v.Args[0]
 11050			if y.Op != OpPPC64MOVWZreg {
 11051				break
 11052			}
 11053			v.reset(OpCopy)
 11054			v.Type = y.Type
 11055			v.AddArg(y)
 11056			return true
 11057		}
 11058		// match: (MOVWZreg y:(MOVHZreg _))
 11059		// cond:
 11060		// result: y
 11061		for {
 11062			y := v.Args[0]
 11063			if y.Op != OpPPC64MOVHZreg {
 11064				break
 11065			}
 11066			v.reset(OpCopy)
 11067			v.Type = y.Type
 11068			v.AddArg(y)
 11069			return true
 11070		}
 11071		return false
 11072	}
 11073	func rewriteValuePPC64_OpPPC64MOVWZreg_10(v *Value) bool {
 11074		// match: (MOVWZreg y:(MOVBZreg _))
 11075		// cond:
 11076		// result: y
 11077		for {
 11078			y := v.Args[0]
 11079			if y.Op != OpPPC64MOVBZreg {
 11080				break
 11081			}
 11082			v.reset(OpCopy)
 11083			v.Type = y.Type
 11084			v.AddArg(y)
 11085			return true
 11086		}
 11087		// match: (MOVWZreg y:(MOVHBRload _ _))
 11088		// cond:
 11089		// result: y
 11090		for {
 11091			y := v.Args[0]
 11092			if y.Op != OpPPC64MOVHBRload {
 11093				break
 11094			}
 11095			_ = y.Args[1]
 11096			v.reset(OpCopy)
 11097			v.Type = y.Type
 11098			v.AddArg(y)
 11099			return true
 11100		}
 11101		// match: (MOVWZreg y:(MOVWBRload _ _))
 11102		// cond:
 11103		// result: y
 11104		for {
 11105			y := v.Args[0]
 11106			if y.Op != OpPPC64MOVWBRload {
 11107				break
 11108			}
 11109			_ = y.Args[1]
 11110			v.reset(OpCopy)
 11111			v.Type = y.Type
 11112			v.AddArg(y)
 11113			return true
 11114		}
 11115		// match: (MOVWZreg y:(MOVWreg x))
 11116		// cond:
 11117		// result: (MOVWZreg x)
 11118		for {
 11119			y := v.Args[0]
 11120			if y.Op != OpPPC64MOVWreg {
 11121				break
 11122			}
 11123			x := y.Args[0]
 11124			v.reset(OpPPC64MOVWZreg)
 11125			v.AddArg(x)
 11126			return true
 11127		}
 11128		// match: (MOVWZreg x:(MOVBZload _ _))
 11129		// cond:
 11130		// result: x
 11131		for {
 11132			x := v.Args[0]
 11133			if x.Op != OpPPC64MOVBZload {
 11134				break
 11135			}
 11136			_ = x.Args[1]
 11137			v.reset(OpCopy)
 11138			v.Type = x.Type
 11139			v.AddArg(x)
 11140			return true
 11141		}
 11142		// match: (MOVWZreg x:(MOVBZloadidx _ _ _))
 11143		// cond:
 11144		// result: x
 11145		for {
 11146			x := v.Args[0]
 11147			if x.Op != OpPPC64MOVBZloadidx {
 11148				break
 11149			}
 11150			_ = x.Args[2]
 11151			v.reset(OpCopy)
 11152			v.Type = x.Type
 11153			v.AddArg(x)
 11154			return true
 11155		}
 11156		// match: (MOVWZreg x:(MOVHZload _ _))
 11157		// cond:
 11158		// result: x
 11159		for {
 11160			x := v.Args[0]
 11161			if x.Op != OpPPC64MOVHZload {
 11162				break
 11163			}
 11164			_ = x.Args[1]
 11165			v.reset(OpCopy)
 11166			v.Type = x.Type
 11167			v.AddArg(x)
 11168			return true
 11169		}
 11170		// match: (MOVWZreg x:(MOVHZloadidx _ _ _))
 11171		// cond:
 11172		// result: x
 11173		for {
 11174			x := v.Args[0]
 11175			if x.Op != OpPPC64MOVHZloadidx {
 11176				break
 11177			}
 11178			_ = x.Args[2]
 11179			v.reset(OpCopy)
 11180			v.Type = x.Type
 11181			v.AddArg(x)
 11182			return true
 11183		}
 11184		// match: (MOVWZreg x:(MOVWZload _ _))
 11185		// cond:
 11186		// result: x
 11187		for {
 11188			x := v.Args[0]
 11189			if x.Op != OpPPC64MOVWZload {
 11190				break
 11191			}
 11192			_ = x.Args[1]
 11193			v.reset(OpCopy)
 11194			v.Type = x.Type
 11195			v.AddArg(x)
 11196			return true
 11197		}
 11198		// match: (MOVWZreg x:(MOVWZloadidx _ _ _))
 11199		// cond:
 11200		// result: x
 11201		for {
 11202			x := v.Args[0]
 11203			if x.Op != OpPPC64MOVWZloadidx {
 11204				break
 11205			}
 11206			_ = x.Args[2]
 11207			v.reset(OpCopy)
 11208			v.Type = x.Type
 11209			v.AddArg(x)
 11210			return true
 11211		}
 11212		return false
 11213	}
 11214	func rewriteValuePPC64_OpPPC64MOVWZreg_20(v *Value) bool {
 11215		// match: (MOVWZreg x:(Arg <t>))
 11216		// cond: (is8BitInt(t) || is16BitInt(t) || is32BitInt(t)) && !isSigned(t)
 11217		// result: x
 11218		for {
 11219			x := v.Args[0]
 11220			if x.Op != OpArg {
 11221				break
 11222			}
 11223			t := x.Type
 11224			if !((is8BitInt(t) || is16BitInt(t) || is32BitInt(t)) && !isSigned(t)) {
 11225				break
 11226			}
 11227			v.reset(OpCopy)
 11228			v.Type = x.Type
 11229			v.AddArg(x)
 11230			return true
 11231		}
 11232		// match: (MOVWZreg (MOVDconst [c]))
 11233		// cond:
 11234		// result: (MOVDconst [int64(uint32(c))])
 11235		for {
 11236			v_0 := v.Args[0]
 11237			if v_0.Op != OpPPC64MOVDconst {
 11238				break
 11239			}
 11240			c := v_0.AuxInt
 11241			v.reset(OpPPC64MOVDconst)
 11242			v.AuxInt = int64(uint32(c))
 11243			return true
 11244		}
 11245		return false
 11246	}
 11247	func rewriteValuePPC64_OpPPC64MOVWload_0(v *Value) bool {
 11248		// match: (MOVWload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
 11249		// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
 11250		// result: (MOVWload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
 11251		for {
 11252			off1 := v.AuxInt
 11253			sym1 := v.Aux
 11254			mem := v.Args[1]
 11255			p := v.Args[0]
 11256			if p.Op != OpPPC64MOVDaddr {
 11257				break
 11258			}
 11259			off2 := p.AuxInt
 11260			sym2 := p.Aux
 11261			ptr := p.Args[0]
 11262			if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
 11263				break
 11264			}
 11265			v.reset(OpPPC64MOVWload)
 11266			v.AuxInt = off1 + off2
 11267			v.Aux = mergeSym(sym1, sym2)
 11268			v.AddArg(ptr)
 11269			v.AddArg(mem)
 11270			return true
 11271		}
 11272		// match: (MOVWload [off1] {sym} (ADDconst [off2] x) mem)
 11273		// cond: is16Bit(off1+off2)
 11274		// result: (MOVWload [off1+off2] {sym} x mem)
 11275		for {
 11276			off1 := v.AuxInt
 11277			sym := v.Aux
 11278			mem := v.Args[1]
 11279			v_0 := v.Args[0]
 11280			if v_0.Op != OpPPC64ADDconst {
 11281				break
 11282			}
 11283			off2 := v_0.AuxInt
 11284			x := v_0.Args[0]
 11285			if !(is16Bit(off1 + off2)) {
 11286				break
 11287			}
 11288			v.reset(OpPPC64MOVWload)
 11289			v.AuxInt = off1 + off2
 11290			v.Aux = sym
 11291			v.AddArg(x)
 11292			v.AddArg(mem)
 11293			return true
 11294		}
 11295		// match: (MOVWload [0] {sym} p:(ADD ptr idx) mem)
 11296		// cond: sym == nil && p.Uses == 1
 11297		// result: (MOVWloadidx ptr idx mem)
 11298		for {
 11299			if v.AuxInt != 0 {
 11300				break
 11301			}
 11302			sym := v.Aux
 11303			mem := v.Args[1]
 11304			p := v.Args[0]
 11305			if p.Op != OpPPC64ADD {
 11306				break
 11307			}
 11308			idx := p.Args[1]
 11309			ptr := p.Args[0]
 11310			if !(sym == nil && p.Uses == 1) {
 11311				break
 11312			}
 11313			v.reset(OpPPC64MOVWloadidx)
 11314			v.AddArg(ptr)
 11315			v.AddArg(idx)
 11316			v.AddArg(mem)
 11317			return true
 11318		}
 11319		return false
 11320	}
 11321	func rewriteValuePPC64_OpPPC64MOVWloadidx_0(v *Value) bool {
 11322		// match: (MOVWloadidx ptr (MOVDconst [c]) mem)
 11323		// cond: is16Bit(c)
 11324		// result: (MOVWload [c] ptr mem)
 11325		for {
 11326			mem := v.Args[2]
 11327			ptr := v.Args[0]
 11328			v_1 := v.Args[1]
 11329			if v_1.Op != OpPPC64MOVDconst {
 11330				break
 11331			}
 11332			c := v_1.AuxInt
 11333			if !(is16Bit(c)) {
 11334				break
 11335			}
 11336			v.reset(OpPPC64MOVWload)
 11337			v.AuxInt = c
 11338			v.AddArg(ptr)
 11339			v.AddArg(mem)
 11340			return true
 11341		}
 11342		// match: (MOVWloadidx (MOVDconst [c]) ptr mem)
 11343		// cond: is16Bit(c)
 11344		// result: (MOVWload [c] ptr mem)
 11345		for {
 11346			mem := v.Args[2]
 11347			v_0 := v.Args[0]
 11348			if v_0.Op != OpPPC64MOVDconst {
 11349				break
 11350			}
 11351			c := v_0.AuxInt
 11352			ptr := v.Args[1]
 11353			if !(is16Bit(c)) {
 11354				break
 11355			}
 11356			v.reset(OpPPC64MOVWload)
 11357			v.AuxInt = c
 11358			v.AddArg(ptr)
 11359			v.AddArg(mem)
 11360			return true
 11361		}
 11362		return false
 11363	}
 11364	func rewriteValuePPC64_OpPPC64MOVWreg_0(v *Value) bool {
 11365		b := v.Block
 11366		typ := &b.Func.Config.Types
 11367		// match: (MOVWreg y:(ANDconst [c] _))
 11368		// cond: uint64(c) <= 0xFFFF
 11369		// result: y
 11370		for {
 11371			y := v.Args[0]
 11372			if y.Op != OpPPC64ANDconst {
 11373				break
 11374			}
 11375			c := y.AuxInt
 11376			if !(uint64(c) <= 0xFFFF) {
 11377				break
 11378			}
 11379			v.reset(OpCopy)
 11380			v.Type = y.Type
 11381			v.AddArg(y)
 11382			return true
 11383		}
 11384		// match: (MOVWreg y:(AND (MOVDconst [c]) _))
 11385		// cond: uint64(c) <= 0x7FFFFFFF
 11386		// result: y
 11387		for {
 11388			y := v.Args[0]
 11389			if y.Op != OpPPC64AND {
 11390				break
 11391			}
 11392			_ = y.Args[1]
 11393			y_0 := y.Args[0]
 11394			if y_0.Op != OpPPC64MOVDconst {
 11395				break
 11396			}
 11397			c := y_0.AuxInt
 11398			if !(uint64(c) <= 0x7FFFFFFF) {
 11399				break
 11400			}
 11401			v.reset(OpCopy)
 11402			v.Type = y.Type
 11403			v.AddArg(y)
 11404			return true
 11405		}
 11406		// match: (MOVWreg y:(AND _ (MOVDconst [c])))
 11407		// cond: uint64(c) <= 0x7FFFFFFF
 11408		// result: y
 11409		for {
 11410			y := v.Args[0]
 11411			if y.Op != OpPPC64AND {
 11412				break
 11413			}
 11414			_ = y.Args[1]
 11415			y_1 := y.Args[1]
 11416			if y_1.Op != OpPPC64MOVDconst {
 11417				break
 11418			}
 11419			c := y_1.AuxInt
 11420			if !(uint64(c) <= 0x7FFFFFFF) {
 11421				break
 11422			}
 11423			v.reset(OpCopy)
 11424			v.Type = y.Type
 11425			v.AddArg(y)
 11426			return true
 11427		}
 11428		// match: (MOVWreg (SRAWconst [c] (MOVBreg x)))
 11429		// cond:
 11430		// result: (SRAWconst [c] (MOVBreg x))
 11431		for {
 11432			v_0 := v.Args[0]
 11433			if v_0.Op != OpPPC64SRAWconst {
 11434				break
 11435			}
 11436			c := v_0.AuxInt
 11437			v_0_0 := v_0.Args[0]
 11438			if v_0_0.Op != OpPPC64MOVBreg {
 11439				break
 11440			}
 11441			x := v_0_0.Args[0]
 11442			v.reset(OpPPC64SRAWconst)
 11443			v.AuxInt = c
 11444			v0 := b.NewValue0(v.Pos, OpPPC64MOVBreg, typ.Int64)
 11445			v0.AddArg(x)
 11446			v.AddArg(v0)
 11447			return true
 11448		}
 11449		// match: (MOVWreg (SRAWconst [c] (MOVHreg x)))
 11450		// cond:
 11451		// result: (SRAWconst [c] (MOVHreg x))
 11452		for {
 11453			v_0 := v.Args[0]
 11454			if v_0.Op != OpPPC64SRAWconst {
 11455				break
 11456			}
 11457			c := v_0.AuxInt
 11458			v_0_0 := v_0.Args[0]
 11459			if v_0_0.Op != OpPPC64MOVHreg {
 11460				break
 11461			}
 11462			x := v_0_0.Args[0]
 11463			v.reset(OpPPC64SRAWconst)
 11464			v.AuxInt = c
 11465			v0 := b.NewValue0(v.Pos, OpPPC64MOVHreg, typ.Int64)
 11466			v0.AddArg(x)
 11467			v.AddArg(v0)
 11468			return true
 11469		}
 11470		// match: (MOVWreg (SRAWconst [c] (MOVWreg x)))
 11471		// cond:
 11472		// result: (SRAWconst [c] (MOVWreg x))
 11473		for {
 11474			v_0 := v.Args[0]
 11475			if v_0.Op != OpPPC64SRAWconst {
 11476				break
 11477			}
 11478			c := v_0.AuxInt
 11479			v_0_0 := v_0.Args[0]
 11480			if v_0_0.Op != OpPPC64MOVWreg {
 11481				break
 11482			}
 11483			x := v_0_0.Args[0]
 11484			v.reset(OpPPC64SRAWconst)
 11485			v.AuxInt = c
 11486			v0 := b.NewValue0(v.Pos, OpPPC64MOVWreg, typ.Int64)
 11487			v0.AddArg(x)
 11488			v.AddArg(v0)
 11489			return true
 11490		}
 11491		// match: (MOVWreg (SRAWconst [c] x))
 11492		// cond: sizeof(x.Type) <= 32
 11493		// result: (SRAWconst [c] x)
 11494		for {
 11495			v_0 := v.Args[0]
 11496			if v_0.Op != OpPPC64SRAWconst {
 11497				break
 11498			}
 11499			c := v_0.AuxInt
 11500			x := v_0.Args[0]
 11501			if !(sizeof(x.Type) <= 32) {
 11502				break
 11503			}
 11504			v.reset(OpPPC64SRAWconst)
 11505			v.AuxInt = c
 11506			v.AddArg(x)
 11507			return true
 11508		}
 11509		// match: (MOVWreg (SRDconst [c] x))
 11510		// cond: c>32
 11511		// result: (SRDconst [c] x)
 11512		for {
 11513			v_0 := v.Args[0]
 11514			if v_0.Op != OpPPC64SRDconst {
 11515				break
 11516			}
 11517			c := v_0.AuxInt
 11518			x := v_0.Args[0]
 11519			if !(c > 32) {
 11520				break
 11521			}
 11522			v.reset(OpPPC64SRDconst)
 11523			v.AuxInt = c
 11524			v.AddArg(x)
 11525			return true
 11526		}
 11527		// match: (MOVWreg (SRDconst [c] x))
 11528		// cond: c==32
 11529		// result: (SRADconst [c] x)
 11530		for {
 11531			v_0 := v.Args[0]
 11532			if v_0.Op != OpPPC64SRDconst {
 11533				break
 11534			}
 11535			c := v_0.AuxInt
 11536			x := v_0.Args[0]
 11537			if !(c == 32) {
 11538				break
 11539			}
 11540			v.reset(OpPPC64SRADconst)
 11541			v.AuxInt = c
 11542			v.AddArg(x)
 11543			return true
 11544		}
 11545		// match: (MOVWreg y:(MOVWreg _))
 11546		// cond:
 11547		// result: y
 11548		for {
 11549			y := v.Args[0]
 11550			if y.Op != OpPPC64MOVWreg {
 11551				break
 11552			}
 11553			v.reset(OpCopy)
 11554			v.Type = y.Type
 11555			v.AddArg(y)
 11556			return true
 11557		}
 11558		return false
 11559	}
 11560	func rewriteValuePPC64_OpPPC64MOVWreg_10(v *Value) bool {
 11561		// match: (MOVWreg y:(MOVHreg _))
 11562		// cond:
 11563		// result: y
 11564		for {
 11565			y := v.Args[0]
 11566			if y.Op != OpPPC64MOVHreg {
 11567				break
 11568			}
 11569			v.reset(OpCopy)
 11570			v.Type = y.Type
 11571			v.AddArg(y)
 11572			return true
 11573		}
 11574		// match: (MOVWreg y:(MOVBreg _))
 11575		// cond:
 11576		// result: y
 11577		for {
 11578			y := v.Args[0]
 11579			if y.Op != OpPPC64MOVBreg {
 11580				break
 11581			}
 11582			v.reset(OpCopy)
 11583			v.Type = y.Type
 11584			v.AddArg(y)
 11585			return true
 11586		}
 11587		// match: (MOVWreg y:(MOVWZreg x))
 11588		// cond:
 11589		// result: (MOVWreg x)
 11590		for {
 11591			y := v.Args[0]
 11592			if y.Op != OpPPC64MOVWZreg {
 11593				break
 11594			}
 11595			x := y.Args[0]
 11596			v.reset(OpPPC64MOVWreg)
 11597			v.AddArg(x)
 11598			return true
 11599		}
 11600		// match: (MOVWreg x:(MOVHload _ _))
 11601		// cond:
 11602		// result: x
 11603		for {
 11604			x := v.Args[0]
 11605			if x.Op != OpPPC64MOVHload {
 11606				break
 11607			}
 11608			_ = x.Args[1]
 11609			v.reset(OpCopy)
 11610			v.Type = x.Type
 11611			v.AddArg(x)
 11612			return true
 11613		}
 11614		// match: (MOVWreg x:(MOVHloadidx _ _ _))
 11615		// cond:
 11616		// result: x
 11617		for {
 11618			x := v.Args[0]
 11619			if x.Op != OpPPC64MOVHloadidx {
 11620				break
 11621			}
 11622			_ = x.Args[2]
 11623			v.reset(OpCopy)
 11624			v.Type = x.Type
 11625			v.AddArg(x)
 11626			return true
 11627		}
 11628		// match: (MOVWreg x:(MOVWload _ _))
 11629		// cond:
 11630		// result: x
 11631		for {
 11632			x := v.Args[0]
 11633			if x.Op != OpPPC64MOVWload {
 11634				break
 11635			}
 11636			_ = x.Args[1]
 11637			v.reset(OpCopy)
 11638			v.Type = x.Type
 11639			v.AddArg(x)
 11640			return true
 11641		}
 11642		// match: (MOVWreg x:(MOVWloadidx _ _ _))
 11643		// cond:
 11644		// result: x
 11645		for {
 11646			x := v.Args[0]
 11647			if x.Op != OpPPC64MOVWloadidx {
 11648				break
 11649			}
 11650			_ = x.Args[2]
 11651			v.reset(OpCopy)
 11652			v.Type = x.Type
 11653			v.AddArg(x)
 11654			return true
 11655		}
 11656		// match: (MOVWreg x:(Arg <t>))
 11657		// cond: (is8BitInt(t) || is16BitInt(t) || is32BitInt(t)) && isSigned(t)
 11658		// result: x
 11659		for {
 11660			x := v.Args[0]
 11661			if x.Op != OpArg {
 11662				break
 11663			}
 11664			t := x.Type
 11665			if !((is8BitInt(t) || is16BitInt(t) || is32BitInt(t)) && isSigned(t)) {
 11666				break
 11667			}
 11668			v.reset(OpCopy)
 11669			v.Type = x.Type
 11670			v.AddArg(x)
 11671			return true
 11672		}
 11673		// match: (MOVWreg (MOVDconst [c]))
 11674		// cond:
 11675		// result: (MOVDconst [int64(int32(c))])
 11676		for {
 11677			v_0 := v.Args[0]
 11678			if v_0.Op != OpPPC64MOVDconst {
 11679				break
 11680			}
 11681			c := v_0.AuxInt
 11682			v.reset(OpPPC64MOVDconst)
 11683			v.AuxInt = int64(int32(c))
 11684			return true
 11685		}
 11686		return false
 11687	}
 11688	func rewriteValuePPC64_OpPPC64MOVWstore_0(v *Value) bool {
 11689		// match: (MOVWstore [off1] {sym} (ADDconst [off2] x) val mem)
 11690		// cond: is16Bit(off1+off2)
 11691		// result: (MOVWstore [off1+off2] {sym} x val mem)
 11692		for {
 11693			off1 := v.AuxInt
 11694			sym := v.Aux
 11695			mem := v.Args[2]
 11696			v_0 := v.Args[0]
 11697			if v_0.Op != OpPPC64ADDconst {
 11698				break
 11699			}
 11700			off2 := v_0.AuxInt
 11701			x := v_0.Args[0]
 11702			val := v.Args[1]
 11703			if !(is16Bit(off1 + off2)) {
 11704				break
 11705			}
 11706			v.reset(OpPPC64MOVWstore)
 11707			v.AuxInt = off1 + off2
 11708			v.Aux = sym
 11709			v.AddArg(x)
 11710			v.AddArg(val)
 11711			v.AddArg(mem)
 11712			return true
 11713		}
 11714		// match: (MOVWstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem)
 11715		// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
 11716		// result: (MOVWstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
 11717		for {
 11718			off1 := v.AuxInt
 11719			sym1 := v.Aux
 11720			mem := v.Args[2]
 11721			p := v.Args[0]
 11722			if p.Op != OpPPC64MOVDaddr {
 11723				break
 11724			}
 11725			off2 := p.AuxInt
 11726			sym2 := p.Aux
 11727			ptr := p.Args[0]
 11728			val := v.Args[1]
 11729			if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
 11730				break
 11731			}
 11732			v.reset(OpPPC64MOVWstore)
 11733			v.AuxInt = off1 + off2
 11734			v.Aux = mergeSym(sym1, sym2)
 11735			v.AddArg(ptr)
 11736			v.AddArg(val)
 11737			v.AddArg(mem)
 11738			return true
 11739		}
 11740		// match: (MOVWstore [off] {sym} ptr (MOVDconst [0]) mem)
 11741		// cond:
 11742		// result: (MOVWstorezero [off] {sym} ptr mem)
 11743		for {
 11744			off := v.AuxInt
 11745			sym := v.Aux
 11746			mem := v.Args[2]
 11747			ptr := v.Args[0]
 11748			v_1 := v.Args[1]
 11749			if v_1.Op != OpPPC64MOVDconst {
 11750				break
 11751			}
 11752			if v_1.AuxInt != 0 {
 11753				break
 11754			}
 11755			v.reset(OpPPC64MOVWstorezero)
 11756			v.AuxInt = off
 11757			v.Aux = sym
 11758			v.AddArg(ptr)
 11759			v.AddArg(mem)
 11760			return true
 11761		}
 11762		// match: (MOVWstore [off] {sym} p:(ADD ptr idx) val mem)
 11763		// cond: off == 0 && sym == nil && p.Uses == 1
 11764		// result: (MOVWstoreidx ptr idx val mem)
 11765		for {
 11766			off := v.AuxInt
 11767			sym := v.Aux
 11768			mem := v.Args[2]
 11769			p := v.Args[0]
 11770			if p.Op != OpPPC64ADD {
 11771				break
 11772			}
 11773			idx := p.Args[1]
 11774			ptr := p.Args[0]
 11775			val := v.Args[1]
 11776			if !(off == 0 && sym == nil && p.Uses == 1) {
 11777				break
 11778			}
 11779			v.reset(OpPPC64MOVWstoreidx)
 11780			v.AddArg(ptr)
 11781			v.AddArg(idx)
 11782			v.AddArg(val)
 11783			v.AddArg(mem)
 11784			return true
 11785		}
 11786		// match: (MOVWstore [off] {sym} ptr (MOVWreg x) mem)
 11787		// cond:
 11788		// result: (MOVWstore [off] {sym} ptr x mem)
 11789		for {
 11790			off := v.AuxInt
 11791			sym := v.Aux
 11792			mem := v.Args[2]
 11793			ptr := v.Args[0]
 11794			v_1 := v.Args[1]
 11795			if v_1.Op != OpPPC64MOVWreg {
 11796				break
 11797			}
 11798			x := v_1.Args[0]
 11799			v.reset(OpPPC64MOVWstore)
 11800			v.AuxInt = off
 11801			v.Aux = sym
 11802			v.AddArg(ptr)
 11803			v.AddArg(x)
 11804			v.AddArg(mem)
 11805			return true
 11806		}
 11807		// match: (MOVWstore [off] {sym} ptr (MOVWZreg x) mem)
 11808		// cond:
 11809		// result: (MOVWstore [off] {sym} ptr x mem)
 11810		for {
 11811			off := v.AuxInt
 11812			sym := v.Aux
 11813			mem := v.Args[2]
 11814			ptr := v.Args[0]
 11815			v_1 := v.Args[1]
 11816			if v_1.Op != OpPPC64MOVWZreg {
 11817				break
 11818			}
 11819			x := v_1.Args[0]
 11820			v.reset(OpPPC64MOVWstore)
 11821			v.AuxInt = off
 11822			v.Aux = sym
 11823			v.AddArg(ptr)
 11824			v.AddArg(x)
 11825			v.AddArg(mem)
 11826			return true
 11827		}
 11828		return false
 11829	}
 11830	func rewriteValuePPC64_OpPPC64MOVWstoreidx_0(v *Value) bool {
 11831		// match: (MOVWstoreidx ptr (MOVDconst [c]) val mem)
 11832		// cond: is16Bit(c)
 11833		// result: (MOVWstore [c] ptr val mem)
 11834		for {
 11835			mem := v.Args[3]
 11836			ptr := v.Args[0]
 11837			v_1 := v.Args[1]
 11838			if v_1.Op != OpPPC64MOVDconst {
 11839				break
 11840			}
 11841			c := v_1.AuxInt
 11842			val := v.Args[2]
 11843			if !(is16Bit(c)) {
 11844				break
 11845			}
 11846			v.reset(OpPPC64MOVWstore)
 11847			v.AuxInt = c
 11848			v.AddArg(ptr)
 11849			v.AddArg(val)
 11850			v.AddArg(mem)
 11851			return true
 11852		}
 11853		// match: (MOVWstoreidx (MOVDconst [c]) ptr val mem)
 11854		// cond: is16Bit(c)
 11855		// result: (MOVWstore [c] ptr val mem)
 11856		for {
 11857			mem := v.Args[3]
 11858			v_0 := v.Args[0]
 11859			if v_0.Op != OpPPC64MOVDconst {
 11860				break
 11861			}
 11862			c := v_0.AuxInt
 11863			ptr := v.Args[1]
 11864			val := v.Args[2]
 11865			if !(is16Bit(c)) {
 11866				break
 11867			}
 11868			v.reset(OpPPC64MOVWstore)
 11869			v.AuxInt = c
 11870			v.AddArg(ptr)
 11871			v.AddArg(val)
 11872			v.AddArg(mem)
 11873			return true
 11874		}
 11875		// match: (MOVWstoreidx [off] {sym} ptr idx (MOVWreg x) mem)
 11876		// cond:
 11877		// result: (MOVWstoreidx [off] {sym} ptr idx x mem)
 11878		for {
 11879			off := v.AuxInt
 11880			sym := v.Aux
 11881			mem := v.Args[3]
 11882			ptr := v.Args[0]
 11883			idx := v.Args[1]
 11884			v_2 := v.Args[2]
 11885			if v_2.Op != OpPPC64MOVWreg {
 11886				break
 11887			}
 11888			x := v_2.Args[0]
 11889			v.reset(OpPPC64MOVWstoreidx)
 11890			v.AuxInt = off
 11891			v.Aux = sym
 11892			v.AddArg(ptr)
 11893			v.AddArg(idx)
 11894			v.AddArg(x)
 11895			v.AddArg(mem)
 11896			return true
 11897		}
 11898		// match: (MOVWstoreidx [off] {sym} ptr idx (MOVWZreg x) mem)
 11899		// cond:
 11900		// result: (MOVWstoreidx [off] {sym} ptr idx x mem)
 11901		for {
 11902			off := v.AuxInt
 11903			sym := v.Aux
 11904			mem := v.Args[3]
 11905			ptr := v.Args[0]
 11906			idx := v.Args[1]
 11907			v_2 := v.Args[2]
 11908			if v_2.Op != OpPPC64MOVWZreg {
 11909				break
 11910			}
 11911			x := v_2.Args[0]
 11912			v.reset(OpPPC64MOVWstoreidx)
 11913			v.AuxInt = off
 11914			v.Aux = sym
 11915			v.AddArg(ptr)
 11916			v.AddArg(idx)
 11917			v.AddArg(x)
 11918			v.AddArg(mem)
 11919			return true
 11920		}
 11921		return false
 11922	}
 11923	func rewriteValuePPC64_OpPPC64MOVWstorezero_0(v *Value) bool {
 11924		// match: (MOVWstorezero [off1] {sym} (ADDconst [off2] x) mem)
 11925		// cond: is16Bit(off1+off2)
 11926		// result: (MOVWstorezero [off1+off2] {sym} x mem)
 11927		for {
 11928			off1 := v.AuxInt
 11929			sym := v.Aux
 11930			mem := v.Args[1]
 11931			v_0 := v.Args[0]
 11932			if v_0.Op != OpPPC64ADDconst {
 11933				break
 11934			}
 11935			off2 := v_0.AuxInt
 11936			x := v_0.Args[0]
 11937			if !(is16Bit(off1 + off2)) {
 11938				break
 11939			}
 11940			v.reset(OpPPC64MOVWstorezero)
 11941			v.AuxInt = off1 + off2
 11942			v.Aux = sym
 11943			v.AddArg(x)
 11944			v.AddArg(mem)
 11945			return true
 11946		}
 11947		// match: (MOVWstorezero [off1] {sym1} p:(MOVDaddr [off2] {sym2} x) mem)
 11948		// cond: canMergeSym(sym1,sym2) && (x.Op != OpSB || p.Uses == 1)
 11949		// result: (MOVWstorezero [off1+off2] {mergeSym(sym1,sym2)} x mem)
 11950		for {
 11951			off1 := v.AuxInt
 11952			sym1 := v.Aux
 11953			mem := v.Args[1]
 11954			p := v.Args[0]
 11955			if p.Op != OpPPC64MOVDaddr {
 11956				break
 11957			}
 11958			off2 := p.AuxInt
 11959			sym2 := p.Aux
 11960			x := p.Args[0]
 11961			if !(canMergeSym(sym1, sym2) && (x.Op != OpSB || p.Uses == 1)) {
 11962				break
 11963			}
 11964			v.reset(OpPPC64MOVWstorezero)
 11965			v.AuxInt = off1 + off2
 11966			v.Aux = mergeSym(sym1, sym2)
 11967			v.AddArg(x)
 11968			v.AddArg(mem)
 11969			return true
 11970		}
 11971		return false
 11972	}
 11973	func rewriteValuePPC64_OpPPC64MTVSRD_0(v *Value) bool {
 11974		b := v.Block
 11975		typ := &b.Func.Config.Types
 11976		// match: (MTVSRD (MOVDconst [c]))
 11977		// cond:
 11978		// result: (FMOVDconst [c])
 11979		for {
 11980			v_0 := v.Args[0]
 11981			if v_0.Op != OpPPC64MOVDconst {
 11982				break
 11983			}
 11984			c := v_0.AuxInt
 11985			v.reset(OpPPC64FMOVDconst)
 11986			v.AuxInt = c
 11987			return true
 11988		}
 11989		// match: (MTVSRD x:(MOVDload [off] {sym} ptr mem))
 11990		// cond: x.Uses == 1 && clobber(x)
 11991		// result: @x.Block (FMOVDload [off] {sym} ptr mem)
 11992		for {
 11993			x := v.Args[0]
 11994			if x.Op != OpPPC64MOVDload {
 11995				break
 11996			}
 11997			off := x.AuxInt
 11998			sym := x.Aux
 11999			mem := x.Args[1]
 12000			ptr := x.Args[0]
 12001			if !(x.Uses == 1 && clobber(x)) {
 12002				break
 12003			}
 12004			b = x.Block
 12005			v0 := b.NewValue0(x.Pos, OpPPC64FMOVDload, typ.Float64)
 12006			v.reset(OpCopy)
 12007			v.AddArg(v0)
 12008			v0.AuxInt = off
 12009			v0.Aux = sym
 12010			v0.AddArg(ptr)
 12011			v0.AddArg(mem)
 12012			return true
 12013		}
 12014		return false
 12015	}
 12016	func rewriteValuePPC64_OpPPC64MaskIfNotCarry_0(v *Value) bool {
 12017		// match: (MaskIfNotCarry (ADDconstForCarry [c] (ANDconst [d] _)))
 12018		// cond: c < 0 && d > 0 && c + d < 0
 12019		// result: (MOVDconst [-1])
 12020		for {
 12021			v_0 := v.Args[0]
 12022			if v_0.Op != OpPPC64ADDconstForCarry {
 12023				break
 12024			}
 12025			c := v_0.AuxInt
 12026			v_0_0 := v_0.Args[0]
 12027			if v_0_0.Op != OpPPC64ANDconst {
 12028				break
 12029			}
 12030			d := v_0_0.AuxInt
 12031			if !(c < 0 && d > 0 && c+d < 0) {
 12032				break
 12033			}
 12034			v.reset(OpPPC64MOVDconst)
 12035			v.AuxInt = -1
 12036			return true
 12037		}
 12038		return false
 12039	}
 12040	func rewriteValuePPC64_OpPPC64NotEqual_0(v *Value) bool {
 12041		// match: (NotEqual (FlagEQ))
 12042		// cond:
 12043		// result: (MOVDconst [0])
 12044		for {
 12045			v_0 := v.Args[0]
 12046			if v_0.Op != OpPPC64FlagEQ {
 12047				break
 12048			}
 12049			v.reset(OpPPC64MOVDconst)
 12050			v.AuxInt = 0
 12051			return true
 12052		}
 12053		// match: (NotEqual (FlagLT))
 12054		// cond:
 12055		// result: (MOVDconst [1])
 12056		for {
 12057			v_0 := v.Args[0]
 12058			if v_0.Op != OpPPC64FlagLT {
 12059				break
 12060			}
 12061			v.reset(OpPPC64MOVDconst)
 12062			v.AuxInt = 1
 12063			return true
 12064		}
 12065		// match: (NotEqual (FlagGT))
 12066		// cond:
 12067		// result: (MOVDconst [1])
 12068		for {
 12069			v_0 := v.Args[0]
 12070			if v_0.Op != OpPPC64FlagGT {
 12071				break
 12072			}
 12073			v.reset(OpPPC64MOVDconst)
 12074			v.AuxInt = 1
 12075			return true
 12076		}
 12077		// match: (NotEqual (InvertFlags x))
 12078		// cond:
 12079		// result: (NotEqual x)
 12080		for {
 12081			v_0 := v.Args[0]
 12082			if v_0.Op != OpPPC64InvertFlags {
 12083				break
 12084			}
 12085			x := v_0.Args[0]
 12086			v.reset(OpPPC64NotEqual)
 12087			v.AddArg(x)
 12088			return true
 12089		}
 12090		return false
 12091	}
 12092	func rewriteValuePPC64_OpPPC64OR_0(v *Value) bool {
 12093		b := v.Block
 12094		typ := &b.Func.Config.Types
 12095		// match: (OR (SLDconst x [c]) (SRDconst x [d]))
 12096		// cond: d == 64-c
 12097		// result: (ROTLconst [c] x)
 12098		for {
 12099			_ = v.Args[1]
 12100			v_0 := v.Args[0]
 12101			if v_0.Op != OpPPC64SLDconst {
 12102				break
 12103			}
 12104			c := v_0.AuxInt
 12105			x := v_0.Args[0]
 12106			v_1 := v.Args[1]
 12107			if v_1.Op != OpPPC64SRDconst {
 12108				break
 12109			}
 12110			d := v_1.AuxInt
 12111			if x != v_1.Args[0] {
 12112				break
 12113			}
 12114			if !(d == 64-c) {
 12115				break
 12116			}
 12117			v.reset(OpPPC64ROTLconst)
 12118			v.AuxInt = c
 12119			v.AddArg(x)
 12120			return true
 12121		}
 12122		// match: (OR (SRDconst x [d]) (SLDconst x [c]))
 12123		// cond: d == 64-c
 12124		// result: (ROTLconst [c] x)
 12125		for {
 12126			_ = v.Args[1]
 12127			v_0 := v.Args[0]
 12128			if v_0.Op != OpPPC64SRDconst {
 12129				break
 12130			}
 12131			d := v_0.AuxInt
 12132			x := v_0.Args[0]
 12133			v_1 := v.Args[1]
 12134			if v_1.Op != OpPPC64SLDconst {
 12135				break
 12136			}
 12137			c := v_1.AuxInt
 12138			if x != v_1.Args[0] {
 12139				break
 12140			}
 12141			if !(d == 64-c) {
 12142				break
 12143			}
 12144			v.reset(OpPPC64ROTLconst)
 12145			v.AuxInt = c
 12146			v.AddArg(x)
 12147			return true
 12148		}
 12149		// match: (OR (SLWconst x [c]) (SRWconst x [d]))
 12150		// cond: d == 32-c
 12151		// result: (ROTLWconst [c] x)
 12152		for {
 12153			_ = v.Args[1]
 12154			v_0 := v.Args[0]
 12155			if v_0.Op != OpPPC64SLWconst {
 12156				break
 12157			}
 12158			c := v_0.AuxInt
 12159			x := v_0.Args[0]
 12160			v_1 := v.Args[1]
 12161			if v_1.Op != OpPPC64SRWconst {
 12162				break
 12163			}
 12164			d := v_1.AuxInt
 12165			if x != v_1.Args[0] {
 12166				break
 12167			}
 12168			if !(d == 32-c) {
 12169				break
 12170			}
 12171			v.reset(OpPPC64ROTLWconst)
 12172			v.AuxInt = c
 12173			v.AddArg(x)
 12174			return true
 12175		}
 12176		// match: (OR (SRWconst x [d]) (SLWconst x [c]))
 12177		// cond: d == 32-c
 12178		// result: (ROTLWconst [c] x)
 12179		for {
 12180			_ = v.Args[1]
 12181			v_0 := v.Args[0]
 12182			if v_0.Op != OpPPC64SRWconst {
 12183				break
 12184			}
 12185			d := v_0.AuxInt
 12186			x := v_0.Args[0]
 12187			v_1 := v.Args[1]
 12188			if v_1.Op != OpPPC64SLWconst {
 12189				break
 12190			}
 12191			c := v_1.AuxInt
 12192			if x != v_1.Args[0] {
 12193				break
 12194			}
 12195			if !(d == 32-c) {
 12196				break
 12197			}
 12198			v.reset(OpPPC64ROTLWconst)
 12199			v.AuxInt = c
 12200			v.AddArg(x)
 12201			return true
 12202		}
 12203		// match: (OR (SLD x (ANDconst <typ.Int64> [63] y)) (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y))))
 12204		// cond:
 12205		// result: (ROTL x y)
 12206		for {
 12207			_ = v.Args[1]
 12208			v_0 := v.Args[0]
 12209			if v_0.Op != OpPPC64SLD {
 12210				break
 12211			}
 12212			_ = v_0.Args[1]
 12213			x := v_0.Args[0]
 12214			v_0_1 := v_0.Args[1]
 12215			if v_0_1.Op != OpPPC64ANDconst {
 12216				break
 12217			}
 12218			if v_0_1.Type != typ.Int64 {
 12219				break
 12220			}
 12221			if v_0_1.AuxInt != 63 {
 12222				break
 12223			}
 12224			y := v_0_1.Args[0]
 12225			v_1 := v.Args[1]
 12226			if v_1.Op != OpPPC64SRD {
 12227				break
 12228			}
 12229			_ = v_1.Args[1]
 12230			if x != v_1.Args[0] {
 12231				break
 12232			}
 12233			v_1_1 := v_1.Args[1]
 12234			if v_1_1.Op != OpPPC64SUB {
 12235				break
 12236			}
 12237			if v_1_1.Type != typ.UInt {
 12238				break
 12239			}
 12240			_ = v_1_1.Args[1]
 12241			v_1_1_0 := v_1_1.Args[0]
 12242			if v_1_1_0.Op != OpPPC64MOVDconst {
 12243				break
 12244			}
 12245			if v_1_1_0.AuxInt != 64 {
 12246				break
 12247			}
 12248			v_1_1_1 := v_1_1.Args[1]
 12249			if v_1_1_1.Op != OpPPC64ANDconst {
 12250				break
 12251			}
 12252			if v_1_1_1.Type != typ.UInt {
 12253				break
 12254			}
 12255			if v_1_1_1.AuxInt != 63 {
 12256				break
 12257			}
 12258			if y != v_1_1_1.Args[0] {
 12259				break
 12260			}
 12261			v.reset(OpPPC64ROTL)
 12262			v.AddArg(x)
 12263			v.AddArg(y)
 12264			return true
 12265		}
 12266		// match: (OR (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y))) (SLD x (ANDconst <typ.Int64> [63] y)))
 12267		// cond:
 12268		// result: (ROTL x y)
 12269		for {
 12270			_ = v.Args[1]
 12271			v_0 := v.Args[0]
 12272			if v_0.Op != OpPPC64SRD {
 12273				break
 12274			}
 12275			_ = v_0.Args[1]
 12276			x := v_0.Args[0]
 12277			v_0_1 := v_0.Args[1]
 12278			if v_0_1.Op != OpPPC64SUB {
 12279				break
 12280			}
 12281			if v_0_1.Type != typ.UInt {
 12282				break
 12283			}
 12284			_ = v_0_1.Args[1]
 12285			v_0_1_0 := v_0_1.Args[0]
 12286			if v_0_1_0.Op != OpPPC64MOVDconst {
 12287				break
 12288			}
 12289			if v_0_1_0.AuxInt != 64 {
 12290				break
 12291			}
 12292			v_0_1_1 := v_0_1.Args[1]
 12293			if v_0_1_1.Op != OpPPC64ANDconst {
 12294				break
 12295			}
 12296			if v_0_1_1.Type != typ.UInt {
 12297				break
 12298			}
 12299			if v_0_1_1.AuxInt != 63 {
 12300				break
 12301			}
 12302			y := v_0_1_1.Args[0]
 12303			v_1 := v.Args[1]
 12304			if v_1.Op != OpPPC64SLD {
 12305				break
 12306			}
 12307			_ = v_1.Args[1]
 12308			if x != v_1.Args[0] {
 12309				break
 12310			}
 12311			v_1_1 := v_1.Args[1]
 12312			if v_1_1.Op != OpPPC64ANDconst {
 12313				break
 12314			}
 12315			if v_1_1.Type != typ.Int64 {
 12316				break
 12317			}
 12318			if v_1_1.AuxInt != 63 {
 12319				break
 12320			}
 12321			if y != v_1_1.Args[0] {
 12322				break
 12323			}
 12324			v.reset(OpPPC64ROTL)
 12325			v.AddArg(x)
 12326			v.AddArg(y)
 12327			return true
 12328		}
 12329		// match: (OR (SLW x (ANDconst <typ.Int32> [31] y)) (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y))))
 12330		// cond:
 12331		// result: (ROTLW x y)
 12332		for {
 12333			_ = v.Args[1]
 12334			v_0 := v.Args[0]
 12335			if v_0.Op != OpPPC64SLW {
 12336				break
 12337			}
 12338			_ = v_0.Args[1]
 12339			x := v_0.Args[0]
 12340			v_0_1 := v_0.Args[1]
 12341			if v_0_1.Op != OpPPC64ANDconst {
 12342				break
 12343			}
 12344			if v_0_1.Type != typ.Int32 {
 12345				break
 12346			}
 12347			if v_0_1.AuxInt != 31 {
 12348				break
 12349			}
 12350			y := v_0_1.Args[0]
 12351			v_1 := v.Args[1]
 12352			if v_1.Op != OpPPC64SRW {
 12353				break
 12354			}
 12355			_ = v_1.Args[1]
 12356			if x != v_1.Args[0] {
 12357				break
 12358			}
 12359			v_1_1 := v_1.Args[1]
 12360			if v_1_1.Op != OpPPC64SUB {
 12361				break
 12362			}
 12363			if v_1_1.Type != typ.UInt {
 12364				break
 12365			}
 12366			_ = v_1_1.Args[1]
 12367			v_1_1_0 := v_1_1.Args[0]
 12368			if v_1_1_0.Op != OpPPC64MOVDconst {
 12369				break
 12370			}
 12371			if v_1_1_0.AuxInt != 32 {
 12372				break
 12373			}
 12374			v_1_1_1 := v_1_1.Args[1]
 12375			if v_1_1_1.Op != OpPPC64ANDconst {
 12376				break
 12377			}
 12378			if v_1_1_1.Type != typ.UInt {
 12379				break
 12380			}
 12381			if v_1_1_1.AuxInt != 31 {
 12382				break
 12383			}
 12384			if y != v_1_1_1.Args[0] {
 12385				break
 12386			}
 12387			v.reset(OpPPC64ROTLW)
 12388			v.AddArg(x)
 12389			v.AddArg(y)
 12390			return true
 12391		}
 12392		// match: (OR (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y))) (SLW x (ANDconst <typ.Int32> [31] y)))
 12393		// cond:
 12394		// result: (ROTLW x y)
 12395		for {
 12396			_ = v.Args[1]
 12397			v_0 := v.Args[0]
 12398			if v_0.Op != OpPPC64SRW {
 12399				break
 12400			}
 12401			_ = v_0.Args[1]
 12402			x := v_0.Args[0]
 12403			v_0_1 := v_0.Args[1]
 12404			if v_0_1.Op != OpPPC64SUB {
 12405				break
 12406			}
 12407			if v_0_1.Type != typ.UInt {
 12408				break
 12409			}
 12410			_ = v_0_1.Args[1]
 12411			v_0_1_0 := v_0_1.Args[0]
 12412			if v_0_1_0.Op != OpPPC64MOVDconst {
 12413				break
 12414			}
 12415			if v_0_1_0.AuxInt != 32 {
 12416				break
 12417			}
 12418			v_0_1_1 := v_0_1.Args[1]
 12419			if v_0_1_1.Op != OpPPC64ANDconst {
 12420				break
 12421			}
 12422			if v_0_1_1.Type != typ.UInt {
 12423				break
 12424			}
 12425			if v_0_1_1.AuxInt != 31 {
 12426				break
 12427			}
 12428			y := v_0_1_1.Args[0]
 12429			v_1 := v.Args[1]
 12430			if v_1.Op != OpPPC64SLW {
 12431				break
 12432			}
 12433			_ = v_1.Args[1]
 12434			if x != v_1.Args[0] {
 12435				break
 12436			}
 12437			v_1_1 := v_1.Args[1]
 12438			if v_1_1.Op != OpPPC64ANDconst {
 12439				break
 12440			}
 12441			if v_1_1.Type != typ.Int32 {
 12442				break
 12443			}
 12444			if v_1_1.AuxInt != 31 {
 12445				break
 12446			}
 12447			if y != v_1_1.Args[0] {
 12448				break
 12449			}
 12450			v.reset(OpPPC64ROTLW)
 12451			v.AddArg(x)
 12452			v.AddArg(y)
 12453			return true
 12454		}
 12455		// match: (OR (MOVDconst [c]) (MOVDconst [d]))
 12456		// cond:
 12457		// result: (MOVDconst [c|d])
 12458		for {
 12459			_ = v.Args[1]
 12460			v_0 := v.Args[0]
 12461			if v_0.Op != OpPPC64MOVDconst {
 12462				break
 12463			}
 12464			c := v_0.AuxInt
 12465			v_1 := v.Args[1]
 12466			if v_1.Op != OpPPC64MOVDconst {
 12467				break
 12468			}
 12469			d := v_1.AuxInt
 12470			v.reset(OpPPC64MOVDconst)
 12471			v.AuxInt = c | d
 12472			return true
 12473		}
 12474		// match: (OR (MOVDconst [d]) (MOVDconst [c]))
 12475		// cond:
 12476		// result: (MOVDconst [c|d])
 12477		for {
 12478			_ = v.Args[1]
 12479			v_0 := v.Args[0]
 12480			if v_0.Op != OpPPC64MOVDconst {
 12481				break
 12482			}
 12483			d := v_0.AuxInt
 12484			v_1 := v.Args[1]
 12485			if v_1.Op != OpPPC64MOVDconst {
 12486				break
 12487			}
 12488			c := v_1.AuxInt
 12489			v.reset(OpPPC64MOVDconst)
 12490			v.AuxInt = c | d
 12491			return true
 12492		}
 12493		return false
 12494	}
 12495	func rewriteValuePPC64_OpPPC64OR_10(v *Value) bool {
 12496		b := v.Block
 12497		config := b.Func.Config
 12498		typ := &b.Func.Config.Types
 12499		// match: (OR x (MOVDconst [c]))
 12500		// cond: isU32Bit(c)
 12501		// result: (ORconst [c] x)
 12502		for {
 12503			_ = v.Args[1]
 12504			x := v.Args[0]
 12505			v_1 := v.Args[1]
 12506			if v_1.Op != OpPPC64MOVDconst {
 12507				break
 12508			}
 12509			c := v_1.AuxInt
 12510			if !(isU32Bit(c)) {
 12511				break
 12512			}
 12513			v.reset(OpPPC64ORconst)
 12514			v.AuxInt = c
 12515			v.AddArg(x)
 12516			return true
 12517		}
 12518		// match: (OR (MOVDconst [c]) x)
 12519		// cond: isU32Bit(c)
 12520		// result: (ORconst [c] x)
 12521		for {
 12522			x := v.Args[1]
 12523			v_0 := v.Args[0]
 12524			if v_0.Op != OpPPC64MOVDconst {
 12525				break
 12526			}
 12527			c := v_0.AuxInt
 12528			if !(isU32Bit(c)) {
 12529				break
 12530			}
 12531			v.reset(OpPPC64ORconst)
 12532			v.AuxInt = c
 12533			v.AddArg(x)
 12534			return true
 12535		}
 12536		// match: (OR <t> x0:(MOVBZload [i0] {s} p mem) o1:(SLWconst x1:(MOVBZload [i1] {s} p mem) [8]))
 12537		// cond: !config.BigEndian && i1 == i0+1 && x0.Uses ==1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)
 12538		// result: @mergePoint(b,x0,x1) (MOVHZload <t> {s} [i0] p mem)
 12539		for {
 12540			t := v.Type
 12541			_ = v.Args[1]
 12542			x0 := v.Args[0]
 12543			if x0.Op != OpPPC64MOVBZload {
 12544				break
 12545			}
 12546			i0 := x0.AuxInt
 12547			s := x0.Aux
 12548			mem := x0.Args[1]
 12549			p := x0.Args[0]
 12550			o1 := v.Args[1]
 12551			if o1.Op != OpPPC64SLWconst {
 12552				break
 12553			}
 12554			if o1.AuxInt != 8 {
 12555				break
 12556			}
 12557			x1 := o1.Args[0]
 12558			if x1.Op != OpPPC64MOVBZload {
 12559				break
 12560			}
 12561			i1 := x1.AuxInt
 12562			if x1.Aux != s {
 12563				break
 12564			}
 12565			_ = x1.Args[1]
 12566			if p != x1.Args[0] {
 12567				break
 12568			}
 12569			if mem != x1.Args[1] {
 12570				break
 12571			}
 12572			if !(!config.BigEndian && i1 == i0+1 && x0.Uses == 1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)) {
 12573				break
 12574			}
 12575			b = mergePoint(b, x0, x1)
 12576			v0 := b.NewValue0(x1.Pos, OpPPC64MOVHZload, t)
 12577			v.reset(OpCopy)
 12578			v.AddArg(v0)
 12579			v0.AuxInt = i0
 12580			v0.Aux = s
 12581			v0.AddArg(p)
 12582			v0.AddArg(mem)
 12583			return true
 12584		}
 12585		// match: (OR <t> o1:(SLWconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))
 12586		// cond: !config.BigEndian && i1 == i0+1 && x0.Uses ==1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)
 12587		// result: @mergePoint(b,x0,x1) (MOVHZload <t> {s} [i0] p mem)
 12588		for {
 12589			t := v.Type
 12590			_ = v.Args[1]
 12591			o1 := v.Args[0]
 12592			if o1.Op != OpPPC64SLWconst {
 12593				break
 12594			}
 12595			if o1.AuxInt != 8 {
 12596				break
 12597			}
 12598			x1 := o1.Args[0]
 12599			if x1.Op != OpPPC64MOVBZload {
 12600				break
 12601			}
 12602			i1 := x1.AuxInt
 12603			s := x1.Aux
 12604			mem := x1.Args[1]
 12605			p := x1.Args[0]
 12606			x0 := v.Args[1]
 12607			if x0.Op != OpPPC64MOVBZload {
 12608				break
 12609			}
 12610			i0 := x0.AuxInt
 12611			if x0.Aux != s {
 12612				break
 12613			}
 12614			_ = x0.Args[1]
 12615			if p != x0.Args[0] {
 12616				break
 12617			}
 12618			if mem != x0.Args[1] {
 12619				break
 12620			}
 12621			if !(!config.BigEndian && i1 == i0+1 && x0.Uses == 1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)) {
 12622				break
 12623			}
 12624			b = mergePoint(b, x0, x1)
 12625			v0 := b.NewValue0(x0.Pos, OpPPC64MOVHZload, t)
 12626			v.reset(OpCopy)
 12627			v.AddArg(v0)
 12628			v0.AuxInt = i0
 12629			v0.Aux = s
 12630			v0.AddArg(p)
 12631			v0.AddArg(mem)
 12632			return true
 12633		}
 12634		// match: (OR <t> x0:(MOVBZload [i0] {s} p mem) o1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]))
 12635		// cond: !config.BigEndian && i1 == i0+1 && x0.Uses ==1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)
 12636		// result: @mergePoint(b,x0,x1) (MOVHZload <t> {s} [i0] p mem)
 12637		for {
 12638			t := v.Type
 12639			_ = v.Args[1]
 12640			x0 := v.Args[0]
 12641			if x0.Op != OpPPC64MOVBZload {
 12642				break
 12643			}
 12644			i0 := x0.AuxInt
 12645			s := x0.Aux
 12646			mem := x0.Args[1]
 12647			p := x0.Args[0]
 12648			o1 := v.Args[1]
 12649			if o1.Op != OpPPC64SLDconst {
 12650				break
 12651			}
 12652			if o1.AuxInt != 8 {
 12653				break
 12654			}
 12655			x1 := o1.Args[0]
 12656			if x1.Op != OpPPC64MOVBZload {
 12657				break
 12658			}
 12659			i1 := x1.AuxInt
 12660			if x1.Aux != s {
 12661				break
 12662			}
 12663			_ = x1.Args[1]
 12664			if p != x1.Args[0] {
 12665				break
 12666			}
 12667			if mem != x1.Args[1] {
 12668				break
 12669			}
 12670			if !(!config.BigEndian && i1 == i0+1 && x0.Uses == 1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)) {
 12671				break
 12672			}
 12673			b = mergePoint(b, x0, x1)
 12674			v0 := b.NewValue0(x1.Pos, OpPPC64MOVHZload, t)
 12675			v.reset(OpCopy)
 12676			v.AddArg(v0)
 12677			v0.AuxInt = i0
 12678			v0.Aux = s
 12679			v0.AddArg(p)
 12680			v0.AddArg(mem)
 12681			return true
 12682		}
 12683		// match: (OR <t> o1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))
 12684		// cond: !config.BigEndian && i1 == i0+1 && x0.Uses ==1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)
 12685		// result: @mergePoint(b,x0,x1) (MOVHZload <t> {s} [i0] p mem)
 12686		for {
 12687			t := v.Type
 12688			_ = v.Args[1]
 12689			o1 := v.Args[0]
 12690			if o1.Op != OpPPC64SLDconst {
 12691				break
 12692			}
 12693			if o1.AuxInt != 8 {
 12694				break
 12695			}
 12696			x1 := o1.Args[0]
 12697			if x1.Op != OpPPC64MOVBZload {
 12698				break
 12699			}
 12700			i1 := x1.AuxInt
 12701			s := x1.Aux
 12702			mem := x1.Args[1]
 12703			p := x1.Args[0]
 12704			x0 := v.Args[1]
 12705			if x0.Op != OpPPC64MOVBZload {
 12706				break
 12707			}
 12708			i0 := x0.AuxInt
 12709			if x0.Aux != s {
 12710				break
 12711			}
 12712			_ = x0.Args[1]
 12713			if p != x0.Args[0] {
 12714				break
 12715			}
 12716			if mem != x0.Args[1] {
 12717				break
 12718			}
 12719			if !(!config.BigEndian && i1 == i0+1 && x0.Uses == 1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)) {
 12720				break
 12721			}
 12722			b = mergePoint(b, x0, x1)
 12723			v0 := b.NewValue0(x0.Pos, OpPPC64MOVHZload, t)
 12724			v.reset(OpCopy)
 12725			v.AddArg(v0)
 12726			v0.AuxInt = i0
 12727			v0.Aux = s
 12728			v0.AddArg(p)
 12729			v0.AddArg(mem)
 12730			return true
 12731		}
 12732		// match: (OR <t> x0:(MOVBZload [i1] {s} p mem) o1:(SLWconst x1:(MOVBZload [i0] {s} p mem) [8]))
 12733		// cond: !config.BigEndian && i1 == i0+1 && x0.Uses ==1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)
 12734		// result: @mergePoint(b,x0,x1) (MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 12735		for {
 12736			t := v.Type
 12737			_ = v.Args[1]
 12738			x0 := v.Args[0]
 12739			if x0.Op != OpPPC64MOVBZload {
 12740				break
 12741			}
 12742			i1 := x0.AuxInt
 12743			s := x0.Aux
 12744			mem := x0.Args[1]
 12745			p := x0.Args[0]
 12746			o1 := v.Args[1]
 12747			if o1.Op != OpPPC64SLWconst {
 12748				break
 12749			}
 12750			if o1.AuxInt != 8 {
 12751				break
 12752			}
 12753			x1 := o1.Args[0]
 12754			if x1.Op != OpPPC64MOVBZload {
 12755				break
 12756			}
 12757			i0 := x1.AuxInt
 12758			if x1.Aux != s {
 12759				break
 12760			}
 12761			_ = x1.Args[1]
 12762			if p != x1.Args[0] {
 12763				break
 12764			}
 12765			if mem != x1.Args[1] {
 12766				break
 12767			}
 12768			if !(!config.BigEndian && i1 == i0+1 && x0.Uses == 1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)) {
 12769				break
 12770			}
 12771			b = mergePoint(b, x0, x1)
 12772			v0 := b.NewValue0(x1.Pos, OpPPC64MOVHBRload, t)
 12773			v.reset(OpCopy)
 12774			v.AddArg(v0)
 12775			v1 := b.NewValue0(x1.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 12776			v1.AuxInt = i0
 12777			v1.Aux = s
 12778			v1.AddArg(p)
 12779			v0.AddArg(v1)
 12780			v0.AddArg(mem)
 12781			return true
 12782		}
 12783		// match: (OR <t> o1:(SLWconst x1:(MOVBZload [i0] {s} p mem) [8]) x0:(MOVBZload [i1] {s} p mem))
 12784		// cond: !config.BigEndian && i1 == i0+1 && x0.Uses ==1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)
 12785		// result: @mergePoint(b,x0,x1) (MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 12786		for {
 12787			t := v.Type
 12788			_ = v.Args[1]
 12789			o1 := v.Args[0]
 12790			if o1.Op != OpPPC64SLWconst {
 12791				break
 12792			}
 12793			if o1.AuxInt != 8 {
 12794				break
 12795			}
 12796			x1 := o1.Args[0]
 12797			if x1.Op != OpPPC64MOVBZload {
 12798				break
 12799			}
 12800			i0 := x1.AuxInt
 12801			s := x1.Aux
 12802			mem := x1.Args[1]
 12803			p := x1.Args[0]
 12804			x0 := v.Args[1]
 12805			if x0.Op != OpPPC64MOVBZload {
 12806				break
 12807			}
 12808			i1 := x0.AuxInt
 12809			if x0.Aux != s {
 12810				break
 12811			}
 12812			_ = x0.Args[1]
 12813			if p != x0.Args[0] {
 12814				break
 12815			}
 12816			if mem != x0.Args[1] {
 12817				break
 12818			}
 12819			if !(!config.BigEndian && i1 == i0+1 && x0.Uses == 1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)) {
 12820				break
 12821			}
 12822			b = mergePoint(b, x0, x1)
 12823			v0 := b.NewValue0(x0.Pos, OpPPC64MOVHBRload, t)
 12824			v.reset(OpCopy)
 12825			v.AddArg(v0)
 12826			v1 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 12827			v1.AuxInt = i0
 12828			v1.Aux = s
 12829			v1.AddArg(p)
 12830			v0.AddArg(v1)
 12831			v0.AddArg(mem)
 12832			return true
 12833		}
 12834		// match: (OR <t> x0:(MOVBZload [i1] {s} p mem) o1:(SLDconst x1:(MOVBZload [i0] {s} p mem) [8]))
 12835		// cond: !config.BigEndian && i1 == i0+1 && x0.Uses ==1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)
 12836		// result: @mergePoint(b,x0,x1) (MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 12837		for {
 12838			t := v.Type
 12839			_ = v.Args[1]
 12840			x0 := v.Args[0]
 12841			if x0.Op != OpPPC64MOVBZload {
 12842				break
 12843			}
 12844			i1 := x0.AuxInt
 12845			s := x0.Aux
 12846			mem := x0.Args[1]
 12847			p := x0.Args[0]
 12848			o1 := v.Args[1]
 12849			if o1.Op != OpPPC64SLDconst {
 12850				break
 12851			}
 12852			if o1.AuxInt != 8 {
 12853				break
 12854			}
 12855			x1 := o1.Args[0]
 12856			if x1.Op != OpPPC64MOVBZload {
 12857				break
 12858			}
 12859			i0 := x1.AuxInt
 12860			if x1.Aux != s {
 12861				break
 12862			}
 12863			_ = x1.Args[1]
 12864			if p != x1.Args[0] {
 12865				break
 12866			}
 12867			if mem != x1.Args[1] {
 12868				break
 12869			}
 12870			if !(!config.BigEndian && i1 == i0+1 && x0.Uses == 1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)) {
 12871				break
 12872			}
 12873			b = mergePoint(b, x0, x1)
 12874			v0 := b.NewValue0(x1.Pos, OpPPC64MOVHBRload, t)
 12875			v.reset(OpCopy)
 12876			v.AddArg(v0)
 12877			v1 := b.NewValue0(x1.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 12878			v1.AuxInt = i0
 12879			v1.Aux = s
 12880			v1.AddArg(p)
 12881			v0.AddArg(v1)
 12882			v0.AddArg(mem)
 12883			return true
 12884		}
 12885		// match: (OR <t> o1:(SLDconst x1:(MOVBZload [i0] {s} p mem) [8]) x0:(MOVBZload [i1] {s} p mem))
 12886		// cond: !config.BigEndian && i1 == i0+1 && x0.Uses ==1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)
 12887		// result: @mergePoint(b,x0,x1) (MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 12888		for {
 12889			t := v.Type
 12890			_ = v.Args[1]
 12891			o1 := v.Args[0]
 12892			if o1.Op != OpPPC64SLDconst {
 12893				break
 12894			}
 12895			if o1.AuxInt != 8 {
 12896				break
 12897			}
 12898			x1 := o1.Args[0]
 12899			if x1.Op != OpPPC64MOVBZload {
 12900				break
 12901			}
 12902			i0 := x1.AuxInt
 12903			s := x1.Aux
 12904			mem := x1.Args[1]
 12905			p := x1.Args[0]
 12906			x0 := v.Args[1]
 12907			if x0.Op != OpPPC64MOVBZload {
 12908				break
 12909			}
 12910			i1 := x0.AuxInt
 12911			if x0.Aux != s {
 12912				break
 12913			}
 12914			_ = x0.Args[1]
 12915			if p != x0.Args[0] {
 12916				break
 12917			}
 12918			if mem != x0.Args[1] {
 12919				break
 12920			}
 12921			if !(!config.BigEndian && i1 == i0+1 && x0.Uses == 1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)) {
 12922				break
 12923			}
 12924			b = mergePoint(b, x0, x1)
 12925			v0 := b.NewValue0(x0.Pos, OpPPC64MOVHBRload, t)
 12926			v.reset(OpCopy)
 12927			v.AddArg(v0)
 12928			v1 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 12929			v1.AuxInt = i0
 12930			v1.Aux = s
 12931			v1.AddArg(p)
 12932			v0.AddArg(v1)
 12933			v0.AddArg(mem)
 12934			return true
 12935		}
 12936		return false
 12937	}
 12938	func rewriteValuePPC64_OpPPC64OR_20(v *Value) bool {
 12939		b := v.Block
 12940		config := b.Func.Config
 12941		typ := &b.Func.Config.Types
 12942		// match: (OR <t> s0:(SLWconst x0:(MOVBZload [i1] {s} p mem) [n1]) s1:(SLWconst x1:(MOVBZload [i0] {s} p mem) [n2]))
 12943		// cond: !config.BigEndian && i1 == i0+1 && n1%8 == 0 && n2 == n1+8 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1)
 12944		// result: @mergePoint(b,x0,x1) (SLDconst <t> (MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [n1])
 12945		for {
 12946			t := v.Type
 12947			_ = v.Args[1]
 12948			s0 := v.Args[0]
 12949			if s0.Op != OpPPC64SLWconst {
 12950				break
 12951			}
 12952			n1 := s0.AuxInt
 12953			x0 := s0.Args[0]
 12954			if x0.Op != OpPPC64MOVBZload {
 12955				break
 12956			}
 12957			i1 := x0.AuxInt
 12958			s := x0.Aux
 12959			mem := x0.Args[1]
 12960			p := x0.Args[0]
 12961			s1 := v.Args[1]
 12962			if s1.Op != OpPPC64SLWconst {
 12963				break
 12964			}
 12965			n2 := s1.AuxInt
 12966			x1 := s1.Args[0]
 12967			if x1.Op != OpPPC64MOVBZload {
 12968				break
 12969			}
 12970			i0 := x1.AuxInt
 12971			if x1.Aux != s {
 12972				break
 12973			}
 12974			_ = x1.Args[1]
 12975			if p != x1.Args[0] {
 12976				break
 12977			}
 12978			if mem != x1.Args[1] {
 12979				break
 12980			}
 12981			if !(!config.BigEndian && i1 == i0+1 && n1%8 == 0 && n2 == n1+8 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1)) {
 12982				break
 12983			}
 12984			b = mergePoint(b, x0, x1)
 12985			v0 := b.NewValue0(x1.Pos, OpPPC64SLDconst, t)
 12986			v.reset(OpCopy)
 12987			v.AddArg(v0)
 12988			v0.AuxInt = n1
 12989			v1 := b.NewValue0(x1.Pos, OpPPC64MOVHBRload, t)
 12990			v2 := b.NewValue0(x1.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 12991			v2.AuxInt = i0
 12992			v2.Aux = s
 12993			v2.AddArg(p)
 12994			v1.AddArg(v2)
 12995			v1.AddArg(mem)
 12996			v0.AddArg(v1)
 12997			return true
 12998		}
 12999		// match: (OR <t> s1:(SLWconst x1:(MOVBZload [i0] {s} p mem) [n2]) s0:(SLWconst x0:(MOVBZload [i1] {s} p mem) [n1]))
 13000		// cond: !config.BigEndian && i1 == i0+1 && n1%8 == 0 && n2 == n1+8 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1)
 13001		// result: @mergePoint(b,x0,x1) (SLDconst <t> (MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [n1])
 13002		for {
 13003			t := v.Type
 13004			_ = v.Args[1]
 13005			s1 := v.Args[0]
 13006			if s1.Op != OpPPC64SLWconst {
 13007				break
 13008			}
 13009			n2 := s1.AuxInt
 13010			x1 := s1.Args[0]
 13011			if x1.Op != OpPPC64MOVBZload {
 13012				break
 13013			}
 13014			i0 := x1.AuxInt
 13015			s := x1.Aux
 13016			mem := x1.Args[1]
 13017			p := x1.Args[0]
 13018			s0 := v.Args[1]
 13019			if s0.Op != OpPPC64SLWconst {
 13020				break
 13021			}
 13022			n1 := s0.AuxInt
 13023			x0 := s0.Args[0]
 13024			if x0.Op != OpPPC64MOVBZload {
 13025				break
 13026			}
 13027			i1 := x0.AuxInt
 13028			if x0.Aux != s {
 13029				break
 13030			}
 13031			_ = x0.Args[1]
 13032			if p != x0.Args[0] {
 13033				break
 13034			}
 13035			if mem != x0.Args[1] {
 13036				break
 13037			}
 13038			if !(!config.BigEndian && i1 == i0+1 && n1%8 == 0 && n2 == n1+8 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1)) {
 13039				break
 13040			}
 13041			b = mergePoint(b, x0, x1)
 13042			v0 := b.NewValue0(x0.Pos, OpPPC64SLDconst, t)
 13043			v.reset(OpCopy)
 13044			v.AddArg(v0)
 13045			v0.AuxInt = n1
 13046			v1 := b.NewValue0(x0.Pos, OpPPC64MOVHBRload, t)
 13047			v2 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 13048			v2.AuxInt = i0
 13049			v2.Aux = s
 13050			v2.AddArg(p)
 13051			v1.AddArg(v2)
 13052			v1.AddArg(mem)
 13053			v0.AddArg(v1)
 13054			return true
 13055		}
 13056		// match: (OR <t> s0:(SLDconst x0:(MOVBZload [i1] {s} p mem) [n1]) s1:(SLDconst x1:(MOVBZload [i0] {s} p mem) [n2]))
 13057		// cond: !config.BigEndian && i1 == i0+1 && n1%8 == 0 && n2 == n1+8 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1)
 13058		// result: @mergePoint(b,x0,x1) (SLDconst <t> (MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [n1])
 13059		for {
 13060			t := v.Type
 13061			_ = v.Args[1]
 13062			s0 := v.Args[0]
 13063			if s0.Op != OpPPC64SLDconst {
 13064				break
 13065			}
 13066			n1 := s0.AuxInt
 13067			x0 := s0.Args[0]
 13068			if x0.Op != OpPPC64MOVBZload {
 13069				break
 13070			}
 13071			i1 := x0.AuxInt
 13072			s := x0.Aux
 13073			mem := x0.Args[1]
 13074			p := x0.Args[0]
 13075			s1 := v.Args[1]
 13076			if s1.Op != OpPPC64SLDconst {
 13077				break
 13078			}
 13079			n2 := s1.AuxInt
 13080			x1 := s1.Args[0]
 13081			if x1.Op != OpPPC64MOVBZload {
 13082				break
 13083			}
 13084			i0 := x1.AuxInt
 13085			if x1.Aux != s {
 13086				break
 13087			}
 13088			_ = x1.Args[1]
 13089			if p != x1.Args[0] {
 13090				break
 13091			}
 13092			if mem != x1.Args[1] {
 13093				break
 13094			}
 13095			if !(!config.BigEndian && i1 == i0+1 && n1%8 == 0 && n2 == n1+8 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1)) {
 13096				break
 13097			}
 13098			b = mergePoint(b, x0, x1)
 13099			v0 := b.NewValue0(x1.Pos, OpPPC64SLDconst, t)
 13100			v.reset(OpCopy)
 13101			v.AddArg(v0)
 13102			v0.AuxInt = n1
 13103			v1 := b.NewValue0(x1.Pos, OpPPC64MOVHBRload, t)
 13104			v2 := b.NewValue0(x1.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 13105			v2.AuxInt = i0
 13106			v2.Aux = s
 13107			v2.AddArg(p)
 13108			v1.AddArg(v2)
 13109			v1.AddArg(mem)
 13110			v0.AddArg(v1)
 13111			return true
 13112		}
 13113		// match: (OR <t> s1:(SLDconst x1:(MOVBZload [i0] {s} p mem) [n2]) s0:(SLDconst x0:(MOVBZload [i1] {s} p mem) [n1]))
 13114		// cond: !config.BigEndian && i1 == i0+1 && n1%8 == 0 && n2 == n1+8 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1)
 13115		// result: @mergePoint(b,x0,x1) (SLDconst <t> (MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [n1])
 13116		for {
 13117			t := v.Type
 13118			_ = v.Args[1]
 13119			s1 := v.Args[0]
 13120			if s1.Op != OpPPC64SLDconst {
 13121				break
 13122			}
 13123			n2 := s1.AuxInt
 13124			x1 := s1.Args[0]
 13125			if x1.Op != OpPPC64MOVBZload {
 13126				break
 13127			}
 13128			i0 := x1.AuxInt
 13129			s := x1.Aux
 13130			mem := x1.Args[1]
 13131			p := x1.Args[0]
 13132			s0 := v.Args[1]
 13133			if s0.Op != OpPPC64SLDconst {
 13134				break
 13135			}
 13136			n1 := s0.AuxInt
 13137			x0 := s0.Args[0]
 13138			if x0.Op != OpPPC64MOVBZload {
 13139				break
 13140			}
 13141			i1 := x0.AuxInt
 13142			if x0.Aux != s {
 13143				break
 13144			}
 13145			_ = x0.Args[1]
 13146			if p != x0.Args[0] {
 13147				break
 13148			}
 13149			if mem != x0.Args[1] {
 13150				break
 13151			}
 13152			if !(!config.BigEndian && i1 == i0+1 && n1%8 == 0 && n2 == n1+8 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1)) {
 13153				break
 13154			}
 13155			b = mergePoint(b, x0, x1)
 13156			v0 := b.NewValue0(x0.Pos, OpPPC64SLDconst, t)
 13157			v.reset(OpCopy)
 13158			v.AddArg(v0)
 13159			v0.AuxInt = n1
 13160			v1 := b.NewValue0(x0.Pos, OpPPC64MOVHBRload, t)
 13161			v2 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 13162			v2.AuxInt = i0
 13163			v2.Aux = s
 13164			v2.AddArg(p)
 13165			v1.AddArg(v2)
 13166			v1.AddArg(mem)
 13167			v0.AddArg(v1)
 13168			return true
 13169		}
 13170		// match: (OR <t> s1:(SLWconst x2:(MOVBZload [i3] {s} p mem) [24]) o0:(OR <t> s0:(SLWconst x1:(MOVBZload [i2] {s} p mem) [16]) x0:(MOVHZload [i0] {s} p mem)))
 13171		// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses ==1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 13172		// result: @mergePoint(b,x0,x1,x2) (MOVWZload <t> {s} [i0] p mem)
 13173		for {
 13174			t := v.Type
 13175			_ = v.Args[1]
 13176			s1 := v.Args[0]
 13177			if s1.Op != OpPPC64SLWconst {
 13178				break
 13179			}
 13180			if s1.AuxInt != 24 {
 13181				break
 13182			}
 13183			x2 := s1.Args[0]
 13184			if x2.Op != OpPPC64MOVBZload {
 13185				break
 13186			}
 13187			i3 := x2.AuxInt
 13188			s := x2.Aux
 13189			mem := x2.Args[1]
 13190			p := x2.Args[0]
 13191			o0 := v.Args[1]
 13192			if o0.Op != OpPPC64OR {
 13193				break
 13194			}
 13195			if o0.Type != t {
 13196				break
 13197			}
 13198			_ = o0.Args[1]
 13199			s0 := o0.Args[0]
 13200			if s0.Op != OpPPC64SLWconst {
 13201				break
 13202			}
 13203			if s0.AuxInt != 16 {
 13204				break
 13205			}
 13206			x1 := s0.Args[0]
 13207			if x1.Op != OpPPC64MOVBZload {
 13208				break
 13209			}
 13210			i2 := x1.AuxInt
 13211			if x1.Aux != s {
 13212				break
 13213			}
 13214			_ = x1.Args[1]
 13215			if p != x1.Args[0] {
 13216				break
 13217			}
 13218			if mem != x1.Args[1] {
 13219				break
 13220			}
 13221			x0 := o0.Args[1]
 13222			if x0.Op != OpPPC64MOVHZload {
 13223				break
 13224			}
 13225			i0 := x0.AuxInt
 13226			if x0.Aux != s {
 13227				break
 13228			}
 13229			_ = x0.Args[1]
 13230			if p != x0.Args[0] {
 13231				break
 13232			}
 13233			if mem != x0.Args[1] {
 13234				break
 13235			}
 13236			if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 13237				break
 13238			}
 13239			b = mergePoint(b, x0, x1, x2)
 13240			v0 := b.NewValue0(x0.Pos, OpPPC64MOVWZload, t)
 13241			v.reset(OpCopy)
 13242			v.AddArg(v0)
 13243			v0.AuxInt = i0
 13244			v0.Aux = s
 13245			v0.AddArg(p)
 13246			v0.AddArg(mem)
 13247			return true
 13248		}
 13249		// match: (OR <t> s1:(SLWconst x2:(MOVBZload [i3] {s} p mem) [24]) o0:(OR <t> x0:(MOVHZload [i0] {s} p mem) s0:(SLWconst x1:(MOVBZload [i2] {s} p mem) [16])))
 13250		// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses ==1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 13251		// result: @mergePoint(b,x0,x1,x2) (MOVWZload <t> {s} [i0] p mem)
 13252		for {
 13253			t := v.Type
 13254			_ = v.Args[1]
 13255			s1 := v.Args[0]
 13256			if s1.Op != OpPPC64SLWconst {
 13257				break
 13258			}
 13259			if s1.AuxInt != 24 {
 13260				break
 13261			}
 13262			x2 := s1.Args[0]
 13263			if x2.Op != OpPPC64MOVBZload {
 13264				break
 13265			}
 13266			i3 := x2.AuxInt
 13267			s := x2.Aux
 13268			mem := x2.Args[1]
 13269			p := x2.Args[0]
 13270			o0 := v.Args[1]
 13271			if o0.Op != OpPPC64OR {
 13272				break
 13273			}
 13274			if o0.Type != t {
 13275				break
 13276			}
 13277			_ = o0.Args[1]
 13278			x0 := o0.Args[0]
 13279			if x0.Op != OpPPC64MOVHZload {
 13280				break
 13281			}
 13282			i0 := x0.AuxInt
 13283			if x0.Aux != s {
 13284				break
 13285			}
 13286			_ = x0.Args[1]
 13287			if p != x0.Args[0] {
 13288				break
 13289			}
 13290			if mem != x0.Args[1] {
 13291				break
 13292			}
 13293			s0 := o0.Args[1]
 13294			if s0.Op != OpPPC64SLWconst {
 13295				break
 13296			}
 13297			if s0.AuxInt != 16 {
 13298				break
 13299			}
 13300			x1 := s0.Args[0]
 13301			if x1.Op != OpPPC64MOVBZload {
 13302				break
 13303			}
 13304			i2 := x1.AuxInt
 13305			if x1.Aux != s {
 13306				break
 13307			}
 13308			_ = x1.Args[1]
 13309			if p != x1.Args[0] {
 13310				break
 13311			}
 13312			if mem != x1.Args[1] {
 13313				break
 13314			}
 13315			if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 13316				break
 13317			}
 13318			b = mergePoint(b, x0, x1, x2)
 13319			v0 := b.NewValue0(x1.Pos, OpPPC64MOVWZload, t)
 13320			v.reset(OpCopy)
 13321			v.AddArg(v0)
 13322			v0.AuxInt = i0
 13323			v0.Aux = s
 13324			v0.AddArg(p)
 13325			v0.AddArg(mem)
 13326			return true
 13327		}
 13328		// match: (OR <t> o0:(OR <t> s0:(SLWconst x1:(MOVBZload [i2] {s} p mem) [16]) x0:(MOVHZload [i0] {s} p mem)) s1:(SLWconst x2:(MOVBZload [i3] {s} p mem) [24]))
 13329		// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses ==1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 13330		// result: @mergePoint(b,x0,x1,x2) (MOVWZload <t> {s} [i0] p mem)
 13331		for {
 13332			t := v.Type
 13333			_ = v.Args[1]
 13334			o0 := v.Args[0]
 13335			if o0.Op != OpPPC64OR {
 13336				break
 13337			}
 13338			if o0.Type != t {
 13339				break
 13340			}
 13341			_ = o0.Args[1]
 13342			s0 := o0.Args[0]
 13343			if s0.Op != OpPPC64SLWconst {
 13344				break
 13345			}
 13346			if s0.AuxInt != 16 {
 13347				break
 13348			}
 13349			x1 := s0.Args[0]
 13350			if x1.Op != OpPPC64MOVBZload {
 13351				break
 13352			}
 13353			i2 := x1.AuxInt
 13354			s := x1.Aux
 13355			mem := x1.Args[1]
 13356			p := x1.Args[0]
 13357			x0 := o0.Args[1]
 13358			if x0.Op != OpPPC64MOVHZload {
 13359				break
 13360			}
 13361			i0 := x0.AuxInt
 13362			if x0.Aux != s {
 13363				break
 13364			}
 13365			_ = x0.Args[1]
 13366			if p != x0.Args[0] {
 13367				break
 13368			}
 13369			if mem != x0.Args[1] {
 13370				break
 13371			}
 13372			s1 := v.Args[1]
 13373			if s1.Op != OpPPC64SLWconst {
 13374				break
 13375			}
 13376			if s1.AuxInt != 24 {
 13377				break
 13378			}
 13379			x2 := s1.Args[0]
 13380			if x2.Op != OpPPC64MOVBZload {
 13381				break
 13382			}
 13383			i3 := x2.AuxInt
 13384			if x2.Aux != s {
 13385				break
 13386			}
 13387			_ = x2.Args[1]
 13388			if p != x2.Args[0] {
 13389				break
 13390			}
 13391			if mem != x2.Args[1] {
 13392				break
 13393			}
 13394			if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 13395				break
 13396			}
 13397			b = mergePoint(b, x0, x1, x2)
 13398			v0 := b.NewValue0(x2.Pos, OpPPC64MOVWZload, t)
 13399			v.reset(OpCopy)
 13400			v.AddArg(v0)
 13401			v0.AuxInt = i0
 13402			v0.Aux = s
 13403			v0.AddArg(p)
 13404			v0.AddArg(mem)
 13405			return true
 13406		}
 13407		// match: (OR <t> o0:(OR <t> x0:(MOVHZload [i0] {s} p mem) s0:(SLWconst x1:(MOVBZload [i2] {s} p mem) [16])) s1:(SLWconst x2:(MOVBZload [i3] {s} p mem) [24]))
 13408		// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses ==1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 13409		// result: @mergePoint(b,x0,x1,x2) (MOVWZload <t> {s} [i0] p mem)
 13410		for {
 13411			t := v.Type
 13412			_ = v.Args[1]
 13413			o0 := v.Args[0]
 13414			if o0.Op != OpPPC64OR {
 13415				break
 13416			}
 13417			if o0.Type != t {
 13418				break
 13419			}
 13420			_ = o0.Args[1]
 13421			x0 := o0.Args[0]
 13422			if x0.Op != OpPPC64MOVHZload {
 13423				break
 13424			}
 13425			i0 := x0.AuxInt
 13426			s := x0.Aux
 13427			mem := x0.Args[1]
 13428			p := x0.Args[0]
 13429			s0 := o0.Args[1]
 13430			if s0.Op != OpPPC64SLWconst {
 13431				break
 13432			}
 13433			if s0.AuxInt != 16 {
 13434				break
 13435			}
 13436			x1 := s0.Args[0]
 13437			if x1.Op != OpPPC64MOVBZload {
 13438				break
 13439			}
 13440			i2 := x1.AuxInt
 13441			if x1.Aux != s {
 13442				break
 13443			}
 13444			_ = x1.Args[1]
 13445			if p != x1.Args[0] {
 13446				break
 13447			}
 13448			if mem != x1.Args[1] {
 13449				break
 13450			}
 13451			s1 := v.Args[1]
 13452			if s1.Op != OpPPC64SLWconst {
 13453				break
 13454			}
 13455			if s1.AuxInt != 24 {
 13456				break
 13457			}
 13458			x2 := s1.Args[0]
 13459			if x2.Op != OpPPC64MOVBZload {
 13460				break
 13461			}
 13462			i3 := x2.AuxInt
 13463			if x2.Aux != s {
 13464				break
 13465			}
 13466			_ = x2.Args[1]
 13467			if p != x2.Args[0] {
 13468				break
 13469			}
 13470			if mem != x2.Args[1] {
 13471				break
 13472			}
 13473			if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 13474				break
 13475			}
 13476			b = mergePoint(b, x0, x1, x2)
 13477			v0 := b.NewValue0(x2.Pos, OpPPC64MOVWZload, t)
 13478			v.reset(OpCopy)
 13479			v.AddArg(v0)
 13480			v0.AuxInt = i0
 13481			v0.Aux = s
 13482			v0.AddArg(p)
 13483			v0.AddArg(mem)
 13484			return true
 13485		}
 13486		// match: (OR <t> s1:(SLDconst x2:(MOVBZload [i3] {s} p mem) [24]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i2] {s} p mem) [16]) x0:(MOVHZload [i0] {s} p mem)))
 13487		// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses ==1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 13488		// result: @mergePoint(b,x0,x1,x2) (MOVWZload <t> {s} [i0] p mem)
 13489		for {
 13490			t := v.Type
 13491			_ = v.Args[1]
 13492			s1 := v.Args[0]
 13493			if s1.Op != OpPPC64SLDconst {
 13494				break
 13495			}
 13496			if s1.AuxInt != 24 {
 13497				break
 13498			}
 13499			x2 := s1.Args[0]
 13500			if x2.Op != OpPPC64MOVBZload {
 13501				break
 13502			}
 13503			i3 := x2.AuxInt
 13504			s := x2.Aux
 13505			mem := x2.Args[1]
 13506			p := x2.Args[0]
 13507			o0 := v.Args[1]
 13508			if o0.Op != OpPPC64OR {
 13509				break
 13510			}
 13511			if o0.Type != t {
 13512				break
 13513			}
 13514			_ = o0.Args[1]
 13515			s0 := o0.Args[0]
 13516			if s0.Op != OpPPC64SLDconst {
 13517				break
 13518			}
 13519			if s0.AuxInt != 16 {
 13520				break
 13521			}
 13522			x1 := s0.Args[0]
 13523			if x1.Op != OpPPC64MOVBZload {
 13524				break
 13525			}
 13526			i2 := x1.AuxInt
 13527			if x1.Aux != s {
 13528				break
 13529			}
 13530			_ = x1.Args[1]
 13531			if p != x1.Args[0] {
 13532				break
 13533			}
 13534			if mem != x1.Args[1] {
 13535				break
 13536			}
 13537			x0 := o0.Args[1]
 13538			if x0.Op != OpPPC64MOVHZload {
 13539				break
 13540			}
 13541			i0 := x0.AuxInt
 13542			if x0.Aux != s {
 13543				break
 13544			}
 13545			_ = x0.Args[1]
 13546			if p != x0.Args[0] {
 13547				break
 13548			}
 13549			if mem != x0.Args[1] {
 13550				break
 13551			}
 13552			if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 13553				break
 13554			}
 13555			b = mergePoint(b, x0, x1, x2)
 13556			v0 := b.NewValue0(x0.Pos, OpPPC64MOVWZload, t)
 13557			v.reset(OpCopy)
 13558			v.AddArg(v0)
 13559			v0.AuxInt = i0
 13560			v0.Aux = s
 13561			v0.AddArg(p)
 13562			v0.AddArg(mem)
 13563			return true
 13564		}
 13565		// match: (OR <t> s1:(SLDconst x2:(MOVBZload [i3] {s} p mem) [24]) o0:(OR <t> x0:(MOVHZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i2] {s} p mem) [16])))
 13566		// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses ==1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 13567		// result: @mergePoint(b,x0,x1,x2) (MOVWZload <t> {s} [i0] p mem)
 13568		for {
 13569			t := v.Type
 13570			_ = v.Args[1]
 13571			s1 := v.Args[0]
 13572			if s1.Op != OpPPC64SLDconst {
 13573				break
 13574			}
 13575			if s1.AuxInt != 24 {
 13576				break
 13577			}
 13578			x2 := s1.Args[0]
 13579			if x2.Op != OpPPC64MOVBZload {
 13580				break
 13581			}
 13582			i3 := x2.AuxInt
 13583			s := x2.Aux
 13584			mem := x2.Args[1]
 13585			p := x2.Args[0]
 13586			o0 := v.Args[1]
 13587			if o0.Op != OpPPC64OR {
 13588				break
 13589			}
 13590			if o0.Type != t {
 13591				break
 13592			}
 13593			_ = o0.Args[1]
 13594			x0 := o0.Args[0]
 13595			if x0.Op != OpPPC64MOVHZload {
 13596				break
 13597			}
 13598			i0 := x0.AuxInt
 13599			if x0.Aux != s {
 13600				break
 13601			}
 13602			_ = x0.Args[1]
 13603			if p != x0.Args[0] {
 13604				break
 13605			}
 13606			if mem != x0.Args[1] {
 13607				break
 13608			}
 13609			s0 := o0.Args[1]
 13610			if s0.Op != OpPPC64SLDconst {
 13611				break
 13612			}
 13613			if s0.AuxInt != 16 {
 13614				break
 13615			}
 13616			x1 := s0.Args[0]
 13617			if x1.Op != OpPPC64MOVBZload {
 13618				break
 13619			}
 13620			i2 := x1.AuxInt
 13621			if x1.Aux != s {
 13622				break
 13623			}
 13624			_ = x1.Args[1]
 13625			if p != x1.Args[0] {
 13626				break
 13627			}
 13628			if mem != x1.Args[1] {
 13629				break
 13630			}
 13631			if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 13632				break
 13633			}
 13634			b = mergePoint(b, x0, x1, x2)
 13635			v0 := b.NewValue0(x1.Pos, OpPPC64MOVWZload, t)
 13636			v.reset(OpCopy)
 13637			v.AddArg(v0)
 13638			v0.AuxInt = i0
 13639			v0.Aux = s
 13640			v0.AddArg(p)
 13641			v0.AddArg(mem)
 13642			return true
 13643		}
 13644		return false
 13645	}
 13646	func rewriteValuePPC64_OpPPC64OR_30(v *Value) bool {
 13647		b := v.Block
 13648		config := b.Func.Config
 13649		typ := &b.Func.Config.Types
 13650		// match: (OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i2] {s} p mem) [16]) x0:(MOVHZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i3] {s} p mem) [24]))
 13651		// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses ==1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 13652		// result: @mergePoint(b,x0,x1,x2) (MOVWZload <t> {s} [i0] p mem)
 13653		for {
 13654			t := v.Type
 13655			_ = v.Args[1]
 13656			o0 := v.Args[0]
 13657			if o0.Op != OpPPC64OR {
 13658				break
 13659			}
 13660			if o0.Type != t {
 13661				break
 13662			}
 13663			_ = o0.Args[1]
 13664			s0 := o0.Args[0]
 13665			if s0.Op != OpPPC64SLDconst {
 13666				break
 13667			}
 13668			if s0.AuxInt != 16 {
 13669				break
 13670			}
 13671			x1 := s0.Args[0]
 13672			if x1.Op != OpPPC64MOVBZload {
 13673				break
 13674			}
 13675			i2 := x1.AuxInt
 13676			s := x1.Aux
 13677			mem := x1.Args[1]
 13678			p := x1.Args[0]
 13679			x0 := o0.Args[1]
 13680			if x0.Op != OpPPC64MOVHZload {
 13681				break
 13682			}
 13683			i0 := x0.AuxInt
 13684			if x0.Aux != s {
 13685				break
 13686			}
 13687			_ = x0.Args[1]
 13688			if p != x0.Args[0] {
 13689				break
 13690			}
 13691			if mem != x0.Args[1] {
 13692				break
 13693			}
 13694			s1 := v.Args[1]
 13695			if s1.Op != OpPPC64SLDconst {
 13696				break
 13697			}
 13698			if s1.AuxInt != 24 {
 13699				break
 13700			}
 13701			x2 := s1.Args[0]
 13702			if x2.Op != OpPPC64MOVBZload {
 13703				break
 13704			}
 13705			i3 := x2.AuxInt
 13706			if x2.Aux != s {
 13707				break
 13708			}
 13709			_ = x2.Args[1]
 13710			if p != x2.Args[0] {
 13711				break
 13712			}
 13713			if mem != x2.Args[1] {
 13714				break
 13715			}
 13716			if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 13717				break
 13718			}
 13719			b = mergePoint(b, x0, x1, x2)
 13720			v0 := b.NewValue0(x2.Pos, OpPPC64MOVWZload, t)
 13721			v.reset(OpCopy)
 13722			v.AddArg(v0)
 13723			v0.AuxInt = i0
 13724			v0.Aux = s
 13725			v0.AddArg(p)
 13726			v0.AddArg(mem)
 13727			return true
 13728		}
 13729		// match: (OR <t> o0:(OR <t> x0:(MOVHZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i2] {s} p mem) [16])) s1:(SLDconst x2:(MOVBZload [i3] {s} p mem) [24]))
 13730		// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses ==1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 13731		// result: @mergePoint(b,x0,x1,x2) (MOVWZload <t> {s} [i0] p mem)
 13732		for {
 13733			t := v.Type
 13734			_ = v.Args[1]
 13735			o0 := v.Args[0]
 13736			if o0.Op != OpPPC64OR {
 13737				break
 13738			}
 13739			if o0.Type != t {
 13740				break
 13741			}
 13742			_ = o0.Args[1]
 13743			x0 := o0.Args[0]
 13744			if x0.Op != OpPPC64MOVHZload {
 13745				break
 13746			}
 13747			i0 := x0.AuxInt
 13748			s := x0.Aux
 13749			mem := x0.Args[1]
 13750			p := x0.Args[0]
 13751			s0 := o0.Args[1]
 13752			if s0.Op != OpPPC64SLDconst {
 13753				break
 13754			}
 13755			if s0.AuxInt != 16 {
 13756				break
 13757			}
 13758			x1 := s0.Args[0]
 13759			if x1.Op != OpPPC64MOVBZload {
 13760				break
 13761			}
 13762			i2 := x1.AuxInt
 13763			if x1.Aux != s {
 13764				break
 13765			}
 13766			_ = x1.Args[1]
 13767			if p != x1.Args[0] {
 13768				break
 13769			}
 13770			if mem != x1.Args[1] {
 13771				break
 13772			}
 13773			s1 := v.Args[1]
 13774			if s1.Op != OpPPC64SLDconst {
 13775				break
 13776			}
 13777			if s1.AuxInt != 24 {
 13778				break
 13779			}
 13780			x2 := s1.Args[0]
 13781			if x2.Op != OpPPC64MOVBZload {
 13782				break
 13783			}
 13784			i3 := x2.AuxInt
 13785			if x2.Aux != s {
 13786				break
 13787			}
 13788			_ = x2.Args[1]
 13789			if p != x2.Args[0] {
 13790				break
 13791			}
 13792			if mem != x2.Args[1] {
 13793				break
 13794			}
 13795			if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 13796				break
 13797			}
 13798			b = mergePoint(b, x0, x1, x2)
 13799			v0 := b.NewValue0(x2.Pos, OpPPC64MOVWZload, t)
 13800			v.reset(OpCopy)
 13801			v.AddArg(v0)
 13802			v0.AuxInt = i0
 13803			v0.Aux = s
 13804			v0.AddArg(p)
 13805			v0.AddArg(mem)
 13806			return true
 13807		}
 13808		// match: (OR <t> s1:(SLWconst x2:(MOVBZload [i0] {s} p mem) [24]) o0:(OR <t> s0:(SLWconst x1:(MOVBZload [i1] {s} p mem) [16]) x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i2] {s} p) mem)))
 13809		// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 13810		// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 13811		for {
 13812			t := v.Type
 13813			_ = v.Args[1]
 13814			s1 := v.Args[0]
 13815			if s1.Op != OpPPC64SLWconst {
 13816				break
 13817			}
 13818			if s1.AuxInt != 24 {
 13819				break
 13820			}
 13821			x2 := s1.Args[0]
 13822			if x2.Op != OpPPC64MOVBZload {
 13823				break
 13824			}
 13825			i0 := x2.AuxInt
 13826			s := x2.Aux
 13827			mem := x2.Args[1]
 13828			p := x2.Args[0]
 13829			o0 := v.Args[1]
 13830			if o0.Op != OpPPC64OR {
 13831				break
 13832			}
 13833			if o0.Type != t {
 13834				break
 13835			}
 13836			_ = o0.Args[1]
 13837			s0 := o0.Args[0]
 13838			if s0.Op != OpPPC64SLWconst {
 13839				break
 13840			}
 13841			if s0.AuxInt != 16 {
 13842				break
 13843			}
 13844			x1 := s0.Args[0]
 13845			if x1.Op != OpPPC64MOVBZload {
 13846				break
 13847			}
 13848			i1 := x1.AuxInt
 13849			if x1.Aux != s {
 13850				break
 13851			}
 13852			_ = x1.Args[1]
 13853			if p != x1.Args[0] {
 13854				break
 13855			}
 13856			if mem != x1.Args[1] {
 13857				break
 13858			}
 13859			x0 := o0.Args[1]
 13860			if x0.Op != OpPPC64MOVHBRload {
 13861				break
 13862			}
 13863			if x0.Type != t {
 13864				break
 13865			}
 13866			_ = x0.Args[1]
 13867			x0_0 := x0.Args[0]
 13868			if x0_0.Op != OpPPC64MOVDaddr {
 13869				break
 13870			}
 13871			if x0_0.Type != typ.Uintptr {
 13872				break
 13873			}
 13874			i2 := x0_0.AuxInt
 13875			if x0_0.Aux != s {
 13876				break
 13877			}
 13878			if p != x0_0.Args[0] {
 13879				break
 13880			}
 13881			if mem != x0.Args[1] {
 13882				break
 13883			}
 13884			if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 13885				break
 13886			}
 13887			b = mergePoint(b, x0, x1, x2)
 13888			v0 := b.NewValue0(x0.Pos, OpPPC64MOVWBRload, t)
 13889			v.reset(OpCopy)
 13890			v.AddArg(v0)
 13891			v1 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 13892			v1.AuxInt = i0
 13893			v1.Aux = s
 13894			v1.AddArg(p)
 13895			v0.AddArg(v1)
 13896			v0.AddArg(mem)
 13897			return true
 13898		}
 13899		// match: (OR <t> s1:(SLWconst x2:(MOVBZload [i0] {s} p mem) [24]) o0:(OR <t> x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i2] {s} p) mem) s0:(SLWconst x1:(MOVBZload [i1] {s} p mem) [16])))
 13900		// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 13901		// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 13902		for {
 13903			t := v.Type
 13904			_ = v.Args[1]
 13905			s1 := v.Args[0]
 13906			if s1.Op != OpPPC64SLWconst {
 13907				break
 13908			}
 13909			if s1.AuxInt != 24 {
 13910				break
 13911			}
 13912			x2 := s1.Args[0]
 13913			if x2.Op != OpPPC64MOVBZload {
 13914				break
 13915			}
 13916			i0 := x2.AuxInt
 13917			s := x2.Aux
 13918			mem := x2.Args[1]
 13919			p := x2.Args[0]
 13920			o0 := v.Args[1]
 13921			if o0.Op != OpPPC64OR {
 13922				break
 13923			}
 13924			if o0.Type != t {
 13925				break
 13926			}
 13927			_ = o0.Args[1]
 13928			x0 := o0.Args[0]
 13929			if x0.Op != OpPPC64MOVHBRload {
 13930				break
 13931			}
 13932			if x0.Type != t {
 13933				break
 13934			}
 13935			_ = x0.Args[1]
 13936			x0_0 := x0.Args[0]
 13937			if x0_0.Op != OpPPC64MOVDaddr {
 13938				break
 13939			}
 13940			if x0_0.Type != typ.Uintptr {
 13941				break
 13942			}
 13943			i2 := x0_0.AuxInt
 13944			if x0_0.Aux != s {
 13945				break
 13946			}
 13947			if p != x0_0.Args[0] {
 13948				break
 13949			}
 13950			if mem != x0.Args[1] {
 13951				break
 13952			}
 13953			s0 := o0.Args[1]
 13954			if s0.Op != OpPPC64SLWconst {
 13955				break
 13956			}
 13957			if s0.AuxInt != 16 {
 13958				break
 13959			}
 13960			x1 := s0.Args[0]
 13961			if x1.Op != OpPPC64MOVBZload {
 13962				break
 13963			}
 13964			i1 := x1.AuxInt
 13965			if x1.Aux != s {
 13966				break
 13967			}
 13968			_ = x1.Args[1]
 13969			if p != x1.Args[0] {
 13970				break
 13971			}
 13972			if mem != x1.Args[1] {
 13973				break
 13974			}
 13975			if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 13976				break
 13977			}
 13978			b = mergePoint(b, x0, x1, x2)
 13979			v0 := b.NewValue0(x1.Pos, OpPPC64MOVWBRload, t)
 13980			v.reset(OpCopy)
 13981			v.AddArg(v0)
 13982			v1 := b.NewValue0(x1.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 13983			v1.AuxInt = i0
 13984			v1.Aux = s
 13985			v1.AddArg(p)
 13986			v0.AddArg(v1)
 13987			v0.AddArg(mem)
 13988			return true
 13989		}
 13990		// match: (OR <t> o0:(OR <t> s0:(SLWconst x1:(MOVBZload [i1] {s} p mem) [16]) x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i2] {s} p) mem)) s1:(SLWconst x2:(MOVBZload [i0] {s} p mem) [24]))
 13991		// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 13992		// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 13993		for {
 13994			t := v.Type
 13995			_ = v.Args[1]
 13996			o0 := v.Args[0]
 13997			if o0.Op != OpPPC64OR {
 13998				break
 13999			}
 14000			if o0.Type != t {
 14001				break
 14002			}
 14003			_ = o0.Args[1]
 14004			s0 := o0.Args[0]
 14005			if s0.Op != OpPPC64SLWconst {
 14006				break
 14007			}
 14008			if s0.AuxInt != 16 {
 14009				break
 14010			}
 14011			x1 := s0.Args[0]
 14012			if x1.Op != OpPPC64MOVBZload {
 14013				break
 14014			}
 14015			i1 := x1.AuxInt
 14016			s := x1.Aux
 14017			mem := x1.Args[1]
 14018			p := x1.Args[0]
 14019			x0 := o0.Args[1]
 14020			if x0.Op != OpPPC64MOVHBRload {
 14021				break
 14022			}
 14023			if x0.Type != t {
 14024				break
 14025			}
 14026			_ = x0.Args[1]
 14027			x0_0 := x0.Args[0]
 14028			if x0_0.Op != OpPPC64MOVDaddr {
 14029				break
 14030			}
 14031			if x0_0.Type != typ.Uintptr {
 14032				break
 14033			}
 14034			i2 := x0_0.AuxInt
 14035			if x0_0.Aux != s {
 14036				break
 14037			}
 14038			if p != x0_0.Args[0] {
 14039				break
 14040			}
 14041			if mem != x0.Args[1] {
 14042				break
 14043			}
 14044			s1 := v.Args[1]
 14045			if s1.Op != OpPPC64SLWconst {
 14046				break
 14047			}
 14048			if s1.AuxInt != 24 {
 14049				break
 14050			}
 14051			x2 := s1.Args[0]
 14052			if x2.Op != OpPPC64MOVBZload {
 14053				break
 14054			}
 14055			i0 := x2.AuxInt
 14056			if x2.Aux != s {
 14057				break
 14058			}
 14059			_ = x2.Args[1]
 14060			if p != x2.Args[0] {
 14061				break
 14062			}
 14063			if mem != x2.Args[1] {
 14064				break
 14065			}
 14066			if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 14067				break
 14068			}
 14069			b = mergePoint(b, x0, x1, x2)
 14070			v0 := b.NewValue0(x2.Pos, OpPPC64MOVWBRload, t)
 14071			v.reset(OpCopy)
 14072			v.AddArg(v0)
 14073			v1 := b.NewValue0(x2.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 14074			v1.AuxInt = i0
 14075			v1.Aux = s
 14076			v1.AddArg(p)
 14077			v0.AddArg(v1)
 14078			v0.AddArg(mem)
 14079			return true
 14080		}
 14081		// match: (OR <t> o0:(OR <t> x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i2] {s} p) mem) s0:(SLWconst x1:(MOVBZload [i1] {s} p mem) [16])) s1:(SLWconst x2:(MOVBZload [i0] {s} p mem) [24]))
 14082		// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 14083		// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 14084		for {
 14085			t := v.Type
 14086			_ = v.Args[1]
 14087			o0 := v.Args[0]
 14088			if o0.Op != OpPPC64OR {
 14089				break
 14090			}
 14091			if o0.Type != t {
 14092				break
 14093			}
 14094			_ = o0.Args[1]
 14095			x0 := o0.Args[0]
 14096			if x0.Op != OpPPC64MOVHBRload {
 14097				break
 14098			}
 14099			if x0.Type != t {
 14100				break
 14101			}
 14102			mem := x0.Args[1]
 14103			x0_0 := x0.Args[0]
 14104			if x0_0.Op != OpPPC64MOVDaddr {
 14105				break
 14106			}
 14107			if x0_0.Type != typ.Uintptr {
 14108				break
 14109			}
 14110			i2 := x0_0.AuxInt
 14111			s := x0_0.Aux
 14112			p := x0_0.Args[0]
 14113			s0 := o0.Args[1]
 14114			if s0.Op != OpPPC64SLWconst {
 14115				break
 14116			}
 14117			if s0.AuxInt != 16 {
 14118				break
 14119			}
 14120			x1 := s0.Args[0]
 14121			if x1.Op != OpPPC64MOVBZload {
 14122				break
 14123			}
 14124			i1 := x1.AuxInt
 14125			if x1.Aux != s {
 14126				break
 14127			}
 14128			_ = x1.Args[1]
 14129			if p != x1.Args[0] {
 14130				break
 14131			}
 14132			if mem != x1.Args[1] {
 14133				break
 14134			}
 14135			s1 := v.Args[1]
 14136			if s1.Op != OpPPC64SLWconst {
 14137				break
 14138			}
 14139			if s1.AuxInt != 24 {
 14140				break
 14141			}
 14142			x2 := s1.Args[0]
 14143			if x2.Op != OpPPC64MOVBZload {
 14144				break
 14145			}
 14146			i0 := x2.AuxInt
 14147			if x2.Aux != s {
 14148				break
 14149			}
 14150			_ = x2.Args[1]
 14151			if p != x2.Args[0] {
 14152				break
 14153			}
 14154			if mem != x2.Args[1] {
 14155				break
 14156			}
 14157			if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 14158				break
 14159			}
 14160			b = mergePoint(b, x0, x1, x2)
 14161			v0 := b.NewValue0(x2.Pos, OpPPC64MOVWBRload, t)
 14162			v.reset(OpCopy)
 14163			v.AddArg(v0)
 14164			v1 := b.NewValue0(x2.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 14165			v1.AuxInt = i0
 14166			v1.Aux = s
 14167			v1.AddArg(p)
 14168			v0.AddArg(v1)
 14169			v0.AddArg(mem)
 14170			return true
 14171		}
 14172		// match: (OR <t> s1:(SLDconst x2:(MOVBZload [i0] {s} p mem) [24]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [16]) x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i2] {s} p) mem)))
 14173		// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 14174		// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 14175		for {
 14176			t := v.Type
 14177			_ = v.Args[1]
 14178			s1 := v.Args[0]
 14179			if s1.Op != OpPPC64SLDconst {
 14180				break
 14181			}
 14182			if s1.AuxInt != 24 {
 14183				break
 14184			}
 14185			x2 := s1.Args[0]
 14186			if x2.Op != OpPPC64MOVBZload {
 14187				break
 14188			}
 14189			i0 := x2.AuxInt
 14190			s := x2.Aux
 14191			mem := x2.Args[1]
 14192			p := x2.Args[0]
 14193			o0 := v.Args[1]
 14194			if o0.Op != OpPPC64OR {
 14195				break
 14196			}
 14197			if o0.Type != t {
 14198				break
 14199			}
 14200			_ = o0.Args[1]
 14201			s0 := o0.Args[0]
 14202			if s0.Op != OpPPC64SLDconst {
 14203				break
 14204			}
 14205			if s0.AuxInt != 16 {
 14206				break
 14207			}
 14208			x1 := s0.Args[0]
 14209			if x1.Op != OpPPC64MOVBZload {
 14210				break
 14211			}
 14212			i1 := x1.AuxInt
 14213			if x1.Aux != s {
 14214				break
 14215			}
 14216			_ = x1.Args[1]
 14217			if p != x1.Args[0] {
 14218				break
 14219			}
 14220			if mem != x1.Args[1] {
 14221				break
 14222			}
 14223			x0 := o0.Args[1]
 14224			if x0.Op != OpPPC64MOVHBRload {
 14225				break
 14226			}
 14227			if x0.Type != t {
 14228				break
 14229			}
 14230			_ = x0.Args[1]
 14231			x0_0 := x0.Args[0]
 14232			if x0_0.Op != OpPPC64MOVDaddr {
 14233				break
 14234			}
 14235			if x0_0.Type != typ.Uintptr {
 14236				break
 14237			}
 14238			i2 := x0_0.AuxInt
 14239			if x0_0.Aux != s {
 14240				break
 14241			}
 14242			if p != x0_0.Args[0] {
 14243				break
 14244			}
 14245			if mem != x0.Args[1] {
 14246				break
 14247			}
 14248			if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 14249				break
 14250			}
 14251			b = mergePoint(b, x0, x1, x2)
 14252			v0 := b.NewValue0(x0.Pos, OpPPC64MOVWBRload, t)
 14253			v.reset(OpCopy)
 14254			v.AddArg(v0)
 14255			v1 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 14256			v1.AuxInt = i0
 14257			v1.Aux = s
 14258			v1.AddArg(p)
 14259			v0.AddArg(v1)
 14260			v0.AddArg(mem)
 14261			return true
 14262		}
 14263		// match: (OR <t> s1:(SLDconst x2:(MOVBZload [i0] {s} p mem) [24]) o0:(OR <t> x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i2] {s} p) mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [16])))
 14264		// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 14265		// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 14266		for {
 14267			t := v.Type
 14268			_ = v.Args[1]
 14269			s1 := v.Args[0]
 14270			if s1.Op != OpPPC64SLDconst {
 14271				break
 14272			}
 14273			if s1.AuxInt != 24 {
 14274				break
 14275			}
 14276			x2 := s1.Args[0]
 14277			if x2.Op != OpPPC64MOVBZload {
 14278				break
 14279			}
 14280			i0 := x2.AuxInt
 14281			s := x2.Aux
 14282			mem := x2.Args[1]
 14283			p := x2.Args[0]
 14284			o0 := v.Args[1]
 14285			if o0.Op != OpPPC64OR {
 14286				break
 14287			}
 14288			if o0.Type != t {
 14289				break
 14290			}
 14291			_ = o0.Args[1]
 14292			x0 := o0.Args[0]
 14293			if x0.Op != OpPPC64MOVHBRload {
 14294				break
 14295			}
 14296			if x0.Type != t {
 14297				break
 14298			}
 14299			_ = x0.Args[1]
 14300			x0_0 := x0.Args[0]
 14301			if x0_0.Op != OpPPC64MOVDaddr {
 14302				break
 14303			}
 14304			if x0_0.Type != typ.Uintptr {
 14305				break
 14306			}
 14307			i2 := x0_0.AuxInt
 14308			if x0_0.Aux != s {
 14309				break
 14310			}
 14311			if p != x0_0.Args[0] {
 14312				break
 14313			}
 14314			if mem != x0.Args[1] {
 14315				break
 14316			}
 14317			s0 := o0.Args[1]
 14318			if s0.Op != OpPPC64SLDconst {
 14319				break
 14320			}
 14321			if s0.AuxInt != 16 {
 14322				break
 14323			}
 14324			x1 := s0.Args[0]
 14325			if x1.Op != OpPPC64MOVBZload {
 14326				break
 14327			}
 14328			i1 := x1.AuxInt
 14329			if x1.Aux != s {
 14330				break
 14331			}
 14332			_ = x1.Args[1]
 14333			if p != x1.Args[0] {
 14334				break
 14335			}
 14336			if mem != x1.Args[1] {
 14337				break
 14338			}
 14339			if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 14340				break
 14341			}
 14342			b = mergePoint(b, x0, x1, x2)
 14343			v0 := b.NewValue0(x1.Pos, OpPPC64MOVWBRload, t)
 14344			v.reset(OpCopy)
 14345			v.AddArg(v0)
 14346			v1 := b.NewValue0(x1.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 14347			v1.AuxInt = i0
 14348			v1.Aux = s
 14349			v1.AddArg(p)
 14350			v0.AddArg(v1)
 14351			v0.AddArg(mem)
 14352			return true
 14353		}
 14354		// match: (OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [16]) x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i2] {s} p) mem)) s1:(SLDconst x2:(MOVBZload [i0] {s} p mem) [24]))
 14355		// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 14356		// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 14357		for {
 14358			t := v.Type
 14359			_ = v.Args[1]
 14360			o0 := v.Args[0]
 14361			if o0.Op != OpPPC64OR {
 14362				break
 14363			}
 14364			if o0.Type != t {
 14365				break
 14366			}
 14367			_ = o0.Args[1]
 14368			s0 := o0.Args[0]
 14369			if s0.Op != OpPPC64SLDconst {
 14370				break
 14371			}
 14372			if s0.AuxInt != 16 {
 14373				break
 14374			}
 14375			x1 := s0.Args[0]
 14376			if x1.Op != OpPPC64MOVBZload {
 14377				break
 14378			}
 14379			i1 := x1.AuxInt
 14380			s := x1.Aux
 14381			mem := x1.Args[1]
 14382			p := x1.Args[0]
 14383			x0 := o0.Args[1]
 14384			if x0.Op != OpPPC64MOVHBRload {
 14385				break
 14386			}
 14387			if x0.Type != t {
 14388				break
 14389			}
 14390			_ = x0.Args[1]
 14391			x0_0 := x0.Args[0]
 14392			if x0_0.Op != OpPPC64MOVDaddr {
 14393				break
 14394			}
 14395			if x0_0.Type != typ.Uintptr {
 14396				break
 14397			}
 14398			i2 := x0_0.AuxInt
 14399			if x0_0.Aux != s {
 14400				break
 14401			}
 14402			if p != x0_0.Args[0] {
 14403				break
 14404			}
 14405			if mem != x0.Args[1] {
 14406				break
 14407			}
 14408			s1 := v.Args[1]
 14409			if s1.Op != OpPPC64SLDconst {
 14410				break
 14411			}
 14412			if s1.AuxInt != 24 {
 14413				break
 14414			}
 14415			x2 := s1.Args[0]
 14416			if x2.Op != OpPPC64MOVBZload {
 14417				break
 14418			}
 14419			i0 := x2.AuxInt
 14420			if x2.Aux != s {
 14421				break
 14422			}
 14423			_ = x2.Args[1]
 14424			if p != x2.Args[0] {
 14425				break
 14426			}
 14427			if mem != x2.Args[1] {
 14428				break
 14429			}
 14430			if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 14431				break
 14432			}
 14433			b = mergePoint(b, x0, x1, x2)
 14434			v0 := b.NewValue0(x2.Pos, OpPPC64MOVWBRload, t)
 14435			v.reset(OpCopy)
 14436			v.AddArg(v0)
 14437			v1 := b.NewValue0(x2.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 14438			v1.AuxInt = i0
 14439			v1.Aux = s
 14440			v1.AddArg(p)
 14441			v0.AddArg(v1)
 14442			v0.AddArg(mem)
 14443			return true
 14444		}
 14445		// match: (OR <t> o0:(OR <t> x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i2] {s} p) mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [16])) s1:(SLDconst x2:(MOVBZload [i0] {s} p mem) [24]))
 14446		// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 14447		// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 14448		for {
 14449			t := v.Type
 14450			_ = v.Args[1]
 14451			o0 := v.Args[0]
 14452			if o0.Op != OpPPC64OR {
 14453				break
 14454			}
 14455			if o0.Type != t {
 14456				break
 14457			}
 14458			_ = o0.Args[1]
 14459			x0 := o0.Args[0]
 14460			if x0.Op != OpPPC64MOVHBRload {
 14461				break
 14462			}
 14463			if x0.Type != t {
 14464				break
 14465			}
 14466			mem := x0.Args[1]
 14467			x0_0 := x0.Args[0]
 14468			if x0_0.Op != OpPPC64MOVDaddr {
 14469				break
 14470			}
 14471			if x0_0.Type != typ.Uintptr {
 14472				break
 14473			}
 14474			i2 := x0_0.AuxInt
 14475			s := x0_0.Aux
 14476			p := x0_0.Args[0]
 14477			s0 := o0.Args[1]
 14478			if s0.Op != OpPPC64SLDconst {
 14479				break
 14480			}
 14481			if s0.AuxInt != 16 {
 14482				break
 14483			}
 14484			x1 := s0.Args[0]
 14485			if x1.Op != OpPPC64MOVBZload {
 14486				break
 14487			}
 14488			i1 := x1.AuxInt
 14489			if x1.Aux != s {
 14490				break
 14491			}
 14492			_ = x1.Args[1]
 14493			if p != x1.Args[0] {
 14494				break
 14495			}
 14496			if mem != x1.Args[1] {
 14497				break
 14498			}
 14499			s1 := v.Args[1]
 14500			if s1.Op != OpPPC64SLDconst {
 14501				break
 14502			}
 14503			if s1.AuxInt != 24 {
 14504				break
 14505			}
 14506			x2 := s1.Args[0]
 14507			if x2.Op != OpPPC64MOVBZload {
 14508				break
 14509			}
 14510			i0 := x2.AuxInt
 14511			if x2.Aux != s {
 14512				break
 14513			}
 14514			_ = x2.Args[1]
 14515			if p != x2.Args[0] {
 14516				break
 14517			}
 14518			if mem != x2.Args[1] {
 14519				break
 14520			}
 14521			if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 14522				break
 14523			}
 14524			b = mergePoint(b, x0, x1, x2)
 14525			v0 := b.NewValue0(x2.Pos, OpPPC64MOVWBRload, t)
 14526			v.reset(OpCopy)
 14527			v.AddArg(v0)
 14528			v1 := b.NewValue0(x2.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 14529			v1.AuxInt = i0
 14530			v1.Aux = s
 14531			v1.AddArg(p)
 14532			v0.AddArg(v1)
 14533			v0.AddArg(mem)
 14534			return true
 14535		}
 14536		return false
 14537	}
 14538	func rewriteValuePPC64_OpPPC64OR_40(v *Value) bool {
 14539		b := v.Block
 14540		config := b.Func.Config
 14541		typ := &b.Func.Config.Types
 14542		// match: (OR <t> x0:(MOVBZload [i3] {s} p mem) o0:(OR <t> s0:(SLWconst x1:(MOVBZload [i2] {s} p mem) [8]) s1:(SLWconst x2:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [16])))
 14543		// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 14544		// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 14545		for {
 14546			t := v.Type
 14547			_ = v.Args[1]
 14548			x0 := v.Args[0]
 14549			if x0.Op != OpPPC64MOVBZload {
 14550				break
 14551			}
 14552			i3 := x0.AuxInt
 14553			s := x0.Aux
 14554			mem := x0.Args[1]
 14555			p := x0.Args[0]
 14556			o0 := v.Args[1]
 14557			if o0.Op != OpPPC64OR {
 14558				break
 14559			}
 14560			if o0.Type != t {
 14561				break
 14562			}
 14563			_ = o0.Args[1]
 14564			s0 := o0.Args[0]
 14565			if s0.Op != OpPPC64SLWconst {
 14566				break
 14567			}
 14568			if s0.AuxInt != 8 {
 14569				break
 14570			}
 14571			x1 := s0.Args[0]
 14572			if x1.Op != OpPPC64MOVBZload {
 14573				break
 14574			}
 14575			i2 := x1.AuxInt
 14576			if x1.Aux != s {
 14577				break
 14578			}
 14579			_ = x1.Args[1]
 14580			if p != x1.Args[0] {
 14581				break
 14582			}
 14583			if mem != x1.Args[1] {
 14584				break
 14585			}
 14586			s1 := o0.Args[1]
 14587			if s1.Op != OpPPC64SLWconst {
 14588				break
 14589			}
 14590			if s1.AuxInt != 16 {
 14591				break
 14592			}
 14593			x2 := s1.Args[0]
 14594			if x2.Op != OpPPC64MOVHBRload {
 14595				break
 14596			}
 14597			if x2.Type != t {
 14598				break
 14599			}
 14600			_ = x2.Args[1]
 14601			x2_0 := x2.Args[0]
 14602			if x2_0.Op != OpPPC64MOVDaddr {
 14603				break
 14604			}
 14605			if x2_0.Type != typ.Uintptr {
 14606				break
 14607			}
 14608			i0 := x2_0.AuxInt
 14609			if x2_0.Aux != s {
 14610				break
 14611			}
 14612			if p != x2_0.Args[0] {
 14613				break
 14614			}
 14615			if mem != x2.Args[1] {
 14616				break
 14617			}
 14618			if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 14619				break
 14620			}
 14621			b = mergePoint(b, x0, x1, x2)
 14622			v0 := b.NewValue0(x2.Pos, OpPPC64MOVWBRload, t)
 14623			v.reset(OpCopy)
 14624			v.AddArg(v0)
 14625			v1 := b.NewValue0(x2.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 14626			v1.AuxInt = i0
 14627			v1.Aux = s
 14628			v1.AddArg(p)
 14629			v0.AddArg(v1)
 14630			v0.AddArg(mem)
 14631			return true
 14632		}
 14633		// match: (OR <t> x0:(MOVBZload [i3] {s} p mem) o0:(OR <t> s1:(SLWconst x2:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [16]) s0:(SLWconst x1:(MOVBZload [i2] {s} p mem) [8])))
 14634		// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 14635		// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 14636		for {
 14637			t := v.Type
 14638			_ = v.Args[1]
 14639			x0 := v.Args[0]
 14640			if x0.Op != OpPPC64MOVBZload {
 14641				break
 14642			}
 14643			i3 := x0.AuxInt
 14644			s := x0.Aux
 14645			mem := x0.Args[1]
 14646			p := x0.Args[0]
 14647			o0 := v.Args[1]
 14648			if o0.Op != OpPPC64OR {
 14649				break
 14650			}
 14651			if o0.Type != t {
 14652				break
 14653			}
 14654			_ = o0.Args[1]
 14655			s1 := o0.Args[0]
 14656			if s1.Op != OpPPC64SLWconst {
 14657				break
 14658			}
 14659			if s1.AuxInt != 16 {
 14660				break
 14661			}
 14662			x2 := s1.Args[0]
 14663			if x2.Op != OpPPC64MOVHBRload {
 14664				break
 14665			}
 14666			if x2.Type != t {
 14667				break
 14668			}
 14669			_ = x2.Args[1]
 14670			x2_0 := x2.Args[0]
 14671			if x2_0.Op != OpPPC64MOVDaddr {
 14672				break
 14673			}
 14674			if x2_0.Type != typ.Uintptr {
 14675				break
 14676			}
 14677			i0 := x2_0.AuxInt
 14678			if x2_0.Aux != s {
 14679				break
 14680			}
 14681			if p != x2_0.Args[0] {
 14682				break
 14683			}
 14684			if mem != x2.Args[1] {
 14685				break
 14686			}
 14687			s0 := o0.Args[1]
 14688			if s0.Op != OpPPC64SLWconst {
 14689				break
 14690			}
 14691			if s0.AuxInt != 8 {
 14692				break
 14693			}
 14694			x1 := s0.Args[0]
 14695			if x1.Op != OpPPC64MOVBZload {
 14696				break
 14697			}
 14698			i2 := x1.AuxInt
 14699			if x1.Aux != s {
 14700				break
 14701			}
 14702			_ = x1.Args[1]
 14703			if p != x1.Args[0] {
 14704				break
 14705			}
 14706			if mem != x1.Args[1] {
 14707				break
 14708			}
 14709			if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 14710				break
 14711			}
 14712			b = mergePoint(b, x0, x1, x2)
 14713			v0 := b.NewValue0(x1.Pos, OpPPC64MOVWBRload, t)
 14714			v.reset(OpCopy)
 14715			v.AddArg(v0)
 14716			v1 := b.NewValue0(x1.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 14717			v1.AuxInt = i0
 14718			v1.Aux = s
 14719			v1.AddArg(p)
 14720			v0.AddArg(v1)
 14721			v0.AddArg(mem)
 14722			return true
 14723		}
 14724		// match: (OR <t> o0:(OR <t> s0:(SLWconst x1:(MOVBZload [i2] {s} p mem) [8]) s1:(SLWconst x2:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [16])) x0:(MOVBZload [i3] {s} p mem))
 14725		// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 14726		// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 14727		for {
 14728			t := v.Type
 14729			_ = v.Args[1]
 14730			o0 := v.Args[0]
 14731			if o0.Op != OpPPC64OR {
 14732				break
 14733			}
 14734			if o0.Type != t {
 14735				break
 14736			}
 14737			_ = o0.Args[1]
 14738			s0 := o0.Args[0]
 14739			if s0.Op != OpPPC64SLWconst {
 14740				break
 14741			}
 14742			if s0.AuxInt != 8 {
 14743				break
 14744			}
 14745			x1 := s0.Args[0]
 14746			if x1.Op != OpPPC64MOVBZload {
 14747				break
 14748			}
 14749			i2 := x1.AuxInt
 14750			s := x1.Aux
 14751			mem := x1.Args[1]
 14752			p := x1.Args[0]
 14753			s1 := o0.Args[1]
 14754			if s1.Op != OpPPC64SLWconst {
 14755				break
 14756			}
 14757			if s1.AuxInt != 16 {
 14758				break
 14759			}
 14760			x2 := s1.Args[0]
 14761			if x2.Op != OpPPC64MOVHBRload {
 14762				break
 14763			}
 14764			if x2.Type != t {
 14765				break
 14766			}
 14767			_ = x2.Args[1]
 14768			x2_0 := x2.Args[0]
 14769			if x2_0.Op != OpPPC64MOVDaddr {
 14770				break
 14771			}
 14772			if x2_0.Type != typ.Uintptr {
 14773				break
 14774			}
 14775			i0 := x2_0.AuxInt
 14776			if x2_0.Aux != s {
 14777				break
 14778			}
 14779			if p != x2_0.Args[0] {
 14780				break
 14781			}
 14782			if mem != x2.Args[1] {
 14783				break
 14784			}
 14785			x0 := v.Args[1]
 14786			if x0.Op != OpPPC64MOVBZload {
 14787				break
 14788			}
 14789			i3 := x0.AuxInt
 14790			if x0.Aux != s {
 14791				break
 14792			}
 14793			_ = x0.Args[1]
 14794			if p != x0.Args[0] {
 14795				break
 14796			}
 14797			if mem != x0.Args[1] {
 14798				break
 14799			}
 14800			if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 14801				break
 14802			}
 14803			b = mergePoint(b, x0, x1, x2)
 14804			v0 := b.NewValue0(x0.Pos, OpPPC64MOVWBRload, t)
 14805			v.reset(OpCopy)
 14806			v.AddArg(v0)
 14807			v1 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 14808			v1.AuxInt = i0
 14809			v1.Aux = s
 14810			v1.AddArg(p)
 14811			v0.AddArg(v1)
 14812			v0.AddArg(mem)
 14813			return true
 14814		}
 14815		// match: (OR <t> o0:(OR <t> s1:(SLWconst x2:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [16]) s0:(SLWconst x1:(MOVBZload [i2] {s} p mem) [8])) x0:(MOVBZload [i3] {s} p mem))
 14816		// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 14817		// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 14818		for {
 14819			t := v.Type
 14820			_ = v.Args[1]
 14821			o0 := v.Args[0]
 14822			if o0.Op != OpPPC64OR {
 14823				break
 14824			}
 14825			if o0.Type != t {
 14826				break
 14827			}
 14828			_ = o0.Args[1]
 14829			s1 := o0.Args[0]
 14830			if s1.Op != OpPPC64SLWconst {
 14831				break
 14832			}
 14833			if s1.AuxInt != 16 {
 14834				break
 14835			}
 14836			x2 := s1.Args[0]
 14837			if x2.Op != OpPPC64MOVHBRload {
 14838				break
 14839			}
 14840			if x2.Type != t {
 14841				break
 14842			}
 14843			mem := x2.Args[1]
 14844			x2_0 := x2.Args[0]
 14845			if x2_0.Op != OpPPC64MOVDaddr {
 14846				break
 14847			}
 14848			if x2_0.Type != typ.Uintptr {
 14849				break
 14850			}
 14851			i0 := x2_0.AuxInt
 14852			s := x2_0.Aux
 14853			p := x2_0.Args[0]
 14854			s0 := o0.Args[1]
 14855			if s0.Op != OpPPC64SLWconst {
 14856				break
 14857			}
 14858			if s0.AuxInt != 8 {
 14859				break
 14860			}
 14861			x1 := s0.Args[0]
 14862			if x1.Op != OpPPC64MOVBZload {
 14863				break
 14864			}
 14865			i2 := x1.AuxInt
 14866			if x1.Aux != s {
 14867				break
 14868			}
 14869			_ = x1.Args[1]
 14870			if p != x1.Args[0] {
 14871				break
 14872			}
 14873			if mem != x1.Args[1] {
 14874				break
 14875			}
 14876			x0 := v.Args[1]
 14877			if x0.Op != OpPPC64MOVBZload {
 14878				break
 14879			}
 14880			i3 := x0.AuxInt
 14881			if x0.Aux != s {
 14882				break
 14883			}
 14884			_ = x0.Args[1]
 14885			if p != x0.Args[0] {
 14886				break
 14887			}
 14888			if mem != x0.Args[1] {
 14889				break
 14890			}
 14891			if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 14892				break
 14893			}
 14894			b = mergePoint(b, x0, x1, x2)
 14895			v0 := b.NewValue0(x0.Pos, OpPPC64MOVWBRload, t)
 14896			v.reset(OpCopy)
 14897			v.AddArg(v0)
 14898			v1 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 14899			v1.AuxInt = i0
 14900			v1.Aux = s
 14901			v1.AddArg(p)
 14902			v0.AddArg(v1)
 14903			v0.AddArg(mem)
 14904			return true
 14905		}
 14906		// match: (OR <t> x0:(MOVBZload [i3] {s} p mem) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i2] {s} p mem) [8]) s1:(SLDconst x2:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [16])))
 14907		// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 14908		// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 14909		for {
 14910			t := v.Type
 14911			_ = v.Args[1]
 14912			x0 := v.Args[0]
 14913			if x0.Op != OpPPC64MOVBZload {
 14914				break
 14915			}
 14916			i3 := x0.AuxInt
 14917			s := x0.Aux
 14918			mem := x0.Args[1]
 14919			p := x0.Args[0]
 14920			o0 := v.Args[1]
 14921			if o0.Op != OpPPC64OR {
 14922				break
 14923			}
 14924			if o0.Type != t {
 14925				break
 14926			}
 14927			_ = o0.Args[1]
 14928			s0 := o0.Args[0]
 14929			if s0.Op != OpPPC64SLDconst {
 14930				break
 14931			}
 14932			if s0.AuxInt != 8 {
 14933				break
 14934			}
 14935			x1 := s0.Args[0]
 14936			if x1.Op != OpPPC64MOVBZload {
 14937				break
 14938			}
 14939			i2 := x1.AuxInt
 14940			if x1.Aux != s {
 14941				break
 14942			}
 14943			_ = x1.Args[1]
 14944			if p != x1.Args[0] {
 14945				break
 14946			}
 14947			if mem != x1.Args[1] {
 14948				break
 14949			}
 14950			s1 := o0.Args[1]
 14951			if s1.Op != OpPPC64SLDconst {
 14952				break
 14953			}
 14954			if s1.AuxInt != 16 {
 14955				break
 14956			}
 14957			x2 := s1.Args[0]
 14958			if x2.Op != OpPPC64MOVHBRload {
 14959				break
 14960			}
 14961			if x2.Type != t {
 14962				break
 14963			}
 14964			_ = x2.Args[1]
 14965			x2_0 := x2.Args[0]
 14966			if x2_0.Op != OpPPC64MOVDaddr {
 14967				break
 14968			}
 14969			if x2_0.Type != typ.Uintptr {
 14970				break
 14971			}
 14972			i0 := x2_0.AuxInt
 14973			if x2_0.Aux != s {
 14974				break
 14975			}
 14976			if p != x2_0.Args[0] {
 14977				break
 14978			}
 14979			if mem != x2.Args[1] {
 14980				break
 14981			}
 14982			if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 14983				break
 14984			}
 14985			b = mergePoint(b, x0, x1, x2)
 14986			v0 := b.NewValue0(x2.Pos, OpPPC64MOVWBRload, t)
 14987			v.reset(OpCopy)
 14988			v.AddArg(v0)
 14989			v1 := b.NewValue0(x2.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 14990			v1.AuxInt = i0
 14991			v1.Aux = s
 14992			v1.AddArg(p)
 14993			v0.AddArg(v1)
 14994			v0.AddArg(mem)
 14995			return true
 14996		}
 14997		// match: (OR <t> x0:(MOVBZload [i3] {s} p mem) o0:(OR <t> s1:(SLDconst x2:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [16]) s0:(SLDconst x1:(MOVBZload [i2] {s} p mem) [8])))
 14998		// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 14999		// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 15000		for {
 15001			t := v.Type
 15002			_ = v.Args[1]
 15003			x0 := v.Args[0]
 15004			if x0.Op != OpPPC64MOVBZload {
 15005				break
 15006			}
 15007			i3 := x0.AuxInt
 15008			s := x0.Aux
 15009			mem := x0.Args[1]
 15010			p := x0.Args[0]
 15011			o0 := v.Args[1]
 15012			if o0.Op != OpPPC64OR {
 15013				break
 15014			}
 15015			if o0.Type != t {
 15016				break
 15017			}
 15018			_ = o0.Args[1]
 15019			s1 := o0.Args[0]
 15020			if s1.Op != OpPPC64SLDconst {
 15021				break
 15022			}
 15023			if s1.AuxInt != 16 {
 15024				break
 15025			}
 15026			x2 := s1.Args[0]
 15027			if x2.Op != OpPPC64MOVHBRload {
 15028				break
 15029			}
 15030			if x2.Type != t {
 15031				break
 15032			}
 15033			_ = x2.Args[1]
 15034			x2_0 := x2.Args[0]
 15035			if x2_0.Op != OpPPC64MOVDaddr {
 15036				break
 15037			}
 15038			if x2_0.Type != typ.Uintptr {
 15039				break
 15040			}
 15041			i0 := x2_0.AuxInt
 15042			if x2_0.Aux != s {
 15043				break
 15044			}
 15045			if p != x2_0.Args[0] {
 15046				break
 15047			}
 15048			if mem != x2.Args[1] {
 15049				break
 15050			}
 15051			s0 := o0.Args[1]
 15052			if s0.Op != OpPPC64SLDconst {
 15053				break
 15054			}
 15055			if s0.AuxInt != 8 {
 15056				break
 15057			}
 15058			x1 := s0.Args[0]
 15059			if x1.Op != OpPPC64MOVBZload {
 15060				break
 15061			}
 15062			i2 := x1.AuxInt
 15063			if x1.Aux != s {
 15064				break
 15065			}
 15066			_ = x1.Args[1]
 15067			if p != x1.Args[0] {
 15068				break
 15069			}
 15070			if mem != x1.Args[1] {
 15071				break
 15072			}
 15073			if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 15074				break
 15075			}
 15076			b = mergePoint(b, x0, x1, x2)
 15077			v0 := b.NewValue0(x1.Pos, OpPPC64MOVWBRload, t)
 15078			v.reset(OpCopy)
 15079			v.AddArg(v0)
 15080			v1 := b.NewValue0(x1.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 15081			v1.AuxInt = i0
 15082			v1.Aux = s
 15083			v1.AddArg(p)
 15084			v0.AddArg(v1)
 15085			v0.AddArg(mem)
 15086			return true
 15087		}
 15088		// match: (OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i2] {s} p mem) [8]) s1:(SLDconst x2:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [16])) x0:(MOVBZload [i3] {s} p mem))
 15089		// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 15090		// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 15091		for {
 15092			t := v.Type
 15093			_ = v.Args[1]
 15094			o0 := v.Args[0]
 15095			if o0.Op != OpPPC64OR {
 15096				break
 15097			}
 15098			if o0.Type != t {
 15099				break
 15100			}
 15101			_ = o0.Args[1]
 15102			s0 := o0.Args[0]
 15103			if s0.Op != OpPPC64SLDconst {
 15104				break
 15105			}
 15106			if s0.AuxInt != 8 {
 15107				break
 15108			}
 15109			x1 := s0.Args[0]
 15110			if x1.Op != OpPPC64MOVBZload {
 15111				break
 15112			}
 15113			i2 := x1.AuxInt
 15114			s := x1.Aux
 15115			mem := x1.Args[1]
 15116			p := x1.Args[0]
 15117			s1 := o0.Args[1]
 15118			if s1.Op != OpPPC64SLDconst {
 15119				break
 15120			}
 15121			if s1.AuxInt != 16 {
 15122				break
 15123			}
 15124			x2 := s1.Args[0]
 15125			if x2.Op != OpPPC64MOVHBRload {
 15126				break
 15127			}
 15128			if x2.Type != t {
 15129				break
 15130			}
 15131			_ = x2.Args[1]
 15132			x2_0 := x2.Args[0]
 15133			if x2_0.Op != OpPPC64MOVDaddr {
 15134				break
 15135			}
 15136			if x2_0.Type != typ.Uintptr {
 15137				break
 15138			}
 15139			i0 := x2_0.AuxInt
 15140			if x2_0.Aux != s {
 15141				break
 15142			}
 15143			if p != x2_0.Args[0] {
 15144				break
 15145			}
 15146			if mem != x2.Args[1] {
 15147				break
 15148			}
 15149			x0 := v.Args[1]
 15150			if x0.Op != OpPPC64MOVBZload {
 15151				break
 15152			}
 15153			i3 := x0.AuxInt
 15154			if x0.Aux != s {
 15155				break
 15156			}
 15157			_ = x0.Args[1]
 15158			if p != x0.Args[0] {
 15159				break
 15160			}
 15161			if mem != x0.Args[1] {
 15162				break
 15163			}
 15164			if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 15165				break
 15166			}
 15167			b = mergePoint(b, x0, x1, x2)
 15168			v0 := b.NewValue0(x0.Pos, OpPPC64MOVWBRload, t)
 15169			v.reset(OpCopy)
 15170			v.AddArg(v0)
 15171			v1 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 15172			v1.AuxInt = i0
 15173			v1.Aux = s
 15174			v1.AddArg(p)
 15175			v0.AddArg(v1)
 15176			v0.AddArg(mem)
 15177			return true
 15178		}
 15179		// match: (OR <t> o0:(OR <t> s1:(SLDconst x2:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [16]) s0:(SLDconst x1:(MOVBZload [i2] {s} p mem) [8])) x0:(MOVBZload [i3] {s} p mem))
 15180		// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
 15181		// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 15182		for {
 15183			t := v.Type
 15184			_ = v.Args[1]
 15185			o0 := v.Args[0]
 15186			if o0.Op != OpPPC64OR {
 15187				break
 15188			}
 15189			if o0.Type != t {
 15190				break
 15191			}
 15192			_ = o0.Args[1]
 15193			s1 := o0.Args[0]
 15194			if s1.Op != OpPPC64SLDconst {
 15195				break
 15196			}
 15197			if s1.AuxInt != 16 {
 15198				break
 15199			}
 15200			x2 := s1.Args[0]
 15201			if x2.Op != OpPPC64MOVHBRload {
 15202				break
 15203			}
 15204			if x2.Type != t {
 15205				break
 15206			}
 15207			mem := x2.Args[1]
 15208			x2_0 := x2.Args[0]
 15209			if x2_0.Op != OpPPC64MOVDaddr {
 15210				break
 15211			}
 15212			if x2_0.Type != typ.Uintptr {
 15213				break
 15214			}
 15215			i0 := x2_0.AuxInt
 15216			s := x2_0.Aux
 15217			p := x2_0.Args[0]
 15218			s0 := o0.Args[1]
 15219			if s0.Op != OpPPC64SLDconst {
 15220				break
 15221			}
 15222			if s0.AuxInt != 8 {
 15223				break
 15224			}
 15225			x1 := s0.Args[0]
 15226			if x1.Op != OpPPC64MOVBZload {
 15227				break
 15228			}
 15229			i2 := x1.AuxInt
 15230			if x1.Aux != s {
 15231				break
 15232			}
 15233			_ = x1.Args[1]
 15234			if p != x1.Args[0] {
 15235				break
 15236			}
 15237			if mem != x1.Args[1] {
 15238				break
 15239			}
 15240			x0 := v.Args[1]
 15241			if x0.Op != OpPPC64MOVBZload {
 15242				break
 15243			}
 15244			i3 := x0.AuxInt
 15245			if x0.Aux != s {
 15246				break
 15247			}
 15248			_ = x0.Args[1]
 15249			if p != x0.Args[0] {
 15250				break
 15251			}
 15252			if mem != x0.Args[1] {
 15253				break
 15254			}
 15255			if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
 15256				break
 15257			}
 15258			b = mergePoint(b, x0, x1, x2)
 15259			v0 := b.NewValue0(x0.Pos, OpPPC64MOVWBRload, t)
 15260			v.reset(OpCopy)
 15261			v.AddArg(v0)
 15262			v1 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 15263			v1.AuxInt = i0
 15264			v1.Aux = s
 15265			v1.AddArg(p)
 15266			v0.AddArg(v1)
 15267			v0.AddArg(mem)
 15268			return true
 15269		}
 15270		// match: (OR <t> s2:(SLDconst x2:(MOVBZload [i3] {s} p mem) [32]) o0:(OR <t> s1:(SLDconst x1:(MOVBZload [i2] {s} p mem) [40]) s0:(SLDconst x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [48])))
 15271		// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)
 15272		// result: @mergePoint(b,x0,x1,x2) (SLDconst <t> (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])
 15273		for {
 15274			t := v.Type
 15275			_ = v.Args[1]
 15276			s2 := v.Args[0]
 15277			if s2.Op != OpPPC64SLDconst {
 15278				break
 15279			}
 15280			if s2.AuxInt != 32 {
 15281				break
 15282			}
 15283			x2 := s2.Args[0]
 15284			if x2.Op != OpPPC64MOVBZload {
 15285				break
 15286			}
 15287			i3 := x2.AuxInt
 15288			s := x2.Aux
 15289			mem := x2.Args[1]
 15290			p := x2.Args[0]
 15291			o0 := v.Args[1]
 15292			if o0.Op != OpPPC64OR {
 15293				break
 15294			}
 15295			if o0.Type != t {
 15296				break
 15297			}
 15298			_ = o0.Args[1]
 15299			s1 := o0.Args[0]
 15300			if s1.Op != OpPPC64SLDconst {
 15301				break
 15302			}
 15303			if s1.AuxInt != 40 {
 15304				break
 15305			}
 15306			x1 := s1.Args[0]
 15307			if x1.Op != OpPPC64MOVBZload {
 15308				break
 15309			}
 15310			i2 := x1.AuxInt
 15311			if x1.Aux != s {
 15312				break
 15313			}
 15314			_ = x1.Args[1]
 15315			if p != x1.Args[0] {
 15316				break
 15317			}
 15318			if mem != x1.Args[1] {
 15319				break
 15320			}
 15321			s0 := o0.Args[1]
 15322			if s0.Op != OpPPC64SLDconst {
 15323				break
 15324			}
 15325			if s0.AuxInt != 48 {
 15326				break
 15327			}
 15328			x0 := s0.Args[0]
 15329			if x0.Op != OpPPC64MOVHBRload {
 15330				break
 15331			}
 15332			if x0.Type != t {
 15333				break
 15334			}
 15335			_ = x0.Args[1]
 15336			x0_0 := x0.Args[0]
 15337			if x0_0.Op != OpPPC64MOVDaddr {
 15338				break
 15339			}
 15340			if x0_0.Type != typ.Uintptr {
 15341				break
 15342			}
 15343			i0 := x0_0.AuxInt
 15344			if x0_0.Aux != s {
 15345				break
 15346			}
 15347			if p != x0_0.Args[0] {
 15348				break
 15349			}
 15350			if mem != x0.Args[1] {
 15351				break
 15352			}
 15353			if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)) {
 15354				break
 15355			}
 15356			b = mergePoint(b, x0, x1, x2)
 15357			v0 := b.NewValue0(x0.Pos, OpPPC64SLDconst, t)
 15358			v.reset(OpCopy)
 15359			v.AddArg(v0)
 15360			v0.AuxInt = 32
 15361			v1 := b.NewValue0(x0.Pos, OpPPC64MOVWBRload, t)
 15362			v2 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 15363			v2.AuxInt = i0
 15364			v2.Aux = s
 15365			v2.AddArg(p)
 15366			v1.AddArg(v2)
 15367			v1.AddArg(mem)
 15368			v0.AddArg(v1)
 15369			return true
 15370		}
 15371		// match: (OR <t> s2:(SLDconst x2:(MOVBZload [i3] {s} p mem) [32]) o0:(OR <t> s0:(SLDconst x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [48]) s1:(SLDconst x1:(MOVBZload [i2] {s} p mem) [40])))
 15372		// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)
 15373		// result: @mergePoint(b,x0,x1,x2) (SLDconst <t> (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])
 15374		for {
 15375			t := v.Type
 15376			_ = v.Args[1]
 15377			s2 := v.Args[0]
 15378			if s2.Op != OpPPC64SLDconst {
 15379				break
 15380			}
 15381			if s2.AuxInt != 32 {
 15382				break
 15383			}
 15384			x2 := s2.Args[0]
 15385			if x2.Op != OpPPC64MOVBZload {
 15386				break
 15387			}
 15388			i3 := x2.AuxInt
 15389			s := x2.Aux
 15390			mem := x2.Args[1]
 15391			p := x2.Args[0]
 15392			o0 := v.Args[1]
 15393			if o0.Op != OpPPC64OR {
 15394				break
 15395			}
 15396			if o0.Type != t {
 15397				break
 15398			}
 15399			_ = o0.Args[1]
 15400			s0 := o0.Args[0]
 15401			if s0.Op != OpPPC64SLDconst {
 15402				break
 15403			}
 15404			if s0.AuxInt != 48 {
 15405				break
 15406			}
 15407			x0 := s0.Args[0]
 15408			if x0.Op != OpPPC64MOVHBRload {
 15409				break
 15410			}
 15411			if x0.Type != t {
 15412				break
 15413			}
 15414			_ = x0.Args[1]
 15415			x0_0 := x0.Args[0]
 15416			if x0_0.Op != OpPPC64MOVDaddr {
 15417				break
 15418			}
 15419			if x0_0.Type != typ.Uintptr {
 15420				break
 15421			}
 15422			i0 := x0_0.AuxInt
 15423			if x0_0.Aux != s {
 15424				break
 15425			}
 15426			if p != x0_0.Args[0] {
 15427				break
 15428			}
 15429			if mem != x0.Args[1] {
 15430				break
 15431			}
 15432			s1 := o0.Args[1]
 15433			if s1.Op != OpPPC64SLDconst {
 15434				break
 15435			}
 15436			if s1.AuxInt != 40 {
 15437				break
 15438			}
 15439			x1 := s1.Args[0]
 15440			if x1.Op != OpPPC64MOVBZload {
 15441				break
 15442			}
 15443			i2 := x1.AuxInt
 15444			if x1.Aux != s {
 15445				break
 15446			}
 15447			_ = x1.Args[1]
 15448			if p != x1.Args[0] {
 15449				break
 15450			}
 15451			if mem != x1.Args[1] {
 15452				break
 15453			}
 15454			if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)) {
 15455				break
 15456			}
 15457			b = mergePoint(b, x0, x1, x2)
 15458			v0 := b.NewValue0(x1.Pos, OpPPC64SLDconst, t)
 15459			v.reset(OpCopy)
 15460			v.AddArg(v0)
 15461			v0.AuxInt = 32
 15462			v1 := b.NewValue0(x1.Pos, OpPPC64MOVWBRload, t)
 15463			v2 := b.NewValue0(x1.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 15464			v2.AuxInt = i0
 15465			v2.Aux = s
 15466			v2.AddArg(p)
 15467			v1.AddArg(v2)
 15468			v1.AddArg(mem)
 15469			v0.AddArg(v1)
 15470			return true
 15471		}
 15472		return false
 15473	}
 15474	func rewriteValuePPC64_OpPPC64OR_50(v *Value) bool {
 15475		b := v.Block
 15476		config := b.Func.Config
 15477		typ := &b.Func.Config.Types
 15478		// match: (OR <t> o0:(OR <t> s1:(SLDconst x1:(MOVBZload [i2] {s} p mem) [40]) s0:(SLDconst x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [48])) s2:(SLDconst x2:(MOVBZload [i3] {s} p mem) [32]))
 15479		// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)
 15480		// result: @mergePoint(b,x0,x1,x2) (SLDconst <t> (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])
 15481		for {
 15482			t := v.Type
 15483			_ = v.Args[1]
 15484			o0 := v.Args[0]
 15485			if o0.Op != OpPPC64OR {
 15486				break
 15487			}
 15488			if o0.Type != t {
 15489				break
 15490			}
 15491			_ = o0.Args[1]
 15492			s1 := o0.Args[0]
 15493			if s1.Op != OpPPC64SLDconst {
 15494				break
 15495			}
 15496			if s1.AuxInt != 40 {
 15497				break
 15498			}
 15499			x1 := s1.Args[0]
 15500			if x1.Op != OpPPC64MOVBZload {
 15501				break
 15502			}
 15503			i2 := x1.AuxInt
 15504			s := x1.Aux
 15505			mem := x1.Args[1]
 15506			p := x1.Args[0]
 15507			s0 := o0.Args[1]
 15508			if s0.Op != OpPPC64SLDconst {
 15509				break
 15510			}
 15511			if s0.AuxInt != 48 {
 15512				break
 15513			}
 15514			x0 := s0.Args[0]
 15515			if x0.Op != OpPPC64MOVHBRload {
 15516				break
 15517			}
 15518			if x0.Type != t {
 15519				break
 15520			}
 15521			_ = x0.Args[1]
 15522			x0_0 := x0.Args[0]
 15523			if x0_0.Op != OpPPC64MOVDaddr {
 15524				break
 15525			}
 15526			if x0_0.Type != typ.Uintptr {
 15527				break
 15528			}
 15529			i0 := x0_0.AuxInt
 15530			if x0_0.Aux != s {
 15531				break
 15532			}
 15533			if p != x0_0.Args[0] {
 15534				break
 15535			}
 15536			if mem != x0.Args[1] {
 15537				break
 15538			}
 15539			s2 := v.Args[1]
 15540			if s2.Op != OpPPC64SLDconst {
 15541				break
 15542			}
 15543			if s2.AuxInt != 32 {
 15544				break
 15545			}
 15546			x2 := s2.Args[0]
 15547			if x2.Op != OpPPC64MOVBZload {
 15548				break
 15549			}
 15550			i3 := x2.AuxInt
 15551			if x2.Aux != s {
 15552				break
 15553			}
 15554			_ = x2.Args[1]
 15555			if p != x2.Args[0] {
 15556				break
 15557			}
 15558			if mem != x2.Args[1] {
 15559				break
 15560			}
 15561			if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)) {
 15562				break
 15563			}
 15564			b = mergePoint(b, x0, x1, x2)
 15565			v0 := b.NewValue0(x2.Pos, OpPPC64SLDconst, t)
 15566			v.reset(OpCopy)
 15567			v.AddArg(v0)
 15568			v0.AuxInt = 32
 15569			v1 := b.NewValue0(x2.Pos, OpPPC64MOVWBRload, t)
 15570			v2 := b.NewValue0(x2.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 15571			v2.AuxInt = i0
 15572			v2.Aux = s
 15573			v2.AddArg(p)
 15574			v1.AddArg(v2)
 15575			v1.AddArg(mem)
 15576			v0.AddArg(v1)
 15577			return true
 15578		}
 15579		// match: (OR <t> o0:(OR <t> s0:(SLDconst x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [48]) s1:(SLDconst x1:(MOVBZload [i2] {s} p mem) [40])) s2:(SLDconst x2:(MOVBZload [i3] {s} p mem) [32]))
 15580		// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)
 15581		// result: @mergePoint(b,x0,x1,x2) (SLDconst <t> (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])
 15582		for {
 15583			t := v.Type
 15584			_ = v.Args[1]
 15585			o0 := v.Args[0]
 15586			if o0.Op != OpPPC64OR {
 15587				break
 15588			}
 15589			if o0.Type != t {
 15590				break
 15591			}
 15592			_ = o0.Args[1]
 15593			s0 := o0.Args[0]
 15594			if s0.Op != OpPPC64SLDconst {
 15595				break
 15596			}
 15597			if s0.AuxInt != 48 {
 15598				break
 15599			}
 15600			x0 := s0.Args[0]
 15601			if x0.Op != OpPPC64MOVHBRload {
 15602				break
 15603			}
 15604			if x0.Type != t {
 15605				break
 15606			}
 15607			mem := x0.Args[1]
 15608			x0_0 := x0.Args[0]
 15609			if x0_0.Op != OpPPC64MOVDaddr {
 15610				break
 15611			}
 15612			if x0_0.Type != typ.Uintptr {
 15613				break
 15614			}
 15615			i0 := x0_0.AuxInt
 15616			s := x0_0.Aux
 15617			p := x0_0.Args[0]
 15618			s1 := o0.Args[1]
 15619			if s1.Op != OpPPC64SLDconst {
 15620				break
 15621			}
 15622			if s1.AuxInt != 40 {
 15623				break
 15624			}
 15625			x1 := s1.Args[0]
 15626			if x1.Op != OpPPC64MOVBZload {
 15627				break
 15628			}
 15629			i2 := x1.AuxInt
 15630			if x1.Aux != s {
 15631				break
 15632			}
 15633			_ = x1.Args[1]
 15634			if p != x1.Args[0] {
 15635				break
 15636			}
 15637			if mem != x1.Args[1] {
 15638				break
 15639			}
 15640			s2 := v.Args[1]
 15641			if s2.Op != OpPPC64SLDconst {
 15642				break
 15643			}
 15644			if s2.AuxInt != 32 {
 15645				break
 15646			}
 15647			x2 := s2.Args[0]
 15648			if x2.Op != OpPPC64MOVBZload {
 15649				break
 15650			}
 15651			i3 := x2.AuxInt
 15652			if x2.Aux != s {
 15653				break
 15654			}
 15655			_ = x2.Args[1]
 15656			if p != x2.Args[0] {
 15657				break
 15658			}
 15659			if mem != x2.Args[1] {
 15660				break
 15661			}
 15662			if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)) {
 15663				break
 15664			}
 15665			b = mergePoint(b, x0, x1, x2)
 15666			v0 := b.NewValue0(x2.Pos, OpPPC64SLDconst, t)
 15667			v.reset(OpCopy)
 15668			v.AddArg(v0)
 15669			v0.AuxInt = 32
 15670			v1 := b.NewValue0(x2.Pos, OpPPC64MOVWBRload, t)
 15671			v2 := b.NewValue0(x2.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 15672			v2.AuxInt = i0
 15673			v2.Aux = s
 15674			v2.AddArg(p)
 15675			v1.AddArg(v2)
 15676			v1.AddArg(mem)
 15677			v0.AddArg(v1)
 15678			return true
 15679		}
 15680		// match: (OR <t> s2:(SLDconst x2:(MOVBZload [i0] {s} p mem) [56]) o0:(OR <t> s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48]) s0:(SLDconst x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i2] {s} p) mem) [32])))
 15681		// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)
 15682		// result: @mergePoint(b,x0,x1,x2) (SLDconst <t> (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])
 15683		for {
 15684			t := v.Type
 15685			_ = v.Args[1]
 15686			s2 := v.Args[0]
 15687			if s2.Op != OpPPC64SLDconst {
 15688				break
 15689			}
 15690			if s2.AuxInt != 56 {
 15691				break
 15692			}
 15693			x2 := s2.Args[0]
 15694			if x2.Op != OpPPC64MOVBZload {
 15695				break
 15696			}
 15697			i0 := x2.AuxInt
 15698			s := x2.Aux
 15699			mem := x2.Args[1]
 15700			p := x2.Args[0]
 15701			o0 := v.Args[1]
 15702			if o0.Op != OpPPC64OR {
 15703				break
 15704			}
 15705			if o0.Type != t {
 15706				break
 15707			}
 15708			_ = o0.Args[1]
 15709			s1 := o0.Args[0]
 15710			if s1.Op != OpPPC64SLDconst {
 15711				break
 15712			}
 15713			if s1.AuxInt != 48 {
 15714				break
 15715			}
 15716			x1 := s1.Args[0]
 15717			if x1.Op != OpPPC64MOVBZload {
 15718				break
 15719			}
 15720			i1 := x1.AuxInt
 15721			if x1.Aux != s {
 15722				break
 15723			}
 15724			_ = x1.Args[1]
 15725			if p != x1.Args[0] {
 15726				break
 15727			}
 15728			if mem != x1.Args[1] {
 15729				break
 15730			}
 15731			s0 := o0.Args[1]
 15732			if s0.Op != OpPPC64SLDconst {
 15733				break
 15734			}
 15735			if s0.AuxInt != 32 {
 15736				break
 15737			}
 15738			x0 := s0.Args[0]
 15739			if x0.Op != OpPPC64MOVHBRload {
 15740				break
 15741			}
 15742			if x0.Type != t {
 15743				break
 15744			}
 15745			_ = x0.Args[1]
 15746			x0_0 := x0.Args[0]
 15747			if x0_0.Op != OpPPC64MOVDaddr {
 15748				break
 15749			}
 15750			if x0_0.Type != typ.Uintptr {
 15751				break
 15752			}
 15753			i2 := x0_0.AuxInt
 15754			if x0_0.Aux != s {
 15755				break
 15756			}
 15757			if p != x0_0.Args[0] {
 15758				break
 15759			}
 15760			if mem != x0.Args[1] {
 15761				break
 15762			}
 15763			if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)) {
 15764				break
 15765			}
 15766			b = mergePoint(b, x0, x1, x2)
 15767			v0 := b.NewValue0(x0.Pos, OpPPC64SLDconst, t)
 15768			v.reset(OpCopy)
 15769			v.AddArg(v0)
 15770			v0.AuxInt = 32
 15771			v1 := b.NewValue0(x0.Pos, OpPPC64MOVWBRload, t)
 15772			v2 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 15773			v2.AuxInt = i0
 15774			v2.Aux = s
 15775			v2.AddArg(p)
 15776			v1.AddArg(v2)
 15777			v1.AddArg(mem)
 15778			v0.AddArg(v1)
 15779			return true
 15780		}
 15781		// match: (OR <t> s2:(SLDconst x2:(MOVBZload [i0] {s} p mem) [56]) o0:(OR <t> s0:(SLDconst x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i2] {s} p) mem) [32]) s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48])))
 15782		// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)
 15783		// result: @mergePoint(b,x0,x1,x2) (SLDconst <t> (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])
 15784		for {
 15785			t := v.Type
 15786			_ = v.Args[1]
 15787			s2 := v.Args[0]
 15788			if s2.Op != OpPPC64SLDconst {
 15789				break
 15790			}
 15791			if s2.AuxInt != 56 {
 15792				break
 15793			}
 15794			x2 := s2.Args[0]
 15795			if x2.Op != OpPPC64MOVBZload {
 15796				break
 15797			}
 15798			i0 := x2.AuxInt
 15799			s := x2.Aux
 15800			mem := x2.Args[1]
 15801			p := x2.Args[0]
 15802			o0 := v.Args[1]
 15803			if o0.Op != OpPPC64OR {
 15804				break
 15805			}
 15806			if o0.Type != t {
 15807				break
 15808			}
 15809			_ = o0.Args[1]
 15810			s0 := o0.Args[0]
 15811			if s0.Op != OpPPC64SLDconst {
 15812				break
 15813			}
 15814			if s0.AuxInt != 32 {
 15815				break
 15816			}
 15817			x0 := s0.Args[0]
 15818			if x0.Op != OpPPC64MOVHBRload {
 15819				break
 15820			}
 15821			if x0.Type != t {
 15822				break
 15823			}
 15824			_ = x0.Args[1]
 15825			x0_0 := x0.Args[0]
 15826			if x0_0.Op != OpPPC64MOVDaddr {
 15827				break
 15828			}
 15829			if x0_0.Type != typ.Uintptr {
 15830				break
 15831			}
 15832			i2 := x0_0.AuxInt
 15833			if x0_0.Aux != s {
 15834				break
 15835			}
 15836			if p != x0_0.Args[0] {
 15837				break
 15838			}
 15839			if mem != x0.Args[1] {
 15840				break
 15841			}
 15842			s1 := o0.Args[1]
 15843			if s1.Op != OpPPC64SLDconst {
 15844				break
 15845			}
 15846			if s1.AuxInt != 48 {
 15847				break
 15848			}
 15849			x1 := s1.Args[0]
 15850			if x1.Op != OpPPC64MOVBZload {
 15851				break
 15852			}
 15853			i1 := x1.AuxInt
 15854			if x1.Aux != s {
 15855				break
 15856			}
 15857			_ = x1.Args[1]
 15858			if p != x1.Args[0] {
 15859				break
 15860			}
 15861			if mem != x1.Args[1] {
 15862				break
 15863			}
 15864			if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)) {
 15865				break
 15866			}
 15867			b = mergePoint(b, x0, x1, x2)
 15868			v0 := b.NewValue0(x1.Pos, OpPPC64SLDconst, t)
 15869			v.reset(OpCopy)
 15870			v.AddArg(v0)
 15871			v0.AuxInt = 32
 15872			v1 := b.NewValue0(x1.Pos, OpPPC64MOVWBRload, t)
 15873			v2 := b.NewValue0(x1.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 15874			v2.AuxInt = i0
 15875			v2.Aux = s
 15876			v2.AddArg(p)
 15877			v1.AddArg(v2)
 15878			v1.AddArg(mem)
 15879			v0.AddArg(v1)
 15880			return true
 15881		}
 15882		// match: (OR <t> o0:(OR <t> s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48]) s0:(SLDconst x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i2] {s} p) mem) [32])) s2:(SLDconst x2:(MOVBZload [i0] {s} p mem) [56]))
 15883		// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)
 15884		// result: @mergePoint(b,x0,x1,x2) (SLDconst <t> (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])
 15885		for {
 15886			t := v.Type
 15887			_ = v.Args[1]
 15888			o0 := v.Args[0]
 15889			if o0.Op != OpPPC64OR {
 15890				break
 15891			}
 15892			if o0.Type != t {
 15893				break
 15894			}
 15895			_ = o0.Args[1]
 15896			s1 := o0.Args[0]
 15897			if s1.Op != OpPPC64SLDconst {
 15898				break
 15899			}
 15900			if s1.AuxInt != 48 {
 15901				break
 15902			}
 15903			x1 := s1.Args[0]
 15904			if x1.Op != OpPPC64MOVBZload {
 15905				break
 15906			}
 15907			i1 := x1.AuxInt
 15908			s := x1.Aux
 15909			mem := x1.Args[1]
 15910			p := x1.Args[0]
 15911			s0 := o0.Args[1]
 15912			if s0.Op != OpPPC64SLDconst {
 15913				break
 15914			}
 15915			if s0.AuxInt != 32 {
 15916				break
 15917			}
 15918			x0 := s0.Args[0]
 15919			if x0.Op != OpPPC64MOVHBRload {
 15920				break
 15921			}
 15922			if x0.Type != t {
 15923				break
 15924			}
 15925			_ = x0.Args[1]
 15926			x0_0 := x0.Args[0]
 15927			if x0_0.Op != OpPPC64MOVDaddr {
 15928				break
 15929			}
 15930			if x0_0.Type != typ.Uintptr {
 15931				break
 15932			}
 15933			i2 := x0_0.AuxInt
 15934			if x0_0.Aux != s {
 15935				break
 15936			}
 15937			if p != x0_0.Args[0] {
 15938				break
 15939			}
 15940			if mem != x0.Args[1] {
 15941				break
 15942			}
 15943			s2 := v.Args[1]
 15944			if s2.Op != OpPPC64SLDconst {
 15945				break
 15946			}
 15947			if s2.AuxInt != 56 {
 15948				break
 15949			}
 15950			x2 := s2.Args[0]
 15951			if x2.Op != OpPPC64MOVBZload {
 15952				break
 15953			}
 15954			i0 := x2.AuxInt
 15955			if x2.Aux != s {
 15956				break
 15957			}
 15958			_ = x2.Args[1]
 15959			if p != x2.Args[0] {
 15960				break
 15961			}
 15962			if mem != x2.Args[1] {
 15963				break
 15964			}
 15965			if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)) {
 15966				break
 15967			}
 15968			b = mergePoint(b, x0, x1, x2)
 15969			v0 := b.NewValue0(x2.Pos, OpPPC64SLDconst, t)
 15970			v.reset(OpCopy)
 15971			v.AddArg(v0)
 15972			v0.AuxInt = 32
 15973			v1 := b.NewValue0(x2.Pos, OpPPC64MOVWBRload, t)
 15974			v2 := b.NewValue0(x2.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 15975			v2.AuxInt = i0
 15976			v2.Aux = s
 15977			v2.AddArg(p)
 15978			v1.AddArg(v2)
 15979			v1.AddArg(mem)
 15980			v0.AddArg(v1)
 15981			return true
 15982		}
 15983		// match: (OR <t> o0:(OR <t> s0:(SLDconst x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i2] {s} p) mem) [32]) s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48])) s2:(SLDconst x2:(MOVBZload [i0] {s} p mem) [56]))
 15984		// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)
 15985		// result: @mergePoint(b,x0,x1,x2) (SLDconst <t> (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])
 15986		for {
 15987			t := v.Type
 15988			_ = v.Args[1]
 15989			o0 := v.Args[0]
 15990			if o0.Op != OpPPC64OR {
 15991				break
 15992			}
 15993			if o0.Type != t {
 15994				break
 15995			}
 15996			_ = o0.Args[1]
 15997			s0 := o0.Args[0]
 15998			if s0.Op != OpPPC64SLDconst {
 15999				break
 16000			}
 16001			if s0.AuxInt != 32 {
 16002				break
 16003			}
 16004			x0 := s0.Args[0]
 16005			if x0.Op != OpPPC64MOVHBRload {
 16006				break
 16007			}
 16008			if x0.Type != t {
 16009				break
 16010			}
 16011			mem := x0.Args[1]
 16012			x0_0 := x0.Args[0]
 16013			if x0_0.Op != OpPPC64MOVDaddr {
 16014				break
 16015			}
 16016			if x0_0.Type != typ.Uintptr {
 16017				break
 16018			}
 16019			i2 := x0_0.AuxInt
 16020			s := x0_0.Aux
 16021			p := x0_0.Args[0]
 16022			s1 := o0.Args[1]
 16023			if s1.Op != OpPPC64SLDconst {
 16024				break
 16025			}
 16026			if s1.AuxInt != 48 {
 16027				break
 16028			}
 16029			x1 := s1.Args[0]
 16030			if x1.Op != OpPPC64MOVBZload {
 16031				break
 16032			}
 16033			i1 := x1.AuxInt
 16034			if x1.Aux != s {
 16035				break
 16036			}
 16037			_ = x1.Args[1]
 16038			if p != x1.Args[0] {
 16039				break
 16040			}
 16041			if mem != x1.Args[1] {
 16042				break
 16043			}
 16044			s2 := v.Args[1]
 16045			if s2.Op != OpPPC64SLDconst {
 16046				break
 16047			}
 16048			if s2.AuxInt != 56 {
 16049				break
 16050			}
 16051			x2 := s2.Args[0]
 16052			if x2.Op != OpPPC64MOVBZload {
 16053				break
 16054			}
 16055			i0 := x2.AuxInt
 16056			if x2.Aux != s {
 16057				break
 16058			}
 16059			_ = x2.Args[1]
 16060			if p != x2.Args[0] {
 16061				break
 16062			}
 16063			if mem != x2.Args[1] {
 16064				break
 16065			}
 16066			if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)) {
 16067				break
 16068			}
 16069			b = mergePoint(b, x0, x1, x2)
 16070			v0 := b.NewValue0(x2.Pos, OpPPC64SLDconst, t)
 16071			v.reset(OpCopy)
 16072			v.AddArg(v0)
 16073			v0.AuxInt = 32
 16074			v1 := b.NewValue0(x2.Pos, OpPPC64MOVWBRload, t)
 16075			v2 := b.NewValue0(x2.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 16076			v2.AuxInt = i0
 16077			v2.Aux = s
 16078			v2.AddArg(p)
 16079			v1.AddArg(v2)
 16080			v1.AddArg(mem)
 16081			v0.AddArg(v1)
 16082			return true
 16083		}
 16084		// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) x0:(MOVWZload {s} [i0] p mem)))))
 16085		// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
 16086		// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 16087		for {
 16088			t := v.Type
 16089			_ = v.Args[1]
 16090			s6 := v.Args[0]
 16091			if s6.Op != OpPPC64SLDconst {
 16092				break
 16093			}
 16094			if s6.AuxInt != 56 {
 16095				break
 16096			}
 16097			x7 := s6.Args[0]
 16098			if x7.Op != OpPPC64MOVBZload {
 16099				break
 16100			}
 16101			i7 := x7.AuxInt
 16102			s := x7.Aux
 16103			mem := x7.Args[1]
 16104			p := x7.Args[0]
 16105			o5 := v.Args[1]
 16106			if o5.Op != OpPPC64OR {
 16107				break
 16108			}
 16109			if o5.Type != t {
 16110				break
 16111			}
 16112			_ = o5.Args[1]
 16113			s5 := o5.Args[0]
 16114			if s5.Op != OpPPC64SLDconst {
 16115				break
 16116			}
 16117			if s5.AuxInt != 48 {
 16118				break
 16119			}
 16120			x6 := s5.Args[0]
 16121			if x6.Op != OpPPC64MOVBZload {
 16122				break
 16123			}
 16124			i6 := x6.AuxInt
 16125			if x6.Aux != s {
 16126				break
 16127			}
 16128			_ = x6.Args[1]
 16129			if p != x6.Args[0] {
 16130				break
 16131			}
 16132			if mem != x6.Args[1] {
 16133				break
 16134			}
 16135			o4 := o5.Args[1]
 16136			if o4.Op != OpPPC64OR {
 16137				break
 16138			}
 16139			if o4.Type != t {
 16140				break
 16141			}
 16142			_ = o4.Args[1]
 16143			s4 := o4.Args[0]
 16144			if s4.Op != OpPPC64SLDconst {
 16145				break
 16146			}
 16147			if s4.AuxInt != 40 {
 16148				break
 16149			}
 16150			x5 := s4.Args[0]
 16151			if x5.Op != OpPPC64MOVBZload {
 16152				break
 16153			}
 16154			i5 := x5.AuxInt
 16155			if x5.Aux != s {
 16156				break
 16157			}
 16158			_ = x5.Args[1]
 16159			if p != x5.Args[0] {
 16160				break
 16161			}
 16162			if mem != x5.Args[1] {
 16163				break
 16164			}
 16165			o3 := o4.Args[1]
 16166			if o3.Op != OpPPC64OR {
 16167				break
 16168			}
 16169			if o3.Type != t {
 16170				break
 16171			}
 16172			_ = o3.Args[1]
 16173			s3 := o3.Args[0]
 16174			if s3.Op != OpPPC64SLDconst {
 16175				break
 16176			}
 16177			if s3.AuxInt != 32 {
 16178				break
 16179			}
 16180			x4 := s3.Args[0]
 16181			if x4.Op != OpPPC64MOVBZload {
 16182				break
 16183			}
 16184			i4 := x4.AuxInt
 16185			if x4.Aux != s {
 16186				break
 16187			}
 16188			_ = x4.Args[1]
 16189			if p != x4.Args[0] {
 16190				break
 16191			}
 16192			if mem != x4.Args[1] {
 16193				break
 16194			}
 16195			x0 := o3.Args[1]
 16196			if x0.Op != OpPPC64MOVWZload {
 16197				break
 16198			}
 16199			i0 := x0.AuxInt
 16200			if x0.Aux != s {
 16201				break
 16202			}
 16203			_ = x0.Args[1]
 16204			if p != x0.Args[0] {
 16205				break
 16206			}
 16207			if mem != x0.Args[1] {
 16208				break
 16209			}
 16210			if !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
 16211				break
 16212			}
 16213			b = mergePoint(b, x0, x4, x5, x6, x7)
 16214			v0 := b.NewValue0(x0.Pos, OpPPC64MOVDload, t)
 16215			v.reset(OpCopy)
 16216			v.AddArg(v0)
 16217			v0.AuxInt = i0
 16218			v0.Aux = s
 16219			v0.AddArg(p)
 16220			v0.AddArg(mem)
 16221			return true
 16222		}
 16223		// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> x0:(MOVWZload {s} [i0] p mem) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])))))
 16224		// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
 16225		// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 16226		for {
 16227			t := v.Type
 16228			_ = v.Args[1]
 16229			s6 := v.Args[0]
 16230			if s6.Op != OpPPC64SLDconst {
 16231				break
 16232			}
 16233			if s6.AuxInt != 56 {
 16234				break
 16235			}
 16236			x7 := s6.Args[0]
 16237			if x7.Op != OpPPC64MOVBZload {
 16238				break
 16239			}
 16240			i7 := x7.AuxInt
 16241			s := x7.Aux
 16242			mem := x7.Args[1]
 16243			p := x7.Args[0]
 16244			o5 := v.Args[1]
 16245			if o5.Op != OpPPC64OR {
 16246				break
 16247			}
 16248			if o5.Type != t {
 16249				break
 16250			}
 16251			_ = o5.Args[1]
 16252			s5 := o5.Args[0]
 16253			if s5.Op != OpPPC64SLDconst {
 16254				break
 16255			}
 16256			if s5.AuxInt != 48 {
 16257				break
 16258			}
 16259			x6 := s5.Args[0]
 16260			if x6.Op != OpPPC64MOVBZload {
 16261				break
 16262			}
 16263			i6 := x6.AuxInt
 16264			if x6.Aux != s {
 16265				break
 16266			}
 16267			_ = x6.Args[1]
 16268			if p != x6.Args[0] {
 16269				break
 16270			}
 16271			if mem != x6.Args[1] {
 16272				break
 16273			}
 16274			o4 := o5.Args[1]
 16275			if o4.Op != OpPPC64OR {
 16276				break
 16277			}
 16278			if o4.Type != t {
 16279				break
 16280			}
 16281			_ = o4.Args[1]
 16282			s4 := o4.Args[0]
 16283			if s4.Op != OpPPC64SLDconst {
 16284				break
 16285			}
 16286			if s4.AuxInt != 40 {
 16287				break
 16288			}
 16289			x5 := s4.Args[0]
 16290			if x5.Op != OpPPC64MOVBZload {
 16291				break
 16292			}
 16293			i5 := x5.AuxInt
 16294			if x5.Aux != s {
 16295				break
 16296			}
 16297			_ = x5.Args[1]
 16298			if p != x5.Args[0] {
 16299				break
 16300			}
 16301			if mem != x5.Args[1] {
 16302				break
 16303			}
 16304			o3 := o4.Args[1]
 16305			if o3.Op != OpPPC64OR {
 16306				break
 16307			}
 16308			if o3.Type != t {
 16309				break
 16310			}
 16311			_ = o3.Args[1]
 16312			x0 := o3.Args[0]
 16313			if x0.Op != OpPPC64MOVWZload {
 16314				break
 16315			}
 16316			i0 := x0.AuxInt
 16317			if x0.Aux != s {
 16318				break
 16319			}
 16320			_ = x0.Args[1]
 16321			if p != x0.Args[0] {
 16322				break
 16323			}
 16324			if mem != x0.Args[1] {
 16325				break
 16326			}
 16327			s3 := o3.Args[1]
 16328			if s3.Op != OpPPC64SLDconst {
 16329				break
 16330			}
 16331			if s3.AuxInt != 32 {
 16332				break
 16333			}
 16334			x4 := s3.Args[0]
 16335			if x4.Op != OpPPC64MOVBZload {
 16336				break
 16337			}
 16338			i4 := x4.AuxInt
 16339			if x4.Aux != s {
 16340				break
 16341			}
 16342			_ = x4.Args[1]
 16343			if p != x4.Args[0] {
 16344				break
 16345			}
 16346			if mem != x4.Args[1] {
 16347				break
 16348			}
 16349			if !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
 16350				break
 16351			}
 16352			b = mergePoint(b, x0, x4, x5, x6, x7)
 16353			v0 := b.NewValue0(x4.Pos, OpPPC64MOVDload, t)
 16354			v.reset(OpCopy)
 16355			v.AddArg(v0)
 16356			v0.AuxInt = i0
 16357			v0.Aux = s
 16358			v0.AddArg(p)
 16359			v0.AddArg(mem)
 16360			return true
 16361		}
 16362		// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) x0:(MOVWZload {s} [i0] p mem)) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))))
 16363		// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
 16364		// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 16365		for {
 16366			t := v.Type
 16367			_ = v.Args[1]
 16368			s6 := v.Args[0]
 16369			if s6.Op != OpPPC64SLDconst {
 16370				break
 16371			}
 16372			if s6.AuxInt != 56 {
 16373				break
 16374			}
 16375			x7 := s6.Args[0]
 16376			if x7.Op != OpPPC64MOVBZload {
 16377				break
 16378			}
 16379			i7 := x7.AuxInt
 16380			s := x7.Aux
 16381			mem := x7.Args[1]
 16382			p := x7.Args[0]
 16383			o5 := v.Args[1]
 16384			if o5.Op != OpPPC64OR {
 16385				break
 16386			}
 16387			if o5.Type != t {
 16388				break
 16389			}
 16390			_ = o5.Args[1]
 16391			s5 := o5.Args[0]
 16392			if s5.Op != OpPPC64SLDconst {
 16393				break
 16394			}
 16395			if s5.AuxInt != 48 {
 16396				break
 16397			}
 16398			x6 := s5.Args[0]
 16399			if x6.Op != OpPPC64MOVBZload {
 16400				break
 16401			}
 16402			i6 := x6.AuxInt
 16403			if x6.Aux != s {
 16404				break
 16405			}
 16406			_ = x6.Args[1]
 16407			if p != x6.Args[0] {
 16408				break
 16409			}
 16410			if mem != x6.Args[1] {
 16411				break
 16412			}
 16413			o4 := o5.Args[1]
 16414			if o4.Op != OpPPC64OR {
 16415				break
 16416			}
 16417			if o4.Type != t {
 16418				break
 16419			}
 16420			_ = o4.Args[1]
 16421			o3 := o4.Args[0]
 16422			if o3.Op != OpPPC64OR {
 16423				break
 16424			}
 16425			if o3.Type != t {
 16426				break
 16427			}
 16428			_ = o3.Args[1]
 16429			s3 := o3.Args[0]
 16430			if s3.Op != OpPPC64SLDconst {
 16431				break
 16432			}
 16433			if s3.AuxInt != 32 {
 16434				break
 16435			}
 16436			x4 := s3.Args[0]
 16437			if x4.Op != OpPPC64MOVBZload {
 16438				break
 16439			}
 16440			i4 := x4.AuxInt
 16441			if x4.Aux != s {
 16442				break
 16443			}
 16444			_ = x4.Args[1]
 16445			if p != x4.Args[0] {
 16446				break
 16447			}
 16448			if mem != x4.Args[1] {
 16449				break
 16450			}
 16451			x0 := o3.Args[1]
 16452			if x0.Op != OpPPC64MOVWZload {
 16453				break
 16454			}
 16455			i0 := x0.AuxInt
 16456			if x0.Aux != s {
 16457				break
 16458			}
 16459			_ = x0.Args[1]
 16460			if p != x0.Args[0] {
 16461				break
 16462			}
 16463			if mem != x0.Args[1] {
 16464				break
 16465			}
 16466			s4 := o4.Args[1]
 16467			if s4.Op != OpPPC64SLDconst {
 16468				break
 16469			}
 16470			if s4.AuxInt != 40 {
 16471				break
 16472			}
 16473			x5 := s4.Args[0]
 16474			if x5.Op != OpPPC64MOVBZload {
 16475				break
 16476			}
 16477			i5 := x5.AuxInt
 16478			if x5.Aux != s {
 16479				break
 16480			}
 16481			_ = x5.Args[1]
 16482			if p != x5.Args[0] {
 16483				break
 16484			}
 16485			if mem != x5.Args[1] {
 16486				break
 16487			}
 16488			if !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
 16489				break
 16490			}
 16491			b = mergePoint(b, x0, x4, x5, x6, x7)
 16492			v0 := b.NewValue0(x5.Pos, OpPPC64MOVDload, t)
 16493			v.reset(OpCopy)
 16494			v.AddArg(v0)
 16495			v0.AuxInt = i0
 16496			v0.Aux = s
 16497			v0.AddArg(p)
 16498			v0.AddArg(mem)
 16499			return true
 16500		}
 16501		// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> x0:(MOVWZload {s} [i0] p mem) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))))
 16502		// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
 16503		// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 16504		for {
 16505			t := v.Type
 16506			_ = v.Args[1]
 16507			s6 := v.Args[0]
 16508			if s6.Op != OpPPC64SLDconst {
 16509				break
 16510			}
 16511			if s6.AuxInt != 56 {
 16512				break
 16513			}
 16514			x7 := s6.Args[0]
 16515			if x7.Op != OpPPC64MOVBZload {
 16516				break
 16517			}
 16518			i7 := x7.AuxInt
 16519			s := x7.Aux
 16520			mem := x7.Args[1]
 16521			p := x7.Args[0]
 16522			o5 := v.Args[1]
 16523			if o5.Op != OpPPC64OR {
 16524				break
 16525			}
 16526			if o5.Type != t {
 16527				break
 16528			}
 16529			_ = o5.Args[1]
 16530			s5 := o5.Args[0]
 16531			if s5.Op != OpPPC64SLDconst {
 16532				break
 16533			}
 16534			if s5.AuxInt != 48 {
 16535				break
 16536			}
 16537			x6 := s5.Args[0]
 16538			if x6.Op != OpPPC64MOVBZload {
 16539				break
 16540			}
 16541			i6 := x6.AuxInt
 16542			if x6.Aux != s {
 16543				break
 16544			}
 16545			_ = x6.Args[1]
 16546			if p != x6.Args[0] {
 16547				break
 16548			}
 16549			if mem != x6.Args[1] {
 16550				break
 16551			}
 16552			o4 := o5.Args[1]
 16553			if o4.Op != OpPPC64OR {
 16554				break
 16555			}
 16556			if o4.Type != t {
 16557				break
 16558			}
 16559			_ = o4.Args[1]
 16560			o3 := o4.Args[0]
 16561			if o3.Op != OpPPC64OR {
 16562				break
 16563			}
 16564			if o3.Type != t {
 16565				break
 16566			}
 16567			_ = o3.Args[1]
 16568			x0 := o3.Args[0]
 16569			if x0.Op != OpPPC64MOVWZload {
 16570				break
 16571			}
 16572			i0 := x0.AuxInt
 16573			if x0.Aux != s {
 16574				break
 16575			}
 16576			_ = x0.Args[1]
 16577			if p != x0.Args[0] {
 16578				break
 16579			}
 16580			if mem != x0.Args[1] {
 16581				break
 16582			}
 16583			s3 := o3.Args[1]
 16584			if s3.Op != OpPPC64SLDconst {
 16585				break
 16586			}
 16587			if s3.AuxInt != 32 {
 16588				break
 16589			}
 16590			x4 := s3.Args[0]
 16591			if x4.Op != OpPPC64MOVBZload {
 16592				break
 16593			}
 16594			i4 := x4.AuxInt
 16595			if x4.Aux != s {
 16596				break
 16597			}
 16598			_ = x4.Args[1]
 16599			if p != x4.Args[0] {
 16600				break
 16601			}
 16602			if mem != x4.Args[1] {
 16603				break
 16604			}
 16605			s4 := o4.Args[1]
 16606			if s4.Op != OpPPC64SLDconst {
 16607				break
 16608			}
 16609			if s4.AuxInt != 40 {
 16610				break
 16611			}
 16612			x5 := s4.Args[0]
 16613			if x5.Op != OpPPC64MOVBZload {
 16614				break
 16615			}
 16616			i5 := x5.AuxInt
 16617			if x5.Aux != s {
 16618				break
 16619			}
 16620			_ = x5.Args[1]
 16621			if p != x5.Args[0] {
 16622				break
 16623			}
 16624			if mem != x5.Args[1] {
 16625				break
 16626			}
 16627			if !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
 16628				break
 16629			}
 16630			b = mergePoint(b, x0, x4, x5, x6, x7)
 16631			v0 := b.NewValue0(x5.Pos, OpPPC64MOVDload, t)
 16632			v.reset(OpCopy)
 16633			v.AddArg(v0)
 16634			v0.AuxInt = i0
 16635			v0.Aux = s
 16636			v0.AddArg(p)
 16637			v0.AddArg(mem)
 16638			return true
 16639		}
 16640		return false
 16641	}
 16642	func rewriteValuePPC64_OpPPC64OR_60(v *Value) bool {
 16643		b := v.Block
 16644		config := b.Func.Config
 16645		// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) x0:(MOVWZload {s} [i0] p mem))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 16646		// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
 16647		// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 16648		for {
 16649			t := v.Type
 16650			_ = v.Args[1]
 16651			s6 := v.Args[0]
 16652			if s6.Op != OpPPC64SLDconst {
 16653				break
 16654			}
 16655			if s6.AuxInt != 56 {
 16656				break
 16657			}
 16658			x7 := s6.Args[0]
 16659			if x7.Op != OpPPC64MOVBZload {
 16660				break
 16661			}
 16662			i7 := x7.AuxInt
 16663			s := x7.Aux
 16664			mem := x7.Args[1]
 16665			p := x7.Args[0]
 16666			o5 := v.Args[1]
 16667			if o5.Op != OpPPC64OR {
 16668				break
 16669			}
 16670			if o5.Type != t {
 16671				break
 16672			}
 16673			_ = o5.Args[1]
 16674			o4 := o5.Args[0]
 16675			if o4.Op != OpPPC64OR {
 16676				break
 16677			}
 16678			if o4.Type != t {
 16679				break
 16680			}
 16681			_ = o4.Args[1]
 16682			s4 := o4.Args[0]
 16683			if s4.Op != OpPPC64SLDconst {
 16684				break
 16685			}
 16686			if s4.AuxInt != 40 {
 16687				break
 16688			}
 16689			x5 := s4.Args[0]
 16690			if x5.Op != OpPPC64MOVBZload {
 16691				break
 16692			}
 16693			i5 := x5.AuxInt
 16694			if x5.Aux != s {
 16695				break
 16696			}
 16697			_ = x5.Args[1]
 16698			if p != x5.Args[0] {
 16699				break
 16700			}
 16701			if mem != x5.Args[1] {
 16702				break
 16703			}
 16704			o3 := o4.Args[1]
 16705			if o3.Op != OpPPC64OR {
 16706				break
 16707			}
 16708			if o3.Type != t {
 16709				break
 16710			}
 16711			_ = o3.Args[1]
 16712			s3 := o3.Args[0]
 16713			if s3.Op != OpPPC64SLDconst {
 16714				break
 16715			}
 16716			if s3.AuxInt != 32 {
 16717				break
 16718			}
 16719			x4 := s3.Args[0]
 16720			if x4.Op != OpPPC64MOVBZload {
 16721				break
 16722			}
 16723			i4 := x4.AuxInt
 16724			if x4.Aux != s {
 16725				break
 16726			}
 16727			_ = x4.Args[1]
 16728			if p != x4.Args[0] {
 16729				break
 16730			}
 16731			if mem != x4.Args[1] {
 16732				break
 16733			}
 16734			x0 := o3.Args[1]
 16735			if x0.Op != OpPPC64MOVWZload {
 16736				break
 16737			}
 16738			i0 := x0.AuxInt
 16739			if x0.Aux != s {
 16740				break
 16741			}
 16742			_ = x0.Args[1]
 16743			if p != x0.Args[0] {
 16744				break
 16745			}
 16746			if mem != x0.Args[1] {
 16747				break
 16748			}
 16749			s5 := o5.Args[1]
 16750			if s5.Op != OpPPC64SLDconst {
 16751				break
 16752			}
 16753			if s5.AuxInt != 48 {
 16754				break
 16755			}
 16756			x6 := s5.Args[0]
 16757			if x6.Op != OpPPC64MOVBZload {
 16758				break
 16759			}
 16760			i6 := x6.AuxInt
 16761			if x6.Aux != s {
 16762				break
 16763			}
 16764			_ = x6.Args[1]
 16765			if p != x6.Args[0] {
 16766				break
 16767			}
 16768			if mem != x6.Args[1] {
 16769				break
 16770			}
 16771			if !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
 16772				break
 16773			}
 16774			b = mergePoint(b, x0, x4, x5, x6, x7)
 16775			v0 := b.NewValue0(x6.Pos, OpPPC64MOVDload, t)
 16776			v.reset(OpCopy)
 16777			v.AddArg(v0)
 16778			v0.AuxInt = i0
 16779			v0.Aux = s
 16780			v0.AddArg(p)
 16781			v0.AddArg(mem)
 16782			return true
 16783		}
 16784		// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> x0:(MOVWZload {s} [i0] p mem) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 16785		// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
 16786		// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 16787		for {
 16788			t := v.Type
 16789			_ = v.Args[1]
 16790			s6 := v.Args[0]
 16791			if s6.Op != OpPPC64SLDconst {
 16792				break
 16793			}
 16794			if s6.AuxInt != 56 {
 16795				break
 16796			}
 16797			x7 := s6.Args[0]
 16798			if x7.Op != OpPPC64MOVBZload {
 16799				break
 16800			}
 16801			i7 := x7.AuxInt
 16802			s := x7.Aux
 16803			mem := x7.Args[1]
 16804			p := x7.Args[0]
 16805			o5 := v.Args[1]
 16806			if o5.Op != OpPPC64OR {
 16807				break
 16808			}
 16809			if o5.Type != t {
 16810				break
 16811			}
 16812			_ = o5.Args[1]
 16813			o4 := o5.Args[0]
 16814			if o4.Op != OpPPC64OR {
 16815				break
 16816			}
 16817			if o4.Type != t {
 16818				break
 16819			}
 16820			_ = o4.Args[1]
 16821			s4 := o4.Args[0]
 16822			if s4.Op != OpPPC64SLDconst {
 16823				break
 16824			}
 16825			if s4.AuxInt != 40 {
 16826				break
 16827			}
 16828			x5 := s4.Args[0]
 16829			if x5.Op != OpPPC64MOVBZload {
 16830				break
 16831			}
 16832			i5 := x5.AuxInt
 16833			if x5.Aux != s {
 16834				break
 16835			}
 16836			_ = x5.Args[1]
 16837			if p != x5.Args[0] {
 16838				break
 16839			}
 16840			if mem != x5.Args[1] {
 16841				break
 16842			}
 16843			o3 := o4.Args[1]
 16844			if o3.Op != OpPPC64OR {
 16845				break
 16846			}
 16847			if o3.Type != t {
 16848				break
 16849			}
 16850			_ = o3.Args[1]
 16851			x0 := o3.Args[0]
 16852			if x0.Op != OpPPC64MOVWZload {
 16853				break
 16854			}
 16855			i0 := x0.AuxInt
 16856			if x0.Aux != s {
 16857				break
 16858			}
 16859			_ = x0.Args[1]
 16860			if p != x0.Args[0] {
 16861				break
 16862			}
 16863			if mem != x0.Args[1] {
 16864				break
 16865			}
 16866			s3 := o3.Args[1]
 16867			if s3.Op != OpPPC64SLDconst {
 16868				break
 16869			}
 16870			if s3.AuxInt != 32 {
 16871				break
 16872			}
 16873			x4 := s3.Args[0]
 16874			if x4.Op != OpPPC64MOVBZload {
 16875				break
 16876			}
 16877			i4 := x4.AuxInt
 16878			if x4.Aux != s {
 16879				break
 16880			}
 16881			_ = x4.Args[1]
 16882			if p != x4.Args[0] {
 16883				break
 16884			}
 16885			if mem != x4.Args[1] {
 16886				break
 16887			}
 16888			s5 := o5.Args[1]
 16889			if s5.Op != OpPPC64SLDconst {
 16890				break
 16891			}
 16892			if s5.AuxInt != 48 {
 16893				break
 16894			}
 16895			x6 := s5.Args[0]
 16896			if x6.Op != OpPPC64MOVBZload {
 16897				break
 16898			}
 16899			i6 := x6.AuxInt
 16900			if x6.Aux != s {
 16901				break
 16902			}
 16903			_ = x6.Args[1]
 16904			if p != x6.Args[0] {
 16905				break
 16906			}
 16907			if mem != x6.Args[1] {
 16908				break
 16909			}
 16910			if !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
 16911				break
 16912			}
 16913			b = mergePoint(b, x0, x4, x5, x6, x7)
 16914			v0 := b.NewValue0(x6.Pos, OpPPC64MOVDload, t)
 16915			v.reset(OpCopy)
 16916			v.AddArg(v0)
 16917			v0.AuxInt = i0
 16918			v0.Aux = s
 16919			v0.AddArg(p)
 16920			v0.AddArg(mem)
 16921			return true
 16922		}
 16923		// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) x0:(MOVWZload {s} [i0] p mem)) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 16924		// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
 16925		// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 16926		for {
 16927			t := v.Type
 16928			_ = v.Args[1]
 16929			s6 := v.Args[0]
 16930			if s6.Op != OpPPC64SLDconst {
 16931				break
 16932			}
 16933			if s6.AuxInt != 56 {
 16934				break
 16935			}
 16936			x7 := s6.Args[0]
 16937			if x7.Op != OpPPC64MOVBZload {
 16938				break
 16939			}
 16940			i7 := x7.AuxInt
 16941			s := x7.Aux
 16942			mem := x7.Args[1]
 16943			p := x7.Args[0]
 16944			o5 := v.Args[1]
 16945			if o5.Op != OpPPC64OR {
 16946				break
 16947			}
 16948			if o5.Type != t {
 16949				break
 16950			}
 16951			_ = o5.Args[1]
 16952			o4 := o5.Args[0]
 16953			if o4.Op != OpPPC64OR {
 16954				break
 16955			}
 16956			if o4.Type != t {
 16957				break
 16958			}
 16959			_ = o4.Args[1]
 16960			o3 := o4.Args[0]
 16961			if o3.Op != OpPPC64OR {
 16962				break
 16963			}
 16964			if o3.Type != t {
 16965				break
 16966			}
 16967			_ = o3.Args[1]
 16968			s3 := o3.Args[0]
 16969			if s3.Op != OpPPC64SLDconst {
 16970				break
 16971			}
 16972			if s3.AuxInt != 32 {
 16973				break
 16974			}
 16975			x4 := s3.Args[0]
 16976			if x4.Op != OpPPC64MOVBZload {
 16977				break
 16978			}
 16979			i4 := x4.AuxInt
 16980			if x4.Aux != s {
 16981				break
 16982			}
 16983			_ = x4.Args[1]
 16984			if p != x4.Args[0] {
 16985				break
 16986			}
 16987			if mem != x4.Args[1] {
 16988				break
 16989			}
 16990			x0 := o3.Args[1]
 16991			if x0.Op != OpPPC64MOVWZload {
 16992				break
 16993			}
 16994			i0 := x0.AuxInt
 16995			if x0.Aux != s {
 16996				break
 16997			}
 16998			_ = x0.Args[1]
 16999			if p != x0.Args[0] {
 17000				break
 17001			}
 17002			if mem != x0.Args[1] {
 17003				break
 17004			}
 17005			s4 := o4.Args[1]
 17006			if s4.Op != OpPPC64SLDconst {
 17007				break
 17008			}
 17009			if s4.AuxInt != 40 {
 17010				break
 17011			}
 17012			x5 := s4.Args[0]
 17013			if x5.Op != OpPPC64MOVBZload {
 17014				break
 17015			}
 17016			i5 := x5.AuxInt
 17017			if x5.Aux != s {
 17018				break
 17019			}
 17020			_ = x5.Args[1]
 17021			if p != x5.Args[0] {
 17022				break
 17023			}
 17024			if mem != x5.Args[1] {
 17025				break
 17026			}
 17027			s5 := o5.Args[1]
 17028			if s5.Op != OpPPC64SLDconst {
 17029				break
 17030			}
 17031			if s5.AuxInt != 48 {
 17032				break
 17033			}
 17034			x6 := s5.Args[0]
 17035			if x6.Op != OpPPC64MOVBZload {
 17036				break
 17037			}
 17038			i6 := x6.AuxInt
 17039			if x6.Aux != s {
 17040				break
 17041			}
 17042			_ = x6.Args[1]
 17043			if p != x6.Args[0] {
 17044				break
 17045			}
 17046			if mem != x6.Args[1] {
 17047				break
 17048			}
 17049			if !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
 17050				break
 17051			}
 17052			b = mergePoint(b, x0, x4, x5, x6, x7)
 17053			v0 := b.NewValue0(x6.Pos, OpPPC64MOVDload, t)
 17054			v.reset(OpCopy)
 17055			v.AddArg(v0)
 17056			v0.AuxInt = i0
 17057			v0.Aux = s
 17058			v0.AddArg(p)
 17059			v0.AddArg(mem)
 17060			return true
 17061		}
 17062		// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> o3:(OR <t> x0:(MOVWZload {s} [i0] p mem) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 17063		// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
 17064		// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 17065		for {
 17066			t := v.Type
 17067			_ = v.Args[1]
 17068			s6 := v.Args[0]
 17069			if s6.Op != OpPPC64SLDconst {
 17070				break
 17071			}
 17072			if s6.AuxInt != 56 {
 17073				break
 17074			}
 17075			x7 := s6.Args[0]
 17076			if x7.Op != OpPPC64MOVBZload {
 17077				break
 17078			}
 17079			i7 := x7.AuxInt
 17080			s := x7.Aux
 17081			mem := x7.Args[1]
 17082			p := x7.Args[0]
 17083			o5 := v.Args[1]
 17084			if o5.Op != OpPPC64OR {
 17085				break
 17086			}
 17087			if o5.Type != t {
 17088				break
 17089			}
 17090			_ = o5.Args[1]
 17091			o4 := o5.Args[0]
 17092			if o4.Op != OpPPC64OR {
 17093				break
 17094			}
 17095			if o4.Type != t {
 17096				break
 17097			}
 17098			_ = o4.Args[1]
 17099			o3 := o4.Args[0]
 17100			if o3.Op != OpPPC64OR {
 17101				break
 17102			}
 17103			if o3.Type != t {
 17104				break
 17105			}
 17106			_ = o3.Args[1]
 17107			x0 := o3.Args[0]
 17108			if x0.Op != OpPPC64MOVWZload {
 17109				break
 17110			}
 17111			i0 := x0.AuxInt
 17112			if x0.Aux != s {
 17113				break
 17114			}
 17115			_ = x0.Args[1]
 17116			if p != x0.Args[0] {
 17117				break
 17118			}
 17119			if mem != x0.Args[1] {
 17120				break
 17121			}
 17122			s3 := o3.Args[1]
 17123			if s3.Op != OpPPC64SLDconst {
 17124				break
 17125			}
 17126			if s3.AuxInt != 32 {
 17127				break
 17128			}
 17129			x4 := s3.Args[0]
 17130			if x4.Op != OpPPC64MOVBZload {
 17131				break
 17132			}
 17133			i4 := x4.AuxInt
 17134			if x4.Aux != s {
 17135				break
 17136			}
 17137			_ = x4.Args[1]
 17138			if p != x4.Args[0] {
 17139				break
 17140			}
 17141			if mem != x4.Args[1] {
 17142				break
 17143			}
 17144			s4 := o4.Args[1]
 17145			if s4.Op != OpPPC64SLDconst {
 17146				break
 17147			}
 17148			if s4.AuxInt != 40 {
 17149				break
 17150			}
 17151			x5 := s4.Args[0]
 17152			if x5.Op != OpPPC64MOVBZload {
 17153				break
 17154			}
 17155			i5 := x5.AuxInt
 17156			if x5.Aux != s {
 17157				break
 17158			}
 17159			_ = x5.Args[1]
 17160			if p != x5.Args[0] {
 17161				break
 17162			}
 17163			if mem != x5.Args[1] {
 17164				break
 17165			}
 17166			s5 := o5.Args[1]
 17167			if s5.Op != OpPPC64SLDconst {
 17168				break
 17169			}
 17170			if s5.AuxInt != 48 {
 17171				break
 17172			}
 17173			x6 := s5.Args[0]
 17174			if x6.Op != OpPPC64MOVBZload {
 17175				break
 17176			}
 17177			i6 := x6.AuxInt
 17178			if x6.Aux != s {
 17179				break
 17180			}
 17181			_ = x6.Args[1]
 17182			if p != x6.Args[0] {
 17183				break
 17184			}
 17185			if mem != x6.Args[1] {
 17186				break
 17187			}
 17188			if !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
 17189				break
 17190			}
 17191			b = mergePoint(b, x0, x4, x5, x6, x7)
 17192			v0 := b.NewValue0(x6.Pos, OpPPC64MOVDload, t)
 17193			v.reset(OpCopy)
 17194			v.AddArg(v0)
 17195			v0.AuxInt = i0
 17196			v0.Aux = s
 17197			v0.AddArg(p)
 17198			v0.AddArg(mem)
 17199			return true
 17200		}
 17201		// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) x0:(MOVWZload {s} [i0] p mem)))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 17202		// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
 17203		// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 17204		for {
 17205			t := v.Type
 17206			_ = v.Args[1]
 17207			o5 := v.Args[0]
 17208			if o5.Op != OpPPC64OR {
 17209				break
 17210			}
 17211			if o5.Type != t {
 17212				break
 17213			}
 17214			_ = o5.Args[1]
 17215			s5 := o5.Args[0]
 17216			if s5.Op != OpPPC64SLDconst {
 17217				break
 17218			}
 17219			if s5.AuxInt != 48 {
 17220				break
 17221			}
 17222			x6 := s5.Args[0]
 17223			if x6.Op != OpPPC64MOVBZload {
 17224				break
 17225			}
 17226			i6 := x6.AuxInt
 17227			s := x6.Aux
 17228			mem := x6.Args[1]
 17229			p := x6.Args[0]
 17230			o4 := o5.Args[1]
 17231			if o4.Op != OpPPC64OR {
 17232				break
 17233			}
 17234			if o4.Type != t {
 17235				break
 17236			}
 17237			_ = o4.Args[1]
 17238			s4 := o4.Args[0]
 17239			if s4.Op != OpPPC64SLDconst {
 17240				break
 17241			}
 17242			if s4.AuxInt != 40 {
 17243				break
 17244			}
 17245			x5 := s4.Args[0]
 17246			if x5.Op != OpPPC64MOVBZload {
 17247				break
 17248			}
 17249			i5 := x5.AuxInt
 17250			if x5.Aux != s {
 17251				break
 17252			}
 17253			_ = x5.Args[1]
 17254			if p != x5.Args[0] {
 17255				break
 17256			}
 17257			if mem != x5.Args[1] {
 17258				break
 17259			}
 17260			o3 := o4.Args[1]
 17261			if o3.Op != OpPPC64OR {
 17262				break
 17263			}
 17264			if o3.Type != t {
 17265				break
 17266			}
 17267			_ = o3.Args[1]
 17268			s3 := o3.Args[0]
 17269			if s3.Op != OpPPC64SLDconst {
 17270				break
 17271			}
 17272			if s3.AuxInt != 32 {
 17273				break
 17274			}
 17275			x4 := s3.Args[0]
 17276			if x4.Op != OpPPC64MOVBZload {
 17277				break
 17278			}
 17279			i4 := x4.AuxInt
 17280			if x4.Aux != s {
 17281				break
 17282			}
 17283			_ = x4.Args[1]
 17284			if p != x4.Args[0] {
 17285				break
 17286			}
 17287			if mem != x4.Args[1] {
 17288				break
 17289			}
 17290			x0 := o3.Args[1]
 17291			if x0.Op != OpPPC64MOVWZload {
 17292				break
 17293			}
 17294			i0 := x0.AuxInt
 17295			if x0.Aux != s {
 17296				break
 17297			}
 17298			_ = x0.Args[1]
 17299			if p != x0.Args[0] {
 17300				break
 17301			}
 17302			if mem != x0.Args[1] {
 17303				break
 17304			}
 17305			s6 := v.Args[1]
 17306			if s6.Op != OpPPC64SLDconst {
 17307				break
 17308			}
 17309			if s6.AuxInt != 56 {
 17310				break
 17311			}
 17312			x7 := s6.Args[0]
 17313			if x7.Op != OpPPC64MOVBZload {
 17314				break
 17315			}
 17316			i7 := x7.AuxInt
 17317			if x7.Aux != s {
 17318				break
 17319			}
 17320			_ = x7.Args[1]
 17321			if p != x7.Args[0] {
 17322				break
 17323			}
 17324			if mem != x7.Args[1] {
 17325				break
 17326			}
 17327			if !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
 17328				break
 17329			}
 17330			b = mergePoint(b, x0, x4, x5, x6, x7)
 17331			v0 := b.NewValue0(x7.Pos, OpPPC64MOVDload, t)
 17332			v.reset(OpCopy)
 17333			v.AddArg(v0)
 17334			v0.AuxInt = i0
 17335			v0.Aux = s
 17336			v0.AddArg(p)
 17337			v0.AddArg(mem)
 17338			return true
 17339		}
 17340		// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> x0:(MOVWZload {s} [i0] p mem) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 17341		// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
 17342		// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 17343		for {
 17344			t := v.Type
 17345			_ = v.Args[1]
 17346			o5 := v.Args[0]
 17347			if o5.Op != OpPPC64OR {
 17348				break
 17349			}
 17350			if o5.Type != t {
 17351				break
 17352			}
 17353			_ = o5.Args[1]
 17354			s5 := o5.Args[0]
 17355			if s5.Op != OpPPC64SLDconst {
 17356				break
 17357			}
 17358			if s5.AuxInt != 48 {
 17359				break
 17360			}
 17361			x6 := s5.Args[0]
 17362			if x6.Op != OpPPC64MOVBZload {
 17363				break
 17364			}
 17365			i6 := x6.AuxInt
 17366			s := x6.Aux
 17367			mem := x6.Args[1]
 17368			p := x6.Args[0]
 17369			o4 := o5.Args[1]
 17370			if o4.Op != OpPPC64OR {
 17371				break
 17372			}
 17373			if o4.Type != t {
 17374				break
 17375			}
 17376			_ = o4.Args[1]
 17377			s4 := o4.Args[0]
 17378			if s4.Op != OpPPC64SLDconst {
 17379				break
 17380			}
 17381			if s4.AuxInt != 40 {
 17382				break
 17383			}
 17384			x5 := s4.Args[0]
 17385			if x5.Op != OpPPC64MOVBZload {
 17386				break
 17387			}
 17388			i5 := x5.AuxInt
 17389			if x5.Aux != s {
 17390				break
 17391			}
 17392			_ = x5.Args[1]
 17393			if p != x5.Args[0] {
 17394				break
 17395			}
 17396			if mem != x5.Args[1] {
 17397				break
 17398			}
 17399			o3 := o4.Args[1]
 17400			if o3.Op != OpPPC64OR {
 17401				break
 17402			}
 17403			if o3.Type != t {
 17404				break
 17405			}
 17406			_ = o3.Args[1]
 17407			x0 := o3.Args[0]
 17408			if x0.Op != OpPPC64MOVWZload {
 17409				break
 17410			}
 17411			i0 := x0.AuxInt
 17412			if x0.Aux != s {
 17413				break
 17414			}
 17415			_ = x0.Args[1]
 17416			if p != x0.Args[0] {
 17417				break
 17418			}
 17419			if mem != x0.Args[1] {
 17420				break
 17421			}
 17422			s3 := o3.Args[1]
 17423			if s3.Op != OpPPC64SLDconst {
 17424				break
 17425			}
 17426			if s3.AuxInt != 32 {
 17427				break
 17428			}
 17429			x4 := s3.Args[0]
 17430			if x4.Op != OpPPC64MOVBZload {
 17431				break
 17432			}
 17433			i4 := x4.AuxInt
 17434			if x4.Aux != s {
 17435				break
 17436			}
 17437			_ = x4.Args[1]
 17438			if p != x4.Args[0] {
 17439				break
 17440			}
 17441			if mem != x4.Args[1] {
 17442				break
 17443			}
 17444			s6 := v.Args[1]
 17445			if s6.Op != OpPPC64SLDconst {
 17446				break
 17447			}
 17448			if s6.AuxInt != 56 {
 17449				break
 17450			}
 17451			x7 := s6.Args[0]
 17452			if x7.Op != OpPPC64MOVBZload {
 17453				break
 17454			}
 17455			i7 := x7.AuxInt
 17456			if x7.Aux != s {
 17457				break
 17458			}
 17459			_ = x7.Args[1]
 17460			if p != x7.Args[0] {
 17461				break
 17462			}
 17463			if mem != x7.Args[1] {
 17464				break
 17465			}
 17466			if !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
 17467				break
 17468			}
 17469			b = mergePoint(b, x0, x4, x5, x6, x7)
 17470			v0 := b.NewValue0(x7.Pos, OpPPC64MOVDload, t)
 17471			v.reset(OpCopy)
 17472			v.AddArg(v0)
 17473			v0.AuxInt = i0
 17474			v0.Aux = s
 17475			v0.AddArg(p)
 17476			v0.AddArg(mem)
 17477			return true
 17478		}
 17479		// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) x0:(MOVWZload {s} [i0] p mem)) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 17480		// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
 17481		// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 17482		for {
 17483			t := v.Type
 17484			_ = v.Args[1]
 17485			o5 := v.Args[0]
 17486			if o5.Op != OpPPC64OR {
 17487				break
 17488			}
 17489			if o5.Type != t {
 17490				break
 17491			}
 17492			_ = o5.Args[1]
 17493			s5 := o5.Args[0]
 17494			if s5.Op != OpPPC64SLDconst {
 17495				break
 17496			}
 17497			if s5.AuxInt != 48 {
 17498				break
 17499			}
 17500			x6 := s5.Args[0]
 17501			if x6.Op != OpPPC64MOVBZload {
 17502				break
 17503			}
 17504			i6 := x6.AuxInt
 17505			s := x6.Aux
 17506			mem := x6.Args[1]
 17507			p := x6.Args[0]
 17508			o4 := o5.Args[1]
 17509			if o4.Op != OpPPC64OR {
 17510				break
 17511			}
 17512			if o4.Type != t {
 17513				break
 17514			}
 17515			_ = o4.Args[1]
 17516			o3 := o4.Args[0]
 17517			if o3.Op != OpPPC64OR {
 17518				break
 17519			}
 17520			if o3.Type != t {
 17521				break
 17522			}
 17523			_ = o3.Args[1]
 17524			s3 := o3.Args[0]
 17525			if s3.Op != OpPPC64SLDconst {
 17526				break
 17527			}
 17528			if s3.AuxInt != 32 {
 17529				break
 17530			}
 17531			x4 := s3.Args[0]
 17532			if x4.Op != OpPPC64MOVBZload {
 17533				break
 17534			}
 17535			i4 := x4.AuxInt
 17536			if x4.Aux != s {
 17537				break
 17538			}
 17539			_ = x4.Args[1]
 17540			if p != x4.Args[0] {
 17541				break
 17542			}
 17543			if mem != x4.Args[1] {
 17544				break
 17545			}
 17546			x0 := o3.Args[1]
 17547			if x0.Op != OpPPC64MOVWZload {
 17548				break
 17549			}
 17550			i0 := x0.AuxInt
 17551			if x0.Aux != s {
 17552				break
 17553			}
 17554			_ = x0.Args[1]
 17555			if p != x0.Args[0] {
 17556				break
 17557			}
 17558			if mem != x0.Args[1] {
 17559				break
 17560			}
 17561			s4 := o4.Args[1]
 17562			if s4.Op != OpPPC64SLDconst {
 17563				break
 17564			}
 17565			if s4.AuxInt != 40 {
 17566				break
 17567			}
 17568			x5 := s4.Args[0]
 17569			if x5.Op != OpPPC64MOVBZload {
 17570				break
 17571			}
 17572			i5 := x5.AuxInt
 17573			if x5.Aux != s {
 17574				break
 17575			}
 17576			_ = x5.Args[1]
 17577			if p != x5.Args[0] {
 17578				break
 17579			}
 17580			if mem != x5.Args[1] {
 17581				break
 17582			}
 17583			s6 := v.Args[1]
 17584			if s6.Op != OpPPC64SLDconst {
 17585				break
 17586			}
 17587			if s6.AuxInt != 56 {
 17588				break
 17589			}
 17590			x7 := s6.Args[0]
 17591			if x7.Op != OpPPC64MOVBZload {
 17592				break
 17593			}
 17594			i7 := x7.AuxInt
 17595			if x7.Aux != s {
 17596				break
 17597			}
 17598			_ = x7.Args[1]
 17599			if p != x7.Args[0] {
 17600				break
 17601			}
 17602			if mem != x7.Args[1] {
 17603				break
 17604			}
 17605			if !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
 17606				break
 17607			}
 17608			b = mergePoint(b, x0, x4, x5, x6, x7)
 17609			v0 := b.NewValue0(x7.Pos, OpPPC64MOVDload, t)
 17610			v.reset(OpCopy)
 17611			v.AddArg(v0)
 17612			v0.AuxInt = i0
 17613			v0.Aux = s
 17614			v0.AddArg(p)
 17615			v0.AddArg(mem)
 17616			return true
 17617		}
 17618		// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> x0:(MOVWZload {s} [i0] p mem) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 17619		// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
 17620		// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 17621		for {
 17622			t := v.Type
 17623			_ = v.Args[1]
 17624			o5 := v.Args[0]
 17625			if o5.Op != OpPPC64OR {
 17626				break
 17627			}
 17628			if o5.Type != t {
 17629				break
 17630			}
 17631			_ = o5.Args[1]
 17632			s5 := o5.Args[0]
 17633			if s5.Op != OpPPC64SLDconst {
 17634				break
 17635			}
 17636			if s5.AuxInt != 48 {
 17637				break
 17638			}
 17639			x6 := s5.Args[0]
 17640			if x6.Op != OpPPC64MOVBZload {
 17641				break
 17642			}
 17643			i6 := x6.AuxInt
 17644			s := x6.Aux
 17645			mem := x6.Args[1]
 17646			p := x6.Args[0]
 17647			o4 := o5.Args[1]
 17648			if o4.Op != OpPPC64OR {
 17649				break
 17650			}
 17651			if o4.Type != t {
 17652				break
 17653			}
 17654			_ = o4.Args[1]
 17655			o3 := o4.Args[0]
 17656			if o3.Op != OpPPC64OR {
 17657				break
 17658			}
 17659			if o3.Type != t {
 17660				break
 17661			}
 17662			_ = o3.Args[1]
 17663			x0 := o3.Args[0]
 17664			if x0.Op != OpPPC64MOVWZload {
 17665				break
 17666			}
 17667			i0 := x0.AuxInt
 17668			if x0.Aux != s {
 17669				break
 17670			}
 17671			_ = x0.Args[1]
 17672			if p != x0.Args[0] {
 17673				break
 17674			}
 17675			if mem != x0.Args[1] {
 17676				break
 17677			}
 17678			s3 := o3.Args[1]
 17679			if s3.Op != OpPPC64SLDconst {
 17680				break
 17681			}
 17682			if s3.AuxInt != 32 {
 17683				break
 17684			}
 17685			x4 := s3.Args[0]
 17686			if x4.Op != OpPPC64MOVBZload {
 17687				break
 17688			}
 17689			i4 := x4.AuxInt
 17690			if x4.Aux != s {
 17691				break
 17692			}
 17693			_ = x4.Args[1]
 17694			if p != x4.Args[0] {
 17695				break
 17696			}
 17697			if mem != x4.Args[1] {
 17698				break
 17699			}
 17700			s4 := o4.Args[1]
 17701			if s4.Op != OpPPC64SLDconst {
 17702				break
 17703			}
 17704			if s4.AuxInt != 40 {
 17705				break
 17706			}
 17707			x5 := s4.Args[0]
 17708			if x5.Op != OpPPC64MOVBZload {
 17709				break
 17710			}
 17711			i5 := x5.AuxInt
 17712			if x5.Aux != s {
 17713				break
 17714			}
 17715			_ = x5.Args[1]
 17716			if p != x5.Args[0] {
 17717				break
 17718			}
 17719			if mem != x5.Args[1] {
 17720				break
 17721			}
 17722			s6 := v.Args[1]
 17723			if s6.Op != OpPPC64SLDconst {
 17724				break
 17725			}
 17726			if s6.AuxInt != 56 {
 17727				break
 17728			}
 17729			x7 := s6.Args[0]
 17730			if x7.Op != OpPPC64MOVBZload {
 17731				break
 17732			}
 17733			i7 := x7.AuxInt
 17734			if x7.Aux != s {
 17735				break
 17736			}
 17737			_ = x7.Args[1]
 17738			if p != x7.Args[0] {
 17739				break
 17740			}
 17741			if mem != x7.Args[1] {
 17742				break
 17743			}
 17744			if !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
 17745				break
 17746			}
 17747			b = mergePoint(b, x0, x4, x5, x6, x7)
 17748			v0 := b.NewValue0(x7.Pos, OpPPC64MOVDload, t)
 17749			v.reset(OpCopy)
 17750			v.AddArg(v0)
 17751			v0.AuxInt = i0
 17752			v0.Aux = s
 17753			v0.AddArg(p)
 17754			v0.AddArg(mem)
 17755			return true
 17756		}
 17757		// match: (OR <t> o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) x0:(MOVWZload {s} [i0] p mem))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 17758		// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
 17759		// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 17760		for {
 17761			t := v.Type
 17762			_ = v.Args[1]
 17763			o5 := v.Args[0]
 17764			if o5.Op != OpPPC64OR {
 17765				break
 17766			}
 17767			if o5.Type != t {
 17768				break
 17769			}
 17770			_ = o5.Args[1]
 17771			o4 := o5.Args[0]
 17772			if o4.Op != OpPPC64OR {
 17773				break
 17774			}
 17775			if o4.Type != t {
 17776				break
 17777			}
 17778			_ = o4.Args[1]
 17779			s4 := o4.Args[0]
 17780			if s4.Op != OpPPC64SLDconst {
 17781				break
 17782			}
 17783			if s4.AuxInt != 40 {
 17784				break
 17785			}
 17786			x5 := s4.Args[0]
 17787			if x5.Op != OpPPC64MOVBZload {
 17788				break
 17789			}
 17790			i5 := x5.AuxInt
 17791			s := x5.Aux
 17792			mem := x5.Args[1]
 17793			p := x5.Args[0]
 17794			o3 := o4.Args[1]
 17795			if o3.Op != OpPPC64OR {
 17796				break
 17797			}
 17798			if o3.Type != t {
 17799				break
 17800			}
 17801			_ = o3.Args[1]
 17802			s3 := o3.Args[0]
 17803			if s3.Op != OpPPC64SLDconst {
 17804				break
 17805			}
 17806			if s3.AuxInt != 32 {
 17807				break
 17808			}
 17809			x4 := s3.Args[0]
 17810			if x4.Op != OpPPC64MOVBZload {
 17811				break
 17812			}
 17813			i4 := x4.AuxInt
 17814			if x4.Aux != s {
 17815				break
 17816			}
 17817			_ = x4.Args[1]
 17818			if p != x4.Args[0] {
 17819				break
 17820			}
 17821			if mem != x4.Args[1] {
 17822				break
 17823			}
 17824			x0 := o3.Args[1]
 17825			if x0.Op != OpPPC64MOVWZload {
 17826				break
 17827			}
 17828			i0 := x0.AuxInt
 17829			if x0.Aux != s {
 17830				break
 17831			}
 17832			_ = x0.Args[1]
 17833			if p != x0.Args[0] {
 17834				break
 17835			}
 17836			if mem != x0.Args[1] {
 17837				break
 17838			}
 17839			s5 := o5.Args[1]
 17840			if s5.Op != OpPPC64SLDconst {
 17841				break
 17842			}
 17843			if s5.AuxInt != 48 {
 17844				break
 17845			}
 17846			x6 := s5.Args[0]
 17847			if x6.Op != OpPPC64MOVBZload {
 17848				break
 17849			}
 17850			i6 := x6.AuxInt
 17851			if x6.Aux != s {
 17852				break
 17853			}
 17854			_ = x6.Args[1]
 17855			if p != x6.Args[0] {
 17856				break
 17857			}
 17858			if mem != x6.Args[1] {
 17859				break
 17860			}
 17861			s6 := v.Args[1]
 17862			if s6.Op != OpPPC64SLDconst {
 17863				break
 17864			}
 17865			if s6.AuxInt != 56 {
 17866				break
 17867			}
 17868			x7 := s6.Args[0]
 17869			if x7.Op != OpPPC64MOVBZload {
 17870				break
 17871			}
 17872			i7 := x7.AuxInt
 17873			if x7.Aux != s {
 17874				break
 17875			}
 17876			_ = x7.Args[1]
 17877			if p != x7.Args[0] {
 17878				break
 17879			}
 17880			if mem != x7.Args[1] {
 17881				break
 17882			}
 17883			if !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
 17884				break
 17885			}
 17886			b = mergePoint(b, x0, x4, x5, x6, x7)
 17887			v0 := b.NewValue0(x7.Pos, OpPPC64MOVDload, t)
 17888			v.reset(OpCopy)
 17889			v.AddArg(v0)
 17890			v0.AuxInt = i0
 17891			v0.Aux = s
 17892			v0.AddArg(p)
 17893			v0.AddArg(mem)
 17894			return true
 17895		}
 17896		// match: (OR <t> o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> x0:(MOVWZload {s} [i0] p mem) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 17897		// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
 17898		// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 17899		for {
 17900			t := v.Type
 17901			_ = v.Args[1]
 17902			o5 := v.Args[0]
 17903			if o5.Op != OpPPC64OR {
 17904				break
 17905			}
 17906			if o5.Type != t {
 17907				break
 17908			}
 17909			_ = o5.Args[1]
 17910			o4 := o5.Args[0]
 17911			if o4.Op != OpPPC64OR {
 17912				break
 17913			}
 17914			if o4.Type != t {
 17915				break
 17916			}
 17917			_ = o4.Args[1]
 17918			s4 := o4.Args[0]
 17919			if s4.Op != OpPPC64SLDconst {
 17920				break
 17921			}
 17922			if s4.AuxInt != 40 {
 17923				break
 17924			}
 17925			x5 := s4.Args[0]
 17926			if x5.Op != OpPPC64MOVBZload {
 17927				break
 17928			}
 17929			i5 := x5.AuxInt
 17930			s := x5.Aux
 17931			mem := x5.Args[1]
 17932			p := x5.Args[0]
 17933			o3 := o4.Args[1]
 17934			if o3.Op != OpPPC64OR {
 17935				break
 17936			}
 17937			if o3.Type != t {
 17938				break
 17939			}
 17940			_ = o3.Args[1]
 17941			x0 := o3.Args[0]
 17942			if x0.Op != OpPPC64MOVWZload {
 17943				break
 17944			}
 17945			i0 := x0.AuxInt
 17946			if x0.Aux != s {
 17947				break
 17948			}
 17949			_ = x0.Args[1]
 17950			if p != x0.Args[0] {
 17951				break
 17952			}
 17953			if mem != x0.Args[1] {
 17954				break
 17955			}
 17956			s3 := o3.Args[1]
 17957			if s3.Op != OpPPC64SLDconst {
 17958				break
 17959			}
 17960			if s3.AuxInt != 32 {
 17961				break
 17962			}
 17963			x4 := s3.Args[0]
 17964			if x4.Op != OpPPC64MOVBZload {
 17965				break
 17966			}
 17967			i4 := x4.AuxInt
 17968			if x4.Aux != s {
 17969				break
 17970			}
 17971			_ = x4.Args[1]
 17972			if p != x4.Args[0] {
 17973				break
 17974			}
 17975			if mem != x4.Args[1] {
 17976				break
 17977			}
 17978			s5 := o5.Args[1]
 17979			if s5.Op != OpPPC64SLDconst {
 17980				break
 17981			}
 17982			if s5.AuxInt != 48 {
 17983				break
 17984			}
 17985			x6 := s5.Args[0]
 17986			if x6.Op != OpPPC64MOVBZload {
 17987				break
 17988			}
 17989			i6 := x6.AuxInt
 17990			if x6.Aux != s {
 17991				break
 17992			}
 17993			_ = x6.Args[1]
 17994			if p != x6.Args[0] {
 17995				break
 17996			}
 17997			if mem != x6.Args[1] {
 17998				break
 17999			}
 18000			s6 := v.Args[1]
 18001			if s6.Op != OpPPC64SLDconst {
 18002				break
 18003			}
 18004			if s6.AuxInt != 56 {
 18005				break
 18006			}
 18007			x7 := s6.Args[0]
 18008			if x7.Op != OpPPC64MOVBZload {
 18009				break
 18010			}
 18011			i7 := x7.AuxInt
 18012			if x7.Aux != s {
 18013				break
 18014			}
 18015			_ = x7.Args[1]
 18016			if p != x7.Args[0] {
 18017				break
 18018			}
 18019			if mem != x7.Args[1] {
 18020				break
 18021			}
 18022			if !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
 18023				break
 18024			}
 18025			b = mergePoint(b, x0, x4, x5, x6, x7)
 18026			v0 := b.NewValue0(x7.Pos, OpPPC64MOVDload, t)
 18027			v.reset(OpCopy)
 18028			v.AddArg(v0)
 18029			v0.AuxInt = i0
 18030			v0.Aux = s
 18031			v0.AddArg(p)
 18032			v0.AddArg(mem)
 18033			return true
 18034		}
 18035		return false
 18036	}
 18037	func rewriteValuePPC64_OpPPC64OR_70(v *Value) bool {
 18038		b := v.Block
 18039		config := b.Func.Config
 18040		typ := &b.Func.Config.Types
 18041		// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) x0:(MOVWZload {s} [i0] p mem)) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 18042		// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
 18043		// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 18044		for {
 18045			t := v.Type
 18046			_ = v.Args[1]
 18047			o5 := v.Args[0]
 18048			if o5.Op != OpPPC64OR {
 18049				break
 18050			}
 18051			if o5.Type != t {
 18052				break
 18053			}
 18054			_ = o5.Args[1]
 18055			o4 := o5.Args[0]
 18056			if o4.Op != OpPPC64OR {
 18057				break
 18058			}
 18059			if o4.Type != t {
 18060				break
 18061			}
 18062			_ = o4.Args[1]
 18063			o3 := o4.Args[0]
 18064			if o3.Op != OpPPC64OR {
 18065				break
 18066			}
 18067			if o3.Type != t {
 18068				break
 18069			}
 18070			_ = o3.Args[1]
 18071			s3 := o3.Args[0]
 18072			if s3.Op != OpPPC64SLDconst {
 18073				break
 18074			}
 18075			if s3.AuxInt != 32 {
 18076				break
 18077			}
 18078			x4 := s3.Args[0]
 18079			if x4.Op != OpPPC64MOVBZload {
 18080				break
 18081			}
 18082			i4 := x4.AuxInt
 18083			s := x4.Aux
 18084			mem := x4.Args[1]
 18085			p := x4.Args[0]
 18086			x0 := o3.Args[1]
 18087			if x0.Op != OpPPC64MOVWZload {
 18088				break
 18089			}
 18090			i0 := x0.AuxInt
 18091			if x0.Aux != s {
 18092				break
 18093			}
 18094			_ = x0.Args[1]
 18095			if p != x0.Args[0] {
 18096				break
 18097			}
 18098			if mem != x0.Args[1] {
 18099				break
 18100			}
 18101			s4 := o4.Args[1]
 18102			if s4.Op != OpPPC64SLDconst {
 18103				break
 18104			}
 18105			if s4.AuxInt != 40 {
 18106				break
 18107			}
 18108			x5 := s4.Args[0]
 18109			if x5.Op != OpPPC64MOVBZload {
 18110				break
 18111			}
 18112			i5 := x5.AuxInt
 18113			if x5.Aux != s {
 18114				break
 18115			}
 18116			_ = x5.Args[1]
 18117			if p != x5.Args[0] {
 18118				break
 18119			}
 18120			if mem != x5.Args[1] {
 18121				break
 18122			}
 18123			s5 := o5.Args[1]
 18124			if s5.Op != OpPPC64SLDconst {
 18125				break
 18126			}
 18127			if s5.AuxInt != 48 {
 18128				break
 18129			}
 18130			x6 := s5.Args[0]
 18131			if x6.Op != OpPPC64MOVBZload {
 18132				break
 18133			}
 18134			i6 := x6.AuxInt
 18135			if x6.Aux != s {
 18136				break
 18137			}
 18138			_ = x6.Args[1]
 18139			if p != x6.Args[0] {
 18140				break
 18141			}
 18142			if mem != x6.Args[1] {
 18143				break
 18144			}
 18145			s6 := v.Args[1]
 18146			if s6.Op != OpPPC64SLDconst {
 18147				break
 18148			}
 18149			if s6.AuxInt != 56 {
 18150				break
 18151			}
 18152			x7 := s6.Args[0]
 18153			if x7.Op != OpPPC64MOVBZload {
 18154				break
 18155			}
 18156			i7 := x7.AuxInt
 18157			if x7.Aux != s {
 18158				break
 18159			}
 18160			_ = x7.Args[1]
 18161			if p != x7.Args[0] {
 18162				break
 18163			}
 18164			if mem != x7.Args[1] {
 18165				break
 18166			}
 18167			if !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
 18168				break
 18169			}
 18170			b = mergePoint(b, x0, x4, x5, x6, x7)
 18171			v0 := b.NewValue0(x7.Pos, OpPPC64MOVDload, t)
 18172			v.reset(OpCopy)
 18173			v.AddArg(v0)
 18174			v0.AuxInt = i0
 18175			v0.Aux = s
 18176			v0.AddArg(p)
 18177			v0.AddArg(mem)
 18178			return true
 18179		}
 18180		// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> x0:(MOVWZload {s} [i0] p mem) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 18181		// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
 18182		// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 18183		for {
 18184			t := v.Type
 18185			_ = v.Args[1]
 18186			o5 := v.Args[0]
 18187			if o5.Op != OpPPC64OR {
 18188				break
 18189			}
 18190			if o5.Type != t {
 18191				break
 18192			}
 18193			_ = o5.Args[1]
 18194			o4 := o5.Args[0]
 18195			if o4.Op != OpPPC64OR {
 18196				break
 18197			}
 18198			if o4.Type != t {
 18199				break
 18200			}
 18201			_ = o4.Args[1]
 18202			o3 := o4.Args[0]
 18203			if o3.Op != OpPPC64OR {
 18204				break
 18205			}
 18206			if o3.Type != t {
 18207				break
 18208			}
 18209			_ = o3.Args[1]
 18210			x0 := o3.Args[0]
 18211			if x0.Op != OpPPC64MOVWZload {
 18212				break
 18213			}
 18214			i0 := x0.AuxInt
 18215			s := x0.Aux
 18216			mem := x0.Args[1]
 18217			p := x0.Args[0]
 18218			s3 := o3.Args[1]
 18219			if s3.Op != OpPPC64SLDconst {
 18220				break
 18221			}
 18222			if s3.AuxInt != 32 {
 18223				break
 18224			}
 18225			x4 := s3.Args[0]
 18226			if x4.Op != OpPPC64MOVBZload {
 18227				break
 18228			}
 18229			i4 := x4.AuxInt
 18230			if x4.Aux != s {
 18231				break
 18232			}
 18233			_ = x4.Args[1]
 18234			if p != x4.Args[0] {
 18235				break
 18236			}
 18237			if mem != x4.Args[1] {
 18238				break
 18239			}
 18240			s4 := o4.Args[1]
 18241			if s4.Op != OpPPC64SLDconst {
 18242				break
 18243			}
 18244			if s4.AuxInt != 40 {
 18245				break
 18246			}
 18247			x5 := s4.Args[0]
 18248			if x5.Op != OpPPC64MOVBZload {
 18249				break
 18250			}
 18251			i5 := x5.AuxInt
 18252			if x5.Aux != s {
 18253				break
 18254			}
 18255			_ = x5.Args[1]
 18256			if p != x5.Args[0] {
 18257				break
 18258			}
 18259			if mem != x5.Args[1] {
 18260				break
 18261			}
 18262			s5 := o5.Args[1]
 18263			if s5.Op != OpPPC64SLDconst {
 18264				break
 18265			}
 18266			if s5.AuxInt != 48 {
 18267				break
 18268			}
 18269			x6 := s5.Args[0]
 18270			if x6.Op != OpPPC64MOVBZload {
 18271				break
 18272			}
 18273			i6 := x6.AuxInt
 18274			if x6.Aux != s {
 18275				break
 18276			}
 18277			_ = x6.Args[1]
 18278			if p != x6.Args[0] {
 18279				break
 18280			}
 18281			if mem != x6.Args[1] {
 18282				break
 18283			}
 18284			s6 := v.Args[1]
 18285			if s6.Op != OpPPC64SLDconst {
 18286				break
 18287			}
 18288			if s6.AuxInt != 56 {
 18289				break
 18290			}
 18291			x7 := s6.Args[0]
 18292			if x7.Op != OpPPC64MOVBZload {
 18293				break
 18294			}
 18295			i7 := x7.AuxInt
 18296			if x7.Aux != s {
 18297				break
 18298			}
 18299			_ = x7.Args[1]
 18300			if p != x7.Args[0] {
 18301				break
 18302			}
 18303			if mem != x7.Args[1] {
 18304				break
 18305			}
 18306			if !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
 18307				break
 18308			}
 18309			b = mergePoint(b, x0, x4, x5, x6, x7)
 18310			v0 := b.NewValue0(x7.Pos, OpPPC64MOVDload, t)
 18311			v.reset(OpCopy)
 18312			v.AddArg(v0)
 18313			v0.AuxInt = i0
 18314			v0.Aux = s
 18315			v0.AddArg(p)
 18316			v0.AddArg(mem)
 18317			return true
 18318		}
 18319		// match: (OR <t> s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]) o0:(OR <t> s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48]) o1:(OR <t> s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40]) o2:(OR <t> s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32]) x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem)))))
 18320		// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
 18321		// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 18322		for {
 18323			t := v.Type
 18324			_ = v.Args[1]
 18325			s0 := v.Args[0]
 18326			if s0.Op != OpPPC64SLDconst {
 18327				break
 18328			}
 18329			if s0.AuxInt != 56 {
 18330				break
 18331			}
 18332			x0 := s0.Args[0]
 18333			if x0.Op != OpPPC64MOVBZload {
 18334				break
 18335			}
 18336			i0 := x0.AuxInt
 18337			s := x0.Aux
 18338			mem := x0.Args[1]
 18339			p := x0.Args[0]
 18340			o0 := v.Args[1]
 18341			if o0.Op != OpPPC64OR {
 18342				break
 18343			}
 18344			if o0.Type != t {
 18345				break
 18346			}
 18347			_ = o0.Args[1]
 18348			s1 := o0.Args[0]
 18349			if s1.Op != OpPPC64SLDconst {
 18350				break
 18351			}
 18352			if s1.AuxInt != 48 {
 18353				break
 18354			}
 18355			x1 := s1.Args[0]
 18356			if x1.Op != OpPPC64MOVBZload {
 18357				break
 18358			}
 18359			i1 := x1.AuxInt
 18360			if x1.Aux != s {
 18361				break
 18362			}
 18363			_ = x1.Args[1]
 18364			if p != x1.Args[0] {
 18365				break
 18366			}
 18367			if mem != x1.Args[1] {
 18368				break
 18369			}
 18370			o1 := o0.Args[1]
 18371			if o1.Op != OpPPC64OR {
 18372				break
 18373			}
 18374			if o1.Type != t {
 18375				break
 18376			}
 18377			_ = o1.Args[1]
 18378			s2 := o1.Args[0]
 18379			if s2.Op != OpPPC64SLDconst {
 18380				break
 18381			}
 18382			if s2.AuxInt != 40 {
 18383				break
 18384			}
 18385			x2 := s2.Args[0]
 18386			if x2.Op != OpPPC64MOVBZload {
 18387				break
 18388			}
 18389			i2 := x2.AuxInt
 18390			if x2.Aux != s {
 18391				break
 18392			}
 18393			_ = x2.Args[1]
 18394			if p != x2.Args[0] {
 18395				break
 18396			}
 18397			if mem != x2.Args[1] {
 18398				break
 18399			}
 18400			o2 := o1.Args[1]
 18401			if o2.Op != OpPPC64OR {
 18402				break
 18403			}
 18404			if o2.Type != t {
 18405				break
 18406			}
 18407			_ = o2.Args[1]
 18408			s3 := o2.Args[0]
 18409			if s3.Op != OpPPC64SLDconst {
 18410				break
 18411			}
 18412			if s3.AuxInt != 32 {
 18413				break
 18414			}
 18415			x3 := s3.Args[0]
 18416			if x3.Op != OpPPC64MOVBZload {
 18417				break
 18418			}
 18419			i3 := x3.AuxInt
 18420			if x3.Aux != s {
 18421				break
 18422			}
 18423			_ = x3.Args[1]
 18424			if p != x3.Args[0] {
 18425				break
 18426			}
 18427			if mem != x3.Args[1] {
 18428				break
 18429			}
 18430			x4 := o2.Args[1]
 18431			if x4.Op != OpPPC64MOVWBRload {
 18432				break
 18433			}
 18434			if x4.Type != t {
 18435				break
 18436			}
 18437			_ = x4.Args[1]
 18438			x4_0 := x4.Args[0]
 18439			if x4_0.Op != OpPPC64MOVDaddr {
 18440				break
 18441			}
 18442			if x4_0.Type != typ.Uintptr {
 18443				break
 18444			}
 18445			i4 := x4_0.AuxInt
 18446			if p != x4_0.Args[0] {
 18447				break
 18448			}
 18449			if mem != x4.Args[1] {
 18450				break
 18451			}
 18452			if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
 18453				break
 18454			}
 18455			b = mergePoint(b, x0, x1, x2, x3, x4)
 18456			v0 := b.NewValue0(x4.Pos, OpPPC64MOVDBRload, t)
 18457			v.reset(OpCopy)
 18458			v.AddArg(v0)
 18459			v1 := b.NewValue0(x4.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 18460			v1.AuxInt = i0
 18461			v1.Aux = s
 18462			v1.AddArg(p)
 18463			v0.AddArg(v1)
 18464			v0.AddArg(mem)
 18465			return true
 18466		}
 18467		// match: (OR <t> s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]) o0:(OR <t> s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48]) o1:(OR <t> s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40]) o2:(OR <t> x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem) s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32])))))
 18468		// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
 18469		// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 18470		for {
 18471			t := v.Type
 18472			_ = v.Args[1]
 18473			s0 := v.Args[0]
 18474			if s0.Op != OpPPC64SLDconst {
 18475				break
 18476			}
 18477			if s0.AuxInt != 56 {
 18478				break
 18479			}
 18480			x0 := s0.Args[0]
 18481			if x0.Op != OpPPC64MOVBZload {
 18482				break
 18483			}
 18484			i0 := x0.AuxInt
 18485			s := x0.Aux
 18486			mem := x0.Args[1]
 18487			p := x0.Args[0]
 18488			o0 := v.Args[1]
 18489			if o0.Op != OpPPC64OR {
 18490				break
 18491			}
 18492			if o0.Type != t {
 18493				break
 18494			}
 18495			_ = o0.Args[1]
 18496			s1 := o0.Args[0]
 18497			if s1.Op != OpPPC64SLDconst {
 18498				break
 18499			}
 18500			if s1.AuxInt != 48 {
 18501				break
 18502			}
 18503			x1 := s1.Args[0]
 18504			if x1.Op != OpPPC64MOVBZload {
 18505				break
 18506			}
 18507			i1 := x1.AuxInt
 18508			if x1.Aux != s {
 18509				break
 18510			}
 18511			_ = x1.Args[1]
 18512			if p != x1.Args[0] {
 18513				break
 18514			}
 18515			if mem != x1.Args[1] {
 18516				break
 18517			}
 18518			o1 := o0.Args[1]
 18519			if o1.Op != OpPPC64OR {
 18520				break
 18521			}
 18522			if o1.Type != t {
 18523				break
 18524			}
 18525			_ = o1.Args[1]
 18526			s2 := o1.Args[0]
 18527			if s2.Op != OpPPC64SLDconst {
 18528				break
 18529			}
 18530			if s2.AuxInt != 40 {
 18531				break
 18532			}
 18533			x2 := s2.Args[0]
 18534			if x2.Op != OpPPC64MOVBZload {
 18535				break
 18536			}
 18537			i2 := x2.AuxInt
 18538			if x2.Aux != s {
 18539				break
 18540			}
 18541			_ = x2.Args[1]
 18542			if p != x2.Args[0] {
 18543				break
 18544			}
 18545			if mem != x2.Args[1] {
 18546				break
 18547			}
 18548			o2 := o1.Args[1]
 18549			if o2.Op != OpPPC64OR {
 18550				break
 18551			}
 18552			if o2.Type != t {
 18553				break
 18554			}
 18555			_ = o2.Args[1]
 18556			x4 := o2.Args[0]
 18557			if x4.Op != OpPPC64MOVWBRload {
 18558				break
 18559			}
 18560			if x4.Type != t {
 18561				break
 18562			}
 18563			_ = x4.Args[1]
 18564			x4_0 := x4.Args[0]
 18565			if x4_0.Op != OpPPC64MOVDaddr {
 18566				break
 18567			}
 18568			if x4_0.Type != typ.Uintptr {
 18569				break
 18570			}
 18571			i4 := x4_0.AuxInt
 18572			if p != x4_0.Args[0] {
 18573				break
 18574			}
 18575			if mem != x4.Args[1] {
 18576				break
 18577			}
 18578			s3 := o2.Args[1]
 18579			if s3.Op != OpPPC64SLDconst {
 18580				break
 18581			}
 18582			if s3.AuxInt != 32 {
 18583				break
 18584			}
 18585			x3 := s3.Args[0]
 18586			if x3.Op != OpPPC64MOVBZload {
 18587				break
 18588			}
 18589			i3 := x3.AuxInt
 18590			if x3.Aux != s {
 18591				break
 18592			}
 18593			_ = x3.Args[1]
 18594			if p != x3.Args[0] {
 18595				break
 18596			}
 18597			if mem != x3.Args[1] {
 18598				break
 18599			}
 18600			if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
 18601				break
 18602			}
 18603			b = mergePoint(b, x0, x1, x2, x3, x4)
 18604			v0 := b.NewValue0(x3.Pos, OpPPC64MOVDBRload, t)
 18605			v.reset(OpCopy)
 18606			v.AddArg(v0)
 18607			v1 := b.NewValue0(x3.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 18608			v1.AuxInt = i0
 18609			v1.Aux = s
 18610			v1.AddArg(p)
 18611			v0.AddArg(v1)
 18612			v0.AddArg(mem)
 18613			return true
 18614		}
 18615		// match: (OR <t> s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]) o0:(OR <t> s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48]) o1:(OR <t> o2:(OR <t> s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32]) x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem)) s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40]))))
 18616		// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
 18617		// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 18618		for {
 18619			t := v.Type
 18620			_ = v.Args[1]
 18621			s0 := v.Args[0]
 18622			if s0.Op != OpPPC64SLDconst {
 18623				break
 18624			}
 18625			if s0.AuxInt != 56 {
 18626				break
 18627			}
 18628			x0 := s0.Args[0]
 18629			if x0.Op != OpPPC64MOVBZload {
 18630				break
 18631			}
 18632			i0 := x0.AuxInt
 18633			s := x0.Aux
 18634			mem := x0.Args[1]
 18635			p := x0.Args[0]
 18636			o0 := v.Args[1]
 18637			if o0.Op != OpPPC64OR {
 18638				break
 18639			}
 18640			if o0.Type != t {
 18641				break
 18642			}
 18643			_ = o0.Args[1]
 18644			s1 := o0.Args[0]
 18645			if s1.Op != OpPPC64SLDconst {
 18646				break
 18647			}
 18648			if s1.AuxInt != 48 {
 18649				break
 18650			}
 18651			x1 := s1.Args[0]
 18652			if x1.Op != OpPPC64MOVBZload {
 18653				break
 18654			}
 18655			i1 := x1.AuxInt
 18656			if x1.Aux != s {
 18657				break
 18658			}
 18659			_ = x1.Args[1]
 18660			if p != x1.Args[0] {
 18661				break
 18662			}
 18663			if mem != x1.Args[1] {
 18664				break
 18665			}
 18666			o1 := o0.Args[1]
 18667			if o1.Op != OpPPC64OR {
 18668				break
 18669			}
 18670			if o1.Type != t {
 18671				break
 18672			}
 18673			_ = o1.Args[1]
 18674			o2 := o1.Args[0]
 18675			if o2.Op != OpPPC64OR {
 18676				break
 18677			}
 18678			if o2.Type != t {
 18679				break
 18680			}
 18681			_ = o2.Args[1]
 18682			s3 := o2.Args[0]
 18683			if s3.Op != OpPPC64SLDconst {
 18684				break
 18685			}
 18686			if s3.AuxInt != 32 {
 18687				break
 18688			}
 18689			x3 := s3.Args[0]
 18690			if x3.Op != OpPPC64MOVBZload {
 18691				break
 18692			}
 18693			i3 := x3.AuxInt
 18694			if x3.Aux != s {
 18695				break
 18696			}
 18697			_ = x3.Args[1]
 18698			if p != x3.Args[0] {
 18699				break
 18700			}
 18701			if mem != x3.Args[1] {
 18702				break
 18703			}
 18704			x4 := o2.Args[1]
 18705			if x4.Op != OpPPC64MOVWBRload {
 18706				break
 18707			}
 18708			if x4.Type != t {
 18709				break
 18710			}
 18711			_ = x4.Args[1]
 18712			x4_0 := x4.Args[0]
 18713			if x4_0.Op != OpPPC64MOVDaddr {
 18714				break
 18715			}
 18716			if x4_0.Type != typ.Uintptr {
 18717				break
 18718			}
 18719			i4 := x4_0.AuxInt
 18720			if p != x4_0.Args[0] {
 18721				break
 18722			}
 18723			if mem != x4.Args[1] {
 18724				break
 18725			}
 18726			s2 := o1.Args[1]
 18727			if s2.Op != OpPPC64SLDconst {
 18728				break
 18729			}
 18730			if s2.AuxInt != 40 {
 18731				break
 18732			}
 18733			x2 := s2.Args[0]
 18734			if x2.Op != OpPPC64MOVBZload {
 18735				break
 18736			}
 18737			i2 := x2.AuxInt
 18738			if x2.Aux != s {
 18739				break
 18740			}
 18741			_ = x2.Args[1]
 18742			if p != x2.Args[0] {
 18743				break
 18744			}
 18745			if mem != x2.Args[1] {
 18746				break
 18747			}
 18748			if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
 18749				break
 18750			}
 18751			b = mergePoint(b, x0, x1, x2, x3, x4)
 18752			v0 := b.NewValue0(x2.Pos, OpPPC64MOVDBRload, t)
 18753			v.reset(OpCopy)
 18754			v.AddArg(v0)
 18755			v1 := b.NewValue0(x2.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 18756			v1.AuxInt = i0
 18757			v1.Aux = s
 18758			v1.AddArg(p)
 18759			v0.AddArg(v1)
 18760			v0.AddArg(mem)
 18761			return true
 18762		}
 18763		// match: (OR <t> s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]) o0:(OR <t> s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48]) o1:(OR <t> o2:(OR <t> x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem) s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32])) s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40]))))
 18764		// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
 18765		// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 18766		for {
 18767			t := v.Type
 18768			_ = v.Args[1]
 18769			s0 := v.Args[0]
 18770			if s0.Op != OpPPC64SLDconst {
 18771				break
 18772			}
 18773			if s0.AuxInt != 56 {
 18774				break
 18775			}
 18776			x0 := s0.Args[0]
 18777			if x0.Op != OpPPC64MOVBZload {
 18778				break
 18779			}
 18780			i0 := x0.AuxInt
 18781			s := x0.Aux
 18782			mem := x0.Args[1]
 18783			p := x0.Args[0]
 18784			o0 := v.Args[1]
 18785			if o0.Op != OpPPC64OR {
 18786				break
 18787			}
 18788			if o0.Type != t {
 18789				break
 18790			}
 18791			_ = o0.Args[1]
 18792			s1 := o0.Args[0]
 18793			if s1.Op != OpPPC64SLDconst {
 18794				break
 18795			}
 18796			if s1.AuxInt != 48 {
 18797				break
 18798			}
 18799			x1 := s1.Args[0]
 18800			if x1.Op != OpPPC64MOVBZload {
 18801				break
 18802			}
 18803			i1 := x1.AuxInt
 18804			if x1.Aux != s {
 18805				break
 18806			}
 18807			_ = x1.Args[1]
 18808			if p != x1.Args[0] {
 18809				break
 18810			}
 18811			if mem != x1.Args[1] {
 18812				break
 18813			}
 18814			o1 := o0.Args[1]
 18815			if o1.Op != OpPPC64OR {
 18816				break
 18817			}
 18818			if o1.Type != t {
 18819				break
 18820			}
 18821			_ = o1.Args[1]
 18822			o2 := o1.Args[0]
 18823			if o2.Op != OpPPC64OR {
 18824				break
 18825			}
 18826			if o2.Type != t {
 18827				break
 18828			}
 18829			_ = o2.Args[1]
 18830			x4 := o2.Args[0]
 18831			if x4.Op != OpPPC64MOVWBRload {
 18832				break
 18833			}
 18834			if x4.Type != t {
 18835				break
 18836			}
 18837			_ = x4.Args[1]
 18838			x4_0 := x4.Args[0]
 18839			if x4_0.Op != OpPPC64MOVDaddr {
 18840				break
 18841			}
 18842			if x4_0.Type != typ.Uintptr {
 18843				break
 18844			}
 18845			i4 := x4_0.AuxInt
 18846			if p != x4_0.Args[0] {
 18847				break
 18848			}
 18849			if mem != x4.Args[1] {
 18850				break
 18851			}
 18852			s3 := o2.Args[1]
 18853			if s3.Op != OpPPC64SLDconst {
 18854				break
 18855			}
 18856			if s3.AuxInt != 32 {
 18857				break
 18858			}
 18859			x3 := s3.Args[0]
 18860			if x3.Op != OpPPC64MOVBZload {
 18861				break
 18862			}
 18863			i3 := x3.AuxInt
 18864			if x3.Aux != s {
 18865				break
 18866			}
 18867			_ = x3.Args[1]
 18868			if p != x3.Args[0] {
 18869				break
 18870			}
 18871			if mem != x3.Args[1] {
 18872				break
 18873			}
 18874			s2 := o1.Args[1]
 18875			if s2.Op != OpPPC64SLDconst {
 18876				break
 18877			}
 18878			if s2.AuxInt != 40 {
 18879				break
 18880			}
 18881			x2 := s2.Args[0]
 18882			if x2.Op != OpPPC64MOVBZload {
 18883				break
 18884			}
 18885			i2 := x2.AuxInt
 18886			if x2.Aux != s {
 18887				break
 18888			}
 18889			_ = x2.Args[1]
 18890			if p != x2.Args[0] {
 18891				break
 18892			}
 18893			if mem != x2.Args[1] {
 18894				break
 18895			}
 18896			if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
 18897				break
 18898			}
 18899			b = mergePoint(b, x0, x1, x2, x3, x4)
 18900			v0 := b.NewValue0(x2.Pos, OpPPC64MOVDBRload, t)
 18901			v.reset(OpCopy)
 18902			v.AddArg(v0)
 18903			v1 := b.NewValue0(x2.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 18904			v1.AuxInt = i0
 18905			v1.Aux = s
 18906			v1.AddArg(p)
 18907			v0.AddArg(v1)
 18908			v0.AddArg(mem)
 18909			return true
 18910		}
 18911		// match: (OR <t> s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]) o0:(OR <t> o1:(OR <t> s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40]) o2:(OR <t> s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32]) x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem))) s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48])))
 18912		// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
 18913		// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 18914		for {
 18915			t := v.Type
 18916			_ = v.Args[1]
 18917			s0 := v.Args[0]
 18918			if s0.Op != OpPPC64SLDconst {
 18919				break
 18920			}
 18921			if s0.AuxInt != 56 {
 18922				break
 18923			}
 18924			x0 := s0.Args[0]
 18925			if x0.Op != OpPPC64MOVBZload {
 18926				break
 18927			}
 18928			i0 := x0.AuxInt
 18929			s := x0.Aux
 18930			mem := x0.Args[1]
 18931			p := x0.Args[0]
 18932			o0 := v.Args[1]
 18933			if o0.Op != OpPPC64OR {
 18934				break
 18935			}
 18936			if o0.Type != t {
 18937				break
 18938			}
 18939			_ = o0.Args[1]
 18940			o1 := o0.Args[0]
 18941			if o1.Op != OpPPC64OR {
 18942				break
 18943			}
 18944			if o1.Type != t {
 18945				break
 18946			}
 18947			_ = o1.Args[1]
 18948			s2 := o1.Args[0]
 18949			if s2.Op != OpPPC64SLDconst {
 18950				break
 18951			}
 18952			if s2.AuxInt != 40 {
 18953				break
 18954			}
 18955			x2 := s2.Args[0]
 18956			if x2.Op != OpPPC64MOVBZload {
 18957				break
 18958			}
 18959			i2 := x2.AuxInt
 18960			if x2.Aux != s {
 18961				break
 18962			}
 18963			_ = x2.Args[1]
 18964			if p != x2.Args[0] {
 18965				break
 18966			}
 18967			if mem != x2.Args[1] {
 18968				break
 18969			}
 18970			o2 := o1.Args[1]
 18971			if o2.Op != OpPPC64OR {
 18972				break
 18973			}
 18974			if o2.Type != t {
 18975				break
 18976			}
 18977			_ = o2.Args[1]
 18978			s3 := o2.Args[0]
 18979			if s3.Op != OpPPC64SLDconst {
 18980				break
 18981			}
 18982			if s3.AuxInt != 32 {
 18983				break
 18984			}
 18985			x3 := s3.Args[0]
 18986			if x3.Op != OpPPC64MOVBZload {
 18987				break
 18988			}
 18989			i3 := x3.AuxInt
 18990			if x3.Aux != s {
 18991				break
 18992			}
 18993			_ = x3.Args[1]
 18994			if p != x3.Args[0] {
 18995				break
 18996			}
 18997			if mem != x3.Args[1] {
 18998				break
 18999			}
 19000			x4 := o2.Args[1]
 19001			if x4.Op != OpPPC64MOVWBRload {
 19002				break
 19003			}
 19004			if x4.Type != t {
 19005				break
 19006			}
 19007			_ = x4.Args[1]
 19008			x4_0 := x4.Args[0]
 19009			if x4_0.Op != OpPPC64MOVDaddr {
 19010				break
 19011			}
 19012			if x4_0.Type != typ.Uintptr {
 19013				break
 19014			}
 19015			i4 := x4_0.AuxInt
 19016			if p != x4_0.Args[0] {
 19017				break
 19018			}
 19019			if mem != x4.Args[1] {
 19020				break
 19021			}
 19022			s1 := o0.Args[1]
 19023			if s1.Op != OpPPC64SLDconst {
 19024				break
 19025			}
 19026			if s1.AuxInt != 48 {
 19027				break
 19028			}
 19029			x1 := s1.Args[0]
 19030			if x1.Op != OpPPC64MOVBZload {
 19031				break
 19032			}
 19033			i1 := x1.AuxInt
 19034			if x1.Aux != s {
 19035				break
 19036			}
 19037			_ = x1.Args[1]
 19038			if p != x1.Args[0] {
 19039				break
 19040			}
 19041			if mem != x1.Args[1] {
 19042				break
 19043			}
 19044			if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
 19045				break
 19046			}
 19047			b = mergePoint(b, x0, x1, x2, x3, x4)
 19048			v0 := b.NewValue0(x1.Pos, OpPPC64MOVDBRload, t)
 19049			v.reset(OpCopy)
 19050			v.AddArg(v0)
 19051			v1 := b.NewValue0(x1.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 19052			v1.AuxInt = i0
 19053			v1.Aux = s
 19054			v1.AddArg(p)
 19055			v0.AddArg(v1)
 19056			v0.AddArg(mem)
 19057			return true
 19058		}
 19059		// match: (OR <t> s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]) o0:(OR <t> o1:(OR <t> s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40]) o2:(OR <t> x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem) s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32]))) s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48])))
 19060		// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
 19061		// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 19062		for {
 19063			t := v.Type
 19064			_ = v.Args[1]
 19065			s0 := v.Args[0]
 19066			if s0.Op != OpPPC64SLDconst {
 19067				break
 19068			}
 19069			if s0.AuxInt != 56 {
 19070				break
 19071			}
 19072			x0 := s0.Args[0]
 19073			if x0.Op != OpPPC64MOVBZload {
 19074				break
 19075			}
 19076			i0 := x0.AuxInt
 19077			s := x0.Aux
 19078			mem := x0.Args[1]
 19079			p := x0.Args[0]
 19080			o0 := v.Args[1]
 19081			if o0.Op != OpPPC64OR {
 19082				break
 19083			}
 19084			if o0.Type != t {
 19085				break
 19086			}
 19087			_ = o0.Args[1]
 19088			o1 := o0.Args[0]
 19089			if o1.Op != OpPPC64OR {
 19090				break
 19091			}
 19092			if o1.Type != t {
 19093				break
 19094			}
 19095			_ = o1.Args[1]
 19096			s2 := o1.Args[0]
 19097			if s2.Op != OpPPC64SLDconst {
 19098				break
 19099			}
 19100			if s2.AuxInt != 40 {
 19101				break
 19102			}
 19103			x2 := s2.Args[0]
 19104			if x2.Op != OpPPC64MOVBZload {
 19105				break
 19106			}
 19107			i2 := x2.AuxInt
 19108			if x2.Aux != s {
 19109				break
 19110			}
 19111			_ = x2.Args[1]
 19112			if p != x2.Args[0] {
 19113				break
 19114			}
 19115			if mem != x2.Args[1] {
 19116				break
 19117			}
 19118			o2 := o1.Args[1]
 19119			if o2.Op != OpPPC64OR {
 19120				break
 19121			}
 19122			if o2.Type != t {
 19123				break
 19124			}
 19125			_ = o2.Args[1]
 19126			x4 := o2.Args[0]
 19127			if x4.Op != OpPPC64MOVWBRload {
 19128				break
 19129			}
 19130			if x4.Type != t {
 19131				break
 19132			}
 19133			_ = x4.Args[1]
 19134			x4_0 := x4.Args[0]
 19135			if x4_0.Op != OpPPC64MOVDaddr {
 19136				break
 19137			}
 19138			if x4_0.Type != typ.Uintptr {
 19139				break
 19140			}
 19141			i4 := x4_0.AuxInt
 19142			if p != x4_0.Args[0] {
 19143				break
 19144			}
 19145			if mem != x4.Args[1] {
 19146				break
 19147			}
 19148			s3 := o2.Args[1]
 19149			if s3.Op != OpPPC64SLDconst {
 19150				break
 19151			}
 19152			if s3.AuxInt != 32 {
 19153				break
 19154			}
 19155			x3 := s3.Args[0]
 19156			if x3.Op != OpPPC64MOVBZload {
 19157				break
 19158			}
 19159			i3 := x3.AuxInt
 19160			if x3.Aux != s {
 19161				break
 19162			}
 19163			_ = x3.Args[1]
 19164			if p != x3.Args[0] {
 19165				break
 19166			}
 19167			if mem != x3.Args[1] {
 19168				break
 19169			}
 19170			s1 := o0.Args[1]
 19171			if s1.Op != OpPPC64SLDconst {
 19172				break
 19173			}
 19174			if s1.AuxInt != 48 {
 19175				break
 19176			}
 19177			x1 := s1.Args[0]
 19178			if x1.Op != OpPPC64MOVBZload {
 19179				break
 19180			}
 19181			i1 := x1.AuxInt
 19182			if x1.Aux != s {
 19183				break
 19184			}
 19185			_ = x1.Args[1]
 19186			if p != x1.Args[0] {
 19187				break
 19188			}
 19189			if mem != x1.Args[1] {
 19190				break
 19191			}
 19192			if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
 19193				break
 19194			}
 19195			b = mergePoint(b, x0, x1, x2, x3, x4)
 19196			v0 := b.NewValue0(x1.Pos, OpPPC64MOVDBRload, t)
 19197			v.reset(OpCopy)
 19198			v.AddArg(v0)
 19199			v1 := b.NewValue0(x1.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 19200			v1.AuxInt = i0
 19201			v1.Aux = s
 19202			v1.AddArg(p)
 19203			v0.AddArg(v1)
 19204			v0.AddArg(mem)
 19205			return true
 19206		}
 19207		// match: (OR <t> s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]) o0:(OR <t> o1:(OR <t> o2:(OR <t> s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32]) x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem)) s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40])) s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48])))
 19208		// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
 19209		// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 19210		for {
 19211			t := v.Type
 19212			_ = v.Args[1]
 19213			s0 := v.Args[0]
 19214			if s0.Op != OpPPC64SLDconst {
 19215				break
 19216			}
 19217			if s0.AuxInt != 56 {
 19218				break
 19219			}
 19220			x0 := s0.Args[0]
 19221			if x0.Op != OpPPC64MOVBZload {
 19222				break
 19223			}
 19224			i0 := x0.AuxInt
 19225			s := x0.Aux
 19226			mem := x0.Args[1]
 19227			p := x0.Args[0]
 19228			o0 := v.Args[1]
 19229			if o0.Op != OpPPC64OR {
 19230				break
 19231			}
 19232			if o0.Type != t {
 19233				break
 19234			}
 19235			_ = o0.Args[1]
 19236			o1 := o0.Args[0]
 19237			if o1.Op != OpPPC64OR {
 19238				break
 19239			}
 19240			if o1.Type != t {
 19241				break
 19242			}
 19243			_ = o1.Args[1]
 19244			o2 := o1.Args[0]
 19245			if o2.Op != OpPPC64OR {
 19246				break
 19247			}
 19248			if o2.Type != t {
 19249				break
 19250			}
 19251			_ = o2.Args[1]
 19252			s3 := o2.Args[0]
 19253			if s3.Op != OpPPC64SLDconst {
 19254				break
 19255			}
 19256			if s3.AuxInt != 32 {
 19257				break
 19258			}
 19259			x3 := s3.Args[0]
 19260			if x3.Op != OpPPC64MOVBZload {
 19261				break
 19262			}
 19263			i3 := x3.AuxInt
 19264			if x3.Aux != s {
 19265				break
 19266			}
 19267			_ = x3.Args[1]
 19268			if p != x3.Args[0] {
 19269				break
 19270			}
 19271			if mem != x3.Args[1] {
 19272				break
 19273			}
 19274			x4 := o2.Args[1]
 19275			if x4.Op != OpPPC64MOVWBRload {
 19276				break
 19277			}
 19278			if x4.Type != t {
 19279				break
 19280			}
 19281			_ = x4.Args[1]
 19282			x4_0 := x4.Args[0]
 19283			if x4_0.Op != OpPPC64MOVDaddr {
 19284				break
 19285			}
 19286			if x4_0.Type != typ.Uintptr {
 19287				break
 19288			}
 19289			i4 := x4_0.AuxInt
 19290			if p != x4_0.Args[0] {
 19291				break
 19292			}
 19293			if mem != x4.Args[1] {
 19294				break
 19295			}
 19296			s2 := o1.Args[1]
 19297			if s2.Op != OpPPC64SLDconst {
 19298				break
 19299			}
 19300			if s2.AuxInt != 40 {
 19301				break
 19302			}
 19303			x2 := s2.Args[0]
 19304			if x2.Op != OpPPC64MOVBZload {
 19305				break
 19306			}
 19307			i2 := x2.AuxInt
 19308			if x2.Aux != s {
 19309				break
 19310			}
 19311			_ = x2.Args[1]
 19312			if p != x2.Args[0] {
 19313				break
 19314			}
 19315			if mem != x2.Args[1] {
 19316				break
 19317			}
 19318			s1 := o0.Args[1]
 19319			if s1.Op != OpPPC64SLDconst {
 19320				break
 19321			}
 19322			if s1.AuxInt != 48 {
 19323				break
 19324			}
 19325			x1 := s1.Args[0]
 19326			if x1.Op != OpPPC64MOVBZload {
 19327				break
 19328			}
 19329			i1 := x1.AuxInt
 19330			if x1.Aux != s {
 19331				break
 19332			}
 19333			_ = x1.Args[1]
 19334			if p != x1.Args[0] {
 19335				break
 19336			}
 19337			if mem != x1.Args[1] {
 19338				break
 19339			}
 19340			if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
 19341				break
 19342			}
 19343			b = mergePoint(b, x0, x1, x2, x3, x4)
 19344			v0 := b.NewValue0(x1.Pos, OpPPC64MOVDBRload, t)
 19345			v.reset(OpCopy)
 19346			v.AddArg(v0)
 19347			v1 := b.NewValue0(x1.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 19348			v1.AuxInt = i0
 19349			v1.Aux = s
 19350			v1.AddArg(p)
 19351			v0.AddArg(v1)
 19352			v0.AddArg(mem)
 19353			return true
 19354		}
 19355		// match: (OR <t> s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]) o0:(OR <t> o1:(OR <t> o2:(OR <t> x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem) s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32])) s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40])) s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48])))
 19356		// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
 19357		// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 19358		for {
 19359			t := v.Type
 19360			_ = v.Args[1]
 19361			s0 := v.Args[0]
 19362			if s0.Op != OpPPC64SLDconst {
 19363				break
 19364			}
 19365			if s0.AuxInt != 56 {
 19366				break
 19367			}
 19368			x0 := s0.Args[0]
 19369			if x0.Op != OpPPC64MOVBZload {
 19370				break
 19371			}
 19372			i0 := x0.AuxInt
 19373			s := x0.Aux
 19374			mem := x0.Args[1]
 19375			p := x0.Args[0]
 19376			o0 := v.Args[1]
 19377			if o0.Op != OpPPC64OR {
 19378				break
 19379			}
 19380			if o0.Type != t {
 19381				break
 19382			}
 19383			_ = o0.Args[1]
 19384			o1 := o0.Args[0]
 19385			if o1.Op != OpPPC64OR {
 19386				break
 19387			}
 19388			if o1.Type != t {
 19389				break
 19390			}
 19391			_ = o1.Args[1]
 19392			o2 := o1.Args[0]
 19393			if o2.Op != OpPPC64OR {
 19394				break
 19395			}
 19396			if o2.Type != t {
 19397				break
 19398			}
 19399			_ = o2.Args[1]
 19400			x4 := o2.Args[0]
 19401			if x4.Op != OpPPC64MOVWBRload {
 19402				break
 19403			}
 19404			if x4.Type != t {
 19405				break
 19406			}
 19407			_ = x4.Args[1]
 19408			x4_0 := x4.Args[0]
 19409			if x4_0.Op != OpPPC64MOVDaddr {
 19410				break
 19411			}
 19412			if x4_0.Type != typ.Uintptr {
 19413				break
 19414			}
 19415			i4 := x4_0.AuxInt
 19416			if p != x4_0.Args[0] {
 19417				break
 19418			}
 19419			if mem != x4.Args[1] {
 19420				break
 19421			}
 19422			s3 := o2.Args[1]
 19423			if s3.Op != OpPPC64SLDconst {
 19424				break
 19425			}
 19426			if s3.AuxInt != 32 {
 19427				break
 19428			}
 19429			x3 := s3.Args[0]
 19430			if x3.Op != OpPPC64MOVBZload {
 19431				break
 19432			}
 19433			i3 := x3.AuxInt
 19434			if x3.Aux != s {
 19435				break
 19436			}
 19437			_ = x3.Args[1]
 19438			if p != x3.Args[0] {
 19439				break
 19440			}
 19441			if mem != x3.Args[1] {
 19442				break
 19443			}
 19444			s2 := o1.Args[1]
 19445			if s2.Op != OpPPC64SLDconst {
 19446				break
 19447			}
 19448			if s2.AuxInt != 40 {
 19449				break
 19450			}
 19451			x2 := s2.Args[0]
 19452			if x2.Op != OpPPC64MOVBZload {
 19453				break
 19454			}
 19455			i2 := x2.AuxInt
 19456			if x2.Aux != s {
 19457				break
 19458			}
 19459			_ = x2.Args[1]
 19460			if p != x2.Args[0] {
 19461				break
 19462			}
 19463			if mem != x2.Args[1] {
 19464				break
 19465			}
 19466			s1 := o0.Args[1]
 19467			if s1.Op != OpPPC64SLDconst {
 19468				break
 19469			}
 19470			if s1.AuxInt != 48 {
 19471				break
 19472			}
 19473			x1 := s1.Args[0]
 19474			if x1.Op != OpPPC64MOVBZload {
 19475				break
 19476			}
 19477			i1 := x1.AuxInt
 19478			if x1.Aux != s {
 19479				break
 19480			}
 19481			_ = x1.Args[1]
 19482			if p != x1.Args[0] {
 19483				break
 19484			}
 19485			if mem != x1.Args[1] {
 19486				break
 19487			}
 19488			if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
 19489				break
 19490			}
 19491			b = mergePoint(b, x0, x1, x2, x3, x4)
 19492			v0 := b.NewValue0(x1.Pos, OpPPC64MOVDBRload, t)
 19493			v.reset(OpCopy)
 19494			v.AddArg(v0)
 19495			v1 := b.NewValue0(x1.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 19496			v1.AuxInt = i0
 19497			v1.Aux = s
 19498			v1.AddArg(p)
 19499			v0.AddArg(v1)
 19500			v0.AddArg(mem)
 19501			return true
 19502		}
 19503		return false
 19504	}
 19505	func rewriteValuePPC64_OpPPC64OR_80(v *Value) bool {
 19506		b := v.Block
 19507		config := b.Func.Config
 19508		typ := &b.Func.Config.Types
 19509		// match: (OR <t> o0:(OR <t> s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48]) o1:(OR <t> s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40]) o2:(OR <t> s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32]) x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem)))) s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]))
 19510		// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
 19511		// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 19512		for {
 19513			t := v.Type
 19514			_ = v.Args[1]
 19515			o0 := v.Args[0]
 19516			if o0.Op != OpPPC64OR {
 19517				break
 19518			}
 19519			if o0.Type != t {
 19520				break
 19521			}
 19522			_ = o0.Args[1]
 19523			s1 := o0.Args[0]
 19524			if s1.Op != OpPPC64SLDconst {
 19525				break
 19526			}
 19527			if s1.AuxInt != 48 {
 19528				break
 19529			}
 19530			x1 := s1.Args[0]
 19531			if x1.Op != OpPPC64MOVBZload {
 19532				break
 19533			}
 19534			i1 := x1.AuxInt
 19535			s := x1.Aux
 19536			mem := x1.Args[1]
 19537			p := x1.Args[0]
 19538			o1 := o0.Args[1]
 19539			if o1.Op != OpPPC64OR {
 19540				break
 19541			}
 19542			if o1.Type != t {
 19543				break
 19544			}
 19545			_ = o1.Args[1]
 19546			s2 := o1.Args[0]
 19547			if s2.Op != OpPPC64SLDconst {
 19548				break
 19549			}
 19550			if s2.AuxInt != 40 {
 19551				break
 19552			}
 19553			x2 := s2.Args[0]
 19554			if x2.Op != OpPPC64MOVBZload {
 19555				break
 19556			}
 19557			i2 := x2.AuxInt
 19558			if x2.Aux != s {
 19559				break
 19560			}
 19561			_ = x2.Args[1]
 19562			if p != x2.Args[0] {
 19563				break
 19564			}
 19565			if mem != x2.Args[1] {
 19566				break
 19567			}
 19568			o2 := o1.Args[1]
 19569			if o2.Op != OpPPC64OR {
 19570				break
 19571			}
 19572			if o2.Type != t {
 19573				break
 19574			}
 19575			_ = o2.Args[1]
 19576			s3 := o2.Args[0]
 19577			if s3.Op != OpPPC64SLDconst {
 19578				break
 19579			}
 19580			if s3.AuxInt != 32 {
 19581				break
 19582			}
 19583			x3 := s3.Args[0]
 19584			if x3.Op != OpPPC64MOVBZload {
 19585				break
 19586			}
 19587			i3 := x3.AuxInt
 19588			if x3.Aux != s {
 19589				break
 19590			}
 19591			_ = x3.Args[1]
 19592			if p != x3.Args[0] {
 19593				break
 19594			}
 19595			if mem != x3.Args[1] {
 19596				break
 19597			}
 19598			x4 := o2.Args[1]
 19599			if x4.Op != OpPPC64MOVWBRload {
 19600				break
 19601			}
 19602			if x4.Type != t {
 19603				break
 19604			}
 19605			_ = x4.Args[1]
 19606			x4_0 := x4.Args[0]
 19607			if x4_0.Op != OpPPC64MOVDaddr {
 19608				break
 19609			}
 19610			if x4_0.Type != typ.Uintptr {
 19611				break
 19612			}
 19613			i4 := x4_0.AuxInt
 19614			if p != x4_0.Args[0] {
 19615				break
 19616			}
 19617			if mem != x4.Args[1] {
 19618				break
 19619			}
 19620			s0 := v.Args[1]
 19621			if s0.Op != OpPPC64SLDconst {
 19622				break
 19623			}
 19624			if s0.AuxInt != 56 {
 19625				break
 19626			}
 19627			x0 := s0.Args[0]
 19628			if x0.Op != OpPPC64MOVBZload {
 19629				break
 19630			}
 19631			i0 := x0.AuxInt
 19632			if x0.Aux != s {
 19633				break
 19634			}
 19635			_ = x0.Args[1]
 19636			if p != x0.Args[0] {
 19637				break
 19638			}
 19639			if mem != x0.Args[1] {
 19640				break
 19641			}
 19642			if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
 19643				break
 19644			}
 19645			b = mergePoint(b, x0, x1, x2, x3, x4)
 19646			v0 := b.NewValue0(x0.Pos, OpPPC64MOVDBRload, t)
 19647			v.reset(OpCopy)
 19648			v.AddArg(v0)
 19649			v1 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 19650			v1.AuxInt = i0
 19651			v1.Aux = s
 19652			v1.AddArg(p)
 19653			v0.AddArg(v1)
 19654			v0.AddArg(mem)
 19655			return true
 19656		}
 19657		// match: (OR <t> o0:(OR <t> s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48]) o1:(OR <t> s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40]) o2:(OR <t> x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem) s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32])))) s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]))
 19658		// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
 19659		// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 19660		for {
 19661			t := v.Type
 19662			_ = v.Args[1]
 19663			o0 := v.Args[0]
 19664			if o0.Op != OpPPC64OR {
 19665				break
 19666			}
 19667			if o0.Type != t {
 19668				break
 19669			}
 19670			_ = o0.Args[1]
 19671			s1 := o0.Args[0]
 19672			if s1.Op != OpPPC64SLDconst {
 19673				break
 19674			}
 19675			if s1.AuxInt != 48 {
 19676				break
 19677			}
 19678			x1 := s1.Args[0]
 19679			if x1.Op != OpPPC64MOVBZload {
 19680				break
 19681			}
 19682			i1 := x1.AuxInt
 19683			s := x1.Aux
 19684			mem := x1.Args[1]
 19685			p := x1.Args[0]
 19686			o1 := o0.Args[1]
 19687			if o1.Op != OpPPC64OR {
 19688				break
 19689			}
 19690			if o1.Type != t {
 19691				break
 19692			}
 19693			_ = o1.Args[1]
 19694			s2 := o1.Args[0]
 19695			if s2.Op != OpPPC64SLDconst {
 19696				break
 19697			}
 19698			if s2.AuxInt != 40 {
 19699				break
 19700			}
 19701			x2 := s2.Args[0]
 19702			if x2.Op != OpPPC64MOVBZload {
 19703				break
 19704			}
 19705			i2 := x2.AuxInt
 19706			if x2.Aux != s {
 19707				break
 19708			}
 19709			_ = x2.Args[1]
 19710			if p != x2.Args[0] {
 19711				break
 19712			}
 19713			if mem != x2.Args[1] {
 19714				break
 19715			}
 19716			o2 := o1.Args[1]
 19717			if o2.Op != OpPPC64OR {
 19718				break
 19719			}
 19720			if o2.Type != t {
 19721				break
 19722			}
 19723			_ = o2.Args[1]
 19724			x4 := o2.Args[0]
 19725			if x4.Op != OpPPC64MOVWBRload {
 19726				break
 19727			}
 19728			if x4.Type != t {
 19729				break
 19730			}
 19731			_ = x4.Args[1]
 19732			x4_0 := x4.Args[0]
 19733			if x4_0.Op != OpPPC64MOVDaddr {
 19734				break
 19735			}
 19736			if x4_0.Type != typ.Uintptr {
 19737				break
 19738			}
 19739			i4 := x4_0.AuxInt
 19740			if p != x4_0.Args[0] {
 19741				break
 19742			}
 19743			if mem != x4.Args[1] {
 19744				break
 19745			}
 19746			s3 := o2.Args[1]
 19747			if s3.Op != OpPPC64SLDconst {
 19748				break
 19749			}
 19750			if s3.AuxInt != 32 {
 19751				break
 19752			}
 19753			x3 := s3.Args[0]
 19754			if x3.Op != OpPPC64MOVBZload {
 19755				break
 19756			}
 19757			i3 := x3.AuxInt
 19758			if x3.Aux != s {
 19759				break
 19760			}
 19761			_ = x3.Args[1]
 19762			if p != x3.Args[0] {
 19763				break
 19764			}
 19765			if mem != x3.Args[1] {
 19766				break
 19767			}
 19768			s0 := v.Args[1]
 19769			if s0.Op != OpPPC64SLDconst {
 19770				break
 19771			}
 19772			if s0.AuxInt != 56 {
 19773				break
 19774			}
 19775			x0 := s0.Args[0]
 19776			if x0.Op != OpPPC64MOVBZload {
 19777				break
 19778			}
 19779			i0 := x0.AuxInt
 19780			if x0.Aux != s {
 19781				break
 19782			}
 19783			_ = x0.Args[1]
 19784			if p != x0.Args[0] {
 19785				break
 19786			}
 19787			if mem != x0.Args[1] {
 19788				break
 19789			}
 19790			if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
 19791				break
 19792			}
 19793			b = mergePoint(b, x0, x1, x2, x3, x4)
 19794			v0 := b.NewValue0(x0.Pos, OpPPC64MOVDBRload, t)
 19795			v.reset(OpCopy)
 19796			v.AddArg(v0)
 19797			v1 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 19798			v1.AuxInt = i0
 19799			v1.Aux = s
 19800			v1.AddArg(p)
 19801			v0.AddArg(v1)
 19802			v0.AddArg(mem)
 19803			return true
 19804		}
 19805		// match: (OR <t> o0:(OR <t> s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48]) o1:(OR <t> o2:(OR <t> s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32]) x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem)) s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40]))) s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]))
 19806		// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
 19807		// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 19808		for {
 19809			t := v.Type
 19810			_ = v.Args[1]
 19811			o0 := v.Args[0]
 19812			if o0.Op != OpPPC64OR {
 19813				break
 19814			}
 19815			if o0.Type != t {
 19816				break
 19817			}
 19818			_ = o0.Args[1]
 19819			s1 := o0.Args[0]
 19820			if s1.Op != OpPPC64SLDconst {
 19821				break
 19822			}
 19823			if s1.AuxInt != 48 {
 19824				break
 19825			}
 19826			x1 := s1.Args[0]
 19827			if x1.Op != OpPPC64MOVBZload {
 19828				break
 19829			}
 19830			i1 := x1.AuxInt
 19831			s := x1.Aux
 19832			mem := x1.Args[1]
 19833			p := x1.Args[0]
 19834			o1 := o0.Args[1]
 19835			if o1.Op != OpPPC64OR {
 19836				break
 19837			}
 19838			if o1.Type != t {
 19839				break
 19840			}
 19841			_ = o1.Args[1]
 19842			o2 := o1.Args[0]
 19843			if o2.Op != OpPPC64OR {
 19844				break
 19845			}
 19846			if o2.Type != t {
 19847				break
 19848			}
 19849			_ = o2.Args[1]
 19850			s3 := o2.Args[0]
 19851			if s3.Op != OpPPC64SLDconst {
 19852				break
 19853			}
 19854			if s3.AuxInt != 32 {
 19855				break
 19856			}
 19857			x3 := s3.Args[0]
 19858			if x3.Op != OpPPC64MOVBZload {
 19859				break
 19860			}
 19861			i3 := x3.AuxInt
 19862			if x3.Aux != s {
 19863				break
 19864			}
 19865			_ = x3.Args[1]
 19866			if p != x3.Args[0] {
 19867				break
 19868			}
 19869			if mem != x3.Args[1] {
 19870				break
 19871			}
 19872			x4 := o2.Args[1]
 19873			if x4.Op != OpPPC64MOVWBRload {
 19874				break
 19875			}
 19876			if x4.Type != t {
 19877				break
 19878			}
 19879			_ = x4.Args[1]
 19880			x4_0 := x4.Args[0]
 19881			if x4_0.Op != OpPPC64MOVDaddr {
 19882				break
 19883			}
 19884			if x4_0.Type != typ.Uintptr {
 19885				break
 19886			}
 19887			i4 := x4_0.AuxInt
 19888			if p != x4_0.Args[0] {
 19889				break
 19890			}
 19891			if mem != x4.Args[1] {
 19892				break
 19893			}
 19894			s2 := o1.Args[1]
 19895			if s2.Op != OpPPC64SLDconst {
 19896				break
 19897			}
 19898			if s2.AuxInt != 40 {
 19899				break
 19900			}
 19901			x2 := s2.Args[0]
 19902			if x2.Op != OpPPC64MOVBZload {
 19903				break
 19904			}
 19905			i2 := x2.AuxInt
 19906			if x2.Aux != s {
 19907				break
 19908			}
 19909			_ = x2.Args[1]
 19910			if p != x2.Args[0] {
 19911				break
 19912			}
 19913			if mem != x2.Args[1] {
 19914				break
 19915			}
 19916			s0 := v.Args[1]
 19917			if s0.Op != OpPPC64SLDconst {
 19918				break
 19919			}
 19920			if s0.AuxInt != 56 {
 19921				break
 19922			}
 19923			x0 := s0.Args[0]
 19924			if x0.Op != OpPPC64MOVBZload {
 19925				break
 19926			}
 19927			i0 := x0.AuxInt
 19928			if x0.Aux != s {
 19929				break
 19930			}
 19931			_ = x0.Args[1]
 19932			if p != x0.Args[0] {
 19933				break
 19934			}
 19935			if mem != x0.Args[1] {
 19936				break
 19937			}
 19938			if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
 19939				break
 19940			}
 19941			b = mergePoint(b, x0, x1, x2, x3, x4)
 19942			v0 := b.NewValue0(x0.Pos, OpPPC64MOVDBRload, t)
 19943			v.reset(OpCopy)
 19944			v.AddArg(v0)
 19945			v1 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 19946			v1.AuxInt = i0
 19947			v1.Aux = s
 19948			v1.AddArg(p)
 19949			v0.AddArg(v1)
 19950			v0.AddArg(mem)
 19951			return true
 19952		}
 19953		// match: (OR <t> o0:(OR <t> s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48]) o1:(OR <t> o2:(OR <t> x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem) s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32])) s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40]))) s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]))
 19954		// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
 19955		// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 19956		for {
 19957			t := v.Type
 19958			_ = v.Args[1]
 19959			o0 := v.Args[0]
 19960			if o0.Op != OpPPC64OR {
 19961				break
 19962			}
 19963			if o0.Type != t {
 19964				break
 19965			}
 19966			_ = o0.Args[1]
 19967			s1 := o0.Args[0]
 19968			if s1.Op != OpPPC64SLDconst {
 19969				break
 19970			}
 19971			if s1.AuxInt != 48 {
 19972				break
 19973			}
 19974			x1 := s1.Args[0]
 19975			if x1.Op != OpPPC64MOVBZload {
 19976				break
 19977			}
 19978			i1 := x1.AuxInt
 19979			s := x1.Aux
 19980			mem := x1.Args[1]
 19981			p := x1.Args[0]
 19982			o1 := o0.Args[1]
 19983			if o1.Op != OpPPC64OR {
 19984				break
 19985			}
 19986			if o1.Type != t {
 19987				break
 19988			}
 19989			_ = o1.Args[1]
 19990			o2 := o1.Args[0]
 19991			if o2.Op != OpPPC64OR {
 19992				break
 19993			}
 19994			if o2.Type != t {
 19995				break
 19996			}
 19997			_ = o2.Args[1]
 19998			x4 := o2.Args[0]
 19999			if x4.Op != OpPPC64MOVWBRload {
 20000				break
 20001			}
 20002			if x4.Type != t {
 20003				break
 20004			}
 20005			_ = x4.Args[1]
 20006			x4_0 := x4.Args[0]
 20007			if x4_0.Op != OpPPC64MOVDaddr {
 20008				break
 20009			}
 20010			if x4_0.Type != typ.Uintptr {
 20011				break
 20012			}
 20013			i4 := x4_0.AuxInt
 20014			if p != x4_0.Args[0] {
 20015				break
 20016			}
 20017			if mem != x4.Args[1] {
 20018				break
 20019			}
 20020			s3 := o2.Args[1]
 20021			if s3.Op != OpPPC64SLDconst {
 20022				break
 20023			}
 20024			if s3.AuxInt != 32 {
 20025				break
 20026			}
 20027			x3 := s3.Args[0]
 20028			if x3.Op != OpPPC64MOVBZload {
 20029				break
 20030			}
 20031			i3 := x3.AuxInt
 20032			if x3.Aux != s {
 20033				break
 20034			}
 20035			_ = x3.Args[1]
 20036			if p != x3.Args[0] {
 20037				break
 20038			}
 20039			if mem != x3.Args[1] {
 20040				break
 20041			}
 20042			s2 := o1.Args[1]
 20043			if s2.Op != OpPPC64SLDconst {
 20044				break
 20045			}
 20046			if s2.AuxInt != 40 {
 20047				break
 20048			}
 20049			x2 := s2.Args[0]
 20050			if x2.Op != OpPPC64MOVBZload {
 20051				break
 20052			}
 20053			i2 := x2.AuxInt
 20054			if x2.Aux != s {
 20055				break
 20056			}
 20057			_ = x2.Args[1]
 20058			if p != x2.Args[0] {
 20059				break
 20060			}
 20061			if mem != x2.Args[1] {
 20062				break
 20063			}
 20064			s0 := v.Args[1]
 20065			if s0.Op != OpPPC64SLDconst {
 20066				break
 20067			}
 20068			if s0.AuxInt != 56 {
 20069				break
 20070			}
 20071			x0 := s0.Args[0]
 20072			if x0.Op != OpPPC64MOVBZload {
 20073				break
 20074			}
 20075			i0 := x0.AuxInt
 20076			if x0.Aux != s {
 20077				break
 20078			}
 20079			_ = x0.Args[1]
 20080			if p != x0.Args[0] {
 20081				break
 20082			}
 20083			if mem != x0.Args[1] {
 20084				break
 20085			}
 20086			if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
 20087				break
 20088			}
 20089			b = mergePoint(b, x0, x1, x2, x3, x4)
 20090			v0 := b.NewValue0(x0.Pos, OpPPC64MOVDBRload, t)
 20091			v.reset(OpCopy)
 20092			v.AddArg(v0)
 20093			v1 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 20094			v1.AuxInt = i0
 20095			v1.Aux = s
 20096			v1.AddArg(p)
 20097			v0.AddArg(v1)
 20098			v0.AddArg(mem)
 20099			return true
 20100		}
 20101		// match: (OR <t> o0:(OR <t> o1:(OR <t> s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40]) o2:(OR <t> s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32]) x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem))) s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48])) s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]))
 20102		// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
 20103		// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 20104		for {
 20105			t := v.Type
 20106			_ = v.Args[1]
 20107			o0 := v.Args[0]
 20108			if o0.Op != OpPPC64OR {
 20109				break
 20110			}
 20111			if o0.Type != t {
 20112				break
 20113			}
 20114			_ = o0.Args[1]
 20115			o1 := o0.Args[0]
 20116			if o1.Op != OpPPC64OR {
 20117				break
 20118			}
 20119			if o1.Type != t {
 20120				break
 20121			}
 20122			_ = o1.Args[1]
 20123			s2 := o1.Args[0]
 20124			if s2.Op != OpPPC64SLDconst {
 20125				break
 20126			}
 20127			if s2.AuxInt != 40 {
 20128				break
 20129			}
 20130			x2 := s2.Args[0]
 20131			if x2.Op != OpPPC64MOVBZload {
 20132				break
 20133			}
 20134			i2 := x2.AuxInt
 20135			s := x2.Aux
 20136			mem := x2.Args[1]
 20137			p := x2.Args[0]
 20138			o2 := o1.Args[1]
 20139			if o2.Op != OpPPC64OR {
 20140				break
 20141			}
 20142			if o2.Type != t {
 20143				break
 20144			}
 20145			_ = o2.Args[1]
 20146			s3 := o2.Args[0]
 20147			if s3.Op != OpPPC64SLDconst {
 20148				break
 20149			}
 20150			if s3.AuxInt != 32 {
 20151				break
 20152			}
 20153			x3 := s3.Args[0]
 20154			if x3.Op != OpPPC64MOVBZload {
 20155				break
 20156			}
 20157			i3 := x3.AuxInt
 20158			if x3.Aux != s {
 20159				break
 20160			}
 20161			_ = x3.Args[1]
 20162			if p != x3.Args[0] {
 20163				break
 20164			}
 20165			if mem != x3.Args[1] {
 20166				break
 20167			}
 20168			x4 := o2.Args[1]
 20169			if x4.Op != OpPPC64MOVWBRload {
 20170				break
 20171			}
 20172			if x4.Type != t {
 20173				break
 20174			}
 20175			_ = x4.Args[1]
 20176			x4_0 := x4.Args[0]
 20177			if x4_0.Op != OpPPC64MOVDaddr {
 20178				break
 20179			}
 20180			if x4_0.Type != typ.Uintptr {
 20181				break
 20182			}
 20183			i4 := x4_0.AuxInt
 20184			if p != x4_0.Args[0] {
 20185				break
 20186			}
 20187			if mem != x4.Args[1] {
 20188				break
 20189			}
 20190			s1 := o0.Args[1]
 20191			if s1.Op != OpPPC64SLDconst {
 20192				break
 20193			}
 20194			if s1.AuxInt != 48 {
 20195				break
 20196			}
 20197			x1 := s1.Args[0]
 20198			if x1.Op != OpPPC64MOVBZload {
 20199				break
 20200			}
 20201			i1 := x1.AuxInt
 20202			if x1.Aux != s {
 20203				break
 20204			}
 20205			_ = x1.Args[1]
 20206			if p != x1.Args[0] {
 20207				break
 20208			}
 20209			if mem != x1.Args[1] {
 20210				break
 20211			}
 20212			s0 := v.Args[1]
 20213			if s0.Op != OpPPC64SLDconst {
 20214				break
 20215			}
 20216			if s0.AuxInt != 56 {
 20217				break
 20218			}
 20219			x0 := s0.Args[0]
 20220			if x0.Op != OpPPC64MOVBZload {
 20221				break
 20222			}
 20223			i0 := x0.AuxInt
 20224			if x0.Aux != s {
 20225				break
 20226			}
 20227			_ = x0.Args[1]
 20228			if p != x0.Args[0] {
 20229				break
 20230			}
 20231			if mem != x0.Args[1] {
 20232				break
 20233			}
 20234			if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
 20235				break
 20236			}
 20237			b = mergePoint(b, x0, x1, x2, x3, x4)
 20238			v0 := b.NewValue0(x0.Pos, OpPPC64MOVDBRload, t)
 20239			v.reset(OpCopy)
 20240			v.AddArg(v0)
 20241			v1 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 20242			v1.AuxInt = i0
 20243			v1.Aux = s
 20244			v1.AddArg(p)
 20245			v0.AddArg(v1)
 20246			v0.AddArg(mem)
 20247			return true
 20248		}
 20249		// match: (OR <t> o0:(OR <t> o1:(OR <t> s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40]) o2:(OR <t> x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem) s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32]))) s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48])) s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]))
 20250		// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
 20251		// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 20252		for {
 20253			t := v.Type
 20254			_ = v.Args[1]
 20255			o0 := v.Args[0]
 20256			if o0.Op != OpPPC64OR {
 20257				break
 20258			}
 20259			if o0.Type != t {
 20260				break
 20261			}
 20262			_ = o0.Args[1]
 20263			o1 := o0.Args[0]
 20264			if o1.Op != OpPPC64OR {
 20265				break
 20266			}
 20267			if o1.Type != t {
 20268				break
 20269			}
 20270			_ = o1.Args[1]
 20271			s2 := o1.Args[0]
 20272			if s2.Op != OpPPC64SLDconst {
 20273				break
 20274			}
 20275			if s2.AuxInt != 40 {
 20276				break
 20277			}
 20278			x2 := s2.Args[0]
 20279			if x2.Op != OpPPC64MOVBZload {
 20280				break
 20281			}
 20282			i2 := x2.AuxInt
 20283			s := x2.Aux
 20284			mem := x2.Args[1]
 20285			p := x2.Args[0]
 20286			o2 := o1.Args[1]
 20287			if o2.Op != OpPPC64OR {
 20288				break
 20289			}
 20290			if o2.Type != t {
 20291				break
 20292			}
 20293			_ = o2.Args[1]
 20294			x4 := o2.Args[0]
 20295			if x4.Op != OpPPC64MOVWBRload {
 20296				break
 20297			}
 20298			if x4.Type != t {
 20299				break
 20300			}
 20301			_ = x4.Args[1]
 20302			x4_0 := x4.Args[0]
 20303			if x4_0.Op != OpPPC64MOVDaddr {
 20304				break
 20305			}
 20306			if x4_0.Type != typ.Uintptr {
 20307				break
 20308			}
 20309			i4 := x4_0.AuxInt
 20310			if p != x4_0.Args[0] {
 20311				break
 20312			}
 20313			if mem != x4.Args[1] {
 20314				break
 20315			}
 20316			s3 := o2.Args[1]
 20317			if s3.Op != OpPPC64SLDconst {
 20318				break
 20319			}
 20320			if s3.AuxInt != 32 {
 20321				break
 20322			}
 20323			x3 := s3.Args[0]
 20324			if x3.Op != OpPPC64MOVBZload {
 20325				break
 20326			}
 20327			i3 := x3.AuxInt
 20328			if x3.Aux != s {
 20329				break
 20330			}
 20331			_ = x3.Args[1]
 20332			if p != x3.Args[0] {
 20333				break
 20334			}
 20335			if mem != x3.Args[1] {
 20336				break
 20337			}
 20338			s1 := o0.Args[1]
 20339			if s1.Op != OpPPC64SLDconst {
 20340				break
 20341			}
 20342			if s1.AuxInt != 48 {
 20343				break
 20344			}
 20345			x1 := s1.Args[0]
 20346			if x1.Op != OpPPC64MOVBZload {
 20347				break
 20348			}
 20349			i1 := x1.AuxInt
 20350			if x1.Aux != s {
 20351				break
 20352			}
 20353			_ = x1.Args[1]
 20354			if p != x1.Args[0] {
 20355				break
 20356			}
 20357			if mem != x1.Args[1] {
 20358				break
 20359			}
 20360			s0 := v.Args[1]
 20361			if s0.Op != OpPPC64SLDconst {
 20362				break
 20363			}
 20364			if s0.AuxInt != 56 {
 20365				break
 20366			}
 20367			x0 := s0.Args[0]
 20368			if x0.Op != OpPPC64MOVBZload {
 20369				break
 20370			}
 20371			i0 := x0.AuxInt
 20372			if x0.Aux != s {
 20373				break
 20374			}
 20375			_ = x0.Args[1]
 20376			if p != x0.Args[0] {
 20377				break
 20378			}
 20379			if mem != x0.Args[1] {
 20380				break
 20381			}
 20382			if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
 20383				break
 20384			}
 20385			b = mergePoint(b, x0, x1, x2, x3, x4)
 20386			v0 := b.NewValue0(x0.Pos, OpPPC64MOVDBRload, t)
 20387			v.reset(OpCopy)
 20388			v.AddArg(v0)
 20389			v1 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 20390			v1.AuxInt = i0
 20391			v1.Aux = s
 20392			v1.AddArg(p)
 20393			v0.AddArg(v1)
 20394			v0.AddArg(mem)
 20395			return true
 20396		}
 20397		// match: (OR <t> o0:(OR <t> o1:(OR <t> o2:(OR <t> s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32]) x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem)) s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40])) s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48])) s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]))
 20398		// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
 20399		// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 20400		for {
 20401			t := v.Type
 20402			_ = v.Args[1]
 20403			o0 := v.Args[0]
 20404			if o0.Op != OpPPC64OR {
 20405				break
 20406			}
 20407			if o0.Type != t {
 20408				break
 20409			}
 20410			_ = o0.Args[1]
 20411			o1 := o0.Args[0]
 20412			if o1.Op != OpPPC64OR {
 20413				break
 20414			}
 20415			if o1.Type != t {
 20416				break
 20417			}
 20418			_ = o1.Args[1]
 20419			o2 := o1.Args[0]
 20420			if o2.Op != OpPPC64OR {
 20421				break
 20422			}
 20423			if o2.Type != t {
 20424				break
 20425			}
 20426			_ = o2.Args[1]
 20427			s3 := o2.Args[0]
 20428			if s3.Op != OpPPC64SLDconst {
 20429				break
 20430			}
 20431			if s3.AuxInt != 32 {
 20432				break
 20433			}
 20434			x3 := s3.Args[0]
 20435			if x3.Op != OpPPC64MOVBZload {
 20436				break
 20437			}
 20438			i3 := x3.AuxInt
 20439			s := x3.Aux
 20440			mem := x3.Args[1]
 20441			p := x3.Args[0]
 20442			x4 := o2.Args[1]
 20443			if x4.Op != OpPPC64MOVWBRload {
 20444				break
 20445			}
 20446			if x4.Type != t {
 20447				break
 20448			}
 20449			_ = x4.Args[1]
 20450			x4_0 := x4.Args[0]
 20451			if x4_0.Op != OpPPC64MOVDaddr {
 20452				break
 20453			}
 20454			if x4_0.Type != typ.Uintptr {
 20455				break
 20456			}
 20457			i4 := x4_0.AuxInt
 20458			if p != x4_0.Args[0] {
 20459				break
 20460			}
 20461			if mem != x4.Args[1] {
 20462				break
 20463			}
 20464			s2 := o1.Args[1]
 20465			if s2.Op != OpPPC64SLDconst {
 20466				break
 20467			}
 20468			if s2.AuxInt != 40 {
 20469				break
 20470			}
 20471			x2 := s2.Args[0]
 20472			if x2.Op != OpPPC64MOVBZload {
 20473				break
 20474			}
 20475			i2 := x2.AuxInt
 20476			if x2.Aux != s {
 20477				break
 20478			}
 20479			_ = x2.Args[1]
 20480			if p != x2.Args[0] {
 20481				break
 20482			}
 20483			if mem != x2.Args[1] {
 20484				break
 20485			}
 20486			s1 := o0.Args[1]
 20487			if s1.Op != OpPPC64SLDconst {
 20488				break
 20489			}
 20490			if s1.AuxInt != 48 {
 20491				break
 20492			}
 20493			x1 := s1.Args[0]
 20494			if x1.Op != OpPPC64MOVBZload {
 20495				break
 20496			}
 20497			i1 := x1.AuxInt
 20498			if x1.Aux != s {
 20499				break
 20500			}
 20501			_ = x1.Args[1]
 20502			if p != x1.Args[0] {
 20503				break
 20504			}
 20505			if mem != x1.Args[1] {
 20506				break
 20507			}
 20508			s0 := v.Args[1]
 20509			if s0.Op != OpPPC64SLDconst {
 20510				break
 20511			}
 20512			if s0.AuxInt != 56 {
 20513				break
 20514			}
 20515			x0 := s0.Args[0]
 20516			if x0.Op != OpPPC64MOVBZload {
 20517				break
 20518			}
 20519			i0 := x0.AuxInt
 20520			if x0.Aux != s {
 20521				break
 20522			}
 20523			_ = x0.Args[1]
 20524			if p != x0.Args[0] {
 20525				break
 20526			}
 20527			if mem != x0.Args[1] {
 20528				break
 20529			}
 20530			if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
 20531				break
 20532			}
 20533			b = mergePoint(b, x0, x1, x2, x3, x4)
 20534			v0 := b.NewValue0(x0.Pos, OpPPC64MOVDBRload, t)
 20535			v.reset(OpCopy)
 20536			v.AddArg(v0)
 20537			v1 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 20538			v1.AuxInt = i0
 20539			v1.Aux = s
 20540			v1.AddArg(p)
 20541			v0.AddArg(v1)
 20542			v0.AddArg(mem)
 20543			return true
 20544		}
 20545		// match: (OR <t> o0:(OR <t> o1:(OR <t> o2:(OR <t> x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem) s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32])) s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40])) s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48])) s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]))
 20546		// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
 20547		// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 20548		for {
 20549			t := v.Type
 20550			_ = v.Args[1]
 20551			o0 := v.Args[0]
 20552			if o0.Op != OpPPC64OR {
 20553				break
 20554			}
 20555			if o0.Type != t {
 20556				break
 20557			}
 20558			_ = o0.Args[1]
 20559			o1 := o0.Args[0]
 20560			if o1.Op != OpPPC64OR {
 20561				break
 20562			}
 20563			if o1.Type != t {
 20564				break
 20565			}
 20566			_ = o1.Args[1]
 20567			o2 := o1.Args[0]
 20568			if o2.Op != OpPPC64OR {
 20569				break
 20570			}
 20571			if o2.Type != t {
 20572				break
 20573			}
 20574			_ = o2.Args[1]
 20575			x4 := o2.Args[0]
 20576			if x4.Op != OpPPC64MOVWBRload {
 20577				break
 20578			}
 20579			if x4.Type != t {
 20580				break
 20581			}
 20582			mem := x4.Args[1]
 20583			x4_0 := x4.Args[0]
 20584			if x4_0.Op != OpPPC64MOVDaddr {
 20585				break
 20586			}
 20587			if x4_0.Type != typ.Uintptr {
 20588				break
 20589			}
 20590			i4 := x4_0.AuxInt
 20591			p := x4_0.Args[0]
 20592			s3 := o2.Args[1]
 20593			if s3.Op != OpPPC64SLDconst {
 20594				break
 20595			}
 20596			if s3.AuxInt != 32 {
 20597				break
 20598			}
 20599			x3 := s3.Args[0]
 20600			if x3.Op != OpPPC64MOVBZload {
 20601				break
 20602			}
 20603			i3 := x3.AuxInt
 20604			s := x3.Aux
 20605			_ = x3.Args[1]
 20606			if p != x3.Args[0] {
 20607				break
 20608			}
 20609			if mem != x3.Args[1] {
 20610				break
 20611			}
 20612			s2 := o1.Args[1]
 20613			if s2.Op != OpPPC64SLDconst {
 20614				break
 20615			}
 20616			if s2.AuxInt != 40 {
 20617				break
 20618			}
 20619			x2 := s2.Args[0]
 20620			if x2.Op != OpPPC64MOVBZload {
 20621				break
 20622			}
 20623			i2 := x2.AuxInt
 20624			if x2.Aux != s {
 20625				break
 20626			}
 20627			_ = x2.Args[1]
 20628			if p != x2.Args[0] {
 20629				break
 20630			}
 20631			if mem != x2.Args[1] {
 20632				break
 20633			}
 20634			s1 := o0.Args[1]
 20635			if s1.Op != OpPPC64SLDconst {
 20636				break
 20637			}
 20638			if s1.AuxInt != 48 {
 20639				break
 20640			}
 20641			x1 := s1.Args[0]
 20642			if x1.Op != OpPPC64MOVBZload {
 20643				break
 20644			}
 20645			i1 := x1.AuxInt
 20646			if x1.Aux != s {
 20647				break
 20648			}
 20649			_ = x1.Args[1]
 20650			if p != x1.Args[0] {
 20651				break
 20652			}
 20653			if mem != x1.Args[1] {
 20654				break
 20655			}
 20656			s0 := v.Args[1]
 20657			if s0.Op != OpPPC64SLDconst {
 20658				break
 20659			}
 20660			if s0.AuxInt != 56 {
 20661				break
 20662			}
 20663			x0 := s0.Args[0]
 20664			if x0.Op != OpPPC64MOVBZload {
 20665				break
 20666			}
 20667			i0 := x0.AuxInt
 20668			if x0.Aux != s {
 20669				break
 20670			}
 20671			_ = x0.Args[1]
 20672			if p != x0.Args[0] {
 20673				break
 20674			}
 20675			if mem != x0.Args[1] {
 20676				break
 20677			}
 20678			if !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
 20679				break
 20680			}
 20681			b = mergePoint(b, x0, x1, x2, x3, x4)
 20682			v0 := b.NewValue0(x0.Pos, OpPPC64MOVDBRload, t)
 20683			v.reset(OpCopy)
 20684			v.AddArg(v0)
 20685			v1 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 20686			v1.AuxInt = i0
 20687			v1.Aux = s
 20688			v1.AddArg(p)
 20689			v0.AddArg(v1)
 20690			v0.AddArg(mem)
 20691			return true
 20692		}
 20693		// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])))))
 20694		// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 20695		// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 20696		for {
 20697			t := v.Type
 20698			_ = v.Args[1]
 20699			x7 := v.Args[0]
 20700			if x7.Op != OpPPC64MOVBZload {
 20701				break
 20702			}
 20703			i7 := x7.AuxInt
 20704			s := x7.Aux
 20705			mem := x7.Args[1]
 20706			p := x7.Args[0]
 20707			o5 := v.Args[1]
 20708			if o5.Op != OpPPC64OR {
 20709				break
 20710			}
 20711			if o5.Type != t {
 20712				break
 20713			}
 20714			_ = o5.Args[1]
 20715			s6 := o5.Args[0]
 20716			if s6.Op != OpPPC64SLDconst {
 20717				break
 20718			}
 20719			if s6.AuxInt != 8 {
 20720				break
 20721			}
 20722			x6 := s6.Args[0]
 20723			if x6.Op != OpPPC64MOVBZload {
 20724				break
 20725			}
 20726			i6 := x6.AuxInt
 20727			if x6.Aux != s {
 20728				break
 20729			}
 20730			_ = x6.Args[1]
 20731			if p != x6.Args[0] {
 20732				break
 20733			}
 20734			if mem != x6.Args[1] {
 20735				break
 20736			}
 20737			o4 := o5.Args[1]
 20738			if o4.Op != OpPPC64OR {
 20739				break
 20740			}
 20741			if o4.Type != t {
 20742				break
 20743			}
 20744			_ = o4.Args[1]
 20745			s5 := o4.Args[0]
 20746			if s5.Op != OpPPC64SLDconst {
 20747				break
 20748			}
 20749			if s5.AuxInt != 16 {
 20750				break
 20751			}
 20752			x5 := s5.Args[0]
 20753			if x5.Op != OpPPC64MOVBZload {
 20754				break
 20755			}
 20756			i5 := x5.AuxInt
 20757			if x5.Aux != s {
 20758				break
 20759			}
 20760			_ = x5.Args[1]
 20761			if p != x5.Args[0] {
 20762				break
 20763			}
 20764			if mem != x5.Args[1] {
 20765				break
 20766			}
 20767			o3 := o4.Args[1]
 20768			if o3.Op != OpPPC64OR {
 20769				break
 20770			}
 20771			if o3.Type != t {
 20772				break
 20773			}
 20774			_ = o3.Args[1]
 20775			s4 := o3.Args[0]
 20776			if s4.Op != OpPPC64SLDconst {
 20777				break
 20778			}
 20779			if s4.AuxInt != 24 {
 20780				break
 20781			}
 20782			x4 := s4.Args[0]
 20783			if x4.Op != OpPPC64MOVBZload {
 20784				break
 20785			}
 20786			i4 := x4.AuxInt
 20787			if x4.Aux != s {
 20788				break
 20789			}
 20790			_ = x4.Args[1]
 20791			if p != x4.Args[0] {
 20792				break
 20793			}
 20794			if mem != x4.Args[1] {
 20795				break
 20796			}
 20797			s0 := o3.Args[1]
 20798			if s0.Op != OpPPC64SLWconst {
 20799				break
 20800			}
 20801			if s0.AuxInt != 32 {
 20802				break
 20803			}
 20804			x3 := s0.Args[0]
 20805			if x3.Op != OpPPC64MOVWBRload {
 20806				break
 20807			}
 20808			if x3.Type != t {
 20809				break
 20810			}
 20811			_ = x3.Args[1]
 20812			x3_0 := x3.Args[0]
 20813			if x3_0.Op != OpPPC64MOVDaddr {
 20814				break
 20815			}
 20816			if x3_0.Type != typ.Uintptr {
 20817				break
 20818			}
 20819			i0 := x3_0.AuxInt
 20820			if x3_0.Aux != s {
 20821				break
 20822			}
 20823			if p != x3_0.Args[0] {
 20824				break
 20825			}
 20826			if mem != x3.Args[1] {
 20827				break
 20828			}
 20829			if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 20830				break
 20831			}
 20832			b = mergePoint(b, x3, x4, x5, x6, x7)
 20833			v0 := b.NewValue0(x3.Pos, OpPPC64MOVDBRload, t)
 20834			v.reset(OpCopy)
 20835			v.AddArg(v0)
 20836			v1 := b.NewValue0(x3.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 20837			v1.AuxInt = i0
 20838			v1.Aux = s
 20839			v1.AddArg(p)
 20840			v0.AddArg(v1)
 20841			v0.AddArg(mem)
 20842			return true
 20843		}
 20844		// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24])))))
 20845		// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 20846		// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 20847		for {
 20848			t := v.Type
 20849			_ = v.Args[1]
 20850			x7 := v.Args[0]
 20851			if x7.Op != OpPPC64MOVBZload {
 20852				break
 20853			}
 20854			i7 := x7.AuxInt
 20855			s := x7.Aux
 20856			mem := x7.Args[1]
 20857			p := x7.Args[0]
 20858			o5 := v.Args[1]
 20859			if o5.Op != OpPPC64OR {
 20860				break
 20861			}
 20862			if o5.Type != t {
 20863				break
 20864			}
 20865			_ = o5.Args[1]
 20866			s6 := o5.Args[0]
 20867			if s6.Op != OpPPC64SLDconst {
 20868				break
 20869			}
 20870			if s6.AuxInt != 8 {
 20871				break
 20872			}
 20873			x6 := s6.Args[0]
 20874			if x6.Op != OpPPC64MOVBZload {
 20875				break
 20876			}
 20877			i6 := x6.AuxInt
 20878			if x6.Aux != s {
 20879				break
 20880			}
 20881			_ = x6.Args[1]
 20882			if p != x6.Args[0] {
 20883				break
 20884			}
 20885			if mem != x6.Args[1] {
 20886				break
 20887			}
 20888			o4 := o5.Args[1]
 20889			if o4.Op != OpPPC64OR {
 20890				break
 20891			}
 20892			if o4.Type != t {
 20893				break
 20894			}
 20895			_ = o4.Args[1]
 20896			s5 := o4.Args[0]
 20897			if s5.Op != OpPPC64SLDconst {
 20898				break
 20899			}
 20900			if s5.AuxInt != 16 {
 20901				break
 20902			}
 20903			x5 := s5.Args[0]
 20904			if x5.Op != OpPPC64MOVBZload {
 20905				break
 20906			}
 20907			i5 := x5.AuxInt
 20908			if x5.Aux != s {
 20909				break
 20910			}
 20911			_ = x5.Args[1]
 20912			if p != x5.Args[0] {
 20913				break
 20914			}
 20915			if mem != x5.Args[1] {
 20916				break
 20917			}
 20918			o3 := o4.Args[1]
 20919			if o3.Op != OpPPC64OR {
 20920				break
 20921			}
 20922			if o3.Type != t {
 20923				break
 20924			}
 20925			_ = o3.Args[1]
 20926			s0 := o3.Args[0]
 20927			if s0.Op != OpPPC64SLWconst {
 20928				break
 20929			}
 20930			if s0.AuxInt != 32 {
 20931				break
 20932			}
 20933			x3 := s0.Args[0]
 20934			if x3.Op != OpPPC64MOVWBRload {
 20935				break
 20936			}
 20937			if x3.Type != t {
 20938				break
 20939			}
 20940			_ = x3.Args[1]
 20941			x3_0 := x3.Args[0]
 20942			if x3_0.Op != OpPPC64MOVDaddr {
 20943				break
 20944			}
 20945			if x3_0.Type != typ.Uintptr {
 20946				break
 20947			}
 20948			i0 := x3_0.AuxInt
 20949			if x3_0.Aux != s {
 20950				break
 20951			}
 20952			if p != x3_0.Args[0] {
 20953				break
 20954			}
 20955			if mem != x3.Args[1] {
 20956				break
 20957			}
 20958			s4 := o3.Args[1]
 20959			if s4.Op != OpPPC64SLDconst {
 20960				break
 20961			}
 20962			if s4.AuxInt != 24 {
 20963				break
 20964			}
 20965			x4 := s4.Args[0]
 20966			if x4.Op != OpPPC64MOVBZload {
 20967				break
 20968			}
 20969			i4 := x4.AuxInt
 20970			if x4.Aux != s {
 20971				break
 20972			}
 20973			_ = x4.Args[1]
 20974			if p != x4.Args[0] {
 20975				break
 20976			}
 20977			if mem != x4.Args[1] {
 20978				break
 20979			}
 20980			if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 20981				break
 20982			}
 20983			b = mergePoint(b, x3, x4, x5, x6, x7)
 20984			v0 := b.NewValue0(x4.Pos, OpPPC64MOVDBRload, t)
 20985			v.reset(OpCopy)
 20986			v.AddArg(v0)
 20987			v1 := b.NewValue0(x4.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 20988			v1.AuxInt = i0
 20989			v1.Aux = s
 20990			v1.AddArg(p)
 20991			v0.AddArg(v1)
 20992			v0.AddArg(mem)
 20993			return true
 20994		}
 20995		return false
 20996	}
 20997	func rewriteValuePPC64_OpPPC64OR_90(v *Value) bool {
 20998		b := v.Block
 20999		config := b.Func.Config
 21000		typ := &b.Func.Config.Types
 21001		// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]))))
 21002		// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 21003		// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 21004		for {
 21005			t := v.Type
 21006			_ = v.Args[1]
 21007			x7 := v.Args[0]
 21008			if x7.Op != OpPPC64MOVBZload {
 21009				break
 21010			}
 21011			i7 := x7.AuxInt
 21012			s := x7.Aux
 21013			mem := x7.Args[1]
 21014			p := x7.Args[0]
 21015			o5 := v.Args[1]
 21016			if o5.Op != OpPPC64OR {
 21017				break
 21018			}
 21019			if o5.Type != t {
 21020				break
 21021			}
 21022			_ = o5.Args[1]
 21023			s6 := o5.Args[0]
 21024			if s6.Op != OpPPC64SLDconst {
 21025				break
 21026			}
 21027			if s6.AuxInt != 8 {
 21028				break
 21029			}
 21030			x6 := s6.Args[0]
 21031			if x6.Op != OpPPC64MOVBZload {
 21032				break
 21033			}
 21034			i6 := x6.AuxInt
 21035			if x6.Aux != s {
 21036				break
 21037			}
 21038			_ = x6.Args[1]
 21039			if p != x6.Args[0] {
 21040				break
 21041			}
 21042			if mem != x6.Args[1] {
 21043				break
 21044			}
 21045			o4 := o5.Args[1]
 21046			if o4.Op != OpPPC64OR {
 21047				break
 21048			}
 21049			if o4.Type != t {
 21050				break
 21051			}
 21052			_ = o4.Args[1]
 21053			o3 := o4.Args[0]
 21054			if o3.Op != OpPPC64OR {
 21055				break
 21056			}
 21057			if o3.Type != t {
 21058				break
 21059			}
 21060			_ = o3.Args[1]
 21061			s4 := o3.Args[0]
 21062			if s4.Op != OpPPC64SLDconst {
 21063				break
 21064			}
 21065			if s4.AuxInt != 24 {
 21066				break
 21067			}
 21068			x4 := s4.Args[0]
 21069			if x4.Op != OpPPC64MOVBZload {
 21070				break
 21071			}
 21072			i4 := x4.AuxInt
 21073			if x4.Aux != s {
 21074				break
 21075			}
 21076			_ = x4.Args[1]
 21077			if p != x4.Args[0] {
 21078				break
 21079			}
 21080			if mem != x4.Args[1] {
 21081				break
 21082			}
 21083			s0 := o3.Args[1]
 21084			if s0.Op != OpPPC64SLWconst {
 21085				break
 21086			}
 21087			if s0.AuxInt != 32 {
 21088				break
 21089			}
 21090			x3 := s0.Args[0]
 21091			if x3.Op != OpPPC64MOVWBRload {
 21092				break
 21093			}
 21094			if x3.Type != t {
 21095				break
 21096			}
 21097			_ = x3.Args[1]
 21098			x3_0 := x3.Args[0]
 21099			if x3_0.Op != OpPPC64MOVDaddr {
 21100				break
 21101			}
 21102			if x3_0.Type != typ.Uintptr {
 21103				break
 21104			}
 21105			i0 := x3_0.AuxInt
 21106			if x3_0.Aux != s {
 21107				break
 21108			}
 21109			if p != x3_0.Args[0] {
 21110				break
 21111			}
 21112			if mem != x3.Args[1] {
 21113				break
 21114			}
 21115			s5 := o4.Args[1]
 21116			if s5.Op != OpPPC64SLDconst {
 21117				break
 21118			}
 21119			if s5.AuxInt != 16 {
 21120				break
 21121			}
 21122			x5 := s5.Args[0]
 21123			if x5.Op != OpPPC64MOVBZload {
 21124				break
 21125			}
 21126			i5 := x5.AuxInt
 21127			if x5.Aux != s {
 21128				break
 21129			}
 21130			_ = x5.Args[1]
 21131			if p != x5.Args[0] {
 21132				break
 21133			}
 21134			if mem != x5.Args[1] {
 21135				break
 21136			}
 21137			if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 21138				break
 21139			}
 21140			b = mergePoint(b, x3, x4, x5, x6, x7)
 21141			v0 := b.NewValue0(x5.Pos, OpPPC64MOVDBRload, t)
 21142			v.reset(OpCopy)
 21143			v.AddArg(v0)
 21144			v1 := b.NewValue0(x5.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 21145			v1.AuxInt = i0
 21146			v1.Aux = s
 21147			v1.AddArg(p)
 21148			v0.AddArg(v1)
 21149			v0.AddArg(mem)
 21150			return true
 21151		}
 21152		// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> o3:(OR <t> s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]))))
 21153		// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 21154		// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 21155		for {
 21156			t := v.Type
 21157			_ = v.Args[1]
 21158			x7 := v.Args[0]
 21159			if x7.Op != OpPPC64MOVBZload {
 21160				break
 21161			}
 21162			i7 := x7.AuxInt
 21163			s := x7.Aux
 21164			mem := x7.Args[1]
 21165			p := x7.Args[0]
 21166			o5 := v.Args[1]
 21167			if o5.Op != OpPPC64OR {
 21168				break
 21169			}
 21170			if o5.Type != t {
 21171				break
 21172			}
 21173			_ = o5.Args[1]
 21174			s6 := o5.Args[0]
 21175			if s6.Op != OpPPC64SLDconst {
 21176				break
 21177			}
 21178			if s6.AuxInt != 8 {
 21179				break
 21180			}
 21181			x6 := s6.Args[0]
 21182			if x6.Op != OpPPC64MOVBZload {
 21183				break
 21184			}
 21185			i6 := x6.AuxInt
 21186			if x6.Aux != s {
 21187				break
 21188			}
 21189			_ = x6.Args[1]
 21190			if p != x6.Args[0] {
 21191				break
 21192			}
 21193			if mem != x6.Args[1] {
 21194				break
 21195			}
 21196			o4 := o5.Args[1]
 21197			if o4.Op != OpPPC64OR {
 21198				break
 21199			}
 21200			if o4.Type != t {
 21201				break
 21202			}
 21203			_ = o4.Args[1]
 21204			o3 := o4.Args[0]
 21205			if o3.Op != OpPPC64OR {
 21206				break
 21207			}
 21208			if o3.Type != t {
 21209				break
 21210			}
 21211			_ = o3.Args[1]
 21212			s0 := o3.Args[0]
 21213			if s0.Op != OpPPC64SLWconst {
 21214				break
 21215			}
 21216			if s0.AuxInt != 32 {
 21217				break
 21218			}
 21219			x3 := s0.Args[0]
 21220			if x3.Op != OpPPC64MOVWBRload {
 21221				break
 21222			}
 21223			if x3.Type != t {
 21224				break
 21225			}
 21226			_ = x3.Args[1]
 21227			x3_0 := x3.Args[0]
 21228			if x3_0.Op != OpPPC64MOVDaddr {
 21229				break
 21230			}
 21231			if x3_0.Type != typ.Uintptr {
 21232				break
 21233			}
 21234			i0 := x3_0.AuxInt
 21235			if x3_0.Aux != s {
 21236				break
 21237			}
 21238			if p != x3_0.Args[0] {
 21239				break
 21240			}
 21241			if mem != x3.Args[1] {
 21242				break
 21243			}
 21244			s4 := o3.Args[1]
 21245			if s4.Op != OpPPC64SLDconst {
 21246				break
 21247			}
 21248			if s4.AuxInt != 24 {
 21249				break
 21250			}
 21251			x4 := s4.Args[0]
 21252			if x4.Op != OpPPC64MOVBZload {
 21253				break
 21254			}
 21255			i4 := x4.AuxInt
 21256			if x4.Aux != s {
 21257				break
 21258			}
 21259			_ = x4.Args[1]
 21260			if p != x4.Args[0] {
 21261				break
 21262			}
 21263			if mem != x4.Args[1] {
 21264				break
 21265			}
 21266			s5 := o4.Args[1]
 21267			if s5.Op != OpPPC64SLDconst {
 21268				break
 21269			}
 21270			if s5.AuxInt != 16 {
 21271				break
 21272			}
 21273			x5 := s5.Args[0]
 21274			if x5.Op != OpPPC64MOVBZload {
 21275				break
 21276			}
 21277			i5 := x5.AuxInt
 21278			if x5.Aux != s {
 21279				break
 21280			}
 21281			_ = x5.Args[1]
 21282			if p != x5.Args[0] {
 21283				break
 21284			}
 21285			if mem != x5.Args[1] {
 21286				break
 21287			}
 21288			if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 21289				break
 21290			}
 21291			b = mergePoint(b, x3, x4, x5, x6, x7)
 21292			v0 := b.NewValue0(x5.Pos, OpPPC64MOVDBRload, t)
 21293			v.reset(OpCopy)
 21294			v.AddArg(v0)
 21295			v1 := b.NewValue0(x5.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 21296			v1.AuxInt = i0
 21297			v1.Aux = s
 21298			v1.AddArg(p)
 21299			v0.AddArg(v1)
 21300			v0.AddArg(mem)
 21301			return true
 21302		}
 21303		// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]))) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])))
 21304		// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 21305		// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 21306		for {
 21307			t := v.Type
 21308			_ = v.Args[1]
 21309			x7 := v.Args[0]
 21310			if x7.Op != OpPPC64MOVBZload {
 21311				break
 21312			}
 21313			i7 := x7.AuxInt
 21314			s := x7.Aux
 21315			mem := x7.Args[1]
 21316			p := x7.Args[0]
 21317			o5 := v.Args[1]
 21318			if o5.Op != OpPPC64OR {
 21319				break
 21320			}
 21321			if o5.Type != t {
 21322				break
 21323			}
 21324			_ = o5.Args[1]
 21325			o4 := o5.Args[0]
 21326			if o4.Op != OpPPC64OR {
 21327				break
 21328			}
 21329			if o4.Type != t {
 21330				break
 21331			}
 21332			_ = o4.Args[1]
 21333			s5 := o4.Args[0]
 21334			if s5.Op != OpPPC64SLDconst {
 21335				break
 21336			}
 21337			if s5.AuxInt != 16 {
 21338				break
 21339			}
 21340			x5 := s5.Args[0]
 21341			if x5.Op != OpPPC64MOVBZload {
 21342				break
 21343			}
 21344			i5 := x5.AuxInt
 21345			if x5.Aux != s {
 21346				break
 21347			}
 21348			_ = x5.Args[1]
 21349			if p != x5.Args[0] {
 21350				break
 21351			}
 21352			if mem != x5.Args[1] {
 21353				break
 21354			}
 21355			o3 := o4.Args[1]
 21356			if o3.Op != OpPPC64OR {
 21357				break
 21358			}
 21359			if o3.Type != t {
 21360				break
 21361			}
 21362			_ = o3.Args[1]
 21363			s4 := o3.Args[0]
 21364			if s4.Op != OpPPC64SLDconst {
 21365				break
 21366			}
 21367			if s4.AuxInt != 24 {
 21368				break
 21369			}
 21370			x4 := s4.Args[0]
 21371			if x4.Op != OpPPC64MOVBZload {
 21372				break
 21373			}
 21374			i4 := x4.AuxInt
 21375			if x4.Aux != s {
 21376				break
 21377			}
 21378			_ = x4.Args[1]
 21379			if p != x4.Args[0] {
 21380				break
 21381			}
 21382			if mem != x4.Args[1] {
 21383				break
 21384			}
 21385			s0 := o3.Args[1]
 21386			if s0.Op != OpPPC64SLWconst {
 21387				break
 21388			}
 21389			if s0.AuxInt != 32 {
 21390				break
 21391			}
 21392			x3 := s0.Args[0]
 21393			if x3.Op != OpPPC64MOVWBRload {
 21394				break
 21395			}
 21396			if x3.Type != t {
 21397				break
 21398			}
 21399			_ = x3.Args[1]
 21400			x3_0 := x3.Args[0]
 21401			if x3_0.Op != OpPPC64MOVDaddr {
 21402				break
 21403			}
 21404			if x3_0.Type != typ.Uintptr {
 21405				break
 21406			}
 21407			i0 := x3_0.AuxInt
 21408			if x3_0.Aux != s {
 21409				break
 21410			}
 21411			if p != x3_0.Args[0] {
 21412				break
 21413			}
 21414			if mem != x3.Args[1] {
 21415				break
 21416			}
 21417			s6 := o5.Args[1]
 21418			if s6.Op != OpPPC64SLDconst {
 21419				break
 21420			}
 21421			if s6.AuxInt != 8 {
 21422				break
 21423			}
 21424			x6 := s6.Args[0]
 21425			if x6.Op != OpPPC64MOVBZload {
 21426				break
 21427			}
 21428			i6 := x6.AuxInt
 21429			if x6.Aux != s {
 21430				break
 21431			}
 21432			_ = x6.Args[1]
 21433			if p != x6.Args[0] {
 21434				break
 21435			}
 21436			if mem != x6.Args[1] {
 21437				break
 21438			}
 21439			if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 21440				break
 21441			}
 21442			b = mergePoint(b, x3, x4, x5, x6, x7)
 21443			v0 := b.NewValue0(x6.Pos, OpPPC64MOVDBRload, t)
 21444			v.reset(OpCopy)
 21445			v.AddArg(v0)
 21446			v1 := b.NewValue0(x6.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 21447			v1.AuxInt = i0
 21448			v1.Aux = s
 21449			v1.AddArg(p)
 21450			v0.AddArg(v1)
 21451			v0.AddArg(mem)
 21452			return true
 21453		}
 21454		// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]))) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])))
 21455		// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 21456		// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 21457		for {
 21458			t := v.Type
 21459			_ = v.Args[1]
 21460			x7 := v.Args[0]
 21461			if x7.Op != OpPPC64MOVBZload {
 21462				break
 21463			}
 21464			i7 := x7.AuxInt
 21465			s := x7.Aux
 21466			mem := x7.Args[1]
 21467			p := x7.Args[0]
 21468			o5 := v.Args[1]
 21469			if o5.Op != OpPPC64OR {
 21470				break
 21471			}
 21472			if o5.Type != t {
 21473				break
 21474			}
 21475			_ = o5.Args[1]
 21476			o4 := o5.Args[0]
 21477			if o4.Op != OpPPC64OR {
 21478				break
 21479			}
 21480			if o4.Type != t {
 21481				break
 21482			}
 21483			_ = o4.Args[1]
 21484			s5 := o4.Args[0]
 21485			if s5.Op != OpPPC64SLDconst {
 21486				break
 21487			}
 21488			if s5.AuxInt != 16 {
 21489				break
 21490			}
 21491			x5 := s5.Args[0]
 21492			if x5.Op != OpPPC64MOVBZload {
 21493				break
 21494			}
 21495			i5 := x5.AuxInt
 21496			if x5.Aux != s {
 21497				break
 21498			}
 21499			_ = x5.Args[1]
 21500			if p != x5.Args[0] {
 21501				break
 21502			}
 21503			if mem != x5.Args[1] {
 21504				break
 21505			}
 21506			o3 := o4.Args[1]
 21507			if o3.Op != OpPPC64OR {
 21508				break
 21509			}
 21510			if o3.Type != t {
 21511				break
 21512			}
 21513			_ = o3.Args[1]
 21514			s0 := o3.Args[0]
 21515			if s0.Op != OpPPC64SLWconst {
 21516				break
 21517			}
 21518			if s0.AuxInt != 32 {
 21519				break
 21520			}
 21521			x3 := s0.Args[0]
 21522			if x3.Op != OpPPC64MOVWBRload {
 21523				break
 21524			}
 21525			if x3.Type != t {
 21526				break
 21527			}
 21528			_ = x3.Args[1]
 21529			x3_0 := x3.Args[0]
 21530			if x3_0.Op != OpPPC64MOVDaddr {
 21531				break
 21532			}
 21533			if x3_0.Type != typ.Uintptr {
 21534				break
 21535			}
 21536			i0 := x3_0.AuxInt
 21537			if x3_0.Aux != s {
 21538				break
 21539			}
 21540			if p != x3_0.Args[0] {
 21541				break
 21542			}
 21543			if mem != x3.Args[1] {
 21544				break
 21545			}
 21546			s4 := o3.Args[1]
 21547			if s4.Op != OpPPC64SLDconst {
 21548				break
 21549			}
 21550			if s4.AuxInt != 24 {
 21551				break
 21552			}
 21553			x4 := s4.Args[0]
 21554			if x4.Op != OpPPC64MOVBZload {
 21555				break
 21556			}
 21557			i4 := x4.AuxInt
 21558			if x4.Aux != s {
 21559				break
 21560			}
 21561			_ = x4.Args[1]
 21562			if p != x4.Args[0] {
 21563				break
 21564			}
 21565			if mem != x4.Args[1] {
 21566				break
 21567			}
 21568			s6 := o5.Args[1]
 21569			if s6.Op != OpPPC64SLDconst {
 21570				break
 21571			}
 21572			if s6.AuxInt != 8 {
 21573				break
 21574			}
 21575			x6 := s6.Args[0]
 21576			if x6.Op != OpPPC64MOVBZload {
 21577				break
 21578			}
 21579			i6 := x6.AuxInt
 21580			if x6.Aux != s {
 21581				break
 21582			}
 21583			_ = x6.Args[1]
 21584			if p != x6.Args[0] {
 21585				break
 21586			}
 21587			if mem != x6.Args[1] {
 21588				break
 21589			}
 21590			if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 21591				break
 21592			}
 21593			b = mergePoint(b, x3, x4, x5, x6, x7)
 21594			v0 := b.NewValue0(x6.Pos, OpPPC64MOVDBRload, t)
 21595			v.reset(OpCopy)
 21596			v.AddArg(v0)
 21597			v1 := b.NewValue0(x6.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 21598			v1.AuxInt = i0
 21599			v1.Aux = s
 21600			v1.AddArg(p)
 21601			v0.AddArg(v1)
 21602			v0.AddArg(mem)
 21603			return true
 21604		}
 21605		// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> o4:(OR <t> o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16])) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])))
 21606		// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 21607		// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 21608		for {
 21609			t := v.Type
 21610			_ = v.Args[1]
 21611			x7 := v.Args[0]
 21612			if x7.Op != OpPPC64MOVBZload {
 21613				break
 21614			}
 21615			i7 := x7.AuxInt
 21616			s := x7.Aux
 21617			mem := x7.Args[1]
 21618			p := x7.Args[0]
 21619			o5 := v.Args[1]
 21620			if o5.Op != OpPPC64OR {
 21621				break
 21622			}
 21623			if o5.Type != t {
 21624				break
 21625			}
 21626			_ = o5.Args[1]
 21627			o4 := o5.Args[0]
 21628			if o4.Op != OpPPC64OR {
 21629				break
 21630			}
 21631			if o4.Type != t {
 21632				break
 21633			}
 21634			_ = o4.Args[1]
 21635			o3 := o4.Args[0]
 21636			if o3.Op != OpPPC64OR {
 21637				break
 21638			}
 21639			if o3.Type != t {
 21640				break
 21641			}
 21642			_ = o3.Args[1]
 21643			s4 := o3.Args[0]
 21644			if s4.Op != OpPPC64SLDconst {
 21645				break
 21646			}
 21647			if s4.AuxInt != 24 {
 21648				break
 21649			}
 21650			x4 := s4.Args[0]
 21651			if x4.Op != OpPPC64MOVBZload {
 21652				break
 21653			}
 21654			i4 := x4.AuxInt
 21655			if x4.Aux != s {
 21656				break
 21657			}
 21658			_ = x4.Args[1]
 21659			if p != x4.Args[0] {
 21660				break
 21661			}
 21662			if mem != x4.Args[1] {
 21663				break
 21664			}
 21665			s0 := o3.Args[1]
 21666			if s0.Op != OpPPC64SLWconst {
 21667				break
 21668			}
 21669			if s0.AuxInt != 32 {
 21670				break
 21671			}
 21672			x3 := s0.Args[0]
 21673			if x3.Op != OpPPC64MOVWBRload {
 21674				break
 21675			}
 21676			if x3.Type != t {
 21677				break
 21678			}
 21679			_ = x3.Args[1]
 21680			x3_0 := x3.Args[0]
 21681			if x3_0.Op != OpPPC64MOVDaddr {
 21682				break
 21683			}
 21684			if x3_0.Type != typ.Uintptr {
 21685				break
 21686			}
 21687			i0 := x3_0.AuxInt
 21688			if x3_0.Aux != s {
 21689				break
 21690			}
 21691			if p != x3_0.Args[0] {
 21692				break
 21693			}
 21694			if mem != x3.Args[1] {
 21695				break
 21696			}
 21697			s5 := o4.Args[1]
 21698			if s5.Op != OpPPC64SLDconst {
 21699				break
 21700			}
 21701			if s5.AuxInt != 16 {
 21702				break
 21703			}
 21704			x5 := s5.Args[0]
 21705			if x5.Op != OpPPC64MOVBZload {
 21706				break
 21707			}
 21708			i5 := x5.AuxInt
 21709			if x5.Aux != s {
 21710				break
 21711			}
 21712			_ = x5.Args[1]
 21713			if p != x5.Args[0] {
 21714				break
 21715			}
 21716			if mem != x5.Args[1] {
 21717				break
 21718			}
 21719			s6 := o5.Args[1]
 21720			if s6.Op != OpPPC64SLDconst {
 21721				break
 21722			}
 21723			if s6.AuxInt != 8 {
 21724				break
 21725			}
 21726			x6 := s6.Args[0]
 21727			if x6.Op != OpPPC64MOVBZload {
 21728				break
 21729			}
 21730			i6 := x6.AuxInt
 21731			if x6.Aux != s {
 21732				break
 21733			}
 21734			_ = x6.Args[1]
 21735			if p != x6.Args[0] {
 21736				break
 21737			}
 21738			if mem != x6.Args[1] {
 21739				break
 21740			}
 21741			if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 21742				break
 21743			}
 21744			b = mergePoint(b, x3, x4, x5, x6, x7)
 21745			v0 := b.NewValue0(x6.Pos, OpPPC64MOVDBRload, t)
 21746			v.reset(OpCopy)
 21747			v.AddArg(v0)
 21748			v1 := b.NewValue0(x6.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 21749			v1.AuxInt = i0
 21750			v1.Aux = s
 21751			v1.AddArg(p)
 21752			v0.AddArg(v1)
 21753			v0.AddArg(mem)
 21754			return true
 21755		}
 21756		// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> o4:(OR <t> o3:(OR <t> s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16])) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])))
 21757		// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 21758		// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 21759		for {
 21760			t := v.Type
 21761			_ = v.Args[1]
 21762			x7 := v.Args[0]
 21763			if x7.Op != OpPPC64MOVBZload {
 21764				break
 21765			}
 21766			i7 := x7.AuxInt
 21767			s := x7.Aux
 21768			mem := x7.Args[1]
 21769			p := x7.Args[0]
 21770			o5 := v.Args[1]
 21771			if o5.Op != OpPPC64OR {
 21772				break
 21773			}
 21774			if o5.Type != t {
 21775				break
 21776			}
 21777			_ = o5.Args[1]
 21778			o4 := o5.Args[0]
 21779			if o4.Op != OpPPC64OR {
 21780				break
 21781			}
 21782			if o4.Type != t {
 21783				break
 21784			}
 21785			_ = o4.Args[1]
 21786			o3 := o4.Args[0]
 21787			if o3.Op != OpPPC64OR {
 21788				break
 21789			}
 21790			if o3.Type != t {
 21791				break
 21792			}
 21793			_ = o3.Args[1]
 21794			s0 := o3.Args[0]
 21795			if s0.Op != OpPPC64SLWconst {
 21796				break
 21797			}
 21798			if s0.AuxInt != 32 {
 21799				break
 21800			}
 21801			x3 := s0.Args[0]
 21802			if x3.Op != OpPPC64MOVWBRload {
 21803				break
 21804			}
 21805			if x3.Type != t {
 21806				break
 21807			}
 21808			_ = x3.Args[1]
 21809			x3_0 := x3.Args[0]
 21810			if x3_0.Op != OpPPC64MOVDaddr {
 21811				break
 21812			}
 21813			if x3_0.Type != typ.Uintptr {
 21814				break
 21815			}
 21816			i0 := x3_0.AuxInt
 21817			if x3_0.Aux != s {
 21818				break
 21819			}
 21820			if p != x3_0.Args[0] {
 21821				break
 21822			}
 21823			if mem != x3.Args[1] {
 21824				break
 21825			}
 21826			s4 := o3.Args[1]
 21827			if s4.Op != OpPPC64SLDconst {
 21828				break
 21829			}
 21830			if s4.AuxInt != 24 {
 21831				break
 21832			}
 21833			x4 := s4.Args[0]
 21834			if x4.Op != OpPPC64MOVBZload {
 21835				break
 21836			}
 21837			i4 := x4.AuxInt
 21838			if x4.Aux != s {
 21839				break
 21840			}
 21841			_ = x4.Args[1]
 21842			if p != x4.Args[0] {
 21843				break
 21844			}
 21845			if mem != x4.Args[1] {
 21846				break
 21847			}
 21848			s5 := o4.Args[1]
 21849			if s5.Op != OpPPC64SLDconst {
 21850				break
 21851			}
 21852			if s5.AuxInt != 16 {
 21853				break
 21854			}
 21855			x5 := s5.Args[0]
 21856			if x5.Op != OpPPC64MOVBZload {
 21857				break
 21858			}
 21859			i5 := x5.AuxInt
 21860			if x5.Aux != s {
 21861				break
 21862			}
 21863			_ = x5.Args[1]
 21864			if p != x5.Args[0] {
 21865				break
 21866			}
 21867			if mem != x5.Args[1] {
 21868				break
 21869			}
 21870			s6 := o5.Args[1]
 21871			if s6.Op != OpPPC64SLDconst {
 21872				break
 21873			}
 21874			if s6.AuxInt != 8 {
 21875				break
 21876			}
 21877			x6 := s6.Args[0]
 21878			if x6.Op != OpPPC64MOVBZload {
 21879				break
 21880			}
 21881			i6 := x6.AuxInt
 21882			if x6.Aux != s {
 21883				break
 21884			}
 21885			_ = x6.Args[1]
 21886			if p != x6.Args[0] {
 21887				break
 21888			}
 21889			if mem != x6.Args[1] {
 21890				break
 21891			}
 21892			if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 21893				break
 21894			}
 21895			b = mergePoint(b, x3, x4, x5, x6, x7)
 21896			v0 := b.NewValue0(x6.Pos, OpPPC64MOVDBRload, t)
 21897			v.reset(OpCopy)
 21898			v.AddArg(v0)
 21899			v1 := b.NewValue0(x6.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 21900			v1.AuxInt = i0
 21901			v1.Aux = s
 21902			v1.AddArg(p)
 21903			v0.AddArg(v1)
 21904			v0.AddArg(mem)
 21905			return true
 21906		}
 21907		// match: (OR <t> o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])))) x7:(MOVBZload [i7] {s} p mem))
 21908		// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 21909		// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 21910		for {
 21911			t := v.Type
 21912			_ = v.Args[1]
 21913			o5 := v.Args[0]
 21914			if o5.Op != OpPPC64OR {
 21915				break
 21916			}
 21917			if o5.Type != t {
 21918				break
 21919			}
 21920			_ = o5.Args[1]
 21921			s6 := o5.Args[0]
 21922			if s6.Op != OpPPC64SLDconst {
 21923				break
 21924			}
 21925			if s6.AuxInt != 8 {
 21926				break
 21927			}
 21928			x6 := s6.Args[0]
 21929			if x6.Op != OpPPC64MOVBZload {
 21930				break
 21931			}
 21932			i6 := x6.AuxInt
 21933			s := x6.Aux
 21934			mem := x6.Args[1]
 21935			p := x6.Args[0]
 21936			o4 := o5.Args[1]
 21937			if o4.Op != OpPPC64OR {
 21938				break
 21939			}
 21940			if o4.Type != t {
 21941				break
 21942			}
 21943			_ = o4.Args[1]
 21944			s5 := o4.Args[0]
 21945			if s5.Op != OpPPC64SLDconst {
 21946				break
 21947			}
 21948			if s5.AuxInt != 16 {
 21949				break
 21950			}
 21951			x5 := s5.Args[0]
 21952			if x5.Op != OpPPC64MOVBZload {
 21953				break
 21954			}
 21955			i5 := x5.AuxInt
 21956			if x5.Aux != s {
 21957				break
 21958			}
 21959			_ = x5.Args[1]
 21960			if p != x5.Args[0] {
 21961				break
 21962			}
 21963			if mem != x5.Args[1] {
 21964				break
 21965			}
 21966			o3 := o4.Args[1]
 21967			if o3.Op != OpPPC64OR {
 21968				break
 21969			}
 21970			if o3.Type != t {
 21971				break
 21972			}
 21973			_ = o3.Args[1]
 21974			s4 := o3.Args[0]
 21975			if s4.Op != OpPPC64SLDconst {
 21976				break
 21977			}
 21978			if s4.AuxInt != 24 {
 21979				break
 21980			}
 21981			x4 := s4.Args[0]
 21982			if x4.Op != OpPPC64MOVBZload {
 21983				break
 21984			}
 21985			i4 := x4.AuxInt
 21986			if x4.Aux != s {
 21987				break
 21988			}
 21989			_ = x4.Args[1]
 21990			if p != x4.Args[0] {
 21991				break
 21992			}
 21993			if mem != x4.Args[1] {
 21994				break
 21995			}
 21996			s0 := o3.Args[1]
 21997			if s0.Op != OpPPC64SLWconst {
 21998				break
 21999			}
 22000			if s0.AuxInt != 32 {
 22001				break
 22002			}
 22003			x3 := s0.Args[0]
 22004			if x3.Op != OpPPC64MOVWBRload {
 22005				break
 22006			}
 22007			if x3.Type != t {
 22008				break
 22009			}
 22010			_ = x3.Args[1]
 22011			x3_0 := x3.Args[0]
 22012			if x3_0.Op != OpPPC64MOVDaddr {
 22013				break
 22014			}
 22015			if x3_0.Type != typ.Uintptr {
 22016				break
 22017			}
 22018			i0 := x3_0.AuxInt
 22019			if x3_0.Aux != s {
 22020				break
 22021			}
 22022			if p != x3_0.Args[0] {
 22023				break
 22024			}
 22025			if mem != x3.Args[1] {
 22026				break
 22027			}
 22028			x7 := v.Args[1]
 22029			if x7.Op != OpPPC64MOVBZload {
 22030				break
 22031			}
 22032			i7 := x7.AuxInt
 22033			if x7.Aux != s {
 22034				break
 22035			}
 22036			_ = x7.Args[1]
 22037			if p != x7.Args[0] {
 22038				break
 22039			}
 22040			if mem != x7.Args[1] {
 22041				break
 22042			}
 22043			if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 22044				break
 22045			}
 22046			b = mergePoint(b, x3, x4, x5, x6, x7)
 22047			v0 := b.NewValue0(x7.Pos, OpPPC64MOVDBRload, t)
 22048			v.reset(OpCopy)
 22049			v.AddArg(v0)
 22050			v1 := b.NewValue0(x7.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 22051			v1.AuxInt = i0
 22052			v1.Aux = s
 22053			v1.AddArg(p)
 22054			v0.AddArg(v1)
 22055			v0.AddArg(mem)
 22056			return true
 22057		}
 22058		// match: (OR <t> o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24])))) x7:(MOVBZload [i7] {s} p mem))
 22059		// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 22060		// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 22061		for {
 22062			t := v.Type
 22063			_ = v.Args[1]
 22064			o5 := v.Args[0]
 22065			if o5.Op != OpPPC64OR {
 22066				break
 22067			}
 22068			if o5.Type != t {
 22069				break
 22070			}
 22071			_ = o5.Args[1]
 22072			s6 := o5.Args[0]
 22073			if s6.Op != OpPPC64SLDconst {
 22074				break
 22075			}
 22076			if s6.AuxInt != 8 {
 22077				break
 22078			}
 22079			x6 := s6.Args[0]
 22080			if x6.Op != OpPPC64MOVBZload {
 22081				break
 22082			}
 22083			i6 := x6.AuxInt
 22084			s := x6.Aux
 22085			mem := x6.Args[1]
 22086			p := x6.Args[0]
 22087			o4 := o5.Args[1]
 22088			if o4.Op != OpPPC64OR {
 22089				break
 22090			}
 22091			if o4.Type != t {
 22092				break
 22093			}
 22094			_ = o4.Args[1]
 22095			s5 := o4.Args[0]
 22096			if s5.Op != OpPPC64SLDconst {
 22097				break
 22098			}
 22099			if s5.AuxInt != 16 {
 22100				break
 22101			}
 22102			x5 := s5.Args[0]
 22103			if x5.Op != OpPPC64MOVBZload {
 22104				break
 22105			}
 22106			i5 := x5.AuxInt
 22107			if x5.Aux != s {
 22108				break
 22109			}
 22110			_ = x5.Args[1]
 22111			if p != x5.Args[0] {
 22112				break
 22113			}
 22114			if mem != x5.Args[1] {
 22115				break
 22116			}
 22117			o3 := o4.Args[1]
 22118			if o3.Op != OpPPC64OR {
 22119				break
 22120			}
 22121			if o3.Type != t {
 22122				break
 22123			}
 22124			_ = o3.Args[1]
 22125			s0 := o3.Args[0]
 22126			if s0.Op != OpPPC64SLWconst {
 22127				break
 22128			}
 22129			if s0.AuxInt != 32 {
 22130				break
 22131			}
 22132			x3 := s0.Args[0]
 22133			if x3.Op != OpPPC64MOVWBRload {
 22134				break
 22135			}
 22136			if x3.Type != t {
 22137				break
 22138			}
 22139			_ = x3.Args[1]
 22140			x3_0 := x3.Args[0]
 22141			if x3_0.Op != OpPPC64MOVDaddr {
 22142				break
 22143			}
 22144			if x3_0.Type != typ.Uintptr {
 22145				break
 22146			}
 22147			i0 := x3_0.AuxInt
 22148			if x3_0.Aux != s {
 22149				break
 22150			}
 22151			if p != x3_0.Args[0] {
 22152				break
 22153			}
 22154			if mem != x3.Args[1] {
 22155				break
 22156			}
 22157			s4 := o3.Args[1]
 22158			if s4.Op != OpPPC64SLDconst {
 22159				break
 22160			}
 22161			if s4.AuxInt != 24 {
 22162				break
 22163			}
 22164			x4 := s4.Args[0]
 22165			if x4.Op != OpPPC64MOVBZload {
 22166				break
 22167			}
 22168			i4 := x4.AuxInt
 22169			if x4.Aux != s {
 22170				break
 22171			}
 22172			_ = x4.Args[1]
 22173			if p != x4.Args[0] {
 22174				break
 22175			}
 22176			if mem != x4.Args[1] {
 22177				break
 22178			}
 22179			x7 := v.Args[1]
 22180			if x7.Op != OpPPC64MOVBZload {
 22181				break
 22182			}
 22183			i7 := x7.AuxInt
 22184			if x7.Aux != s {
 22185				break
 22186			}
 22187			_ = x7.Args[1]
 22188			if p != x7.Args[0] {
 22189				break
 22190			}
 22191			if mem != x7.Args[1] {
 22192				break
 22193			}
 22194			if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 22195				break
 22196			}
 22197			b = mergePoint(b, x3, x4, x5, x6, x7)
 22198			v0 := b.NewValue0(x7.Pos, OpPPC64MOVDBRload, t)
 22199			v.reset(OpCopy)
 22200			v.AddArg(v0)
 22201			v1 := b.NewValue0(x7.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 22202			v1.AuxInt = i0
 22203			v1.Aux = s
 22204			v1.AddArg(p)
 22205			v0.AddArg(v1)
 22206			v0.AddArg(mem)
 22207			return true
 22208		}
 22209		// match: (OR <t> o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]))) x7:(MOVBZload [i7] {s} p mem))
 22210		// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 22211		// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 22212		for {
 22213			t := v.Type
 22214			_ = v.Args[1]
 22215			o5 := v.Args[0]
 22216			if o5.Op != OpPPC64OR {
 22217				break
 22218			}
 22219			if o5.Type != t {
 22220				break
 22221			}
 22222			_ = o5.Args[1]
 22223			s6 := o5.Args[0]
 22224			if s6.Op != OpPPC64SLDconst {
 22225				break
 22226			}
 22227			if s6.AuxInt != 8 {
 22228				break
 22229			}
 22230			x6 := s6.Args[0]
 22231			if x6.Op != OpPPC64MOVBZload {
 22232				break
 22233			}
 22234			i6 := x6.AuxInt
 22235			s := x6.Aux
 22236			mem := x6.Args[1]
 22237			p := x6.Args[0]
 22238			o4 := o5.Args[1]
 22239			if o4.Op != OpPPC64OR {
 22240				break
 22241			}
 22242			if o4.Type != t {
 22243				break
 22244			}
 22245			_ = o4.Args[1]
 22246			o3 := o4.Args[0]
 22247			if o3.Op != OpPPC64OR {
 22248				break
 22249			}
 22250			if o3.Type != t {
 22251				break
 22252			}
 22253			_ = o3.Args[1]
 22254			s4 := o3.Args[0]
 22255			if s4.Op != OpPPC64SLDconst {
 22256				break
 22257			}
 22258			if s4.AuxInt != 24 {
 22259				break
 22260			}
 22261			x4 := s4.Args[0]
 22262			if x4.Op != OpPPC64MOVBZload {
 22263				break
 22264			}
 22265			i4 := x4.AuxInt
 22266			if x4.Aux != s {
 22267				break
 22268			}
 22269			_ = x4.Args[1]
 22270			if p != x4.Args[0] {
 22271				break
 22272			}
 22273			if mem != x4.Args[1] {
 22274				break
 22275			}
 22276			s0 := o3.Args[1]
 22277			if s0.Op != OpPPC64SLWconst {
 22278				break
 22279			}
 22280			if s0.AuxInt != 32 {
 22281				break
 22282			}
 22283			x3 := s0.Args[0]
 22284			if x3.Op != OpPPC64MOVWBRload {
 22285				break
 22286			}
 22287			if x3.Type != t {
 22288				break
 22289			}
 22290			_ = x3.Args[1]
 22291			x3_0 := x3.Args[0]
 22292			if x3_0.Op != OpPPC64MOVDaddr {
 22293				break
 22294			}
 22295			if x3_0.Type != typ.Uintptr {
 22296				break
 22297			}
 22298			i0 := x3_0.AuxInt
 22299			if x3_0.Aux != s {
 22300				break
 22301			}
 22302			if p != x3_0.Args[0] {
 22303				break
 22304			}
 22305			if mem != x3.Args[1] {
 22306				break
 22307			}
 22308			s5 := o4.Args[1]
 22309			if s5.Op != OpPPC64SLDconst {
 22310				break
 22311			}
 22312			if s5.AuxInt != 16 {
 22313				break
 22314			}
 22315			x5 := s5.Args[0]
 22316			if x5.Op != OpPPC64MOVBZload {
 22317				break
 22318			}
 22319			i5 := x5.AuxInt
 22320			if x5.Aux != s {
 22321				break
 22322			}
 22323			_ = x5.Args[1]
 22324			if p != x5.Args[0] {
 22325				break
 22326			}
 22327			if mem != x5.Args[1] {
 22328				break
 22329			}
 22330			x7 := v.Args[1]
 22331			if x7.Op != OpPPC64MOVBZload {
 22332				break
 22333			}
 22334			i7 := x7.AuxInt
 22335			if x7.Aux != s {
 22336				break
 22337			}
 22338			_ = x7.Args[1]
 22339			if p != x7.Args[0] {
 22340				break
 22341			}
 22342			if mem != x7.Args[1] {
 22343				break
 22344			}
 22345			if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 22346				break
 22347			}
 22348			b = mergePoint(b, x3, x4, x5, x6, x7)
 22349			v0 := b.NewValue0(x7.Pos, OpPPC64MOVDBRload, t)
 22350			v.reset(OpCopy)
 22351			v.AddArg(v0)
 22352			v1 := b.NewValue0(x7.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 22353			v1.AuxInt = i0
 22354			v1.Aux = s
 22355			v1.AddArg(p)
 22356			v0.AddArg(v1)
 22357			v0.AddArg(mem)
 22358			return true
 22359		}
 22360		// match: (OR <t> o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> o3:(OR <t> s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]))) x7:(MOVBZload [i7] {s} p mem))
 22361		// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 22362		// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 22363		for {
 22364			t := v.Type
 22365			_ = v.Args[1]
 22366			o5 := v.Args[0]
 22367			if o5.Op != OpPPC64OR {
 22368				break
 22369			}
 22370			if o5.Type != t {
 22371				break
 22372			}
 22373			_ = o5.Args[1]
 22374			s6 := o5.Args[0]
 22375			if s6.Op != OpPPC64SLDconst {
 22376				break
 22377			}
 22378			if s6.AuxInt != 8 {
 22379				break
 22380			}
 22381			x6 := s6.Args[0]
 22382			if x6.Op != OpPPC64MOVBZload {
 22383				break
 22384			}
 22385			i6 := x6.AuxInt
 22386			s := x6.Aux
 22387			mem := x6.Args[1]
 22388			p := x6.Args[0]
 22389			o4 := o5.Args[1]
 22390			if o4.Op != OpPPC64OR {
 22391				break
 22392			}
 22393			if o4.Type != t {
 22394				break
 22395			}
 22396			_ = o4.Args[1]
 22397			o3 := o4.Args[0]
 22398			if o3.Op != OpPPC64OR {
 22399				break
 22400			}
 22401			if o3.Type != t {
 22402				break
 22403			}
 22404			_ = o3.Args[1]
 22405			s0 := o3.Args[0]
 22406			if s0.Op != OpPPC64SLWconst {
 22407				break
 22408			}
 22409			if s0.AuxInt != 32 {
 22410				break
 22411			}
 22412			x3 := s0.Args[0]
 22413			if x3.Op != OpPPC64MOVWBRload {
 22414				break
 22415			}
 22416			if x3.Type != t {
 22417				break
 22418			}
 22419			_ = x3.Args[1]
 22420			x3_0 := x3.Args[0]
 22421			if x3_0.Op != OpPPC64MOVDaddr {
 22422				break
 22423			}
 22424			if x3_0.Type != typ.Uintptr {
 22425				break
 22426			}
 22427			i0 := x3_0.AuxInt
 22428			if x3_0.Aux != s {
 22429				break
 22430			}
 22431			if p != x3_0.Args[0] {
 22432				break
 22433			}
 22434			if mem != x3.Args[1] {
 22435				break
 22436			}
 22437			s4 := o3.Args[1]
 22438			if s4.Op != OpPPC64SLDconst {
 22439				break
 22440			}
 22441			if s4.AuxInt != 24 {
 22442				break
 22443			}
 22444			x4 := s4.Args[0]
 22445			if x4.Op != OpPPC64MOVBZload {
 22446				break
 22447			}
 22448			i4 := x4.AuxInt
 22449			if x4.Aux != s {
 22450				break
 22451			}
 22452			_ = x4.Args[1]
 22453			if p != x4.Args[0] {
 22454				break
 22455			}
 22456			if mem != x4.Args[1] {
 22457				break
 22458			}
 22459			s5 := o4.Args[1]
 22460			if s5.Op != OpPPC64SLDconst {
 22461				break
 22462			}
 22463			if s5.AuxInt != 16 {
 22464				break
 22465			}
 22466			x5 := s5.Args[0]
 22467			if x5.Op != OpPPC64MOVBZload {
 22468				break
 22469			}
 22470			i5 := x5.AuxInt
 22471			if x5.Aux != s {
 22472				break
 22473			}
 22474			_ = x5.Args[1]
 22475			if p != x5.Args[0] {
 22476				break
 22477			}
 22478			if mem != x5.Args[1] {
 22479				break
 22480			}
 22481			x7 := v.Args[1]
 22482			if x7.Op != OpPPC64MOVBZload {
 22483				break
 22484			}
 22485			i7 := x7.AuxInt
 22486			if x7.Aux != s {
 22487				break
 22488			}
 22489			_ = x7.Args[1]
 22490			if p != x7.Args[0] {
 22491				break
 22492			}
 22493			if mem != x7.Args[1] {
 22494				break
 22495			}
 22496			if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 22497				break
 22498			}
 22499			b = mergePoint(b, x3, x4, x5, x6, x7)
 22500			v0 := b.NewValue0(x7.Pos, OpPPC64MOVDBRload, t)
 22501			v.reset(OpCopy)
 22502			v.AddArg(v0)
 22503			v1 := b.NewValue0(x7.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 22504			v1.AuxInt = i0
 22505			v1.Aux = s
 22506			v1.AddArg(p)
 22507			v0.AddArg(v1)
 22508			v0.AddArg(mem)
 22509			return true
 22510		}
 22511		return false
 22512	}
 22513	func rewriteValuePPC64_OpPPC64OR_100(v *Value) bool {
 22514		b := v.Block
 22515		config := b.Func.Config
 22516		typ := &b.Func.Config.Types
 22517		// match: (OR <t> o5:(OR <t> o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]))) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])) x7:(MOVBZload [i7] {s} p mem))
 22518		// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 22519		// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 22520		for {
 22521			t := v.Type
 22522			_ = v.Args[1]
 22523			o5 := v.Args[0]
 22524			if o5.Op != OpPPC64OR {
 22525				break
 22526			}
 22527			if o5.Type != t {
 22528				break
 22529			}
 22530			_ = o5.Args[1]
 22531			o4 := o5.Args[0]
 22532			if o4.Op != OpPPC64OR {
 22533				break
 22534			}
 22535			if o4.Type != t {
 22536				break
 22537			}
 22538			_ = o4.Args[1]
 22539			s5 := o4.Args[0]
 22540			if s5.Op != OpPPC64SLDconst {
 22541				break
 22542			}
 22543			if s5.AuxInt != 16 {
 22544				break
 22545			}
 22546			x5 := s5.Args[0]
 22547			if x5.Op != OpPPC64MOVBZload {
 22548				break
 22549			}
 22550			i5 := x5.AuxInt
 22551			s := x5.Aux
 22552			mem := x5.Args[1]
 22553			p := x5.Args[0]
 22554			o3 := o4.Args[1]
 22555			if o3.Op != OpPPC64OR {
 22556				break
 22557			}
 22558			if o3.Type != t {
 22559				break
 22560			}
 22561			_ = o3.Args[1]
 22562			s4 := o3.Args[0]
 22563			if s4.Op != OpPPC64SLDconst {
 22564				break
 22565			}
 22566			if s4.AuxInt != 24 {
 22567				break
 22568			}
 22569			x4 := s4.Args[0]
 22570			if x4.Op != OpPPC64MOVBZload {
 22571				break
 22572			}
 22573			i4 := x4.AuxInt
 22574			if x4.Aux != s {
 22575				break
 22576			}
 22577			_ = x4.Args[1]
 22578			if p != x4.Args[0] {
 22579				break
 22580			}
 22581			if mem != x4.Args[1] {
 22582				break
 22583			}
 22584			s0 := o3.Args[1]
 22585			if s0.Op != OpPPC64SLWconst {
 22586				break
 22587			}
 22588			if s0.AuxInt != 32 {
 22589				break
 22590			}
 22591			x3 := s0.Args[0]
 22592			if x3.Op != OpPPC64MOVWBRload {
 22593				break
 22594			}
 22595			if x3.Type != t {
 22596				break
 22597			}
 22598			_ = x3.Args[1]
 22599			x3_0 := x3.Args[0]
 22600			if x3_0.Op != OpPPC64MOVDaddr {
 22601				break
 22602			}
 22603			if x3_0.Type != typ.Uintptr {
 22604				break
 22605			}
 22606			i0 := x3_0.AuxInt
 22607			if x3_0.Aux != s {
 22608				break
 22609			}
 22610			if p != x3_0.Args[0] {
 22611				break
 22612			}
 22613			if mem != x3.Args[1] {
 22614				break
 22615			}
 22616			s6 := o5.Args[1]
 22617			if s6.Op != OpPPC64SLDconst {
 22618				break
 22619			}
 22620			if s6.AuxInt != 8 {
 22621				break
 22622			}
 22623			x6 := s6.Args[0]
 22624			if x6.Op != OpPPC64MOVBZload {
 22625				break
 22626			}
 22627			i6 := x6.AuxInt
 22628			if x6.Aux != s {
 22629				break
 22630			}
 22631			_ = x6.Args[1]
 22632			if p != x6.Args[0] {
 22633				break
 22634			}
 22635			if mem != x6.Args[1] {
 22636				break
 22637			}
 22638			x7 := v.Args[1]
 22639			if x7.Op != OpPPC64MOVBZload {
 22640				break
 22641			}
 22642			i7 := x7.AuxInt
 22643			if x7.Aux != s {
 22644				break
 22645			}
 22646			_ = x7.Args[1]
 22647			if p != x7.Args[0] {
 22648				break
 22649			}
 22650			if mem != x7.Args[1] {
 22651				break
 22652			}
 22653			if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 22654				break
 22655			}
 22656			b = mergePoint(b, x3, x4, x5, x6, x7)
 22657			v0 := b.NewValue0(x7.Pos, OpPPC64MOVDBRload, t)
 22658			v.reset(OpCopy)
 22659			v.AddArg(v0)
 22660			v1 := b.NewValue0(x7.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 22661			v1.AuxInt = i0
 22662			v1.Aux = s
 22663			v1.AddArg(p)
 22664			v0.AddArg(v1)
 22665			v0.AddArg(mem)
 22666			return true
 22667		}
 22668		// match: (OR <t> o5:(OR <t> o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]))) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])) x7:(MOVBZload [i7] {s} p mem))
 22669		// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 22670		// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 22671		for {
 22672			t := v.Type
 22673			_ = v.Args[1]
 22674			o5 := v.Args[0]
 22675			if o5.Op != OpPPC64OR {
 22676				break
 22677			}
 22678			if o5.Type != t {
 22679				break
 22680			}
 22681			_ = o5.Args[1]
 22682			o4 := o5.Args[0]
 22683			if o4.Op != OpPPC64OR {
 22684				break
 22685			}
 22686			if o4.Type != t {
 22687				break
 22688			}
 22689			_ = o4.Args[1]
 22690			s5 := o4.Args[0]
 22691			if s5.Op != OpPPC64SLDconst {
 22692				break
 22693			}
 22694			if s5.AuxInt != 16 {
 22695				break
 22696			}
 22697			x5 := s5.Args[0]
 22698			if x5.Op != OpPPC64MOVBZload {
 22699				break
 22700			}
 22701			i5 := x5.AuxInt
 22702			s := x5.Aux
 22703			mem := x5.Args[1]
 22704			p := x5.Args[0]
 22705			o3 := o4.Args[1]
 22706			if o3.Op != OpPPC64OR {
 22707				break
 22708			}
 22709			if o3.Type != t {
 22710				break
 22711			}
 22712			_ = o3.Args[1]
 22713			s0 := o3.Args[0]
 22714			if s0.Op != OpPPC64SLWconst {
 22715				break
 22716			}
 22717			if s0.AuxInt != 32 {
 22718				break
 22719			}
 22720			x3 := s0.Args[0]
 22721			if x3.Op != OpPPC64MOVWBRload {
 22722				break
 22723			}
 22724			if x3.Type != t {
 22725				break
 22726			}
 22727			_ = x3.Args[1]
 22728			x3_0 := x3.Args[0]
 22729			if x3_0.Op != OpPPC64MOVDaddr {
 22730				break
 22731			}
 22732			if x3_0.Type != typ.Uintptr {
 22733				break
 22734			}
 22735			i0 := x3_0.AuxInt
 22736			if x3_0.Aux != s {
 22737				break
 22738			}
 22739			if p != x3_0.Args[0] {
 22740				break
 22741			}
 22742			if mem != x3.Args[1] {
 22743				break
 22744			}
 22745			s4 := o3.Args[1]
 22746			if s4.Op != OpPPC64SLDconst {
 22747				break
 22748			}
 22749			if s4.AuxInt != 24 {
 22750				break
 22751			}
 22752			x4 := s4.Args[0]
 22753			if x4.Op != OpPPC64MOVBZload {
 22754				break
 22755			}
 22756			i4 := x4.AuxInt
 22757			if x4.Aux != s {
 22758				break
 22759			}
 22760			_ = x4.Args[1]
 22761			if p != x4.Args[0] {
 22762				break
 22763			}
 22764			if mem != x4.Args[1] {
 22765				break
 22766			}
 22767			s6 := o5.Args[1]
 22768			if s6.Op != OpPPC64SLDconst {
 22769				break
 22770			}
 22771			if s6.AuxInt != 8 {
 22772				break
 22773			}
 22774			x6 := s6.Args[0]
 22775			if x6.Op != OpPPC64MOVBZload {
 22776				break
 22777			}
 22778			i6 := x6.AuxInt
 22779			if x6.Aux != s {
 22780				break
 22781			}
 22782			_ = x6.Args[1]
 22783			if p != x6.Args[0] {
 22784				break
 22785			}
 22786			if mem != x6.Args[1] {
 22787				break
 22788			}
 22789			x7 := v.Args[1]
 22790			if x7.Op != OpPPC64MOVBZload {
 22791				break
 22792			}
 22793			i7 := x7.AuxInt
 22794			if x7.Aux != s {
 22795				break
 22796			}
 22797			_ = x7.Args[1]
 22798			if p != x7.Args[0] {
 22799				break
 22800			}
 22801			if mem != x7.Args[1] {
 22802				break
 22803			}
 22804			if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 22805				break
 22806			}
 22807			b = mergePoint(b, x3, x4, x5, x6, x7)
 22808			v0 := b.NewValue0(x7.Pos, OpPPC64MOVDBRload, t)
 22809			v.reset(OpCopy)
 22810			v.AddArg(v0)
 22811			v1 := b.NewValue0(x7.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 22812			v1.AuxInt = i0
 22813			v1.Aux = s
 22814			v1.AddArg(p)
 22815			v0.AddArg(v1)
 22816			v0.AddArg(mem)
 22817			return true
 22818		}
 22819		// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16])) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])) x7:(MOVBZload [i7] {s} p mem))
 22820		// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 22821		// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 22822		for {
 22823			t := v.Type
 22824			_ = v.Args[1]
 22825			o5 := v.Args[0]
 22826			if o5.Op != OpPPC64OR {
 22827				break
 22828			}
 22829			if o5.Type != t {
 22830				break
 22831			}
 22832			_ = o5.Args[1]
 22833			o4 := o5.Args[0]
 22834			if o4.Op != OpPPC64OR {
 22835				break
 22836			}
 22837			if o4.Type != t {
 22838				break
 22839			}
 22840			_ = o4.Args[1]
 22841			o3 := o4.Args[0]
 22842			if o3.Op != OpPPC64OR {
 22843				break
 22844			}
 22845			if o3.Type != t {
 22846				break
 22847			}
 22848			_ = o3.Args[1]
 22849			s4 := o3.Args[0]
 22850			if s4.Op != OpPPC64SLDconst {
 22851				break
 22852			}
 22853			if s4.AuxInt != 24 {
 22854				break
 22855			}
 22856			x4 := s4.Args[0]
 22857			if x4.Op != OpPPC64MOVBZload {
 22858				break
 22859			}
 22860			i4 := x4.AuxInt
 22861			s := x4.Aux
 22862			mem := x4.Args[1]
 22863			p := x4.Args[0]
 22864			s0 := o3.Args[1]
 22865			if s0.Op != OpPPC64SLWconst {
 22866				break
 22867			}
 22868			if s0.AuxInt != 32 {
 22869				break
 22870			}
 22871			x3 := s0.Args[0]
 22872			if x3.Op != OpPPC64MOVWBRload {
 22873				break
 22874			}
 22875			if x3.Type != t {
 22876				break
 22877			}
 22878			_ = x3.Args[1]
 22879			x3_0 := x3.Args[0]
 22880			if x3_0.Op != OpPPC64MOVDaddr {
 22881				break
 22882			}
 22883			if x3_0.Type != typ.Uintptr {
 22884				break
 22885			}
 22886			i0 := x3_0.AuxInt
 22887			if x3_0.Aux != s {
 22888				break
 22889			}
 22890			if p != x3_0.Args[0] {
 22891				break
 22892			}
 22893			if mem != x3.Args[1] {
 22894				break
 22895			}
 22896			s5 := o4.Args[1]
 22897			if s5.Op != OpPPC64SLDconst {
 22898				break
 22899			}
 22900			if s5.AuxInt != 16 {
 22901				break
 22902			}
 22903			x5 := s5.Args[0]
 22904			if x5.Op != OpPPC64MOVBZload {
 22905				break
 22906			}
 22907			i5 := x5.AuxInt
 22908			if x5.Aux != s {
 22909				break
 22910			}
 22911			_ = x5.Args[1]
 22912			if p != x5.Args[0] {
 22913				break
 22914			}
 22915			if mem != x5.Args[1] {
 22916				break
 22917			}
 22918			s6 := o5.Args[1]
 22919			if s6.Op != OpPPC64SLDconst {
 22920				break
 22921			}
 22922			if s6.AuxInt != 8 {
 22923				break
 22924			}
 22925			x6 := s6.Args[0]
 22926			if x6.Op != OpPPC64MOVBZload {
 22927				break
 22928			}
 22929			i6 := x6.AuxInt
 22930			if x6.Aux != s {
 22931				break
 22932			}
 22933			_ = x6.Args[1]
 22934			if p != x6.Args[0] {
 22935				break
 22936			}
 22937			if mem != x6.Args[1] {
 22938				break
 22939			}
 22940			x7 := v.Args[1]
 22941			if x7.Op != OpPPC64MOVBZload {
 22942				break
 22943			}
 22944			i7 := x7.AuxInt
 22945			if x7.Aux != s {
 22946				break
 22947			}
 22948			_ = x7.Args[1]
 22949			if p != x7.Args[0] {
 22950				break
 22951			}
 22952			if mem != x7.Args[1] {
 22953				break
 22954			}
 22955			if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 22956				break
 22957			}
 22958			b = mergePoint(b, x3, x4, x5, x6, x7)
 22959			v0 := b.NewValue0(x7.Pos, OpPPC64MOVDBRload, t)
 22960			v.reset(OpCopy)
 22961			v.AddArg(v0)
 22962			v1 := b.NewValue0(x7.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 22963			v1.AuxInt = i0
 22964			v1.Aux = s
 22965			v1.AddArg(p)
 22966			v0.AddArg(v1)
 22967			v0.AddArg(mem)
 22968			return true
 22969		}
 22970		// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16])) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])) x7:(MOVBZload [i7] {s} p mem))
 22971		// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 22972		// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 22973		for {
 22974			t := v.Type
 22975			_ = v.Args[1]
 22976			o5 := v.Args[0]
 22977			if o5.Op != OpPPC64OR {
 22978				break
 22979			}
 22980			if o5.Type != t {
 22981				break
 22982			}
 22983			_ = o5.Args[1]
 22984			o4 := o5.Args[0]
 22985			if o4.Op != OpPPC64OR {
 22986				break
 22987			}
 22988			if o4.Type != t {
 22989				break
 22990			}
 22991			_ = o4.Args[1]
 22992			o3 := o4.Args[0]
 22993			if o3.Op != OpPPC64OR {
 22994				break
 22995			}
 22996			if o3.Type != t {
 22997				break
 22998			}
 22999			_ = o3.Args[1]
 23000			s0 := o3.Args[0]
 23001			if s0.Op != OpPPC64SLWconst {
 23002				break
 23003			}
 23004			if s0.AuxInt != 32 {
 23005				break
 23006			}
 23007			x3 := s0.Args[0]
 23008			if x3.Op != OpPPC64MOVWBRload {
 23009				break
 23010			}
 23011			if x3.Type != t {
 23012				break
 23013			}
 23014			mem := x3.Args[1]
 23015			x3_0 := x3.Args[0]
 23016			if x3_0.Op != OpPPC64MOVDaddr {
 23017				break
 23018			}
 23019			if x3_0.Type != typ.Uintptr {
 23020				break
 23021			}
 23022			i0 := x3_0.AuxInt
 23023			s := x3_0.Aux
 23024			p := x3_0.Args[0]
 23025			s4 := o3.Args[1]
 23026			if s4.Op != OpPPC64SLDconst {
 23027				break
 23028			}
 23029			if s4.AuxInt != 24 {
 23030				break
 23031			}
 23032			x4 := s4.Args[0]
 23033			if x4.Op != OpPPC64MOVBZload {
 23034				break
 23035			}
 23036			i4 := x4.AuxInt
 23037			if x4.Aux != s {
 23038				break
 23039			}
 23040			_ = x4.Args[1]
 23041			if p != x4.Args[0] {
 23042				break
 23043			}
 23044			if mem != x4.Args[1] {
 23045				break
 23046			}
 23047			s5 := o4.Args[1]
 23048			if s5.Op != OpPPC64SLDconst {
 23049				break
 23050			}
 23051			if s5.AuxInt != 16 {
 23052				break
 23053			}
 23054			x5 := s5.Args[0]
 23055			if x5.Op != OpPPC64MOVBZload {
 23056				break
 23057			}
 23058			i5 := x5.AuxInt
 23059			if x5.Aux != s {
 23060				break
 23061			}
 23062			_ = x5.Args[1]
 23063			if p != x5.Args[0] {
 23064				break
 23065			}
 23066			if mem != x5.Args[1] {
 23067				break
 23068			}
 23069			s6 := o5.Args[1]
 23070			if s6.Op != OpPPC64SLDconst {
 23071				break
 23072			}
 23073			if s6.AuxInt != 8 {
 23074				break
 23075			}
 23076			x6 := s6.Args[0]
 23077			if x6.Op != OpPPC64MOVBZload {
 23078				break
 23079			}
 23080			i6 := x6.AuxInt
 23081			if x6.Aux != s {
 23082				break
 23083			}
 23084			_ = x6.Args[1]
 23085			if p != x6.Args[0] {
 23086				break
 23087			}
 23088			if mem != x6.Args[1] {
 23089				break
 23090			}
 23091			x7 := v.Args[1]
 23092			if x7.Op != OpPPC64MOVBZload {
 23093				break
 23094			}
 23095			i7 := x7.AuxInt
 23096			if x7.Aux != s {
 23097				break
 23098			}
 23099			_ = x7.Args[1]
 23100			if p != x7.Args[0] {
 23101				break
 23102			}
 23103			if mem != x7.Args[1] {
 23104				break
 23105			}
 23106			if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 23107				break
 23108			}
 23109			b = mergePoint(b, x3, x4, x5, x6, x7)
 23110			v0 := b.NewValue0(x7.Pos, OpPPC64MOVDBRload, t)
 23111			v.reset(OpCopy)
 23112			v.AddArg(v0)
 23113			v1 := b.NewValue0(x7.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 23114			v1.AuxInt = i0
 23115			v1.Aux = s
 23116			v1.AddArg(p)
 23117			v0.AddArg(v1)
 23118			v0.AddArg(mem)
 23119			return true
 23120		}
 23121		// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])))))
 23122		// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 23123		// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 23124		for {
 23125			t := v.Type
 23126			_ = v.Args[1]
 23127			x7 := v.Args[0]
 23128			if x7.Op != OpPPC64MOVBZload {
 23129				break
 23130			}
 23131			i7 := x7.AuxInt
 23132			s := x7.Aux
 23133			mem := x7.Args[1]
 23134			p := x7.Args[0]
 23135			o5 := v.Args[1]
 23136			if o5.Op != OpPPC64OR {
 23137				break
 23138			}
 23139			if o5.Type != t {
 23140				break
 23141			}
 23142			_ = o5.Args[1]
 23143			s6 := o5.Args[0]
 23144			if s6.Op != OpPPC64SLDconst {
 23145				break
 23146			}
 23147			if s6.AuxInt != 8 {
 23148				break
 23149			}
 23150			x6 := s6.Args[0]
 23151			if x6.Op != OpPPC64MOVBZload {
 23152				break
 23153			}
 23154			i6 := x6.AuxInt
 23155			if x6.Aux != s {
 23156				break
 23157			}
 23158			_ = x6.Args[1]
 23159			if p != x6.Args[0] {
 23160				break
 23161			}
 23162			if mem != x6.Args[1] {
 23163				break
 23164			}
 23165			o4 := o5.Args[1]
 23166			if o4.Op != OpPPC64OR {
 23167				break
 23168			}
 23169			if o4.Type != t {
 23170				break
 23171			}
 23172			_ = o4.Args[1]
 23173			s5 := o4.Args[0]
 23174			if s5.Op != OpPPC64SLDconst {
 23175				break
 23176			}
 23177			if s5.AuxInt != 16 {
 23178				break
 23179			}
 23180			x5 := s5.Args[0]
 23181			if x5.Op != OpPPC64MOVBZload {
 23182				break
 23183			}
 23184			i5 := x5.AuxInt
 23185			if x5.Aux != s {
 23186				break
 23187			}
 23188			_ = x5.Args[1]
 23189			if p != x5.Args[0] {
 23190				break
 23191			}
 23192			if mem != x5.Args[1] {
 23193				break
 23194			}
 23195			o3 := o4.Args[1]
 23196			if o3.Op != OpPPC64OR {
 23197				break
 23198			}
 23199			if o3.Type != t {
 23200				break
 23201			}
 23202			_ = o3.Args[1]
 23203			s4 := o3.Args[0]
 23204			if s4.Op != OpPPC64SLDconst {
 23205				break
 23206			}
 23207			if s4.AuxInt != 24 {
 23208				break
 23209			}
 23210			x4 := s4.Args[0]
 23211			if x4.Op != OpPPC64MOVBZload {
 23212				break
 23213			}
 23214			i4 := x4.AuxInt
 23215			if x4.Aux != s {
 23216				break
 23217			}
 23218			_ = x4.Args[1]
 23219			if p != x4.Args[0] {
 23220				break
 23221			}
 23222			if mem != x4.Args[1] {
 23223				break
 23224			}
 23225			s0 := o3.Args[1]
 23226			if s0.Op != OpPPC64SLDconst {
 23227				break
 23228			}
 23229			if s0.AuxInt != 32 {
 23230				break
 23231			}
 23232			x3 := s0.Args[0]
 23233			if x3.Op != OpPPC64MOVWBRload {
 23234				break
 23235			}
 23236			if x3.Type != t {
 23237				break
 23238			}
 23239			_ = x3.Args[1]
 23240			x3_0 := x3.Args[0]
 23241			if x3_0.Op != OpPPC64MOVDaddr {
 23242				break
 23243			}
 23244			if x3_0.Type != typ.Uintptr {
 23245				break
 23246			}
 23247			i0 := x3_0.AuxInt
 23248			if x3_0.Aux != s {
 23249				break
 23250			}
 23251			if p != x3_0.Args[0] {
 23252				break
 23253			}
 23254			if mem != x3.Args[1] {
 23255				break
 23256			}
 23257			if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 23258				break
 23259			}
 23260			b = mergePoint(b, x3, x4, x5, x6, x7)
 23261			v0 := b.NewValue0(x3.Pos, OpPPC64MOVDBRload, t)
 23262			v.reset(OpCopy)
 23263			v.AddArg(v0)
 23264			v1 := b.NewValue0(x3.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 23265			v1.AuxInt = i0
 23266			v1.Aux = s
 23267			v1.AddArg(p)
 23268			v0.AddArg(v1)
 23269			v0.AddArg(mem)
 23270			return true
 23271		}
 23272		// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24])))))
 23273		// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 23274		// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 23275		for {
 23276			t := v.Type
 23277			_ = v.Args[1]
 23278			x7 := v.Args[0]
 23279			if x7.Op != OpPPC64MOVBZload {
 23280				break
 23281			}
 23282			i7 := x7.AuxInt
 23283			s := x7.Aux
 23284			mem := x7.Args[1]
 23285			p := x7.Args[0]
 23286			o5 := v.Args[1]
 23287			if o5.Op != OpPPC64OR {
 23288				break
 23289			}
 23290			if o5.Type != t {
 23291				break
 23292			}
 23293			_ = o5.Args[1]
 23294			s6 := o5.Args[0]
 23295			if s6.Op != OpPPC64SLDconst {
 23296				break
 23297			}
 23298			if s6.AuxInt != 8 {
 23299				break
 23300			}
 23301			x6 := s6.Args[0]
 23302			if x6.Op != OpPPC64MOVBZload {
 23303				break
 23304			}
 23305			i6 := x6.AuxInt
 23306			if x6.Aux != s {
 23307				break
 23308			}
 23309			_ = x6.Args[1]
 23310			if p != x6.Args[0] {
 23311				break
 23312			}
 23313			if mem != x6.Args[1] {
 23314				break
 23315			}
 23316			o4 := o5.Args[1]
 23317			if o4.Op != OpPPC64OR {
 23318				break
 23319			}
 23320			if o4.Type != t {
 23321				break
 23322			}
 23323			_ = o4.Args[1]
 23324			s5 := o4.Args[0]
 23325			if s5.Op != OpPPC64SLDconst {
 23326				break
 23327			}
 23328			if s5.AuxInt != 16 {
 23329				break
 23330			}
 23331			x5 := s5.Args[0]
 23332			if x5.Op != OpPPC64MOVBZload {
 23333				break
 23334			}
 23335			i5 := x5.AuxInt
 23336			if x5.Aux != s {
 23337				break
 23338			}
 23339			_ = x5.Args[1]
 23340			if p != x5.Args[0] {
 23341				break
 23342			}
 23343			if mem != x5.Args[1] {
 23344				break
 23345			}
 23346			o3 := o4.Args[1]
 23347			if o3.Op != OpPPC64OR {
 23348				break
 23349			}
 23350			if o3.Type != t {
 23351				break
 23352			}
 23353			_ = o3.Args[1]
 23354			s0 := o3.Args[0]
 23355			if s0.Op != OpPPC64SLDconst {
 23356				break
 23357			}
 23358			if s0.AuxInt != 32 {
 23359				break
 23360			}
 23361			x3 := s0.Args[0]
 23362			if x3.Op != OpPPC64MOVWBRload {
 23363				break
 23364			}
 23365			if x3.Type != t {
 23366				break
 23367			}
 23368			_ = x3.Args[1]
 23369			x3_0 := x3.Args[0]
 23370			if x3_0.Op != OpPPC64MOVDaddr {
 23371				break
 23372			}
 23373			if x3_0.Type != typ.Uintptr {
 23374				break
 23375			}
 23376			i0 := x3_0.AuxInt
 23377			if x3_0.Aux != s {
 23378				break
 23379			}
 23380			if p != x3_0.Args[0] {
 23381				break
 23382			}
 23383			if mem != x3.Args[1] {
 23384				break
 23385			}
 23386			s4 := o3.Args[1]
 23387			if s4.Op != OpPPC64SLDconst {
 23388				break
 23389			}
 23390			if s4.AuxInt != 24 {
 23391				break
 23392			}
 23393			x4 := s4.Args[0]
 23394			if x4.Op != OpPPC64MOVBZload {
 23395				break
 23396			}
 23397			i4 := x4.AuxInt
 23398			if x4.Aux != s {
 23399				break
 23400			}
 23401			_ = x4.Args[1]
 23402			if p != x4.Args[0] {
 23403				break
 23404			}
 23405			if mem != x4.Args[1] {
 23406				break
 23407			}
 23408			if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 23409				break
 23410			}
 23411			b = mergePoint(b, x3, x4, x5, x6, x7)
 23412			v0 := b.NewValue0(x4.Pos, OpPPC64MOVDBRload, t)
 23413			v.reset(OpCopy)
 23414			v.AddArg(v0)
 23415			v1 := b.NewValue0(x4.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 23416			v1.AuxInt = i0
 23417			v1.Aux = s
 23418			v1.AddArg(p)
 23419			v0.AddArg(v1)
 23420			v0.AddArg(mem)
 23421			return true
 23422		}
 23423		// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]))))
 23424		// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 23425		// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 23426		for {
 23427			t := v.Type
 23428			_ = v.Args[1]
 23429			x7 := v.Args[0]
 23430			if x7.Op != OpPPC64MOVBZload {
 23431				break
 23432			}
 23433			i7 := x7.AuxInt
 23434			s := x7.Aux
 23435			mem := x7.Args[1]
 23436			p := x7.Args[0]
 23437			o5 := v.Args[1]
 23438			if o5.Op != OpPPC64OR {
 23439				break
 23440			}
 23441			if o5.Type != t {
 23442				break
 23443			}
 23444			_ = o5.Args[1]
 23445			s6 := o5.Args[0]
 23446			if s6.Op != OpPPC64SLDconst {
 23447				break
 23448			}
 23449			if s6.AuxInt != 8 {
 23450				break
 23451			}
 23452			x6 := s6.Args[0]
 23453			if x6.Op != OpPPC64MOVBZload {
 23454				break
 23455			}
 23456			i6 := x6.AuxInt
 23457			if x6.Aux != s {
 23458				break
 23459			}
 23460			_ = x6.Args[1]
 23461			if p != x6.Args[0] {
 23462				break
 23463			}
 23464			if mem != x6.Args[1] {
 23465				break
 23466			}
 23467			o4 := o5.Args[1]
 23468			if o4.Op != OpPPC64OR {
 23469				break
 23470			}
 23471			if o4.Type != t {
 23472				break
 23473			}
 23474			_ = o4.Args[1]
 23475			o3 := o4.Args[0]
 23476			if o3.Op != OpPPC64OR {
 23477				break
 23478			}
 23479			if o3.Type != t {
 23480				break
 23481			}
 23482			_ = o3.Args[1]
 23483			s4 := o3.Args[0]
 23484			if s4.Op != OpPPC64SLDconst {
 23485				break
 23486			}
 23487			if s4.AuxInt != 24 {
 23488				break
 23489			}
 23490			x4 := s4.Args[0]
 23491			if x4.Op != OpPPC64MOVBZload {
 23492				break
 23493			}
 23494			i4 := x4.AuxInt
 23495			if x4.Aux != s {
 23496				break
 23497			}
 23498			_ = x4.Args[1]
 23499			if p != x4.Args[0] {
 23500				break
 23501			}
 23502			if mem != x4.Args[1] {
 23503				break
 23504			}
 23505			s0 := o3.Args[1]
 23506			if s0.Op != OpPPC64SLDconst {
 23507				break
 23508			}
 23509			if s0.AuxInt != 32 {
 23510				break
 23511			}
 23512			x3 := s0.Args[0]
 23513			if x3.Op != OpPPC64MOVWBRload {
 23514				break
 23515			}
 23516			if x3.Type != t {
 23517				break
 23518			}
 23519			_ = x3.Args[1]
 23520			x3_0 := x3.Args[0]
 23521			if x3_0.Op != OpPPC64MOVDaddr {
 23522				break
 23523			}
 23524			if x3_0.Type != typ.Uintptr {
 23525				break
 23526			}
 23527			i0 := x3_0.AuxInt
 23528			if x3_0.Aux != s {
 23529				break
 23530			}
 23531			if p != x3_0.Args[0] {
 23532				break
 23533			}
 23534			if mem != x3.Args[1] {
 23535				break
 23536			}
 23537			s5 := o4.Args[1]
 23538			if s5.Op != OpPPC64SLDconst {
 23539				break
 23540			}
 23541			if s5.AuxInt != 16 {
 23542				break
 23543			}
 23544			x5 := s5.Args[0]
 23545			if x5.Op != OpPPC64MOVBZload {
 23546				break
 23547			}
 23548			i5 := x5.AuxInt
 23549			if x5.Aux != s {
 23550				break
 23551			}
 23552			_ = x5.Args[1]
 23553			if p != x5.Args[0] {
 23554				break
 23555			}
 23556			if mem != x5.Args[1] {
 23557				break
 23558			}
 23559			if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 23560				break
 23561			}
 23562			b = mergePoint(b, x3, x4, x5, x6, x7)
 23563			v0 := b.NewValue0(x5.Pos, OpPPC64MOVDBRload, t)
 23564			v.reset(OpCopy)
 23565			v.AddArg(v0)
 23566			v1 := b.NewValue0(x5.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 23567			v1.AuxInt = i0
 23568			v1.Aux = s
 23569			v1.AddArg(p)
 23570			v0.AddArg(v1)
 23571			v0.AddArg(mem)
 23572			return true
 23573		}
 23574		// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> o3:(OR <t> s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]))))
 23575		// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 23576		// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 23577		for {
 23578			t := v.Type
 23579			_ = v.Args[1]
 23580			x7 := v.Args[0]
 23581			if x7.Op != OpPPC64MOVBZload {
 23582				break
 23583			}
 23584			i7 := x7.AuxInt
 23585			s := x7.Aux
 23586			mem := x7.Args[1]
 23587			p := x7.Args[0]
 23588			o5 := v.Args[1]
 23589			if o5.Op != OpPPC64OR {
 23590				break
 23591			}
 23592			if o5.Type != t {
 23593				break
 23594			}
 23595			_ = o5.Args[1]
 23596			s6 := o5.Args[0]
 23597			if s6.Op != OpPPC64SLDconst {
 23598				break
 23599			}
 23600			if s6.AuxInt != 8 {
 23601				break
 23602			}
 23603			x6 := s6.Args[0]
 23604			if x6.Op != OpPPC64MOVBZload {
 23605				break
 23606			}
 23607			i6 := x6.AuxInt
 23608			if x6.Aux != s {
 23609				break
 23610			}
 23611			_ = x6.Args[1]
 23612			if p != x6.Args[0] {
 23613				break
 23614			}
 23615			if mem != x6.Args[1] {
 23616				break
 23617			}
 23618			o4 := o5.Args[1]
 23619			if o4.Op != OpPPC64OR {
 23620				break
 23621			}
 23622			if o4.Type != t {
 23623				break
 23624			}
 23625			_ = o4.Args[1]
 23626			o3 := o4.Args[0]
 23627			if o3.Op != OpPPC64OR {
 23628				break
 23629			}
 23630			if o3.Type != t {
 23631				break
 23632			}
 23633			_ = o3.Args[1]
 23634			s0 := o3.Args[0]
 23635			if s0.Op != OpPPC64SLDconst {
 23636				break
 23637			}
 23638			if s0.AuxInt != 32 {
 23639				break
 23640			}
 23641			x3 := s0.Args[0]
 23642			if x3.Op != OpPPC64MOVWBRload {
 23643				break
 23644			}
 23645			if x3.Type != t {
 23646				break
 23647			}
 23648			_ = x3.Args[1]
 23649			x3_0 := x3.Args[0]
 23650			if x3_0.Op != OpPPC64MOVDaddr {
 23651				break
 23652			}
 23653			if x3_0.Type != typ.Uintptr {
 23654				break
 23655			}
 23656			i0 := x3_0.AuxInt
 23657			if x3_0.Aux != s {
 23658				break
 23659			}
 23660			if p != x3_0.Args[0] {
 23661				break
 23662			}
 23663			if mem != x3.Args[1] {
 23664				break
 23665			}
 23666			s4 := o3.Args[1]
 23667			if s4.Op != OpPPC64SLDconst {
 23668				break
 23669			}
 23670			if s4.AuxInt != 24 {
 23671				break
 23672			}
 23673			x4 := s4.Args[0]
 23674			if x4.Op != OpPPC64MOVBZload {
 23675				break
 23676			}
 23677			i4 := x4.AuxInt
 23678			if x4.Aux != s {
 23679				break
 23680			}
 23681			_ = x4.Args[1]
 23682			if p != x4.Args[0] {
 23683				break
 23684			}
 23685			if mem != x4.Args[1] {
 23686				break
 23687			}
 23688			s5 := o4.Args[1]
 23689			if s5.Op != OpPPC64SLDconst {
 23690				break
 23691			}
 23692			if s5.AuxInt != 16 {
 23693				break
 23694			}
 23695			x5 := s5.Args[0]
 23696			if x5.Op != OpPPC64MOVBZload {
 23697				break
 23698			}
 23699			i5 := x5.AuxInt
 23700			if x5.Aux != s {
 23701				break
 23702			}
 23703			_ = x5.Args[1]
 23704			if p != x5.Args[0] {
 23705				break
 23706			}
 23707			if mem != x5.Args[1] {
 23708				break
 23709			}
 23710			if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 23711				break
 23712			}
 23713			b = mergePoint(b, x3, x4, x5, x6, x7)
 23714			v0 := b.NewValue0(x5.Pos, OpPPC64MOVDBRload, t)
 23715			v.reset(OpCopy)
 23716			v.AddArg(v0)
 23717			v1 := b.NewValue0(x5.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 23718			v1.AuxInt = i0
 23719			v1.Aux = s
 23720			v1.AddArg(p)
 23721			v0.AddArg(v1)
 23722			v0.AddArg(mem)
 23723			return true
 23724		}
 23725		// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]))) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])))
 23726		// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 23727		// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 23728		for {
 23729			t := v.Type
 23730			_ = v.Args[1]
 23731			x7 := v.Args[0]
 23732			if x7.Op != OpPPC64MOVBZload {
 23733				break
 23734			}
 23735			i7 := x7.AuxInt
 23736			s := x7.Aux
 23737			mem := x7.Args[1]
 23738			p := x7.Args[0]
 23739			o5 := v.Args[1]
 23740			if o5.Op != OpPPC64OR {
 23741				break
 23742			}
 23743			if o5.Type != t {
 23744				break
 23745			}
 23746			_ = o5.Args[1]
 23747			o4 := o5.Args[0]
 23748			if o4.Op != OpPPC64OR {
 23749				break
 23750			}
 23751			if o4.Type != t {
 23752				break
 23753			}
 23754			_ = o4.Args[1]
 23755			s5 := o4.Args[0]
 23756			if s5.Op != OpPPC64SLDconst {
 23757				break
 23758			}
 23759			if s5.AuxInt != 16 {
 23760				break
 23761			}
 23762			x5 := s5.Args[0]
 23763			if x5.Op != OpPPC64MOVBZload {
 23764				break
 23765			}
 23766			i5 := x5.AuxInt
 23767			if x5.Aux != s {
 23768				break
 23769			}
 23770			_ = x5.Args[1]
 23771			if p != x5.Args[0] {
 23772				break
 23773			}
 23774			if mem != x5.Args[1] {
 23775				break
 23776			}
 23777			o3 := o4.Args[1]
 23778			if o3.Op != OpPPC64OR {
 23779				break
 23780			}
 23781			if o3.Type != t {
 23782				break
 23783			}
 23784			_ = o3.Args[1]
 23785			s4 := o3.Args[0]
 23786			if s4.Op != OpPPC64SLDconst {
 23787				break
 23788			}
 23789			if s4.AuxInt != 24 {
 23790				break
 23791			}
 23792			x4 := s4.Args[0]
 23793			if x4.Op != OpPPC64MOVBZload {
 23794				break
 23795			}
 23796			i4 := x4.AuxInt
 23797			if x4.Aux != s {
 23798				break
 23799			}
 23800			_ = x4.Args[1]
 23801			if p != x4.Args[0] {
 23802				break
 23803			}
 23804			if mem != x4.Args[1] {
 23805				break
 23806			}
 23807			s0 := o3.Args[1]
 23808			if s0.Op != OpPPC64SLDconst {
 23809				break
 23810			}
 23811			if s0.AuxInt != 32 {
 23812				break
 23813			}
 23814			x3 := s0.Args[0]
 23815			if x3.Op != OpPPC64MOVWBRload {
 23816				break
 23817			}
 23818			if x3.Type != t {
 23819				break
 23820			}
 23821			_ = x3.Args[1]
 23822			x3_0 := x3.Args[0]
 23823			if x3_0.Op != OpPPC64MOVDaddr {
 23824				break
 23825			}
 23826			if x3_0.Type != typ.Uintptr {
 23827				break
 23828			}
 23829			i0 := x3_0.AuxInt
 23830			if x3_0.Aux != s {
 23831				break
 23832			}
 23833			if p != x3_0.Args[0] {
 23834				break
 23835			}
 23836			if mem != x3.Args[1] {
 23837				break
 23838			}
 23839			s6 := o5.Args[1]
 23840			if s6.Op != OpPPC64SLDconst {
 23841				break
 23842			}
 23843			if s6.AuxInt != 8 {
 23844				break
 23845			}
 23846			x6 := s6.Args[0]
 23847			if x6.Op != OpPPC64MOVBZload {
 23848				break
 23849			}
 23850			i6 := x6.AuxInt
 23851			if x6.Aux != s {
 23852				break
 23853			}
 23854			_ = x6.Args[1]
 23855			if p != x6.Args[0] {
 23856				break
 23857			}
 23858			if mem != x6.Args[1] {
 23859				break
 23860			}
 23861			if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 23862				break
 23863			}
 23864			b = mergePoint(b, x3, x4, x5, x6, x7)
 23865			v0 := b.NewValue0(x6.Pos, OpPPC64MOVDBRload, t)
 23866			v.reset(OpCopy)
 23867			v.AddArg(v0)
 23868			v1 := b.NewValue0(x6.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 23869			v1.AuxInt = i0
 23870			v1.Aux = s
 23871			v1.AddArg(p)
 23872			v0.AddArg(v1)
 23873			v0.AddArg(mem)
 23874			return true
 23875		}
 23876		// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]))) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])))
 23877		// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 23878		// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 23879		for {
 23880			t := v.Type
 23881			_ = v.Args[1]
 23882			x7 := v.Args[0]
 23883			if x7.Op != OpPPC64MOVBZload {
 23884				break
 23885			}
 23886			i7 := x7.AuxInt
 23887			s := x7.Aux
 23888			mem := x7.Args[1]
 23889			p := x7.Args[0]
 23890			o5 := v.Args[1]
 23891			if o5.Op != OpPPC64OR {
 23892				break
 23893			}
 23894			if o5.Type != t {
 23895				break
 23896			}
 23897			_ = o5.Args[1]
 23898			o4 := o5.Args[0]
 23899			if o4.Op != OpPPC64OR {
 23900				break
 23901			}
 23902			if o4.Type != t {
 23903				break
 23904			}
 23905			_ = o4.Args[1]
 23906			s5 := o4.Args[0]
 23907			if s5.Op != OpPPC64SLDconst {
 23908				break
 23909			}
 23910			if s5.AuxInt != 16 {
 23911				break
 23912			}
 23913			x5 := s5.Args[0]
 23914			if x5.Op != OpPPC64MOVBZload {
 23915				break
 23916			}
 23917			i5 := x5.AuxInt
 23918			if x5.Aux != s {
 23919				break
 23920			}
 23921			_ = x5.Args[1]
 23922			if p != x5.Args[0] {
 23923				break
 23924			}
 23925			if mem != x5.Args[1] {
 23926				break
 23927			}
 23928			o3 := o4.Args[1]
 23929			if o3.Op != OpPPC64OR {
 23930				break
 23931			}
 23932			if o3.Type != t {
 23933				break
 23934			}
 23935			_ = o3.Args[1]
 23936			s0 := o3.Args[0]
 23937			if s0.Op != OpPPC64SLDconst {
 23938				break
 23939			}
 23940			if s0.AuxInt != 32 {
 23941				break
 23942			}
 23943			x3 := s0.Args[0]
 23944			if x3.Op != OpPPC64MOVWBRload {
 23945				break
 23946			}
 23947			if x3.Type != t {
 23948				break
 23949			}
 23950			_ = x3.Args[1]
 23951			x3_0 := x3.Args[0]
 23952			if x3_0.Op != OpPPC64MOVDaddr {
 23953				break
 23954			}
 23955			if x3_0.Type != typ.Uintptr {
 23956				break
 23957			}
 23958			i0 := x3_0.AuxInt
 23959			if x3_0.Aux != s {
 23960				break
 23961			}
 23962			if p != x3_0.Args[0] {
 23963				break
 23964			}
 23965			if mem != x3.Args[1] {
 23966				break
 23967			}
 23968			s4 := o3.Args[1]
 23969			if s4.Op != OpPPC64SLDconst {
 23970				break
 23971			}
 23972			if s4.AuxInt != 24 {
 23973				break
 23974			}
 23975			x4 := s4.Args[0]
 23976			if x4.Op != OpPPC64MOVBZload {
 23977				break
 23978			}
 23979			i4 := x4.AuxInt
 23980			if x4.Aux != s {
 23981				break
 23982			}
 23983			_ = x4.Args[1]
 23984			if p != x4.Args[0] {
 23985				break
 23986			}
 23987			if mem != x4.Args[1] {
 23988				break
 23989			}
 23990			s6 := o5.Args[1]
 23991			if s6.Op != OpPPC64SLDconst {
 23992				break
 23993			}
 23994			if s6.AuxInt != 8 {
 23995				break
 23996			}
 23997			x6 := s6.Args[0]
 23998			if x6.Op != OpPPC64MOVBZload {
 23999				break
 24000			}
 24001			i6 := x6.AuxInt
 24002			if x6.Aux != s {
 24003				break
 24004			}
 24005			_ = x6.Args[1]
 24006			if p != x6.Args[0] {
 24007				break
 24008			}
 24009			if mem != x6.Args[1] {
 24010				break
 24011			}
 24012			if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 24013				break
 24014			}
 24015			b = mergePoint(b, x3, x4, x5, x6, x7)
 24016			v0 := b.NewValue0(x6.Pos, OpPPC64MOVDBRload, t)
 24017			v.reset(OpCopy)
 24018			v.AddArg(v0)
 24019			v1 := b.NewValue0(x6.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 24020			v1.AuxInt = i0
 24021			v1.Aux = s
 24022			v1.AddArg(p)
 24023			v0.AddArg(v1)
 24024			v0.AddArg(mem)
 24025			return true
 24026		}
 24027		return false
 24028	}
 24029	func rewriteValuePPC64_OpPPC64OR_110(v *Value) bool {
 24030		b := v.Block
 24031		config := b.Func.Config
 24032		typ := &b.Func.Config.Types
 24033		// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> o4:(OR <t> o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16])) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])))
 24034		// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 24035		// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 24036		for {
 24037			t := v.Type
 24038			_ = v.Args[1]
 24039			x7 := v.Args[0]
 24040			if x7.Op != OpPPC64MOVBZload {
 24041				break
 24042			}
 24043			i7 := x7.AuxInt
 24044			s := x7.Aux
 24045			mem := x7.Args[1]
 24046			p := x7.Args[0]
 24047			o5 := v.Args[1]
 24048			if o5.Op != OpPPC64OR {
 24049				break
 24050			}
 24051			if o5.Type != t {
 24052				break
 24053			}
 24054			_ = o5.Args[1]
 24055			o4 := o5.Args[0]
 24056			if o4.Op != OpPPC64OR {
 24057				break
 24058			}
 24059			if o4.Type != t {
 24060				break
 24061			}
 24062			_ = o4.Args[1]
 24063			o3 := o4.Args[0]
 24064			if o3.Op != OpPPC64OR {
 24065				break
 24066			}
 24067			if o3.Type != t {
 24068				break
 24069			}
 24070			_ = o3.Args[1]
 24071			s4 := o3.Args[0]
 24072			if s4.Op != OpPPC64SLDconst {
 24073				break
 24074			}
 24075			if s4.AuxInt != 24 {
 24076				break
 24077			}
 24078			x4 := s4.Args[0]
 24079			if x4.Op != OpPPC64MOVBZload {
 24080				break
 24081			}
 24082			i4 := x4.AuxInt
 24083			if x4.Aux != s {
 24084				break
 24085			}
 24086			_ = x4.Args[1]
 24087			if p != x4.Args[0] {
 24088				break
 24089			}
 24090			if mem != x4.Args[1] {
 24091				break
 24092			}
 24093			s0 := o3.Args[1]
 24094			if s0.Op != OpPPC64SLDconst {
 24095				break
 24096			}
 24097			if s0.AuxInt != 32 {
 24098				break
 24099			}
 24100			x3 := s0.Args[0]
 24101			if x3.Op != OpPPC64MOVWBRload {
 24102				break
 24103			}
 24104			if x3.Type != t {
 24105				break
 24106			}
 24107			_ = x3.Args[1]
 24108			x3_0 := x3.Args[0]
 24109			if x3_0.Op != OpPPC64MOVDaddr {
 24110				break
 24111			}
 24112			if x3_0.Type != typ.Uintptr {
 24113				break
 24114			}
 24115			i0 := x3_0.AuxInt
 24116			if x3_0.Aux != s {
 24117				break
 24118			}
 24119			if p != x3_0.Args[0] {
 24120				break
 24121			}
 24122			if mem != x3.Args[1] {
 24123				break
 24124			}
 24125			s5 := o4.Args[1]
 24126			if s5.Op != OpPPC64SLDconst {
 24127				break
 24128			}
 24129			if s5.AuxInt != 16 {
 24130				break
 24131			}
 24132			x5 := s5.Args[0]
 24133			if x5.Op != OpPPC64MOVBZload {
 24134				break
 24135			}
 24136			i5 := x5.AuxInt
 24137			if x5.Aux != s {
 24138				break
 24139			}
 24140			_ = x5.Args[1]
 24141			if p != x5.Args[0] {
 24142				break
 24143			}
 24144			if mem != x5.Args[1] {
 24145				break
 24146			}
 24147			s6 := o5.Args[1]
 24148			if s6.Op != OpPPC64SLDconst {
 24149				break
 24150			}
 24151			if s6.AuxInt != 8 {
 24152				break
 24153			}
 24154			x6 := s6.Args[0]
 24155			if x6.Op != OpPPC64MOVBZload {
 24156				break
 24157			}
 24158			i6 := x6.AuxInt
 24159			if x6.Aux != s {
 24160				break
 24161			}
 24162			_ = x6.Args[1]
 24163			if p != x6.Args[0] {
 24164				break
 24165			}
 24166			if mem != x6.Args[1] {
 24167				break
 24168			}
 24169			if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 24170				break
 24171			}
 24172			b = mergePoint(b, x3, x4, x5, x6, x7)
 24173			v0 := b.NewValue0(x6.Pos, OpPPC64MOVDBRload, t)
 24174			v.reset(OpCopy)
 24175			v.AddArg(v0)
 24176			v1 := b.NewValue0(x6.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 24177			v1.AuxInt = i0
 24178			v1.Aux = s
 24179			v1.AddArg(p)
 24180			v0.AddArg(v1)
 24181			v0.AddArg(mem)
 24182			return true
 24183		}
 24184		// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> o4:(OR <t> o3:(OR <t> s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16])) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])))
 24185		// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 24186		// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 24187		for {
 24188			t := v.Type
 24189			_ = v.Args[1]
 24190			x7 := v.Args[0]
 24191			if x7.Op != OpPPC64MOVBZload {
 24192				break
 24193			}
 24194			i7 := x7.AuxInt
 24195			s := x7.Aux
 24196			mem := x7.Args[1]
 24197			p := x7.Args[0]
 24198			o5 := v.Args[1]
 24199			if o5.Op != OpPPC64OR {
 24200				break
 24201			}
 24202			if o5.Type != t {
 24203				break
 24204			}
 24205			_ = o5.Args[1]
 24206			o4 := o5.Args[0]
 24207			if o4.Op != OpPPC64OR {
 24208				break
 24209			}
 24210			if o4.Type != t {
 24211				break
 24212			}
 24213			_ = o4.Args[1]
 24214			o3 := o4.Args[0]
 24215			if o3.Op != OpPPC64OR {
 24216				break
 24217			}
 24218			if o3.Type != t {
 24219				break
 24220			}
 24221			_ = o3.Args[1]
 24222			s0 := o3.Args[0]
 24223			if s0.Op != OpPPC64SLDconst {
 24224				break
 24225			}
 24226			if s0.AuxInt != 32 {
 24227				break
 24228			}
 24229			x3 := s0.Args[0]
 24230			if x3.Op != OpPPC64MOVWBRload {
 24231				break
 24232			}
 24233			if x3.Type != t {
 24234				break
 24235			}
 24236			_ = x3.Args[1]
 24237			x3_0 := x3.Args[0]
 24238			if x3_0.Op != OpPPC64MOVDaddr {
 24239				break
 24240			}
 24241			if x3_0.Type != typ.Uintptr {
 24242				break
 24243			}
 24244			i0 := x3_0.AuxInt
 24245			if x3_0.Aux != s {
 24246				break
 24247			}
 24248			if p != x3_0.Args[0] {
 24249				break
 24250			}
 24251			if mem != x3.Args[1] {
 24252				break
 24253			}
 24254			s4 := o3.Args[1]
 24255			if s4.Op != OpPPC64SLDconst {
 24256				break
 24257			}
 24258			if s4.AuxInt != 24 {
 24259				break
 24260			}
 24261			x4 := s4.Args[0]
 24262			if x4.Op != OpPPC64MOVBZload {
 24263				break
 24264			}
 24265			i4 := x4.AuxInt
 24266			if x4.Aux != s {
 24267				break
 24268			}
 24269			_ = x4.Args[1]
 24270			if p != x4.Args[0] {
 24271				break
 24272			}
 24273			if mem != x4.Args[1] {
 24274				break
 24275			}
 24276			s5 := o4.Args[1]
 24277			if s5.Op != OpPPC64SLDconst {
 24278				break
 24279			}
 24280			if s5.AuxInt != 16 {
 24281				break
 24282			}
 24283			x5 := s5.Args[0]
 24284			if x5.Op != OpPPC64MOVBZload {
 24285				break
 24286			}
 24287			i5 := x5.AuxInt
 24288			if x5.Aux != s {
 24289				break
 24290			}
 24291			_ = x5.Args[1]
 24292			if p != x5.Args[0] {
 24293				break
 24294			}
 24295			if mem != x5.Args[1] {
 24296				break
 24297			}
 24298			s6 := o5.Args[1]
 24299			if s6.Op != OpPPC64SLDconst {
 24300				break
 24301			}
 24302			if s6.AuxInt != 8 {
 24303				break
 24304			}
 24305			x6 := s6.Args[0]
 24306			if x6.Op != OpPPC64MOVBZload {
 24307				break
 24308			}
 24309			i6 := x6.AuxInt
 24310			if x6.Aux != s {
 24311				break
 24312			}
 24313			_ = x6.Args[1]
 24314			if p != x6.Args[0] {
 24315				break
 24316			}
 24317			if mem != x6.Args[1] {
 24318				break
 24319			}
 24320			if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 24321				break
 24322			}
 24323			b = mergePoint(b, x3, x4, x5, x6, x7)
 24324			v0 := b.NewValue0(x6.Pos, OpPPC64MOVDBRload, t)
 24325			v.reset(OpCopy)
 24326			v.AddArg(v0)
 24327			v1 := b.NewValue0(x6.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 24328			v1.AuxInt = i0
 24329			v1.Aux = s
 24330			v1.AddArg(p)
 24331			v0.AddArg(v1)
 24332			v0.AddArg(mem)
 24333			return true
 24334		}
 24335		// match: (OR <t> o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])))) x7:(MOVBZload [i7] {s} p mem))
 24336		// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 24337		// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 24338		for {
 24339			t := v.Type
 24340			_ = v.Args[1]
 24341			o5 := v.Args[0]
 24342			if o5.Op != OpPPC64OR {
 24343				break
 24344			}
 24345			if o5.Type != t {
 24346				break
 24347			}
 24348			_ = o5.Args[1]
 24349			s6 := o5.Args[0]
 24350			if s6.Op != OpPPC64SLDconst {
 24351				break
 24352			}
 24353			if s6.AuxInt != 8 {
 24354				break
 24355			}
 24356			x6 := s6.Args[0]
 24357			if x6.Op != OpPPC64MOVBZload {
 24358				break
 24359			}
 24360			i6 := x6.AuxInt
 24361			s := x6.Aux
 24362			mem := x6.Args[1]
 24363			p := x6.Args[0]
 24364			o4 := o5.Args[1]
 24365			if o4.Op != OpPPC64OR {
 24366				break
 24367			}
 24368			if o4.Type != t {
 24369				break
 24370			}
 24371			_ = o4.Args[1]
 24372			s5 := o4.Args[0]
 24373			if s5.Op != OpPPC64SLDconst {
 24374				break
 24375			}
 24376			if s5.AuxInt != 16 {
 24377				break
 24378			}
 24379			x5 := s5.Args[0]
 24380			if x5.Op != OpPPC64MOVBZload {
 24381				break
 24382			}
 24383			i5 := x5.AuxInt
 24384			if x5.Aux != s {
 24385				break
 24386			}
 24387			_ = x5.Args[1]
 24388			if p != x5.Args[0] {
 24389				break
 24390			}
 24391			if mem != x5.Args[1] {
 24392				break
 24393			}
 24394			o3 := o4.Args[1]
 24395			if o3.Op != OpPPC64OR {
 24396				break
 24397			}
 24398			if o3.Type != t {
 24399				break
 24400			}
 24401			_ = o3.Args[1]
 24402			s4 := o3.Args[0]
 24403			if s4.Op != OpPPC64SLDconst {
 24404				break
 24405			}
 24406			if s4.AuxInt != 24 {
 24407				break
 24408			}
 24409			x4 := s4.Args[0]
 24410			if x4.Op != OpPPC64MOVBZload {
 24411				break
 24412			}
 24413			i4 := x4.AuxInt
 24414			if x4.Aux != s {
 24415				break
 24416			}
 24417			_ = x4.Args[1]
 24418			if p != x4.Args[0] {
 24419				break
 24420			}
 24421			if mem != x4.Args[1] {
 24422				break
 24423			}
 24424			s0 := o3.Args[1]
 24425			if s0.Op != OpPPC64SLDconst {
 24426				break
 24427			}
 24428			if s0.AuxInt != 32 {
 24429				break
 24430			}
 24431			x3 := s0.Args[0]
 24432			if x3.Op != OpPPC64MOVWBRload {
 24433				break
 24434			}
 24435			if x3.Type != t {
 24436				break
 24437			}
 24438			_ = x3.Args[1]
 24439			x3_0 := x3.Args[0]
 24440			if x3_0.Op != OpPPC64MOVDaddr {
 24441				break
 24442			}
 24443			if x3_0.Type != typ.Uintptr {
 24444				break
 24445			}
 24446			i0 := x3_0.AuxInt
 24447			if x3_0.Aux != s {
 24448				break
 24449			}
 24450			if p != x3_0.Args[0] {
 24451				break
 24452			}
 24453			if mem != x3.Args[1] {
 24454				break
 24455			}
 24456			x7 := v.Args[1]
 24457			if x7.Op != OpPPC64MOVBZload {
 24458				break
 24459			}
 24460			i7 := x7.AuxInt
 24461			if x7.Aux != s {
 24462				break
 24463			}
 24464			_ = x7.Args[1]
 24465			if p != x7.Args[0] {
 24466				break
 24467			}
 24468			if mem != x7.Args[1] {
 24469				break
 24470			}
 24471			if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 24472				break
 24473			}
 24474			b = mergePoint(b, x3, x4, x5, x6, x7)
 24475			v0 := b.NewValue0(x7.Pos, OpPPC64MOVDBRload, t)
 24476			v.reset(OpCopy)
 24477			v.AddArg(v0)
 24478			v1 := b.NewValue0(x7.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 24479			v1.AuxInt = i0
 24480			v1.Aux = s
 24481			v1.AddArg(p)
 24482			v0.AddArg(v1)
 24483			v0.AddArg(mem)
 24484			return true
 24485		}
 24486		// match: (OR <t> o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24])))) x7:(MOVBZload [i7] {s} p mem))
 24487		// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 24488		// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 24489		for {
 24490			t := v.Type
 24491			_ = v.Args[1]
 24492			o5 := v.Args[0]
 24493			if o5.Op != OpPPC64OR {
 24494				break
 24495			}
 24496			if o5.Type != t {
 24497				break
 24498			}
 24499			_ = o5.Args[1]
 24500			s6 := o5.Args[0]
 24501			if s6.Op != OpPPC64SLDconst {
 24502				break
 24503			}
 24504			if s6.AuxInt != 8 {
 24505				break
 24506			}
 24507			x6 := s6.Args[0]
 24508			if x6.Op != OpPPC64MOVBZload {
 24509				break
 24510			}
 24511			i6 := x6.AuxInt
 24512			s := x6.Aux
 24513			mem := x6.Args[1]
 24514			p := x6.Args[0]
 24515			o4 := o5.Args[1]
 24516			if o4.Op != OpPPC64OR {
 24517				break
 24518			}
 24519			if o4.Type != t {
 24520				break
 24521			}
 24522			_ = o4.Args[1]
 24523			s5 := o4.Args[0]
 24524			if s5.Op != OpPPC64SLDconst {
 24525				break
 24526			}
 24527			if s5.AuxInt != 16 {
 24528				break
 24529			}
 24530			x5 := s5.Args[0]
 24531			if x5.Op != OpPPC64MOVBZload {
 24532				break
 24533			}
 24534			i5 := x5.AuxInt
 24535			if x5.Aux != s {
 24536				break
 24537			}
 24538			_ = x5.Args[1]
 24539			if p != x5.Args[0] {
 24540				break
 24541			}
 24542			if mem != x5.Args[1] {
 24543				break
 24544			}
 24545			o3 := o4.Args[1]
 24546			if o3.Op != OpPPC64OR {
 24547				break
 24548			}
 24549			if o3.Type != t {
 24550				break
 24551			}
 24552			_ = o3.Args[1]
 24553			s0 := o3.Args[0]
 24554			if s0.Op != OpPPC64SLDconst {
 24555				break
 24556			}
 24557			if s0.AuxInt != 32 {
 24558				break
 24559			}
 24560			x3 := s0.Args[0]
 24561			if x3.Op != OpPPC64MOVWBRload {
 24562				break
 24563			}
 24564			if x3.Type != t {
 24565				break
 24566			}
 24567			_ = x3.Args[1]
 24568			x3_0 := x3.Args[0]
 24569			if x3_0.Op != OpPPC64MOVDaddr {
 24570				break
 24571			}
 24572			if x3_0.Type != typ.Uintptr {
 24573				break
 24574			}
 24575			i0 := x3_0.AuxInt
 24576			if x3_0.Aux != s {
 24577				break
 24578			}
 24579			if p != x3_0.Args[0] {
 24580				break
 24581			}
 24582			if mem != x3.Args[1] {
 24583				break
 24584			}
 24585			s4 := o3.Args[1]
 24586			if s4.Op != OpPPC64SLDconst {
 24587				break
 24588			}
 24589			if s4.AuxInt != 24 {
 24590				break
 24591			}
 24592			x4 := s4.Args[0]
 24593			if x4.Op != OpPPC64MOVBZload {
 24594				break
 24595			}
 24596			i4 := x4.AuxInt
 24597			if x4.Aux != s {
 24598				break
 24599			}
 24600			_ = x4.Args[1]
 24601			if p != x4.Args[0] {
 24602				break
 24603			}
 24604			if mem != x4.Args[1] {
 24605				break
 24606			}
 24607			x7 := v.Args[1]
 24608			if x7.Op != OpPPC64MOVBZload {
 24609				break
 24610			}
 24611			i7 := x7.AuxInt
 24612			if x7.Aux != s {
 24613				break
 24614			}
 24615			_ = x7.Args[1]
 24616			if p != x7.Args[0] {
 24617				break
 24618			}
 24619			if mem != x7.Args[1] {
 24620				break
 24621			}
 24622			if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 24623				break
 24624			}
 24625			b = mergePoint(b, x3, x4, x5, x6, x7)
 24626			v0 := b.NewValue0(x7.Pos, OpPPC64MOVDBRload, t)
 24627			v.reset(OpCopy)
 24628			v.AddArg(v0)
 24629			v1 := b.NewValue0(x7.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 24630			v1.AuxInt = i0
 24631			v1.Aux = s
 24632			v1.AddArg(p)
 24633			v0.AddArg(v1)
 24634			v0.AddArg(mem)
 24635			return true
 24636		}
 24637		// match: (OR <t> o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]))) x7:(MOVBZload [i7] {s} p mem))
 24638		// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 24639		// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 24640		for {
 24641			t := v.Type
 24642			_ = v.Args[1]
 24643			o5 := v.Args[0]
 24644			if o5.Op != OpPPC64OR {
 24645				break
 24646			}
 24647			if o5.Type != t {
 24648				break
 24649			}
 24650			_ = o5.Args[1]
 24651			s6 := o5.Args[0]
 24652			if s6.Op != OpPPC64SLDconst {
 24653				break
 24654			}
 24655			if s6.AuxInt != 8 {
 24656				break
 24657			}
 24658			x6 := s6.Args[0]
 24659			if x6.Op != OpPPC64MOVBZload {
 24660				break
 24661			}
 24662			i6 := x6.AuxInt
 24663			s := x6.Aux
 24664			mem := x6.Args[1]
 24665			p := x6.Args[0]
 24666			o4 := o5.Args[1]
 24667			if o4.Op != OpPPC64OR {
 24668				break
 24669			}
 24670			if o4.Type != t {
 24671				break
 24672			}
 24673			_ = o4.Args[1]
 24674			o3 := o4.Args[0]
 24675			if o3.Op != OpPPC64OR {
 24676				break
 24677			}
 24678			if o3.Type != t {
 24679				break
 24680			}
 24681			_ = o3.Args[1]
 24682			s4 := o3.Args[0]
 24683			if s4.Op != OpPPC64SLDconst {
 24684				break
 24685			}
 24686			if s4.AuxInt != 24 {
 24687				break
 24688			}
 24689			x4 := s4.Args[0]
 24690			if x4.Op != OpPPC64MOVBZload {
 24691				break
 24692			}
 24693			i4 := x4.AuxInt
 24694			if x4.Aux != s {
 24695				break
 24696			}
 24697			_ = x4.Args[1]
 24698			if p != x4.Args[0] {
 24699				break
 24700			}
 24701			if mem != x4.Args[1] {
 24702				break
 24703			}
 24704			s0 := o3.Args[1]
 24705			if s0.Op != OpPPC64SLDconst {
 24706				break
 24707			}
 24708			if s0.AuxInt != 32 {
 24709				break
 24710			}
 24711			x3 := s0.Args[0]
 24712			if x3.Op != OpPPC64MOVWBRload {
 24713				break
 24714			}
 24715			if x3.Type != t {
 24716				break
 24717			}
 24718			_ = x3.Args[1]
 24719			x3_0 := x3.Args[0]
 24720			if x3_0.Op != OpPPC64MOVDaddr {
 24721				break
 24722			}
 24723			if x3_0.Type != typ.Uintptr {
 24724				break
 24725			}
 24726			i0 := x3_0.AuxInt
 24727			if x3_0.Aux != s {
 24728				break
 24729			}
 24730			if p != x3_0.Args[0] {
 24731				break
 24732			}
 24733			if mem != x3.Args[1] {
 24734				break
 24735			}
 24736			s5 := o4.Args[1]
 24737			if s5.Op != OpPPC64SLDconst {
 24738				break
 24739			}
 24740			if s5.AuxInt != 16 {
 24741				break
 24742			}
 24743			x5 := s5.Args[0]
 24744			if x5.Op != OpPPC64MOVBZload {
 24745				break
 24746			}
 24747			i5 := x5.AuxInt
 24748			if x5.Aux != s {
 24749				break
 24750			}
 24751			_ = x5.Args[1]
 24752			if p != x5.Args[0] {
 24753				break
 24754			}
 24755			if mem != x5.Args[1] {
 24756				break
 24757			}
 24758			x7 := v.Args[1]
 24759			if x7.Op != OpPPC64MOVBZload {
 24760				break
 24761			}
 24762			i7 := x7.AuxInt
 24763			if x7.Aux != s {
 24764				break
 24765			}
 24766			_ = x7.Args[1]
 24767			if p != x7.Args[0] {
 24768				break
 24769			}
 24770			if mem != x7.Args[1] {
 24771				break
 24772			}
 24773			if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 24774				break
 24775			}
 24776			b = mergePoint(b, x3, x4, x5, x6, x7)
 24777			v0 := b.NewValue0(x7.Pos, OpPPC64MOVDBRload, t)
 24778			v.reset(OpCopy)
 24779			v.AddArg(v0)
 24780			v1 := b.NewValue0(x7.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 24781			v1.AuxInt = i0
 24782			v1.Aux = s
 24783			v1.AddArg(p)
 24784			v0.AddArg(v1)
 24785			v0.AddArg(mem)
 24786			return true
 24787		}
 24788		// match: (OR <t> o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> o3:(OR <t> s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]))) x7:(MOVBZload [i7] {s} p mem))
 24789		// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 24790		// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 24791		for {
 24792			t := v.Type
 24793			_ = v.Args[1]
 24794			o5 := v.Args[0]
 24795			if o5.Op != OpPPC64OR {
 24796				break
 24797			}
 24798			if o5.Type != t {
 24799				break
 24800			}
 24801			_ = o5.Args[1]
 24802			s6 := o5.Args[0]
 24803			if s6.Op != OpPPC64SLDconst {
 24804				break
 24805			}
 24806			if s6.AuxInt != 8 {
 24807				break
 24808			}
 24809			x6 := s6.Args[0]
 24810			if x6.Op != OpPPC64MOVBZload {
 24811				break
 24812			}
 24813			i6 := x6.AuxInt
 24814			s := x6.Aux
 24815			mem := x6.Args[1]
 24816			p := x6.Args[0]
 24817			o4 := o5.Args[1]
 24818			if o4.Op != OpPPC64OR {
 24819				break
 24820			}
 24821			if o4.Type != t {
 24822				break
 24823			}
 24824			_ = o4.Args[1]
 24825			o3 := o4.Args[0]
 24826			if o3.Op != OpPPC64OR {
 24827				break
 24828			}
 24829			if o3.Type != t {
 24830				break
 24831			}
 24832			_ = o3.Args[1]
 24833			s0 := o3.Args[0]
 24834			if s0.Op != OpPPC64SLDconst {
 24835				break
 24836			}
 24837			if s0.AuxInt != 32 {
 24838				break
 24839			}
 24840			x3 := s0.Args[0]
 24841			if x3.Op != OpPPC64MOVWBRload {
 24842				break
 24843			}
 24844			if x3.Type != t {
 24845				break
 24846			}
 24847			_ = x3.Args[1]
 24848			x3_0 := x3.Args[0]
 24849			if x3_0.Op != OpPPC64MOVDaddr {
 24850				break
 24851			}
 24852			if x3_0.Type != typ.Uintptr {
 24853				break
 24854			}
 24855			i0 := x3_0.AuxInt
 24856			if x3_0.Aux != s {
 24857				break
 24858			}
 24859			if p != x3_0.Args[0] {
 24860				break
 24861			}
 24862			if mem != x3.Args[1] {
 24863				break
 24864			}
 24865			s4 := o3.Args[1]
 24866			if s4.Op != OpPPC64SLDconst {
 24867				break
 24868			}
 24869			if s4.AuxInt != 24 {
 24870				break
 24871			}
 24872			x4 := s4.Args[0]
 24873			if x4.Op != OpPPC64MOVBZload {
 24874				break
 24875			}
 24876			i4 := x4.AuxInt
 24877			if x4.Aux != s {
 24878				break
 24879			}
 24880			_ = x4.Args[1]
 24881			if p != x4.Args[0] {
 24882				break
 24883			}
 24884			if mem != x4.Args[1] {
 24885				break
 24886			}
 24887			s5 := o4.Args[1]
 24888			if s5.Op != OpPPC64SLDconst {
 24889				break
 24890			}
 24891			if s5.AuxInt != 16 {
 24892				break
 24893			}
 24894			x5 := s5.Args[0]
 24895			if x5.Op != OpPPC64MOVBZload {
 24896				break
 24897			}
 24898			i5 := x5.AuxInt
 24899			if x5.Aux != s {
 24900				break
 24901			}
 24902			_ = x5.Args[1]
 24903			if p != x5.Args[0] {
 24904				break
 24905			}
 24906			if mem != x5.Args[1] {
 24907				break
 24908			}
 24909			x7 := v.Args[1]
 24910			if x7.Op != OpPPC64MOVBZload {
 24911				break
 24912			}
 24913			i7 := x7.AuxInt
 24914			if x7.Aux != s {
 24915				break
 24916			}
 24917			_ = x7.Args[1]
 24918			if p != x7.Args[0] {
 24919				break
 24920			}
 24921			if mem != x7.Args[1] {
 24922				break
 24923			}
 24924			if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 24925				break
 24926			}
 24927			b = mergePoint(b, x3, x4, x5, x6, x7)
 24928			v0 := b.NewValue0(x7.Pos, OpPPC64MOVDBRload, t)
 24929			v.reset(OpCopy)
 24930			v.AddArg(v0)
 24931			v1 := b.NewValue0(x7.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 24932			v1.AuxInt = i0
 24933			v1.Aux = s
 24934			v1.AddArg(p)
 24935			v0.AddArg(v1)
 24936			v0.AddArg(mem)
 24937			return true
 24938		}
 24939		// match: (OR <t> o5:(OR <t> o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]))) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])) x7:(MOVBZload [i7] {s} p mem))
 24940		// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 24941		// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 24942		for {
 24943			t := v.Type
 24944			_ = v.Args[1]
 24945			o5 := v.Args[0]
 24946			if o5.Op != OpPPC64OR {
 24947				break
 24948			}
 24949			if o5.Type != t {
 24950				break
 24951			}
 24952			_ = o5.Args[1]
 24953			o4 := o5.Args[0]
 24954			if o4.Op != OpPPC64OR {
 24955				break
 24956			}
 24957			if o4.Type != t {
 24958				break
 24959			}
 24960			_ = o4.Args[1]
 24961			s5 := o4.Args[0]
 24962			if s5.Op != OpPPC64SLDconst {
 24963				break
 24964			}
 24965			if s5.AuxInt != 16 {
 24966				break
 24967			}
 24968			x5 := s5.Args[0]
 24969			if x5.Op != OpPPC64MOVBZload {
 24970				break
 24971			}
 24972			i5 := x5.AuxInt
 24973			s := x5.Aux
 24974			mem := x5.Args[1]
 24975			p := x5.Args[0]
 24976			o3 := o4.Args[1]
 24977			if o3.Op != OpPPC64OR {
 24978				break
 24979			}
 24980			if o3.Type != t {
 24981				break
 24982			}
 24983			_ = o3.Args[1]
 24984			s4 := o3.Args[0]
 24985			if s4.Op != OpPPC64SLDconst {
 24986				break
 24987			}
 24988			if s4.AuxInt != 24 {
 24989				break
 24990			}
 24991			x4 := s4.Args[0]
 24992			if x4.Op != OpPPC64MOVBZload {
 24993				break
 24994			}
 24995			i4 := x4.AuxInt
 24996			if x4.Aux != s {
 24997				break
 24998			}
 24999			_ = x4.Args[1]
 25000			if p != x4.Args[0] {
 25001				break
 25002			}
 25003			if mem != x4.Args[1] {
 25004				break
 25005			}
 25006			s0 := o3.Args[1]
 25007			if s0.Op != OpPPC64SLDconst {
 25008				break
 25009			}
 25010			if s0.AuxInt != 32 {
 25011				break
 25012			}
 25013			x3 := s0.Args[0]
 25014			if x3.Op != OpPPC64MOVWBRload {
 25015				break
 25016			}
 25017			if x3.Type != t {
 25018				break
 25019			}
 25020			_ = x3.Args[1]
 25021			x3_0 := x3.Args[0]
 25022			if x3_0.Op != OpPPC64MOVDaddr {
 25023				break
 25024			}
 25025			if x3_0.Type != typ.Uintptr {
 25026				break
 25027			}
 25028			i0 := x3_0.AuxInt
 25029			if x3_0.Aux != s {
 25030				break
 25031			}
 25032			if p != x3_0.Args[0] {
 25033				break
 25034			}
 25035			if mem != x3.Args[1] {
 25036				break
 25037			}
 25038			s6 := o5.Args[1]
 25039			if s6.Op != OpPPC64SLDconst {
 25040				break
 25041			}
 25042			if s6.AuxInt != 8 {
 25043				break
 25044			}
 25045			x6 := s6.Args[0]
 25046			if x6.Op != OpPPC64MOVBZload {
 25047				break
 25048			}
 25049			i6 := x6.AuxInt
 25050			if x6.Aux != s {
 25051				break
 25052			}
 25053			_ = x6.Args[1]
 25054			if p != x6.Args[0] {
 25055				break
 25056			}
 25057			if mem != x6.Args[1] {
 25058				break
 25059			}
 25060			x7 := v.Args[1]
 25061			if x7.Op != OpPPC64MOVBZload {
 25062				break
 25063			}
 25064			i7 := x7.AuxInt
 25065			if x7.Aux != s {
 25066				break
 25067			}
 25068			_ = x7.Args[1]
 25069			if p != x7.Args[0] {
 25070				break
 25071			}
 25072			if mem != x7.Args[1] {
 25073				break
 25074			}
 25075			if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 25076				break
 25077			}
 25078			b = mergePoint(b, x3, x4, x5, x6, x7)
 25079			v0 := b.NewValue0(x7.Pos, OpPPC64MOVDBRload, t)
 25080			v.reset(OpCopy)
 25081			v.AddArg(v0)
 25082			v1 := b.NewValue0(x7.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 25083			v1.AuxInt = i0
 25084			v1.Aux = s
 25085			v1.AddArg(p)
 25086			v0.AddArg(v1)
 25087			v0.AddArg(mem)
 25088			return true
 25089		}
 25090		// match: (OR <t> o5:(OR <t> o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]))) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])) x7:(MOVBZload [i7] {s} p mem))
 25091		// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 25092		// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 25093		for {
 25094			t := v.Type
 25095			_ = v.Args[1]
 25096			o5 := v.Args[0]
 25097			if o5.Op != OpPPC64OR {
 25098				break
 25099			}
 25100			if o5.Type != t {
 25101				break
 25102			}
 25103			_ = o5.Args[1]
 25104			o4 := o5.Args[0]
 25105			if o4.Op != OpPPC64OR {
 25106				break
 25107			}
 25108			if o4.Type != t {
 25109				break
 25110			}
 25111			_ = o4.Args[1]
 25112			s5 := o4.Args[0]
 25113			if s5.Op != OpPPC64SLDconst {
 25114				break
 25115			}
 25116			if s5.AuxInt != 16 {
 25117				break
 25118			}
 25119			x5 := s5.Args[0]
 25120			if x5.Op != OpPPC64MOVBZload {
 25121				break
 25122			}
 25123			i5 := x5.AuxInt
 25124			s := x5.Aux
 25125			mem := x5.Args[1]
 25126			p := x5.Args[0]
 25127			o3 := o4.Args[1]
 25128			if o3.Op != OpPPC64OR {
 25129				break
 25130			}
 25131			if o3.Type != t {
 25132				break
 25133			}
 25134			_ = o3.Args[1]
 25135			s0 := o3.Args[0]
 25136			if s0.Op != OpPPC64SLDconst {
 25137				break
 25138			}
 25139			if s0.AuxInt != 32 {
 25140				break
 25141			}
 25142			x3 := s0.Args[0]
 25143			if x3.Op != OpPPC64MOVWBRload {
 25144				break
 25145			}
 25146			if x3.Type != t {
 25147				break
 25148			}
 25149			_ = x3.Args[1]
 25150			x3_0 := x3.Args[0]
 25151			if x3_0.Op != OpPPC64MOVDaddr {
 25152				break
 25153			}
 25154			if x3_0.Type != typ.Uintptr {
 25155				break
 25156			}
 25157			i0 := x3_0.AuxInt
 25158			if x3_0.Aux != s {
 25159				break
 25160			}
 25161			if p != x3_0.Args[0] {
 25162				break
 25163			}
 25164			if mem != x3.Args[1] {
 25165				break
 25166			}
 25167			s4 := o3.Args[1]
 25168			if s4.Op != OpPPC64SLDconst {
 25169				break
 25170			}
 25171			if s4.AuxInt != 24 {
 25172				break
 25173			}
 25174			x4 := s4.Args[0]
 25175			if x4.Op != OpPPC64MOVBZload {
 25176				break
 25177			}
 25178			i4 := x4.AuxInt
 25179			if x4.Aux != s {
 25180				break
 25181			}
 25182			_ = x4.Args[1]
 25183			if p != x4.Args[0] {
 25184				break
 25185			}
 25186			if mem != x4.Args[1] {
 25187				break
 25188			}
 25189			s6 := o5.Args[1]
 25190			if s6.Op != OpPPC64SLDconst {
 25191				break
 25192			}
 25193			if s6.AuxInt != 8 {
 25194				break
 25195			}
 25196			x6 := s6.Args[0]
 25197			if x6.Op != OpPPC64MOVBZload {
 25198				break
 25199			}
 25200			i6 := x6.AuxInt
 25201			if x6.Aux != s {
 25202				break
 25203			}
 25204			_ = x6.Args[1]
 25205			if p != x6.Args[0] {
 25206				break
 25207			}
 25208			if mem != x6.Args[1] {
 25209				break
 25210			}
 25211			x7 := v.Args[1]
 25212			if x7.Op != OpPPC64MOVBZload {
 25213				break
 25214			}
 25215			i7 := x7.AuxInt
 25216			if x7.Aux != s {
 25217				break
 25218			}
 25219			_ = x7.Args[1]
 25220			if p != x7.Args[0] {
 25221				break
 25222			}
 25223			if mem != x7.Args[1] {
 25224				break
 25225			}
 25226			if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 25227				break
 25228			}
 25229			b = mergePoint(b, x3, x4, x5, x6, x7)
 25230			v0 := b.NewValue0(x7.Pos, OpPPC64MOVDBRload, t)
 25231			v.reset(OpCopy)
 25232			v.AddArg(v0)
 25233			v1 := b.NewValue0(x7.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 25234			v1.AuxInt = i0
 25235			v1.Aux = s
 25236			v1.AddArg(p)
 25237			v0.AddArg(v1)
 25238			v0.AddArg(mem)
 25239			return true
 25240		}
 25241		// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16])) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])) x7:(MOVBZload [i7] {s} p mem))
 25242		// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 25243		// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 25244		for {
 25245			t := v.Type
 25246			_ = v.Args[1]
 25247			o5 := v.Args[0]
 25248			if o5.Op != OpPPC64OR {
 25249				break
 25250			}
 25251			if o5.Type != t {
 25252				break
 25253			}
 25254			_ = o5.Args[1]
 25255			o4 := o5.Args[0]
 25256			if o4.Op != OpPPC64OR {
 25257				break
 25258			}
 25259			if o4.Type != t {
 25260				break
 25261			}
 25262			_ = o4.Args[1]
 25263			o3 := o4.Args[0]
 25264			if o3.Op != OpPPC64OR {
 25265				break
 25266			}
 25267			if o3.Type != t {
 25268				break
 25269			}
 25270			_ = o3.Args[1]
 25271			s4 := o3.Args[0]
 25272			if s4.Op != OpPPC64SLDconst {
 25273				break
 25274			}
 25275			if s4.AuxInt != 24 {
 25276				break
 25277			}
 25278			x4 := s4.Args[0]
 25279			if x4.Op != OpPPC64MOVBZload {
 25280				break
 25281			}
 25282			i4 := x4.AuxInt
 25283			s := x4.Aux
 25284			mem := x4.Args[1]
 25285			p := x4.Args[0]
 25286			s0 := o3.Args[1]
 25287			if s0.Op != OpPPC64SLDconst {
 25288				break
 25289			}
 25290			if s0.AuxInt != 32 {
 25291				break
 25292			}
 25293			x3 := s0.Args[0]
 25294			if x3.Op != OpPPC64MOVWBRload {
 25295				break
 25296			}
 25297			if x3.Type != t {
 25298				break
 25299			}
 25300			_ = x3.Args[1]
 25301			x3_0 := x3.Args[0]
 25302			if x3_0.Op != OpPPC64MOVDaddr {
 25303				break
 25304			}
 25305			if x3_0.Type != typ.Uintptr {
 25306				break
 25307			}
 25308			i0 := x3_0.AuxInt
 25309			if x3_0.Aux != s {
 25310				break
 25311			}
 25312			if p != x3_0.Args[0] {
 25313				break
 25314			}
 25315			if mem != x3.Args[1] {
 25316				break
 25317			}
 25318			s5 := o4.Args[1]
 25319			if s5.Op != OpPPC64SLDconst {
 25320				break
 25321			}
 25322			if s5.AuxInt != 16 {
 25323				break
 25324			}
 25325			x5 := s5.Args[0]
 25326			if x5.Op != OpPPC64MOVBZload {
 25327				break
 25328			}
 25329			i5 := x5.AuxInt
 25330			if x5.Aux != s {
 25331				break
 25332			}
 25333			_ = x5.Args[1]
 25334			if p != x5.Args[0] {
 25335				break
 25336			}
 25337			if mem != x5.Args[1] {
 25338				break
 25339			}
 25340			s6 := o5.Args[1]
 25341			if s6.Op != OpPPC64SLDconst {
 25342				break
 25343			}
 25344			if s6.AuxInt != 8 {
 25345				break
 25346			}
 25347			x6 := s6.Args[0]
 25348			if x6.Op != OpPPC64MOVBZload {
 25349				break
 25350			}
 25351			i6 := x6.AuxInt
 25352			if x6.Aux != s {
 25353				break
 25354			}
 25355			_ = x6.Args[1]
 25356			if p != x6.Args[0] {
 25357				break
 25358			}
 25359			if mem != x6.Args[1] {
 25360				break
 25361			}
 25362			x7 := v.Args[1]
 25363			if x7.Op != OpPPC64MOVBZload {
 25364				break
 25365			}
 25366			i7 := x7.AuxInt
 25367			if x7.Aux != s {
 25368				break
 25369			}
 25370			_ = x7.Args[1]
 25371			if p != x7.Args[0] {
 25372				break
 25373			}
 25374			if mem != x7.Args[1] {
 25375				break
 25376			}
 25377			if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 25378				break
 25379			}
 25380			b = mergePoint(b, x3, x4, x5, x6, x7)
 25381			v0 := b.NewValue0(x7.Pos, OpPPC64MOVDBRload, t)
 25382			v.reset(OpCopy)
 25383			v.AddArg(v0)
 25384			v1 := b.NewValue0(x7.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 25385			v1.AuxInt = i0
 25386			v1.Aux = s
 25387			v1.AddArg(p)
 25388			v0.AddArg(v1)
 25389			v0.AddArg(mem)
 25390			return true
 25391		}
 25392		// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16])) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])) x7:(MOVBZload [i7] {s} p mem))
 25393		// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
 25394		// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
 25395		for {
 25396			t := v.Type
 25397			_ = v.Args[1]
 25398			o5 := v.Args[0]
 25399			if o5.Op != OpPPC64OR {
 25400				break
 25401			}
 25402			if o5.Type != t {
 25403				break
 25404			}
 25405			_ = o5.Args[1]
 25406			o4 := o5.Args[0]
 25407			if o4.Op != OpPPC64OR {
 25408				break
 25409			}
 25410			if o4.Type != t {
 25411				break
 25412			}
 25413			_ = o4.Args[1]
 25414			o3 := o4.Args[0]
 25415			if o3.Op != OpPPC64OR {
 25416				break
 25417			}
 25418			if o3.Type != t {
 25419				break
 25420			}
 25421			_ = o3.Args[1]
 25422			s0 := o3.Args[0]
 25423			if s0.Op != OpPPC64SLDconst {
 25424				break
 25425			}
 25426			if s0.AuxInt != 32 {
 25427				break
 25428			}
 25429			x3 := s0.Args[0]
 25430			if x3.Op != OpPPC64MOVWBRload {
 25431				break
 25432			}
 25433			if x3.Type != t {
 25434				break
 25435			}
 25436			mem := x3.Args[1]
 25437			x3_0 := x3.Args[0]
 25438			if x3_0.Op != OpPPC64MOVDaddr {
 25439				break
 25440			}
 25441			if x3_0.Type != typ.Uintptr {
 25442				break
 25443			}
 25444			i0 := x3_0.AuxInt
 25445			s := x3_0.Aux
 25446			p := x3_0.Args[0]
 25447			s4 := o3.Args[1]
 25448			if s4.Op != OpPPC64SLDconst {
 25449				break
 25450			}
 25451			if s4.AuxInt != 24 {
 25452				break
 25453			}
 25454			x4 := s4.Args[0]
 25455			if x4.Op != OpPPC64MOVBZload {
 25456				break
 25457			}
 25458			i4 := x4.AuxInt
 25459			if x4.Aux != s {
 25460				break
 25461			}
 25462			_ = x4.Args[1]
 25463			if p != x4.Args[0] {
 25464				break
 25465			}
 25466			if mem != x4.Args[1] {
 25467				break
 25468			}
 25469			s5 := o4.Args[1]
 25470			if s5.Op != OpPPC64SLDconst {
 25471				break
 25472			}
 25473			if s5.AuxInt != 16 {
 25474				break
 25475			}
 25476			x5 := s5.Args[0]
 25477			if x5.Op != OpPPC64MOVBZload {
 25478				break
 25479			}
 25480			i5 := x5.AuxInt
 25481			if x5.Aux != s {
 25482				break
 25483			}
 25484			_ = x5.Args[1]
 25485			if p != x5.Args[0] {
 25486				break
 25487			}
 25488			if mem != x5.Args[1] {
 25489				break
 25490			}
 25491			s6 := o5.Args[1]
 25492			if s6.Op != OpPPC64SLDconst {
 25493				break
 25494			}
 25495			if s6.AuxInt != 8 {
 25496				break
 25497			}
 25498			x6 := s6.Args[0]
 25499			if x6.Op != OpPPC64MOVBZload {
 25500				break
 25501			}
 25502			i6 := x6.AuxInt
 25503			if x6.Aux != s {
 25504				break
 25505			}
 25506			_ = x6.Args[1]
 25507			if p != x6.Args[0] {
 25508				break
 25509			}
 25510			if mem != x6.Args[1] {
 25511				break
 25512			}
 25513			x7 := v.Args[1]
 25514			if x7.Op != OpPPC64MOVBZload {
 25515				break
 25516			}
 25517			i7 := x7.AuxInt
 25518			if x7.Aux != s {
 25519				break
 25520			}
 25521			_ = x7.Args[1]
 25522			if p != x7.Args[0] {
 25523				break
 25524			}
 25525			if mem != x7.Args[1] {
 25526				break
 25527			}
 25528			if !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
 25529				break
 25530			}
 25531			b = mergePoint(b, x3, x4, x5, x6, x7)
 25532			v0 := b.NewValue0(x7.Pos, OpPPC64MOVDBRload, t)
 25533			v.reset(OpCopy)
 25534			v.AddArg(v0)
 25535			v1 := b.NewValue0(x7.Pos, OpPPC64MOVDaddr, typ.Uintptr)
 25536			v1.AuxInt = i0
 25537			v1.Aux = s
 25538			v1.AddArg(p)
 25539			v0.AddArg(v1)
 25540			v0.AddArg(mem)
 25541			return true
 25542		}
 25543		return false
 25544	}
 25545	func rewriteValuePPC64_OpPPC64ORN_0(v *Value) bool {
 25546		// match: (ORN x (MOVDconst [-1]))
 25547		// cond:
 25548		// result: x
 25549		for {
 25550			_ = v.Args[1]
 25551			x := v.Args[0]
 25552			v_1 := v.Args[1]
 25553			if v_1.Op != OpPPC64MOVDconst {
 25554				break
 25555			}
 25556			if v_1.AuxInt != -1 {
 25557				break
 25558			}
 25559			v.reset(OpCopy)
 25560			v.Type = x.Type
 25561			v.AddArg(x)
 25562			return true
 25563		}
 25564		return false
 25565	}
 25566	func rewriteValuePPC64_OpPPC64ORconst_0(v *Value) bool {
 25567		// match: (ORconst [c] (ORconst [d] x))
 25568		// cond:
 25569		// result: (ORconst [c|d] x)
 25570		for {
 25571			c := v.AuxInt
 25572			v_0 := v.Args[0]
 25573			if v_0.Op != OpPPC64ORconst {
 25574				break
 25575			}
 25576			d := v_0.AuxInt
 25577			x := v_0.Args[0]
 25578			v.reset(OpPPC64ORconst)
 25579			v.AuxInt = c | d
 25580			v.AddArg(x)
 25581			return true
 25582		}
 25583		// match: (ORconst [-1] _)
 25584		// cond:
 25585		// result: (MOVDconst [-1])
 25586		for {
 25587			if v.AuxInt != -1 {
 25588				break
 25589			}
 25590			v.reset(OpPPC64MOVDconst)
 25591			v.AuxInt = -1
 25592			return true
 25593		}
 25594		// match: (ORconst [0] x)
 25595		// cond:
 25596		// result: x
 25597		for {
 25598			if v.AuxInt != 0 {
 25599				break
 25600			}
 25601			x := v.Args[0]
 25602			v.reset(OpCopy)
 25603			v.Type = x.Type
 25604			v.AddArg(x)
 25605			return true
 25606		}
 25607		return false
 25608	}
 25609	func rewriteValuePPC64_OpPPC64ROTL_0(v *Value) bool {
 25610		// match: (ROTL x (MOVDconst [c]))
 25611		// cond:
 25612		// result: (ROTLconst x [c&63])
 25613		for {
 25614			_ = v.Args[1]
 25615			x := v.Args[0]
 25616			v_1 := v.Args[1]
 25617			if v_1.Op != OpPPC64MOVDconst {
 25618				break
 25619			}
 25620			c := v_1.AuxInt
 25621			v.reset(OpPPC64ROTLconst)
 25622			v.AuxInt = c & 63
 25623			v.AddArg(x)
 25624			return true
 25625		}
 25626		return false
 25627	}
 25628	func rewriteValuePPC64_OpPPC64ROTLW_0(v *Value) bool {
 25629		// match: (ROTLW x (MOVDconst [c]))
 25630		// cond:
 25631		// result: (ROTLWconst x [c&31])
 25632		for {
 25633			_ = v.Args[1]
 25634			x := v.Args[0]
 25635			v_1 := v.Args[1]
 25636			if v_1.Op != OpPPC64MOVDconst {
 25637				break
 25638			}
 25639			c := v_1.AuxInt
 25640			v.reset(OpPPC64ROTLWconst)
 25641			v.AuxInt = c & 31
 25642			v.AddArg(x)
 25643			return true
 25644		}
 25645		return false
 25646	}
 25647	func rewriteValuePPC64_OpPPC64SUB_0(v *Value) bool {
 25648		// match: (SUB x (MOVDconst [c]))
 25649		// cond: is32Bit(-c)
 25650		// result: (ADDconst [-c] x)
 25651		for {
 25652			_ = v.Args[1]
 25653			x := v.Args[0]
 25654			v_1 := v.Args[1]
 25655			if v_1.Op != OpPPC64MOVDconst {
 25656				break
 25657			}
 25658			c := v_1.AuxInt
 25659			if !(is32Bit(-c)) {
 25660				break
 25661			}
 25662			v.reset(OpPPC64ADDconst)
 25663			v.AuxInt = -c
 25664			v.AddArg(x)
 25665			return true
 25666		}
 25667		return false
 25668	}
 25669	func rewriteValuePPC64_OpPPC64XOR_0(v *Value) bool {
 25670		b := v.Block
 25671		typ := &b.Func.Config.Types
 25672		// match: (XOR (SLDconst x [c]) (SRDconst x [d]))
 25673		// cond: d == 64-c
 25674		// result: (ROTLconst [c] x)
 25675		for {
 25676			_ = v.Args[1]
 25677			v_0 := v.Args[0]
 25678			if v_0.Op != OpPPC64SLDconst {
 25679				break
 25680			}
 25681			c := v_0.AuxInt
 25682			x := v_0.Args[0]
 25683			v_1 := v.Args[1]
 25684			if v_1.Op != OpPPC64SRDconst {
 25685				break
 25686			}
 25687			d := v_1.AuxInt
 25688			if x != v_1.Args[0] {
 25689				break
 25690			}
 25691			if !(d == 64-c) {
 25692				break
 25693			}
 25694			v.reset(OpPPC64ROTLconst)
 25695			v.AuxInt = c
 25696			v.AddArg(x)
 25697			return true
 25698		}
 25699		// match: (XOR (SRDconst x [d]) (SLDconst x [c]))
 25700		// cond: d == 64-c
 25701		// result: (ROTLconst [c] x)
 25702		for {
 25703			_ = v.Args[1]
 25704			v_0 := v.Args[0]
 25705			if v_0.Op != OpPPC64SRDconst {
 25706				break
 25707			}
 25708			d := v_0.AuxInt
 25709			x := v_0.Args[0]
 25710			v_1 := v.Args[1]
 25711			if v_1.Op != OpPPC64SLDconst {
 25712				break
 25713			}
 25714			c := v_1.AuxInt
 25715			if x != v_1.Args[0] {
 25716				break
 25717			}
 25718			if !(d == 64-c) {
 25719				break
 25720			}
 25721			v.reset(OpPPC64ROTLconst)
 25722			v.AuxInt = c
 25723			v.AddArg(x)
 25724			return true
 25725		}
 25726		// match: (XOR (SLWconst x [c]) (SRWconst x [d]))
 25727		// cond: d == 32-c
 25728		// result: (ROTLWconst [c] x)
 25729		for {
 25730			_ = v.Args[1]
 25731			v_0 := v.Args[0]
 25732			if v_0.Op != OpPPC64SLWconst {
 25733				break
 25734			}
 25735			c := v_0.AuxInt
 25736			x := v_0.Args[0]
 25737			v_1 := v.Args[1]
 25738			if v_1.Op != OpPPC64SRWconst {
 25739				break
 25740			}
 25741			d := v_1.AuxInt
 25742			if x != v_1.Args[0] {
 25743				break
 25744			}
 25745			if !(d == 32-c) {
 25746				break
 25747			}
 25748			v.reset(OpPPC64ROTLWconst)
 25749			v.AuxInt = c
 25750			v.AddArg(x)
 25751			return true
 25752		}
 25753		// match: (XOR (SRWconst x [d]) (SLWconst x [c]))
 25754		// cond: d == 32-c
 25755		// result: (ROTLWconst [c] x)
 25756		for {
 25757			_ = v.Args[1]
 25758			v_0 := v.Args[0]
 25759			if v_0.Op != OpPPC64SRWconst {
 25760				break
 25761			}
 25762			d := v_0.AuxInt
 25763			x := v_0.Args[0]
 25764			v_1 := v.Args[1]
 25765			if v_1.Op != OpPPC64SLWconst {
 25766				break
 25767			}
 25768			c := v_1.AuxInt
 25769			if x != v_1.Args[0] {
 25770				break
 25771			}
 25772			if !(d == 32-c) {
 25773				break
 25774			}
 25775			v.reset(OpPPC64ROTLWconst)
 25776			v.AuxInt = c
 25777			v.AddArg(x)
 25778			return true
 25779		}
 25780		// match: (XOR (SLD x (ANDconst <typ.Int64> [63] y)) (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y))))
 25781		// cond:
 25782		// result: (ROTL x y)
 25783		for {
 25784			_ = v.Args[1]
 25785			v_0 := v.Args[0]
 25786			if v_0.Op != OpPPC64SLD {
 25787				break
 25788			}
 25789			_ = v_0.Args[1]
 25790			x := v_0.Args[0]
 25791			v_0_1 := v_0.Args[1]
 25792			if v_0_1.Op != OpPPC64ANDconst {
 25793				break
 25794			}
 25795			if v_0_1.Type != typ.Int64 {
 25796				break
 25797			}
 25798			if v_0_1.AuxInt != 63 {
 25799				break
 25800			}
 25801			y := v_0_1.Args[0]
 25802			v_1 := v.Args[1]
 25803			if v_1.Op != OpPPC64SRD {
 25804				break
 25805			}
 25806			_ = v_1.Args[1]
 25807			if x != v_1.Args[0] {
 25808				break
 25809			}
 25810			v_1_1 := v_1.Args[1]
 25811			if v_1_1.Op != OpPPC64SUB {
 25812				break
 25813			}
 25814			if v_1_1.Type != typ.UInt {
 25815				break
 25816			}
 25817			_ = v_1_1.Args[1]
 25818			v_1_1_0 := v_1_1.Args[0]
 25819			if v_1_1_0.Op != OpPPC64MOVDconst {
 25820				break
 25821			}
 25822			if v_1_1_0.AuxInt != 64 {
 25823				break
 25824			}
 25825			v_1_1_1 := v_1_1.Args[1]
 25826			if v_1_1_1.Op != OpPPC64ANDconst {
 25827				break
 25828			}
 25829			if v_1_1_1.Type != typ.UInt {
 25830				break
 25831			}
 25832			if v_1_1_1.AuxInt != 63 {
 25833				break
 25834			}
 25835			if y != v_1_1_1.Args[0] {
 25836				break
 25837			}
 25838			v.reset(OpPPC64ROTL)
 25839			v.AddArg(x)
 25840			v.AddArg(y)
 25841			return true
 25842		}
 25843		// match: (XOR (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y))) (SLD x (ANDconst <typ.Int64> [63] y)))
 25844		// cond:
 25845		// result: (ROTL x y)
 25846		for {
 25847			_ = v.Args[1]
 25848			v_0 := v.Args[0]
 25849			if v_0.Op != OpPPC64SRD {
 25850				break
 25851			}
 25852			_ = v_0.Args[1]
 25853			x := v_0.Args[0]
 25854			v_0_1 := v_0.Args[1]
 25855			if v_0_1.Op != OpPPC64SUB {
 25856				break
 25857			}
 25858			if v_0_1.Type != typ.UInt {
 25859				break
 25860			}
 25861			_ = v_0_1.Args[1]
 25862			v_0_1_0 := v_0_1.Args[0]
 25863			if v_0_1_0.Op != OpPPC64MOVDconst {
 25864				break
 25865			}
 25866			if v_0_1_0.AuxInt != 64 {
 25867				break
 25868			}
 25869			v_0_1_1 := v_0_1.Args[1]
 25870			if v_0_1_1.Op != OpPPC64ANDconst {
 25871				break
 25872			}
 25873			if v_0_1_1.Type != typ.UInt {
 25874				break
 25875			}
 25876			if v_0_1_1.AuxInt != 63 {
 25877				break
 25878			}
 25879			y := v_0_1_1.Args[0]
 25880			v_1 := v.Args[1]
 25881			if v_1.Op != OpPPC64SLD {
 25882				break
 25883			}
 25884			_ = v_1.Args[1]
 25885			if x != v_1.Args[0] {
 25886				break
 25887			}
 25888			v_1_1 := v_1.Args[1]
 25889			if v_1_1.Op != OpPPC64ANDconst {
 25890				break
 25891			}
 25892			if v_1_1.Type != typ.Int64 {
 25893				break
 25894			}
 25895			if v_1_1.AuxInt != 63 {
 25896				break
 25897			}
 25898			if y != v_1_1.Args[0] {
 25899				break
 25900			}
 25901			v.reset(OpPPC64ROTL)
 25902			v.AddArg(x)
 25903			v.AddArg(y)
 25904			return true
 25905		}
 25906		// match: (XOR (SLW x (ANDconst <typ.Int32> [31] y)) (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y))))
 25907		// cond:
 25908		// result: (ROTLW x y)
 25909		for {
 25910			_ = v.Args[1]
 25911			v_0 := v.Args[0]
 25912			if v_0.Op != OpPPC64SLW {
 25913				break
 25914			}
 25915			_ = v_0.Args[1]
 25916			x := v_0.Args[0]
 25917			v_0_1 := v_0.Args[1]
 25918			if v_0_1.Op != OpPPC64ANDconst {
 25919				break
 25920			}
 25921			if v_0_1.Type != typ.Int32 {
 25922				break
 25923			}
 25924			if v_0_1.AuxInt != 31 {
 25925				break
 25926			}
 25927			y := v_0_1.Args[0]
 25928			v_1 := v.Args[1]
 25929			if v_1.Op != OpPPC64SRW {
 25930				break
 25931			}
 25932			_ = v_1.Args[1]
 25933			if x != v_1.Args[0] {
 25934				break
 25935			}
 25936			v_1_1 := v_1.Args[1]
 25937			if v_1_1.Op != OpPPC64SUB {
 25938				break
 25939			}
 25940			if v_1_1.Type != typ.UInt {
 25941				break
 25942			}
 25943			_ = v_1_1.Args[1]
 25944			v_1_1_0 := v_1_1.Args[0]
 25945			if v_1_1_0.Op != OpPPC64MOVDconst {
 25946				break
 25947			}
 25948			if v_1_1_0.AuxInt != 32 {
 25949				break
 25950			}
 25951			v_1_1_1 := v_1_1.Args[1]
 25952			if v_1_1_1.Op != OpPPC64ANDconst {
 25953				break
 25954			}
 25955			if v_1_1_1.Type != typ.UInt {
 25956				break
 25957			}
 25958			if v_1_1_1.AuxInt != 31 {
 25959				break
 25960			}
 25961			if y != v_1_1_1.Args[0] {
 25962				break
 25963			}
 25964			v.reset(OpPPC64ROTLW)
 25965			v.AddArg(x)
 25966			v.AddArg(y)
 25967			return true
 25968		}
 25969		// match: (XOR (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y))) (SLW x (ANDconst <typ.Int32> [31] y)))
 25970		// cond:
 25971		// result: (ROTLW x y)
 25972		for {
 25973			_ = v.Args[1]
 25974			v_0 := v.Args[0]
 25975			if v_0.Op != OpPPC64SRW {
 25976				break
 25977			}
 25978			_ = v_0.Args[1]
 25979			x := v_0.Args[0]
 25980			v_0_1 := v_0.Args[1]
 25981			if v_0_1.Op != OpPPC64SUB {
 25982				break
 25983			}
 25984			if v_0_1.Type != typ.UInt {
 25985				break
 25986			}
 25987			_ = v_0_1.Args[1]
 25988			v_0_1_0 := v_0_1.Args[0]
 25989			if v_0_1_0.Op != OpPPC64MOVDconst {
 25990				break
 25991			}
 25992			if v_0_1_0.AuxInt != 32 {
 25993				break
 25994			}
 25995			v_0_1_1 := v_0_1.Args[1]
 25996			if v_0_1_1.Op != OpPPC64ANDconst {
 25997				break
 25998			}
 25999			if v_0_1_1.Type != typ.UInt {
 26000				break
 26001			}
 26002			if v_0_1_1.AuxInt != 31 {
 26003				break
 26004			}
 26005			y := v_0_1_1.Args[0]
 26006			v_1 := v.Args[1]
 26007			if v_1.Op != OpPPC64SLW {
 26008				break
 26009			}
 26010			_ = v_1.Args[1]
 26011			if x != v_1.Args[0] {
 26012				break
 26013			}
 26014			v_1_1 := v_1.Args[1]
 26015			if v_1_1.Op != OpPPC64ANDconst {
 26016				break
 26017			}
 26018			if v_1_1.Type != typ.Int32 {
 26019				break
 26020			}
 26021			if v_1_1.AuxInt != 31 {
 26022				break
 26023			}
 26024			if y != v_1_1.Args[0] {
 26025				break
 26026			}
 26027			v.reset(OpPPC64ROTLW)
 26028			v.AddArg(x)
 26029			v.AddArg(y)
 26030			return true
 26031		}
 26032		// match: (XOR (MOVDconst [c]) (MOVDconst [d]))
 26033		// cond:
 26034		// result: (MOVDconst [c^d])
 26035		for {
 26036			_ = v.Args[1]
 26037			v_0 := v.Args[0]
 26038			if v_0.Op != OpPPC64MOVDconst {
 26039				break
 26040			}
 26041			c := v_0.AuxInt
 26042			v_1 := v.Args[1]
 26043			if v_1.Op != OpPPC64MOVDconst {
 26044				break
 26045			}
 26046			d := v_1.AuxInt
 26047			v.reset(OpPPC64MOVDconst)
 26048			v.AuxInt = c ^ d
 26049			return true
 26050		}
 26051		// match: (XOR (MOVDconst [d]) (MOVDconst [c]))
 26052		// cond:
 26053		// result: (MOVDconst [c^d])
 26054		for {
 26055			_ = v.Args[1]
 26056			v_0 := v.Args[0]
 26057			if v_0.Op != OpPPC64MOVDconst {
 26058				break
 26059			}
 26060			d := v_0.AuxInt
 26061			v_1 := v.Args[1]
 26062			if v_1.Op != OpPPC64MOVDconst {
 26063				break
 26064			}
 26065			c := v_1.AuxInt
 26066			v.reset(OpPPC64MOVDconst)
 26067			v.AuxInt = c ^ d
 26068			return true
 26069		}
 26070		return false
 26071	}
 26072	func rewriteValuePPC64_OpPPC64XOR_10(v *Value) bool {
 26073		// match: (XOR x (MOVDconst [c]))
 26074		// cond: isU32Bit(c)
 26075		// result: (XORconst [c] x)
 26076		for {
 26077			_ = v.Args[1]
 26078			x := v.Args[0]
 26079			v_1 := v.Args[1]
 26080			if v_1.Op != OpPPC64MOVDconst {
 26081				break
 26082			}
 26083			c := v_1.AuxInt
 26084			if !(isU32Bit(c)) {
 26085				break
 26086			}
 26087			v.reset(OpPPC64XORconst)
 26088			v.AuxInt = c
 26089			v.AddArg(x)
 26090			return true
 26091		}
 26092		// match: (XOR (MOVDconst [c]) x)
 26093		// cond: isU32Bit(c)
 26094		// result: (XORconst [c] x)
 26095		for {
 26096			x := v.Args[1]
 26097			v_0 := v.Args[0]
 26098			if v_0.Op != OpPPC64MOVDconst {
 26099				break
 26100			}
 26101			c := v_0.AuxInt
 26102			if !(isU32Bit(c)) {
 26103				break
 26104			}
 26105			v.reset(OpPPC64XORconst)
 26106			v.AuxInt = c
 26107			v.AddArg(x)
 26108			return true
 26109		}
 26110		return false
 26111	}
 26112	func rewriteValuePPC64_OpPPC64XORconst_0(v *Value) bool {
 26113		// match: (XORconst [c] (XORconst [d] x))
 26114		// cond:
 26115		// result: (XORconst [c^d] x)
 26116		for {
 26117			c := v.AuxInt
 26118			v_0 := v.Args[0]
 26119			if v_0.Op != OpPPC64XORconst {
 26120				break
 26121			}
 26122			d := v_0.AuxInt
 26123			x := v_0.Args[0]
 26124			v.reset(OpPPC64XORconst)
 26125			v.AuxInt = c ^ d
 26126			v.AddArg(x)
 26127			return true
 26128		}
 26129		// match: (XORconst [0] x)
 26130		// cond:
 26131		// result: x
 26132		for {
 26133			if v.AuxInt != 0 {
 26134				break
 26135			}
 26136			x := v.Args[0]
 26137			v.reset(OpCopy)
 26138			v.Type = x.Type
 26139			v.AddArg(x)
 26140			return true
 26141		}
 26142		return false
 26143	}
 26144	func rewriteValuePPC64_OpPanicBounds_0(v *Value) bool {
 26145		// match: (PanicBounds [kind] x y mem)
 26146		// cond: boundsABI(kind) == 0
 26147		// result: (LoweredPanicBoundsA [kind] x y mem)
 26148		for {
 26149			kind := v.AuxInt
 26150			mem := v.Args[2]
 26151			x := v.Args[0]
 26152			y := v.Args[1]
 26153			if !(boundsABI(kind) == 0) {
 26154				break
 26155			}
 26156			v.reset(OpPPC64LoweredPanicBoundsA)
 26157			v.AuxInt = kind
 26158			v.AddArg(x)
 26159			v.AddArg(y)
 26160			v.AddArg(mem)
 26161			return true
 26162		}
 26163		// match: (PanicBounds [kind] x y mem)
 26164		// cond: boundsABI(kind) == 1
 26165		// result: (LoweredPanicBoundsB [kind] x y mem)
 26166		for {
 26167			kind := v.AuxInt
 26168			mem := v.Args[2]
 26169			x := v.Args[0]
 26170			y := v.Args[1]
 26171			if !(boundsABI(kind) == 1) {
 26172				break
 26173			}
 26174			v.reset(OpPPC64LoweredPanicBoundsB)
 26175			v.AuxInt = kind
 26176			v.AddArg(x)
 26177			v.AddArg(y)
 26178			v.AddArg(mem)
 26179			return true
 26180		}
 26181		// match: (PanicBounds [kind] x y mem)
 26182		// cond: boundsABI(kind) == 2
 26183		// result: (LoweredPanicBoundsC [kind] x y mem)
 26184		for {
 26185			kind := v.AuxInt
 26186			mem := v.Args[2]
 26187			x := v.Args[0]
 26188			y := v.Args[1]
 26189			if !(boundsABI(kind) == 2) {
 26190				break
 26191			}
 26192			v.reset(OpPPC64LoweredPanicBoundsC)
 26193			v.AuxInt = kind
 26194			v.AddArg(x)
 26195			v.AddArg(y)
 26196			v.AddArg(mem)
 26197			return true
 26198		}
 26199		return false
 26200	}
 26201	func rewriteValuePPC64_OpPopCount16_0(v *Value) bool {
 26202		b := v.Block
 26203		typ := &b.Func.Config.Types
 26204		// match: (PopCount16 x)
 26205		// cond:
 26206		// result: (POPCNTW (MOVHZreg x))
 26207		for {
 26208			x := v.Args[0]
 26209			v.reset(OpPPC64POPCNTW)
 26210			v0 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
 26211			v0.AddArg(x)
 26212			v.AddArg(v0)
 26213			return true
 26214		}
 26215	}
 26216	func rewriteValuePPC64_OpPopCount32_0(v *Value) bool {
 26217		b := v.Block
 26218		typ := &b.Func.Config.Types
 26219		// match: (PopCount32 x)
 26220		// cond:
 26221		// result: (POPCNTW (MOVWZreg x))
 26222		for {
 26223			x := v.Args[0]
 26224			v.reset(OpPPC64POPCNTW)
 26225			v0 := b.NewValue0(v.Pos, OpPPC64MOVWZreg, typ.Int64)
 26226			v0.AddArg(x)
 26227			v.AddArg(v0)
 26228			return true
 26229		}
 26230	}
 26231	func rewriteValuePPC64_OpPopCount64_0(v *Value) bool {
 26232		// match: (PopCount64 x)
 26233		// cond:
 26234		// result: (POPCNTD x)
 26235		for {
 26236			x := v.Args[0]
 26237			v.reset(OpPPC64POPCNTD)
 26238			v.AddArg(x)
 26239			return true
 26240		}
 26241	}
 26242	func rewriteValuePPC64_OpPopCount8_0(v *Value) bool {
 26243		b := v.Block
 26244		typ := &b.Func.Config.Types
 26245		// match: (PopCount8 x)
 26246		// cond:
 26247		// result: (POPCNTB (MOVBZreg x))
 26248		for {
 26249			x := v.Args[0]
 26250			v.reset(OpPPC64POPCNTB)
 26251			v0 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
 26252			v0.AddArg(x)
 26253			v.AddArg(v0)
 26254			return true
 26255		}
 26256	}
 26257	func rewriteValuePPC64_OpRotateLeft16_0(v *Value) bool {
 26258		b := v.Block
 26259		typ := &b.Func.Config.Types
 26260		// match: (RotateLeft16 <t> x (MOVDconst [c]))
 26261		// cond:
 26262		// result: (Or16 (Lsh16x64 <t> x (MOVDconst [c&15])) (Rsh16Ux64 <t> x (MOVDconst [-c&15])))
 26263		for {
 26264			t := v.Type
 26265			_ = v.Args[1]
 26266			x := v.Args[0]
 26267			v_1 := v.Args[1]
 26268			if v_1.Op != OpPPC64MOVDconst {
 26269				break
 26270			}
 26271			c := v_1.AuxInt
 26272			v.reset(OpOr16)
 26273			v0 := b.NewValue0(v.Pos, OpLsh16x64, t)
 26274			v0.AddArg(x)
 26275			v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 26276			v1.AuxInt = c & 15
 26277			v0.AddArg(v1)
 26278			v.AddArg(v0)
 26279			v2 := b.NewValue0(v.Pos, OpRsh16Ux64, t)
 26280			v2.AddArg(x)
 26281			v3 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 26282			v3.AuxInt = -c & 15
 26283			v2.AddArg(v3)
 26284			v.AddArg(v2)
 26285			return true
 26286		}
 26287		return false
 26288	}
 26289	func rewriteValuePPC64_OpRotateLeft32_0(v *Value) bool {
 26290		// match: (RotateLeft32 x (MOVDconst [c]))
 26291		// cond:
 26292		// result: (ROTLWconst [c&31] x)
 26293		for {
 26294			_ = v.Args[1]
 26295			x := v.Args[0]
 26296			v_1 := v.Args[1]
 26297			if v_1.Op != OpPPC64MOVDconst {
 26298				break
 26299			}
 26300			c := v_1.AuxInt
 26301			v.reset(OpPPC64ROTLWconst)
 26302			v.AuxInt = c & 31
 26303			v.AddArg(x)
 26304			return true
 26305		}
 26306		// match: (RotateLeft32 x y)
 26307		// cond:
 26308		// result: (ROTLW x y)
 26309		for {
 26310			y := v.Args[1]
 26311			x := v.Args[0]
 26312			v.reset(OpPPC64ROTLW)
 26313			v.AddArg(x)
 26314			v.AddArg(y)
 26315			return true
 26316		}
 26317	}
 26318	func rewriteValuePPC64_OpRotateLeft64_0(v *Value) bool {
 26319		// match: (RotateLeft64 x (MOVDconst [c]))
 26320		// cond:
 26321		// result: (ROTLconst [c&63] x)
 26322		for {
 26323			_ = v.Args[1]
 26324			x := v.Args[0]
 26325			v_1 := v.Args[1]
 26326			if v_1.Op != OpPPC64MOVDconst {
 26327				break
 26328			}
 26329			c := v_1.AuxInt
 26330			v.reset(OpPPC64ROTLconst)
 26331			v.AuxInt = c & 63
 26332			v.AddArg(x)
 26333			return true
 26334		}
 26335		// match: (RotateLeft64 x y)
 26336		// cond:
 26337		// result: (ROTL x y)
 26338		for {
 26339			y := v.Args[1]
 26340			x := v.Args[0]
 26341			v.reset(OpPPC64ROTL)
 26342			v.AddArg(x)
 26343			v.AddArg(y)
 26344			return true
 26345		}
 26346	}
 26347	func rewriteValuePPC64_OpRotateLeft8_0(v *Value) bool {
 26348		b := v.Block
 26349		typ := &b.Func.Config.Types
 26350		// match: (RotateLeft8 <t> x (MOVDconst [c]))
 26351		// cond:
 26352		// result: (Or8 (Lsh8x64 <t> x (MOVDconst [c&7])) (Rsh8Ux64 <t> x (MOVDconst [-c&7])))
 26353		for {
 26354			t := v.Type
 26355			_ = v.Args[1]
 26356			x := v.Args[0]
 26357			v_1 := v.Args[1]
 26358			if v_1.Op != OpPPC64MOVDconst {
 26359				break
 26360			}
 26361			c := v_1.AuxInt
 26362			v.reset(OpOr8)
 26363			v0 := b.NewValue0(v.Pos, OpLsh8x64, t)
 26364			v0.AddArg(x)
 26365			v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 26366			v1.AuxInt = c & 7
 26367			v0.AddArg(v1)
 26368			v.AddArg(v0)
 26369			v2 := b.NewValue0(v.Pos, OpRsh8Ux64, t)
 26370			v2.AddArg(x)
 26371			v3 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 26372			v3.AuxInt = -c & 7
 26373			v2.AddArg(v3)
 26374			v.AddArg(v2)
 26375			return true
 26376		}
 26377		return false
 26378	}
 26379	func rewriteValuePPC64_OpRound_0(v *Value) bool {
 26380		// match: (Round x)
 26381		// cond:
 26382		// result: (FROUND x)
 26383		for {
 26384			x := v.Args[0]
 26385			v.reset(OpPPC64FROUND)
 26386			v.AddArg(x)
 26387			return true
 26388		}
 26389	}
 26390	func rewriteValuePPC64_OpRound32F_0(v *Value) bool {
 26391		// match: (Round32F x)
 26392		// cond:
 26393		// result: (LoweredRound32F x)
 26394		for {
 26395			x := v.Args[0]
 26396			v.reset(OpPPC64LoweredRound32F)
 26397			v.AddArg(x)
 26398			return true
 26399		}
 26400	}
 26401	func rewriteValuePPC64_OpRound64F_0(v *Value) bool {
 26402		// match: (Round64F x)
 26403		// cond:
 26404		// result: (LoweredRound64F x)
 26405		for {
 26406			x := v.Args[0]
 26407			v.reset(OpPPC64LoweredRound64F)
 26408			v.AddArg(x)
 26409			return true
 26410		}
 26411	}
 26412	func rewriteValuePPC64_OpRsh16Ux16_0(v *Value) bool {
 26413		b := v.Block
 26414		typ := &b.Func.Config.Types
 26415		// match: (Rsh16Ux16 x y)
 26416		// cond: shiftIsBounded(v)
 26417		// result: (SRW (MOVHZreg x) y)
 26418		for {
 26419			y := v.Args[1]
 26420			x := v.Args[0]
 26421			if !(shiftIsBounded(v)) {
 26422				break
 26423			}
 26424			v.reset(OpPPC64SRW)
 26425			v0 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
 26426			v0.AddArg(x)
 26427			v.AddArg(v0)
 26428			v.AddArg(y)
 26429			return true
 26430		}
 26431		// match: (Rsh16Ux16 x y)
 26432		// cond:
 26433		// result: (SRW (ZeroExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt16to64 y)))))
 26434		for {
 26435			y := v.Args[1]
 26436			x := v.Args[0]
 26437			v.reset(OpPPC64SRW)
 26438			v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 26439			v0.AddArg(x)
 26440			v.AddArg(v0)
 26441			v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 26442			v1.AddArg(y)
 26443			v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 26444			v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 26445			v3.AuxInt = -16
 26446			v4 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
 26447			v4.AddArg(y)
 26448			v3.AddArg(v4)
 26449			v2.AddArg(v3)
 26450			v1.AddArg(v2)
 26451			v.AddArg(v1)
 26452			return true
 26453		}
 26454	}
 26455	func rewriteValuePPC64_OpRsh16Ux32_0(v *Value) bool {
 26456		b := v.Block
 26457		typ := &b.Func.Config.Types
 26458		// match: (Rsh16Ux32 x (Const64 [c]))
 26459		// cond: uint32(c) < 16
 26460		// result: (SRWconst (ZeroExt16to32 x) [c])
 26461		for {
 26462			_ = v.Args[1]
 26463			x := v.Args[0]
 26464			v_1 := v.Args[1]
 26465			if v_1.Op != OpConst64 {
 26466				break
 26467			}
 26468			c := v_1.AuxInt
 26469			if !(uint32(c) < 16) {
 26470				break
 26471			}
 26472			v.reset(OpPPC64SRWconst)
 26473			v.AuxInt = c
 26474			v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 26475			v0.AddArg(x)
 26476			v.AddArg(v0)
 26477			return true
 26478		}
 26479		// match: (Rsh16Ux32 x (MOVDconst [c]))
 26480		// cond: uint32(c) < 16
 26481		// result: (SRWconst (ZeroExt16to32 x) [c])
 26482		for {
 26483			_ = v.Args[1]
 26484			x := v.Args[0]
 26485			v_1 := v.Args[1]
 26486			if v_1.Op != OpPPC64MOVDconst {
 26487				break
 26488			}
 26489			c := v_1.AuxInt
 26490			if !(uint32(c) < 16) {
 26491				break
 26492			}
 26493			v.reset(OpPPC64SRWconst)
 26494			v.AuxInt = c
 26495			v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 26496			v0.AddArg(x)
 26497			v.AddArg(v0)
 26498			return true
 26499		}
 26500		// match: (Rsh16Ux32 x y)
 26501		// cond: shiftIsBounded(v)
 26502		// result: (SRW (MOVHZreg x) y)
 26503		for {
 26504			y := v.Args[1]
 26505			x := v.Args[0]
 26506			if !(shiftIsBounded(v)) {
 26507				break
 26508			}
 26509			v.reset(OpPPC64SRW)
 26510			v0 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
 26511			v0.AddArg(x)
 26512			v.AddArg(v0)
 26513			v.AddArg(y)
 26514			return true
 26515		}
 26516		// match: (Rsh16Ux32 x y)
 26517		// cond:
 26518		// result: (SRW (ZeroExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt32to64 y)))))
 26519		for {
 26520			y := v.Args[1]
 26521			x := v.Args[0]
 26522			v.reset(OpPPC64SRW)
 26523			v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 26524			v0.AddArg(x)
 26525			v.AddArg(v0)
 26526			v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 26527			v1.AddArg(y)
 26528			v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 26529			v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 26530			v3.AuxInt = -16
 26531			v4 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
 26532			v4.AddArg(y)
 26533			v3.AddArg(v4)
 26534			v2.AddArg(v3)
 26535			v1.AddArg(v2)
 26536			v.AddArg(v1)
 26537			return true
 26538		}
 26539	}
 26540	func rewriteValuePPC64_OpRsh16Ux64_0(v *Value) bool {
 26541		b := v.Block
 26542		typ := &b.Func.Config.Types
 26543		// match: (Rsh16Ux64 x (Const64 [c]))
 26544		// cond: uint64(c) < 16
 26545		// result: (SRWconst (ZeroExt16to32 x) [c])
 26546		for {
 26547			_ = v.Args[1]
 26548			x := v.Args[0]
 26549			v_1 := v.Args[1]
 26550			if v_1.Op != OpConst64 {
 26551				break
 26552			}
 26553			c := v_1.AuxInt
 26554			if !(uint64(c) < 16) {
 26555				break
 26556			}
 26557			v.reset(OpPPC64SRWconst)
 26558			v.AuxInt = c
 26559			v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 26560			v0.AddArg(x)
 26561			v.AddArg(v0)
 26562			return true
 26563		}
 26564		// match: (Rsh16Ux64 _ (Const64 [c]))
 26565		// cond: uint64(c) >= 16
 26566		// result: (MOVDconst [0])
 26567		for {
 26568			_ = v.Args[1]
 26569			v_1 := v.Args[1]
 26570			if v_1.Op != OpConst64 {
 26571				break
 26572			}
 26573			c := v_1.AuxInt
 26574			if !(uint64(c) >= 16) {
 26575				break
 26576			}
 26577			v.reset(OpPPC64MOVDconst)
 26578			v.AuxInt = 0
 26579			return true
 26580		}
 26581		// match: (Rsh16Ux64 x (MOVDconst [c]))
 26582		// cond: uint64(c) < 16
 26583		// result: (SRWconst (ZeroExt16to32 x) [c])
 26584		for {
 26585			_ = v.Args[1]
 26586			x := v.Args[0]
 26587			v_1 := v.Args[1]
 26588			if v_1.Op != OpPPC64MOVDconst {
 26589				break
 26590			}
 26591			c := v_1.AuxInt
 26592			if !(uint64(c) < 16) {
 26593				break
 26594			}
 26595			v.reset(OpPPC64SRWconst)
 26596			v.AuxInt = c
 26597			v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 26598			v0.AddArg(x)
 26599			v.AddArg(v0)
 26600			return true
 26601		}
 26602		// match: (Rsh16Ux64 x y)
 26603		// cond: shiftIsBounded(v)
 26604		// result: (SRW (MOVHZreg x) y)
 26605		for {
 26606			y := v.Args[1]
 26607			x := v.Args[0]
 26608			if !(shiftIsBounded(v)) {
 26609				break
 26610			}
 26611			v.reset(OpPPC64SRW)
 26612			v0 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
 26613			v0.AddArg(x)
 26614			v.AddArg(v0)
 26615			v.AddArg(y)
 26616			return true
 26617		}
 26618		// match: (Rsh16Ux64 x y)
 26619		// cond:
 26620		// result: (SRW (ZeroExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] y))))
 26621		for {
 26622			y := v.Args[1]
 26623			x := v.Args[0]
 26624			v.reset(OpPPC64SRW)
 26625			v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 26626			v0.AddArg(x)
 26627			v.AddArg(v0)
 26628			v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 26629			v1.AddArg(y)
 26630			v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 26631			v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 26632			v3.AuxInt = -16
 26633			v3.AddArg(y)
 26634			v2.AddArg(v3)
 26635			v1.AddArg(v2)
 26636			v.AddArg(v1)
 26637			return true
 26638		}
 26639	}
 26640	func rewriteValuePPC64_OpRsh16Ux8_0(v *Value) bool {
 26641		b := v.Block
 26642		typ := &b.Func.Config.Types
 26643		// match: (Rsh16Ux8 x y)
 26644		// cond: shiftIsBounded(v)
 26645		// result: (SRW (MOVHZreg x) y)
 26646		for {
 26647			y := v.Args[1]
 26648			x := v.Args[0]
 26649			if !(shiftIsBounded(v)) {
 26650				break
 26651			}
 26652			v.reset(OpPPC64SRW)
 26653			v0 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
 26654			v0.AddArg(x)
 26655			v.AddArg(v0)
 26656			v.AddArg(y)
 26657			return true
 26658		}
 26659		// match: (Rsh16Ux8 x y)
 26660		// cond:
 26661		// result: (SRW (ZeroExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt8to64 y)))))
 26662		for {
 26663			y := v.Args[1]
 26664			x := v.Args[0]
 26665			v.reset(OpPPC64SRW)
 26666			v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 26667			v0.AddArg(x)
 26668			v.AddArg(v0)
 26669			v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 26670			v1.AddArg(y)
 26671			v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 26672			v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 26673			v3.AuxInt = -16
 26674			v4 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
 26675			v4.AddArg(y)
 26676			v3.AddArg(v4)
 26677			v2.AddArg(v3)
 26678			v1.AddArg(v2)
 26679			v.AddArg(v1)
 26680			return true
 26681		}
 26682	}
 26683	func rewriteValuePPC64_OpRsh16x16_0(v *Value) bool {
 26684		b := v.Block
 26685		typ := &b.Func.Config.Types
 26686		// match: (Rsh16x16 x y)
 26687		// cond: shiftIsBounded(v)
 26688		// result: (SRAW (MOVHreg x) y)
 26689		for {
 26690			y := v.Args[1]
 26691			x := v.Args[0]
 26692			if !(shiftIsBounded(v)) {
 26693				break
 26694			}
 26695			v.reset(OpPPC64SRAW)
 26696			v0 := b.NewValue0(v.Pos, OpPPC64MOVHreg, typ.Int64)
 26697			v0.AddArg(x)
 26698			v.AddArg(v0)
 26699			v.AddArg(y)
 26700			return true
 26701		}
 26702		// match: (Rsh16x16 x y)
 26703		// cond:
 26704		// result: (SRAW (SignExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt16to64 y)))))
 26705		for {
 26706			y := v.Args[1]
 26707			x := v.Args[0]
 26708			v.reset(OpPPC64SRAW)
 26709			v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 26710			v0.AddArg(x)
 26711			v.AddArg(v0)
 26712			v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 26713			v1.AddArg(y)
 26714			v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 26715			v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 26716			v3.AuxInt = -16
 26717			v4 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
 26718			v4.AddArg(y)
 26719			v3.AddArg(v4)
 26720			v2.AddArg(v3)
 26721			v1.AddArg(v2)
 26722			v.AddArg(v1)
 26723			return true
 26724		}
 26725	}
 26726	func rewriteValuePPC64_OpRsh16x32_0(v *Value) bool {
 26727		b := v.Block
 26728		typ := &b.Func.Config.Types
 26729		// match: (Rsh16x32 x (Const64 [c]))
 26730		// cond: uint32(c) < 16
 26731		// result: (SRAWconst (SignExt16to32 x) [c])
 26732		for {
 26733			_ = v.Args[1]
 26734			x := v.Args[0]
 26735			v_1 := v.Args[1]
 26736			if v_1.Op != OpConst64 {
 26737				break
 26738			}
 26739			c := v_1.AuxInt
 26740			if !(uint32(c) < 16) {
 26741				break
 26742			}
 26743			v.reset(OpPPC64SRAWconst)
 26744			v.AuxInt = c
 26745			v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 26746			v0.AddArg(x)
 26747			v.AddArg(v0)
 26748			return true
 26749		}
 26750		// match: (Rsh16x32 x (MOVDconst [c]))
 26751		// cond: uint32(c) < 16
 26752		// result: (SRAWconst (SignExt16to32 x) [c])
 26753		for {
 26754			_ = v.Args[1]
 26755			x := v.Args[0]
 26756			v_1 := v.Args[1]
 26757			if v_1.Op != OpPPC64MOVDconst {
 26758				break
 26759			}
 26760			c := v_1.AuxInt
 26761			if !(uint32(c) < 16) {
 26762				break
 26763			}
 26764			v.reset(OpPPC64SRAWconst)
 26765			v.AuxInt = c
 26766			v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 26767			v0.AddArg(x)
 26768			v.AddArg(v0)
 26769			return true
 26770		}
 26771		// match: (Rsh16x32 x y)
 26772		// cond: shiftIsBounded(v)
 26773		// result: (SRAW (MOVHreg x) y)
 26774		for {
 26775			y := v.Args[1]
 26776			x := v.Args[0]
 26777			if !(shiftIsBounded(v)) {
 26778				break
 26779			}
 26780			v.reset(OpPPC64SRAW)
 26781			v0 := b.NewValue0(v.Pos, OpPPC64MOVHreg, typ.Int64)
 26782			v0.AddArg(x)
 26783			v.AddArg(v0)
 26784			v.AddArg(y)
 26785			return true
 26786		}
 26787		// match: (Rsh16x32 x y)
 26788		// cond:
 26789		// result: (SRAW (SignExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt32to64 y)))))
 26790		for {
 26791			y := v.Args[1]
 26792			x := v.Args[0]
 26793			v.reset(OpPPC64SRAW)
 26794			v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 26795			v0.AddArg(x)
 26796			v.AddArg(v0)
 26797			v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 26798			v1.AddArg(y)
 26799			v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 26800			v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 26801			v3.AuxInt = -16
 26802			v4 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
 26803			v4.AddArg(y)
 26804			v3.AddArg(v4)
 26805			v2.AddArg(v3)
 26806			v1.AddArg(v2)
 26807			v.AddArg(v1)
 26808			return true
 26809		}
 26810	}
 26811	func rewriteValuePPC64_OpRsh16x64_0(v *Value) bool {
 26812		b := v.Block
 26813		typ := &b.Func.Config.Types
 26814		// match: (Rsh16x64 x (Const64 [c]))
 26815		// cond: uint64(c) < 16
 26816		// result: (SRAWconst (SignExt16to32 x) [c])
 26817		for {
 26818			_ = v.Args[1]
 26819			x := v.Args[0]
 26820			v_1 := v.Args[1]
 26821			if v_1.Op != OpConst64 {
 26822				break
 26823			}
 26824			c := v_1.AuxInt
 26825			if !(uint64(c) < 16) {
 26826				break
 26827			}
 26828			v.reset(OpPPC64SRAWconst)
 26829			v.AuxInt = c
 26830			v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 26831			v0.AddArg(x)
 26832			v.AddArg(v0)
 26833			return true
 26834		}
 26835		// match: (Rsh16x64 x (Const64 [c]))
 26836		// cond: uint64(c) >= 16
 26837		// result: (SRAWconst (SignExt16to32 x) [63])
 26838		for {
 26839			_ = v.Args[1]
 26840			x := v.Args[0]
 26841			v_1 := v.Args[1]
 26842			if v_1.Op != OpConst64 {
 26843				break
 26844			}
 26845			c := v_1.AuxInt
 26846			if !(uint64(c) >= 16) {
 26847				break
 26848			}
 26849			v.reset(OpPPC64SRAWconst)
 26850			v.AuxInt = 63
 26851			v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 26852			v0.AddArg(x)
 26853			v.AddArg(v0)
 26854			return true
 26855		}
 26856		// match: (Rsh16x64 x (MOVDconst [c]))
 26857		// cond: uint64(c) < 16
 26858		// result: (SRAWconst (SignExt16to32 x) [c])
 26859		for {
 26860			_ = v.Args[1]
 26861			x := v.Args[0]
 26862			v_1 := v.Args[1]
 26863			if v_1.Op != OpPPC64MOVDconst {
 26864				break
 26865			}
 26866			c := v_1.AuxInt
 26867			if !(uint64(c) < 16) {
 26868				break
 26869			}
 26870			v.reset(OpPPC64SRAWconst)
 26871			v.AuxInt = c
 26872			v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 26873			v0.AddArg(x)
 26874			v.AddArg(v0)
 26875			return true
 26876		}
 26877		// match: (Rsh16x64 x y)
 26878		// cond: shiftIsBounded(v)
 26879		// result: (SRAW (MOVHreg x) y)
 26880		for {
 26881			y := v.Args[1]
 26882			x := v.Args[0]
 26883			if !(shiftIsBounded(v)) {
 26884				break
 26885			}
 26886			v.reset(OpPPC64SRAW)
 26887			v0 := b.NewValue0(v.Pos, OpPPC64MOVHreg, typ.Int64)
 26888			v0.AddArg(x)
 26889			v.AddArg(v0)
 26890			v.AddArg(y)
 26891			return true
 26892		}
 26893		// match: (Rsh16x64 x y)
 26894		// cond:
 26895		// result: (SRAW (SignExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] y))))
 26896		for {
 26897			y := v.Args[1]
 26898			x := v.Args[0]
 26899			v.reset(OpPPC64SRAW)
 26900			v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 26901			v0.AddArg(x)
 26902			v.AddArg(v0)
 26903			v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 26904			v1.AddArg(y)
 26905			v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 26906			v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 26907			v3.AuxInt = -16
 26908			v3.AddArg(y)
 26909			v2.AddArg(v3)
 26910			v1.AddArg(v2)
 26911			v.AddArg(v1)
 26912			return true
 26913		}
 26914	}
 26915	func rewriteValuePPC64_OpRsh16x8_0(v *Value) bool {
 26916		b := v.Block
 26917		typ := &b.Func.Config.Types
 26918		// match: (Rsh16x8 x y)
 26919		// cond: shiftIsBounded(v)
 26920		// result: (SRAW (MOVHreg x) y)
 26921		for {
 26922			y := v.Args[1]
 26923			x := v.Args[0]
 26924			if !(shiftIsBounded(v)) {
 26925				break
 26926			}
 26927			v.reset(OpPPC64SRAW)
 26928			v0 := b.NewValue0(v.Pos, OpPPC64MOVHreg, typ.Int64)
 26929			v0.AddArg(x)
 26930			v.AddArg(v0)
 26931			v.AddArg(y)
 26932			return true
 26933		}
 26934		// match: (Rsh16x8 x y)
 26935		// cond:
 26936		// result: (SRAW (SignExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt8to64 y)))))
 26937		for {
 26938			y := v.Args[1]
 26939			x := v.Args[0]
 26940			v.reset(OpPPC64SRAW)
 26941			v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 26942			v0.AddArg(x)
 26943			v.AddArg(v0)
 26944			v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 26945			v1.AddArg(y)
 26946			v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 26947			v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 26948			v3.AuxInt = -16
 26949			v4 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
 26950			v4.AddArg(y)
 26951			v3.AddArg(v4)
 26952			v2.AddArg(v3)
 26953			v1.AddArg(v2)
 26954			v.AddArg(v1)
 26955			return true
 26956		}
 26957	}
 26958	func rewriteValuePPC64_OpRsh32Ux16_0(v *Value) bool {
 26959		b := v.Block
 26960		typ := &b.Func.Config.Types
 26961		// match: (Rsh32Ux16 x y)
 26962		// cond: shiftIsBounded(v)
 26963		// result: (SRW x y)
 26964		for {
 26965			y := v.Args[1]
 26966			x := v.Args[0]
 26967			if !(shiftIsBounded(v)) {
 26968				break
 26969			}
 26970			v.reset(OpPPC64SRW)
 26971			v.AddArg(x)
 26972			v.AddArg(y)
 26973			return true
 26974		}
 26975		// match: (Rsh32Ux16 x y)
 26976		// cond:
 26977		// result: (SRW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt16to64 y)))))
 26978		for {
 26979			y := v.Args[1]
 26980			x := v.Args[0]
 26981			v.reset(OpPPC64SRW)
 26982			v.AddArg(x)
 26983			v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 26984			v0.AddArg(y)
 26985			v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 26986			v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 26987			v2.AuxInt = -32
 26988			v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
 26989			v3.AddArg(y)
 26990			v2.AddArg(v3)
 26991			v1.AddArg(v2)
 26992			v0.AddArg(v1)
 26993			v.AddArg(v0)
 26994			return true
 26995		}
 26996	}
 26997	func rewriteValuePPC64_OpRsh32Ux32_0(v *Value) bool {
 26998		b := v.Block
 26999		typ := &b.Func.Config.Types
 27000		// match: (Rsh32Ux32 x (Const64 [c]))
 27001		// cond: uint32(c) < 32
 27002		// result: (SRWconst x [c])
 27003		for {
 27004			_ = v.Args[1]
 27005			x := v.Args[0]
 27006			v_1 := v.Args[1]
 27007			if v_1.Op != OpConst64 {
 27008				break
 27009			}
 27010			c := v_1.AuxInt
 27011			if !(uint32(c) < 32) {
 27012				break
 27013			}
 27014			v.reset(OpPPC64SRWconst)
 27015			v.AuxInt = c
 27016			v.AddArg(x)
 27017			return true
 27018		}
 27019		// match: (Rsh32Ux32 x (MOVDconst [c]))
 27020		// cond: uint32(c) < 32
 27021		// result: (SRWconst x [c])
 27022		for {
 27023			_ = v.Args[1]
 27024			x := v.Args[0]
 27025			v_1 := v.Args[1]
 27026			if v_1.Op != OpPPC64MOVDconst {
 27027				break
 27028			}
 27029			c := v_1.AuxInt
 27030			if !(uint32(c) < 32) {
 27031				break
 27032			}
 27033			v.reset(OpPPC64SRWconst)
 27034			v.AuxInt = c
 27035			v.AddArg(x)
 27036			return true
 27037		}
 27038		// match: (Rsh32Ux32 x y)
 27039		// cond: shiftIsBounded(v)
 27040		// result: (SRW x y)
 27041		for {
 27042			y := v.Args[1]
 27043			x := v.Args[0]
 27044			if !(shiftIsBounded(v)) {
 27045				break
 27046			}
 27047			v.reset(OpPPC64SRW)
 27048			v.AddArg(x)
 27049			v.AddArg(y)
 27050			return true
 27051		}
 27052		// match: (Rsh32Ux32 x y)
 27053		// cond:
 27054		// result: (SRW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt32to64 y)))))
 27055		for {
 27056			y := v.Args[1]
 27057			x := v.Args[0]
 27058			v.reset(OpPPC64SRW)
 27059			v.AddArg(x)
 27060			v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 27061			v0.AddArg(y)
 27062			v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 27063			v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 27064			v2.AuxInt = -32
 27065			v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
 27066			v3.AddArg(y)
 27067			v2.AddArg(v3)
 27068			v1.AddArg(v2)
 27069			v0.AddArg(v1)
 27070			v.AddArg(v0)
 27071			return true
 27072		}
 27073	}
 27074	func rewriteValuePPC64_OpRsh32Ux64_0(v *Value) bool {
 27075		b := v.Block
 27076		typ := &b.Func.Config.Types
 27077		// match: (Rsh32Ux64 x (Const64 [c]))
 27078		// cond: uint64(c) < 32
 27079		// result: (SRWconst x [c])
 27080		for {
 27081			_ = v.Args[1]
 27082			x := v.Args[0]
 27083			v_1 := v.Args[1]
 27084			if v_1.Op != OpConst64 {
 27085				break
 27086			}
 27087			c := v_1.AuxInt
 27088			if !(uint64(c) < 32) {
 27089				break
 27090			}
 27091			v.reset(OpPPC64SRWconst)
 27092			v.AuxInt = c
 27093			v.AddArg(x)
 27094			return true
 27095		}
 27096		// match: (Rsh32Ux64 _ (Const64 [c]))
 27097		// cond: uint64(c) >= 32
 27098		// result: (MOVDconst [0])
 27099		for {
 27100			_ = v.Args[1]
 27101			v_1 := v.Args[1]
 27102			if v_1.Op != OpConst64 {
 27103				break
 27104			}
 27105			c := v_1.AuxInt
 27106			if !(uint64(c) >= 32) {
 27107				break
 27108			}
 27109			v.reset(OpPPC64MOVDconst)
 27110			v.AuxInt = 0
 27111			return true
 27112		}
 27113		// match: (Rsh32Ux64 x (MOVDconst [c]))
 27114		// cond: uint64(c) < 32
 27115		// result: (SRWconst x [c])
 27116		for {
 27117			_ = v.Args[1]
 27118			x := v.Args[0]
 27119			v_1 := v.Args[1]
 27120			if v_1.Op != OpPPC64MOVDconst {
 27121				break
 27122			}
 27123			c := v_1.AuxInt
 27124			if !(uint64(c) < 32) {
 27125				break
 27126			}
 27127			v.reset(OpPPC64SRWconst)
 27128			v.AuxInt = c
 27129			v.AddArg(x)
 27130			return true
 27131		}
 27132		// match: (Rsh32Ux64 x y)
 27133		// cond: shiftIsBounded(v)
 27134		// result: (SRW x y)
 27135		for {
 27136			y := v.Args[1]
 27137			x := v.Args[0]
 27138			if !(shiftIsBounded(v)) {
 27139				break
 27140			}
 27141			v.reset(OpPPC64SRW)
 27142			v.AddArg(x)
 27143			v.AddArg(y)
 27144			return true
 27145		}
 27146		// match: (Rsh32Ux64 x (AND y (MOVDconst [31])))
 27147		// cond:
 27148		// result: (SRW x (ANDconst <typ.Int32> [31] y))
 27149		for {
 27150			_ = v.Args[1]
 27151			x := v.Args[0]
 27152			v_1 := v.Args[1]
 27153			if v_1.Op != OpPPC64AND {
 27154				break
 27155			}
 27156			_ = v_1.Args[1]
 27157			y := v_1.Args[0]
 27158			v_1_1 := v_1.Args[1]
 27159			if v_1_1.Op != OpPPC64MOVDconst {
 27160				break
 27161			}
 27162			if v_1_1.AuxInt != 31 {
 27163				break
 27164			}
 27165			v.reset(OpPPC64SRW)
 27166			v.AddArg(x)
 27167			v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int32)
 27168			v0.AuxInt = 31
 27169			v0.AddArg(y)
 27170			v.AddArg(v0)
 27171			return true
 27172		}
 27173		// match: (Rsh32Ux64 x (AND (MOVDconst [31]) y))
 27174		// cond:
 27175		// result: (SRW x (ANDconst <typ.Int32> [31] y))
 27176		for {
 27177			_ = v.Args[1]
 27178			x := v.Args[0]
 27179			v_1 := v.Args[1]
 27180			if v_1.Op != OpPPC64AND {
 27181				break
 27182			}
 27183			y := v_1.Args[1]
 27184			v_1_0 := v_1.Args[0]
 27185			if v_1_0.Op != OpPPC64MOVDconst {
 27186				break
 27187			}
 27188			if v_1_0.AuxInt != 31 {
 27189				break
 27190			}
 27191			v.reset(OpPPC64SRW)
 27192			v.AddArg(x)
 27193			v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int32)
 27194			v0.AuxInt = 31
 27195			v0.AddArg(y)
 27196			v.AddArg(v0)
 27197			return true
 27198		}
 27199		// match: (Rsh32Ux64 x (ANDconst <typ.UInt> [31] y))
 27200		// cond:
 27201		// result: (SRW x (ANDconst <typ.UInt> [31] y))
 27202		for {
 27203			_ = v.Args[1]
 27204			x := v.Args[0]
 27205			v_1 := v.Args[1]
 27206			if v_1.Op != OpPPC64ANDconst {
 27207				break
 27208			}
 27209			if v_1.Type != typ.UInt {
 27210				break
 27211			}
 27212			if v_1.AuxInt != 31 {
 27213				break
 27214			}
 27215			y := v_1.Args[0]
 27216			v.reset(OpPPC64SRW)
 27217			v.AddArg(x)
 27218			v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 27219			v0.AuxInt = 31
 27220			v0.AddArg(y)
 27221			v.AddArg(v0)
 27222			return true
 27223		}
 27224		// match: (Rsh32Ux64 x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y)))
 27225		// cond:
 27226		// result: (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y)))
 27227		for {
 27228			_ = v.Args[1]
 27229			x := v.Args[0]
 27230			v_1 := v.Args[1]
 27231			if v_1.Op != OpPPC64SUB {
 27232				break
 27233			}
 27234			if v_1.Type != typ.UInt {
 27235				break
 27236			}
 27237			_ = v_1.Args[1]
 27238			v_1_0 := v_1.Args[0]
 27239			if v_1_0.Op != OpPPC64MOVDconst {
 27240				break
 27241			}
 27242			if v_1_0.AuxInt != 32 {
 27243				break
 27244			}
 27245			v_1_1 := v_1.Args[1]
 27246			if v_1_1.Op != OpPPC64ANDconst {
 27247				break
 27248			}
 27249			if v_1_1.Type != typ.UInt {
 27250				break
 27251			}
 27252			if v_1_1.AuxInt != 31 {
 27253				break
 27254			}
 27255			y := v_1_1.Args[0]
 27256			v.reset(OpPPC64SRW)
 27257			v.AddArg(x)
 27258			v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 27259			v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 27260			v1.AuxInt = 32
 27261			v0.AddArg(v1)
 27262			v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 27263			v2.AuxInt = 31
 27264			v2.AddArg(y)
 27265			v0.AddArg(v2)
 27266			v.AddArg(v0)
 27267			return true
 27268		}
 27269		// match: (Rsh32Ux64 x (SUB <typ.UInt> (MOVDconst [32]) (AND <typ.UInt> y (MOVDconst [31]))))
 27270		// cond:
 27271		// result: (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y)))
 27272		for {
 27273			_ = v.Args[1]
 27274			x := v.Args[0]
 27275			v_1 := v.Args[1]
 27276			if v_1.Op != OpPPC64SUB {
 27277				break
 27278			}
 27279			if v_1.Type != typ.UInt {
 27280				break
 27281			}
 27282			_ = v_1.Args[1]
 27283			v_1_0 := v_1.Args[0]
 27284			if v_1_0.Op != OpPPC64MOVDconst {
 27285				break
 27286			}
 27287			if v_1_0.AuxInt != 32 {
 27288				break
 27289			}
 27290			v_1_1 := v_1.Args[1]
 27291			if v_1_1.Op != OpPPC64AND {
 27292				break
 27293			}
 27294			if v_1_1.Type != typ.UInt {
 27295				break
 27296			}
 27297			_ = v_1_1.Args[1]
 27298			y := v_1_1.Args[0]
 27299			v_1_1_1 := v_1_1.Args[1]
 27300			if v_1_1_1.Op != OpPPC64MOVDconst {
 27301				break
 27302			}
 27303			if v_1_1_1.AuxInt != 31 {
 27304				break
 27305			}
 27306			v.reset(OpPPC64SRW)
 27307			v.AddArg(x)
 27308			v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 27309			v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 27310			v1.AuxInt = 32
 27311			v0.AddArg(v1)
 27312			v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 27313			v2.AuxInt = 31
 27314			v2.AddArg(y)
 27315			v0.AddArg(v2)
 27316			v.AddArg(v0)
 27317			return true
 27318		}
 27319		// match: (Rsh32Ux64 x (SUB <typ.UInt> (MOVDconst [32]) (AND <typ.UInt> (MOVDconst [31]) y)))
 27320		// cond:
 27321		// result: (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y)))
 27322		for {
 27323			_ = v.Args[1]
 27324			x := v.Args[0]
 27325			v_1 := v.Args[1]
 27326			if v_1.Op != OpPPC64SUB {
 27327				break
 27328			}
 27329			if v_1.Type != typ.UInt {
 27330				break
 27331			}
 27332			_ = v_1.Args[1]
 27333			v_1_0 := v_1.Args[0]
 27334			if v_1_0.Op != OpPPC64MOVDconst {
 27335				break
 27336			}
 27337			if v_1_0.AuxInt != 32 {
 27338				break
 27339			}
 27340			v_1_1 := v_1.Args[1]
 27341			if v_1_1.Op != OpPPC64AND {
 27342				break
 27343			}
 27344			if v_1_1.Type != typ.UInt {
 27345				break
 27346			}
 27347			y := v_1_1.Args[1]
 27348			v_1_1_0 := v_1_1.Args[0]
 27349			if v_1_1_0.Op != OpPPC64MOVDconst {
 27350				break
 27351			}
 27352			if v_1_1_0.AuxInt != 31 {
 27353				break
 27354			}
 27355			v.reset(OpPPC64SRW)
 27356			v.AddArg(x)
 27357			v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 27358			v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 27359			v1.AuxInt = 32
 27360			v0.AddArg(v1)
 27361			v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 27362			v2.AuxInt = 31
 27363			v2.AddArg(y)
 27364			v0.AddArg(v2)
 27365			v.AddArg(v0)
 27366			return true
 27367		}
 27368		return false
 27369	}
 27370	func rewriteValuePPC64_OpRsh32Ux64_10(v *Value) bool {
 27371		b := v.Block
 27372		typ := &b.Func.Config.Types
 27373		// match: (Rsh32Ux64 x y)
 27374		// cond:
 27375		// result: (SRW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] y))))
 27376		for {
 27377			y := v.Args[1]
 27378			x := v.Args[0]
 27379			v.reset(OpPPC64SRW)
 27380			v.AddArg(x)
 27381			v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 27382			v0.AddArg(y)
 27383			v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 27384			v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 27385			v2.AuxInt = -32
 27386			v2.AddArg(y)
 27387			v1.AddArg(v2)
 27388			v0.AddArg(v1)
 27389			v.AddArg(v0)
 27390			return true
 27391		}
 27392	}
 27393	func rewriteValuePPC64_OpRsh32Ux8_0(v *Value) bool {
 27394		b := v.Block
 27395		typ := &b.Func.Config.Types
 27396		// match: (Rsh32Ux8 x y)
 27397		// cond: shiftIsBounded(v)
 27398		// result: (SRW x y)
 27399		for {
 27400			y := v.Args[1]
 27401			x := v.Args[0]
 27402			if !(shiftIsBounded(v)) {
 27403				break
 27404			}
 27405			v.reset(OpPPC64SRW)
 27406			v.AddArg(x)
 27407			v.AddArg(y)
 27408			return true
 27409		}
 27410		// match: (Rsh32Ux8 x y)
 27411		// cond:
 27412		// result: (SRW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt8to64 y)))))
 27413		for {
 27414			y := v.Args[1]
 27415			x := v.Args[0]
 27416			v.reset(OpPPC64SRW)
 27417			v.AddArg(x)
 27418			v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 27419			v0.AddArg(y)
 27420			v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 27421			v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 27422			v2.AuxInt = -32
 27423			v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
 27424			v3.AddArg(y)
 27425			v2.AddArg(v3)
 27426			v1.AddArg(v2)
 27427			v0.AddArg(v1)
 27428			v.AddArg(v0)
 27429			return true
 27430		}
 27431	}
 27432	func rewriteValuePPC64_OpRsh32x16_0(v *Value) bool {
 27433		b := v.Block
 27434		typ := &b.Func.Config.Types
 27435		// match: (Rsh32x16 x y)
 27436		// cond: shiftIsBounded(v)
 27437		// result: (SRAW x y)
 27438		for {
 27439			y := v.Args[1]
 27440			x := v.Args[0]
 27441			if !(shiftIsBounded(v)) {
 27442				break
 27443			}
 27444			v.reset(OpPPC64SRAW)
 27445			v.AddArg(x)
 27446			v.AddArg(y)
 27447			return true
 27448		}
 27449		// match: (Rsh32x16 x y)
 27450		// cond:
 27451		// result: (SRAW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt16to64 y)))))
 27452		for {
 27453			y := v.Args[1]
 27454			x := v.Args[0]
 27455			v.reset(OpPPC64SRAW)
 27456			v.AddArg(x)
 27457			v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 27458			v0.AddArg(y)
 27459			v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 27460			v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 27461			v2.AuxInt = -32
 27462			v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
 27463			v3.AddArg(y)
 27464			v2.AddArg(v3)
 27465			v1.AddArg(v2)
 27466			v0.AddArg(v1)
 27467			v.AddArg(v0)
 27468			return true
 27469		}
 27470	}
 27471	func rewriteValuePPC64_OpRsh32x32_0(v *Value) bool {
 27472		b := v.Block
 27473		typ := &b.Func.Config.Types
 27474		// match: (Rsh32x32 x (Const64 [c]))
 27475		// cond: uint32(c) < 32
 27476		// result: (SRAWconst x [c])
 27477		for {
 27478			_ = v.Args[1]
 27479			x := v.Args[0]
 27480			v_1 := v.Args[1]
 27481			if v_1.Op != OpConst64 {
 27482				break
 27483			}
 27484			c := v_1.AuxInt
 27485			if !(uint32(c) < 32) {
 27486				break
 27487			}
 27488			v.reset(OpPPC64SRAWconst)
 27489			v.AuxInt = c
 27490			v.AddArg(x)
 27491			return true
 27492		}
 27493		// match: (Rsh32x32 x (MOVDconst [c]))
 27494		// cond: uint32(c) < 32
 27495		// result: (SRAWconst x [c])
 27496		for {
 27497			_ = v.Args[1]
 27498			x := v.Args[0]
 27499			v_1 := v.Args[1]
 27500			if v_1.Op != OpPPC64MOVDconst {
 27501				break
 27502			}
 27503			c := v_1.AuxInt
 27504			if !(uint32(c) < 32) {
 27505				break
 27506			}
 27507			v.reset(OpPPC64SRAWconst)
 27508			v.AuxInt = c
 27509			v.AddArg(x)
 27510			return true
 27511		}
 27512		// match: (Rsh32x32 x y)
 27513		// cond: shiftIsBounded(v)
 27514		// result: (SRAW x y)
 27515		for {
 27516			y := v.Args[1]
 27517			x := v.Args[0]
 27518			if !(shiftIsBounded(v)) {
 27519				break
 27520			}
 27521			v.reset(OpPPC64SRAW)
 27522			v.AddArg(x)
 27523			v.AddArg(y)
 27524			return true
 27525		}
 27526		// match: (Rsh32x32 x y)
 27527		// cond:
 27528		// result: (SRAW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt32to64 y)))))
 27529		for {
 27530			y := v.Args[1]
 27531			x := v.Args[0]
 27532			v.reset(OpPPC64SRAW)
 27533			v.AddArg(x)
 27534			v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 27535			v0.AddArg(y)
 27536			v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 27537			v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 27538			v2.AuxInt = -32
 27539			v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
 27540			v3.AddArg(y)
 27541			v2.AddArg(v3)
 27542			v1.AddArg(v2)
 27543			v0.AddArg(v1)
 27544			v.AddArg(v0)
 27545			return true
 27546		}
 27547	}
 27548	func rewriteValuePPC64_OpRsh32x64_0(v *Value) bool {
 27549		b := v.Block
 27550		typ := &b.Func.Config.Types
 27551		// match: (Rsh32x64 x (Const64 [c]))
 27552		// cond: uint64(c) < 32
 27553		// result: (SRAWconst x [c])
 27554		for {
 27555			_ = v.Args[1]
 27556			x := v.Args[0]
 27557			v_1 := v.Args[1]
 27558			if v_1.Op != OpConst64 {
 27559				break
 27560			}
 27561			c := v_1.AuxInt
 27562			if !(uint64(c) < 32) {
 27563				break
 27564			}
 27565			v.reset(OpPPC64SRAWconst)
 27566			v.AuxInt = c
 27567			v.AddArg(x)
 27568			return true
 27569		}
 27570		// match: (Rsh32x64 x (Const64 [c]))
 27571		// cond: uint64(c) >= 32
 27572		// result: (SRAWconst x [63])
 27573		for {
 27574			_ = v.Args[1]
 27575			x := v.Args[0]
 27576			v_1 := v.Args[1]
 27577			if v_1.Op != OpConst64 {
 27578				break
 27579			}
 27580			c := v_1.AuxInt
 27581			if !(uint64(c) >= 32) {
 27582				break
 27583			}
 27584			v.reset(OpPPC64SRAWconst)
 27585			v.AuxInt = 63
 27586			v.AddArg(x)
 27587			return true
 27588		}
 27589		// match: (Rsh32x64 x (MOVDconst [c]))
 27590		// cond: uint64(c) < 32
 27591		// result: (SRAWconst x [c])
 27592		for {
 27593			_ = v.Args[1]
 27594			x := v.Args[0]
 27595			v_1 := v.Args[1]
 27596			if v_1.Op != OpPPC64MOVDconst {
 27597				break
 27598			}
 27599			c := v_1.AuxInt
 27600			if !(uint64(c) < 32) {
 27601				break
 27602			}
 27603			v.reset(OpPPC64SRAWconst)
 27604			v.AuxInt = c
 27605			v.AddArg(x)
 27606			return true
 27607		}
 27608		// match: (Rsh32x64 x y)
 27609		// cond: shiftIsBounded(v)
 27610		// result: (SRAW x y)
 27611		for {
 27612			y := v.Args[1]
 27613			x := v.Args[0]
 27614			if !(shiftIsBounded(v)) {
 27615				break
 27616			}
 27617			v.reset(OpPPC64SRAW)
 27618			v.AddArg(x)
 27619			v.AddArg(y)
 27620			return true
 27621		}
 27622		// match: (Rsh32x64 x (AND y (MOVDconst [31])))
 27623		// cond:
 27624		// result: (SRAW x (ANDconst <typ.Int32> [31] y))
 27625		for {
 27626			_ = v.Args[1]
 27627			x := v.Args[0]
 27628			v_1 := v.Args[1]
 27629			if v_1.Op != OpPPC64AND {
 27630				break
 27631			}
 27632			_ = v_1.Args[1]
 27633			y := v_1.Args[0]
 27634			v_1_1 := v_1.Args[1]
 27635			if v_1_1.Op != OpPPC64MOVDconst {
 27636				break
 27637			}
 27638			if v_1_1.AuxInt != 31 {
 27639				break
 27640			}
 27641			v.reset(OpPPC64SRAW)
 27642			v.AddArg(x)
 27643			v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int32)
 27644			v0.AuxInt = 31
 27645			v0.AddArg(y)
 27646			v.AddArg(v0)
 27647			return true
 27648		}
 27649		// match: (Rsh32x64 x (AND (MOVDconst [31]) y))
 27650		// cond:
 27651		// result: (SRAW x (ANDconst <typ.Int32> [31] y))
 27652		for {
 27653			_ = v.Args[1]
 27654			x := v.Args[0]
 27655			v_1 := v.Args[1]
 27656			if v_1.Op != OpPPC64AND {
 27657				break
 27658			}
 27659			y := v_1.Args[1]
 27660			v_1_0 := v_1.Args[0]
 27661			if v_1_0.Op != OpPPC64MOVDconst {
 27662				break
 27663			}
 27664			if v_1_0.AuxInt != 31 {
 27665				break
 27666			}
 27667			v.reset(OpPPC64SRAW)
 27668			v.AddArg(x)
 27669			v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int32)
 27670			v0.AuxInt = 31
 27671			v0.AddArg(y)
 27672			v.AddArg(v0)
 27673			return true
 27674		}
 27675		// match: (Rsh32x64 x (ANDconst <typ.UInt> [31] y))
 27676		// cond:
 27677		// result: (SRAW x (ANDconst <typ.UInt> [31] y))
 27678		for {
 27679			_ = v.Args[1]
 27680			x := v.Args[0]
 27681			v_1 := v.Args[1]
 27682			if v_1.Op != OpPPC64ANDconst {
 27683				break
 27684			}
 27685			if v_1.Type != typ.UInt {
 27686				break
 27687			}
 27688			if v_1.AuxInt != 31 {
 27689				break
 27690			}
 27691			y := v_1.Args[0]
 27692			v.reset(OpPPC64SRAW)
 27693			v.AddArg(x)
 27694			v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 27695			v0.AuxInt = 31
 27696			v0.AddArg(y)
 27697			v.AddArg(v0)
 27698			return true
 27699		}
 27700		// match: (Rsh32x64 x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y)))
 27701		// cond:
 27702		// result: (SRAW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y)))
 27703		for {
 27704			_ = v.Args[1]
 27705			x := v.Args[0]
 27706			v_1 := v.Args[1]
 27707			if v_1.Op != OpPPC64SUB {
 27708				break
 27709			}
 27710			if v_1.Type != typ.UInt {
 27711				break
 27712			}
 27713			_ = v_1.Args[1]
 27714			v_1_0 := v_1.Args[0]
 27715			if v_1_0.Op != OpPPC64MOVDconst {
 27716				break
 27717			}
 27718			if v_1_0.AuxInt != 32 {
 27719				break
 27720			}
 27721			v_1_1 := v_1.Args[1]
 27722			if v_1_1.Op != OpPPC64ANDconst {
 27723				break
 27724			}
 27725			if v_1_1.Type != typ.UInt {
 27726				break
 27727			}
 27728			if v_1_1.AuxInt != 31 {
 27729				break
 27730			}
 27731			y := v_1_1.Args[0]
 27732			v.reset(OpPPC64SRAW)
 27733			v.AddArg(x)
 27734			v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 27735			v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 27736			v1.AuxInt = 32
 27737			v0.AddArg(v1)
 27738			v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 27739			v2.AuxInt = 31
 27740			v2.AddArg(y)
 27741			v0.AddArg(v2)
 27742			v.AddArg(v0)
 27743			return true
 27744		}
 27745		// match: (Rsh32x64 x (SUB <typ.UInt> (MOVDconst [32]) (AND <typ.UInt> y (MOVDconst [31]))))
 27746		// cond:
 27747		// result: (SRAW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y)))
 27748		for {
 27749			_ = v.Args[1]
 27750			x := v.Args[0]
 27751			v_1 := v.Args[1]
 27752			if v_1.Op != OpPPC64SUB {
 27753				break
 27754			}
 27755			if v_1.Type != typ.UInt {
 27756				break
 27757			}
 27758			_ = v_1.Args[1]
 27759			v_1_0 := v_1.Args[0]
 27760			if v_1_0.Op != OpPPC64MOVDconst {
 27761				break
 27762			}
 27763			if v_1_0.AuxInt != 32 {
 27764				break
 27765			}
 27766			v_1_1 := v_1.Args[1]
 27767			if v_1_1.Op != OpPPC64AND {
 27768				break
 27769			}
 27770			if v_1_1.Type != typ.UInt {
 27771				break
 27772			}
 27773			_ = v_1_1.Args[1]
 27774			y := v_1_1.Args[0]
 27775			v_1_1_1 := v_1_1.Args[1]
 27776			if v_1_1_1.Op != OpPPC64MOVDconst {
 27777				break
 27778			}
 27779			if v_1_1_1.AuxInt != 31 {
 27780				break
 27781			}
 27782			v.reset(OpPPC64SRAW)
 27783			v.AddArg(x)
 27784			v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 27785			v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 27786			v1.AuxInt = 32
 27787			v0.AddArg(v1)
 27788			v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 27789			v2.AuxInt = 31
 27790			v2.AddArg(y)
 27791			v0.AddArg(v2)
 27792			v.AddArg(v0)
 27793			return true
 27794		}
 27795		// match: (Rsh32x64 x (SUB <typ.UInt> (MOVDconst [32]) (AND <typ.UInt> (MOVDconst [31]) y)))
 27796		// cond:
 27797		// result: (SRAW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y)))
 27798		for {
 27799			_ = v.Args[1]
 27800			x := v.Args[0]
 27801			v_1 := v.Args[1]
 27802			if v_1.Op != OpPPC64SUB {
 27803				break
 27804			}
 27805			if v_1.Type != typ.UInt {
 27806				break
 27807			}
 27808			_ = v_1.Args[1]
 27809			v_1_0 := v_1.Args[0]
 27810			if v_1_0.Op != OpPPC64MOVDconst {
 27811				break
 27812			}
 27813			if v_1_0.AuxInt != 32 {
 27814				break
 27815			}
 27816			v_1_1 := v_1.Args[1]
 27817			if v_1_1.Op != OpPPC64AND {
 27818				break
 27819			}
 27820			if v_1_1.Type != typ.UInt {
 27821				break
 27822			}
 27823			y := v_1_1.Args[1]
 27824			v_1_1_0 := v_1_1.Args[0]
 27825			if v_1_1_0.Op != OpPPC64MOVDconst {
 27826				break
 27827			}
 27828			if v_1_1_0.AuxInt != 31 {
 27829				break
 27830			}
 27831			v.reset(OpPPC64SRAW)
 27832			v.AddArg(x)
 27833			v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 27834			v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 27835			v1.AuxInt = 32
 27836			v0.AddArg(v1)
 27837			v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 27838			v2.AuxInt = 31
 27839			v2.AddArg(y)
 27840			v0.AddArg(v2)
 27841			v.AddArg(v0)
 27842			return true
 27843		}
 27844		return false
 27845	}
 27846	func rewriteValuePPC64_OpRsh32x64_10(v *Value) bool {
 27847		b := v.Block
 27848		typ := &b.Func.Config.Types
 27849		// match: (Rsh32x64 x y)
 27850		// cond:
 27851		// result: (SRAW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] y))))
 27852		for {
 27853			y := v.Args[1]
 27854			x := v.Args[0]
 27855			v.reset(OpPPC64SRAW)
 27856			v.AddArg(x)
 27857			v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 27858			v0.AddArg(y)
 27859			v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 27860			v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 27861			v2.AuxInt = -32
 27862			v2.AddArg(y)
 27863			v1.AddArg(v2)
 27864			v0.AddArg(v1)
 27865			v.AddArg(v0)
 27866			return true
 27867		}
 27868	}
 27869	func rewriteValuePPC64_OpRsh32x8_0(v *Value) bool {
 27870		b := v.Block
 27871		typ := &b.Func.Config.Types
 27872		// match: (Rsh32x8 x y)
 27873		// cond: shiftIsBounded(v)
 27874		// result: (SRAW x y)
 27875		for {
 27876			y := v.Args[1]
 27877			x := v.Args[0]
 27878			if !(shiftIsBounded(v)) {
 27879				break
 27880			}
 27881			v.reset(OpPPC64SRAW)
 27882			v.AddArg(x)
 27883			v.AddArg(y)
 27884			return true
 27885		}
 27886		// match: (Rsh32x8 x y)
 27887		// cond:
 27888		// result: (SRAW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt8to64 y)))))
 27889		for {
 27890			y := v.Args[1]
 27891			x := v.Args[0]
 27892			v.reset(OpPPC64SRAW)
 27893			v.AddArg(x)
 27894			v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 27895			v0.AddArg(y)
 27896			v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 27897			v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 27898			v2.AuxInt = -32
 27899			v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
 27900			v3.AddArg(y)
 27901			v2.AddArg(v3)
 27902			v1.AddArg(v2)
 27903			v0.AddArg(v1)
 27904			v.AddArg(v0)
 27905			return true
 27906		}
 27907	}
 27908	func rewriteValuePPC64_OpRsh64Ux16_0(v *Value) bool {
 27909		b := v.Block
 27910		typ := &b.Func.Config.Types
 27911		// match: (Rsh64Ux16 x y)
 27912		// cond: shiftIsBounded(v)
 27913		// result: (SRD x y)
 27914		for {
 27915			y := v.Args[1]
 27916			x := v.Args[0]
 27917			if !(shiftIsBounded(v)) {
 27918				break
 27919			}
 27920			v.reset(OpPPC64SRD)
 27921			v.AddArg(x)
 27922			v.AddArg(y)
 27923			return true
 27924		}
 27925		// match: (Rsh64Ux16 x y)
 27926		// cond:
 27927		// result: (SRD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt16to64 y)))))
 27928		for {
 27929			y := v.Args[1]
 27930			x := v.Args[0]
 27931			v.reset(OpPPC64SRD)
 27932			v.AddArg(x)
 27933			v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 27934			v0.AddArg(y)
 27935			v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 27936			v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 27937			v2.AuxInt = -64
 27938			v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
 27939			v3.AddArg(y)
 27940			v2.AddArg(v3)
 27941			v1.AddArg(v2)
 27942			v0.AddArg(v1)
 27943			v.AddArg(v0)
 27944			return true
 27945		}
 27946	}
 27947	func rewriteValuePPC64_OpRsh64Ux32_0(v *Value) bool {
 27948		b := v.Block
 27949		typ := &b.Func.Config.Types
 27950		// match: (Rsh64Ux32 x (Const64 [c]))
 27951		// cond: uint32(c) < 64
 27952		// result: (SRDconst x [c])
 27953		for {
 27954			_ = v.Args[1]
 27955			x := v.Args[0]
 27956			v_1 := v.Args[1]
 27957			if v_1.Op != OpConst64 {
 27958				break
 27959			}
 27960			c := v_1.AuxInt
 27961			if !(uint32(c) < 64) {
 27962				break
 27963			}
 27964			v.reset(OpPPC64SRDconst)
 27965			v.AuxInt = c
 27966			v.AddArg(x)
 27967			return true
 27968		}
 27969		// match: (Rsh64Ux32 x (MOVDconst [c]))
 27970		// cond: uint32(c) < 64
 27971		// result: (SRDconst x [c])
 27972		for {
 27973			_ = v.Args[1]
 27974			x := v.Args[0]
 27975			v_1 := v.Args[1]
 27976			if v_1.Op != OpPPC64MOVDconst {
 27977				break
 27978			}
 27979			c := v_1.AuxInt
 27980			if !(uint32(c) < 64) {
 27981				break
 27982			}
 27983			v.reset(OpPPC64SRDconst)
 27984			v.AuxInt = c
 27985			v.AddArg(x)
 27986			return true
 27987		}
 27988		// match: (Rsh64Ux32 x y)
 27989		// cond: shiftIsBounded(v)
 27990		// result: (SRD x y)
 27991		for {
 27992			y := v.Args[1]
 27993			x := v.Args[0]
 27994			if !(shiftIsBounded(v)) {
 27995				break
 27996			}
 27997			v.reset(OpPPC64SRD)
 27998			v.AddArg(x)
 27999			v.AddArg(y)
 28000			return true
 28001		}
 28002		// match: (Rsh64Ux32 x y)
 28003		// cond:
 28004		// result: (SRD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt32to64 y)))))
 28005		for {
 28006			y := v.Args[1]
 28007			x := v.Args[0]
 28008			v.reset(OpPPC64SRD)
 28009			v.AddArg(x)
 28010			v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 28011			v0.AddArg(y)
 28012			v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 28013			v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 28014			v2.AuxInt = -64
 28015			v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
 28016			v3.AddArg(y)
 28017			v2.AddArg(v3)
 28018			v1.AddArg(v2)
 28019			v0.AddArg(v1)
 28020			v.AddArg(v0)
 28021			return true
 28022		}
 28023	}
 28024	func rewriteValuePPC64_OpRsh64Ux64_0(v *Value) bool {
 28025		b := v.Block
 28026		typ := &b.Func.Config.Types
 28027		// match: (Rsh64Ux64 x (Const64 [c]))
 28028		// cond: uint64(c) < 64
 28029		// result: (SRDconst x [c])
 28030		for {
 28031			_ = v.Args[1]
 28032			x := v.Args[0]
 28033			v_1 := v.Args[1]
 28034			if v_1.Op != OpConst64 {
 28035				break
 28036			}
 28037			c := v_1.AuxInt
 28038			if !(uint64(c) < 64) {
 28039				break
 28040			}
 28041			v.reset(OpPPC64SRDconst)
 28042			v.AuxInt = c
 28043			v.AddArg(x)
 28044			return true
 28045		}
 28046		// match: (Rsh64Ux64 _ (Const64 [c]))
 28047		// cond: uint64(c) >= 64
 28048		// result: (MOVDconst [0])
 28049		for {
 28050			_ = v.Args[1]
 28051			v_1 := v.Args[1]
 28052			if v_1.Op != OpConst64 {
 28053				break
 28054			}
 28055			c := v_1.AuxInt
 28056			if !(uint64(c) >= 64) {
 28057				break
 28058			}
 28059			v.reset(OpPPC64MOVDconst)
 28060			v.AuxInt = 0
 28061			return true
 28062		}
 28063		// match: (Rsh64Ux64 x (MOVDconst [c]))
 28064		// cond: uint64(c) < 64
 28065		// result: (SRDconst x [c])
 28066		for {
 28067			_ = v.Args[1]
 28068			x := v.Args[0]
 28069			v_1 := v.Args[1]
 28070			if v_1.Op != OpPPC64MOVDconst {
 28071				break
 28072			}
 28073			c := v_1.AuxInt
 28074			if !(uint64(c) < 64) {
 28075				break
 28076			}
 28077			v.reset(OpPPC64SRDconst)
 28078			v.AuxInt = c
 28079			v.AddArg(x)
 28080			return true
 28081		}
 28082		// match: (Rsh64Ux64 x y)
 28083		// cond: shiftIsBounded(v)
 28084		// result: (SRD x y)
 28085		for {
 28086			y := v.Args[1]
 28087			x := v.Args[0]
 28088			if !(shiftIsBounded(v)) {
 28089				break
 28090			}
 28091			v.reset(OpPPC64SRD)
 28092			v.AddArg(x)
 28093			v.AddArg(y)
 28094			return true
 28095		}
 28096		// match: (Rsh64Ux64 x (AND y (MOVDconst [63])))
 28097		// cond:
 28098		// result: (SRD x (ANDconst <typ.Int64> [63] y))
 28099		for {
 28100			_ = v.Args[1]
 28101			x := v.Args[0]
 28102			v_1 := v.Args[1]
 28103			if v_1.Op != OpPPC64AND {
 28104				break
 28105			}
 28106			_ = v_1.Args[1]
 28107			y := v_1.Args[0]
 28108			v_1_1 := v_1.Args[1]
 28109			if v_1_1.Op != OpPPC64MOVDconst {
 28110				break
 28111			}
 28112			if v_1_1.AuxInt != 63 {
 28113				break
 28114			}
 28115			v.reset(OpPPC64SRD)
 28116			v.AddArg(x)
 28117			v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int64)
 28118			v0.AuxInt = 63
 28119			v0.AddArg(y)
 28120			v.AddArg(v0)
 28121			return true
 28122		}
 28123		// match: (Rsh64Ux64 x (AND (MOVDconst [63]) y))
 28124		// cond:
 28125		// result: (SRD x (ANDconst <typ.Int64> [63] y))
 28126		for {
 28127			_ = v.Args[1]
 28128			x := v.Args[0]
 28129			v_1 := v.Args[1]
 28130			if v_1.Op != OpPPC64AND {
 28131				break
 28132			}
 28133			y := v_1.Args[1]
 28134			v_1_0 := v_1.Args[0]
 28135			if v_1_0.Op != OpPPC64MOVDconst {
 28136				break
 28137			}
 28138			if v_1_0.AuxInt != 63 {
 28139				break
 28140			}
 28141			v.reset(OpPPC64SRD)
 28142			v.AddArg(x)
 28143			v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int64)
 28144			v0.AuxInt = 63
 28145			v0.AddArg(y)
 28146			v.AddArg(v0)
 28147			return true
 28148		}
 28149		// match: (Rsh64Ux64 x (ANDconst <typ.UInt> [63] y))
 28150		// cond:
 28151		// result: (SRD x (ANDconst <typ.UInt> [63] y))
 28152		for {
 28153			_ = v.Args[1]
 28154			x := v.Args[0]
 28155			v_1 := v.Args[1]
 28156			if v_1.Op != OpPPC64ANDconst {
 28157				break
 28158			}
 28159			if v_1.Type != typ.UInt {
 28160				break
 28161			}
 28162			if v_1.AuxInt != 63 {
 28163				break
 28164			}
 28165			y := v_1.Args[0]
 28166			v.reset(OpPPC64SRD)
 28167			v.AddArg(x)
 28168			v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 28169			v0.AuxInt = 63
 28170			v0.AddArg(y)
 28171			v.AddArg(v0)
 28172			return true
 28173		}
 28174		// match: (Rsh64Ux64 x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y)))
 28175		// cond:
 28176		// result: (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y)))
 28177		for {
 28178			_ = v.Args[1]
 28179			x := v.Args[0]
 28180			v_1 := v.Args[1]
 28181			if v_1.Op != OpPPC64SUB {
 28182				break
 28183			}
 28184			if v_1.Type != typ.UInt {
 28185				break
 28186			}
 28187			_ = v_1.Args[1]
 28188			v_1_0 := v_1.Args[0]
 28189			if v_1_0.Op != OpPPC64MOVDconst {
 28190				break
 28191			}
 28192			if v_1_0.AuxInt != 64 {
 28193				break
 28194			}
 28195			v_1_1 := v_1.Args[1]
 28196			if v_1_1.Op != OpPPC64ANDconst {
 28197				break
 28198			}
 28199			if v_1_1.Type != typ.UInt {
 28200				break
 28201			}
 28202			if v_1_1.AuxInt != 63 {
 28203				break
 28204			}
 28205			y := v_1_1.Args[0]
 28206			v.reset(OpPPC64SRD)
 28207			v.AddArg(x)
 28208			v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 28209			v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 28210			v1.AuxInt = 64
 28211			v0.AddArg(v1)
 28212			v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 28213			v2.AuxInt = 63
 28214			v2.AddArg(y)
 28215			v0.AddArg(v2)
 28216			v.AddArg(v0)
 28217			return true
 28218		}
 28219		// match: (Rsh64Ux64 x (SUB <typ.UInt> (MOVDconst [64]) (AND <typ.UInt> y (MOVDconst [63]))))
 28220		// cond:
 28221		// result: (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y)))
 28222		for {
 28223			_ = v.Args[1]
 28224			x := v.Args[0]
 28225			v_1 := v.Args[1]
 28226			if v_1.Op != OpPPC64SUB {
 28227				break
 28228			}
 28229			if v_1.Type != typ.UInt {
 28230				break
 28231			}
 28232			_ = v_1.Args[1]
 28233			v_1_0 := v_1.Args[0]
 28234			if v_1_0.Op != OpPPC64MOVDconst {
 28235				break
 28236			}
 28237			if v_1_0.AuxInt != 64 {
 28238				break
 28239			}
 28240			v_1_1 := v_1.Args[1]
 28241			if v_1_1.Op != OpPPC64AND {
 28242				break
 28243			}
 28244			if v_1_1.Type != typ.UInt {
 28245				break
 28246			}
 28247			_ = v_1_1.Args[1]
 28248			y := v_1_1.Args[0]
 28249			v_1_1_1 := v_1_1.Args[1]
 28250			if v_1_1_1.Op != OpPPC64MOVDconst {
 28251				break
 28252			}
 28253			if v_1_1_1.AuxInt != 63 {
 28254				break
 28255			}
 28256			v.reset(OpPPC64SRD)
 28257			v.AddArg(x)
 28258			v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 28259			v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 28260			v1.AuxInt = 64
 28261			v0.AddArg(v1)
 28262			v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 28263			v2.AuxInt = 63
 28264			v2.AddArg(y)
 28265			v0.AddArg(v2)
 28266			v.AddArg(v0)
 28267			return true
 28268		}
 28269		// match: (Rsh64Ux64 x (SUB <typ.UInt> (MOVDconst [64]) (AND <typ.UInt> (MOVDconst [63]) y)))
 28270		// cond:
 28271		// result: (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y)))
 28272		for {
 28273			_ = v.Args[1]
 28274			x := v.Args[0]
 28275			v_1 := v.Args[1]
 28276			if v_1.Op != OpPPC64SUB {
 28277				break
 28278			}
 28279			if v_1.Type != typ.UInt {
 28280				break
 28281			}
 28282			_ = v_1.Args[1]
 28283			v_1_0 := v_1.Args[0]
 28284			if v_1_0.Op != OpPPC64MOVDconst {
 28285				break
 28286			}
 28287			if v_1_0.AuxInt != 64 {
 28288				break
 28289			}
 28290			v_1_1 := v_1.Args[1]
 28291			if v_1_1.Op != OpPPC64AND {
 28292				break
 28293			}
 28294			if v_1_1.Type != typ.UInt {
 28295				break
 28296			}
 28297			y := v_1_1.Args[1]
 28298			v_1_1_0 := v_1_1.Args[0]
 28299			if v_1_1_0.Op != OpPPC64MOVDconst {
 28300				break
 28301			}
 28302			if v_1_1_0.AuxInt != 63 {
 28303				break
 28304			}
 28305			v.reset(OpPPC64SRD)
 28306			v.AddArg(x)
 28307			v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 28308			v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 28309			v1.AuxInt = 64
 28310			v0.AddArg(v1)
 28311			v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 28312			v2.AuxInt = 63
 28313			v2.AddArg(y)
 28314			v0.AddArg(v2)
 28315			v.AddArg(v0)
 28316			return true
 28317		}
 28318		return false
 28319	}
 28320	func rewriteValuePPC64_OpRsh64Ux64_10(v *Value) bool {
 28321		b := v.Block
 28322		typ := &b.Func.Config.Types
 28323		// match: (Rsh64Ux64 x y)
 28324		// cond:
 28325		// result: (SRD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] y))))
 28326		for {
 28327			y := v.Args[1]
 28328			x := v.Args[0]
 28329			v.reset(OpPPC64SRD)
 28330			v.AddArg(x)
 28331			v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 28332			v0.AddArg(y)
 28333			v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 28334			v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 28335			v2.AuxInt = -64
 28336			v2.AddArg(y)
 28337			v1.AddArg(v2)
 28338			v0.AddArg(v1)
 28339			v.AddArg(v0)
 28340			return true
 28341		}
 28342	}
 28343	func rewriteValuePPC64_OpRsh64Ux8_0(v *Value) bool {
 28344		b := v.Block
 28345		typ := &b.Func.Config.Types
 28346		// match: (Rsh64Ux8 x y)
 28347		// cond: shiftIsBounded(v)
 28348		// result: (SRD x y)
 28349		for {
 28350			y := v.Args[1]
 28351			x := v.Args[0]
 28352			if !(shiftIsBounded(v)) {
 28353				break
 28354			}
 28355			v.reset(OpPPC64SRD)
 28356			v.AddArg(x)
 28357			v.AddArg(y)
 28358			return true
 28359		}
 28360		// match: (Rsh64Ux8 x y)
 28361		// cond:
 28362		// result: (SRD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt8to64 y)))))
 28363		for {
 28364			y := v.Args[1]
 28365			x := v.Args[0]
 28366			v.reset(OpPPC64SRD)
 28367			v.AddArg(x)
 28368			v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 28369			v0.AddArg(y)
 28370			v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 28371			v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 28372			v2.AuxInt = -64
 28373			v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
 28374			v3.AddArg(y)
 28375			v2.AddArg(v3)
 28376			v1.AddArg(v2)
 28377			v0.AddArg(v1)
 28378			v.AddArg(v0)
 28379			return true
 28380		}
 28381	}
 28382	func rewriteValuePPC64_OpRsh64x16_0(v *Value) bool {
 28383		b := v.Block
 28384		typ := &b.Func.Config.Types
 28385		// match: (Rsh64x16 x y)
 28386		// cond: shiftIsBounded(v)
 28387		// result: (SRAD x y)
 28388		for {
 28389			y := v.Args[1]
 28390			x := v.Args[0]
 28391			if !(shiftIsBounded(v)) {
 28392				break
 28393			}
 28394			v.reset(OpPPC64SRAD)
 28395			v.AddArg(x)
 28396			v.AddArg(y)
 28397			return true
 28398		}
 28399		// match: (Rsh64x16 x y)
 28400		// cond:
 28401		// result: (SRAD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt16to64 y)))))
 28402		for {
 28403			y := v.Args[1]
 28404			x := v.Args[0]
 28405			v.reset(OpPPC64SRAD)
 28406			v.AddArg(x)
 28407			v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 28408			v0.AddArg(y)
 28409			v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 28410			v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 28411			v2.AuxInt = -64
 28412			v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
 28413			v3.AddArg(y)
 28414			v2.AddArg(v3)
 28415			v1.AddArg(v2)
 28416			v0.AddArg(v1)
 28417			v.AddArg(v0)
 28418			return true
 28419		}
 28420	}
 28421	func rewriteValuePPC64_OpRsh64x32_0(v *Value) bool {
 28422		b := v.Block
 28423		typ := &b.Func.Config.Types
 28424		// match: (Rsh64x32 x (Const64 [c]))
 28425		// cond: uint32(c) < 64
 28426		// result: (SRADconst x [c])
 28427		for {
 28428			_ = v.Args[1]
 28429			x := v.Args[0]
 28430			v_1 := v.Args[1]
 28431			if v_1.Op != OpConst64 {
 28432				break
 28433			}
 28434			c := v_1.AuxInt
 28435			if !(uint32(c) < 64) {
 28436				break
 28437			}
 28438			v.reset(OpPPC64SRADconst)
 28439			v.AuxInt = c
 28440			v.AddArg(x)
 28441			return true
 28442		}
 28443		// match: (Rsh64x32 x (MOVDconst [c]))
 28444		// cond: uint32(c) < 64
 28445		// result: (SRADconst x [c])
 28446		for {
 28447			_ = v.Args[1]
 28448			x := v.Args[0]
 28449			v_1 := v.Args[1]
 28450			if v_1.Op != OpPPC64MOVDconst {
 28451				break
 28452			}
 28453			c := v_1.AuxInt
 28454			if !(uint32(c) < 64) {
 28455				break
 28456			}
 28457			v.reset(OpPPC64SRADconst)
 28458			v.AuxInt = c
 28459			v.AddArg(x)
 28460			return true
 28461		}
 28462		// match: (Rsh64x32 x y)
 28463		// cond: shiftIsBounded(v)
 28464		// result: (SRAD x y)
 28465		for {
 28466			y := v.Args[1]
 28467			x := v.Args[0]
 28468			if !(shiftIsBounded(v)) {
 28469				break
 28470			}
 28471			v.reset(OpPPC64SRAD)
 28472			v.AddArg(x)
 28473			v.AddArg(y)
 28474			return true
 28475		}
 28476		// match: (Rsh64x32 x y)
 28477		// cond:
 28478		// result: (SRAD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt32to64 y)))))
 28479		for {
 28480			y := v.Args[1]
 28481			x := v.Args[0]
 28482			v.reset(OpPPC64SRAD)
 28483			v.AddArg(x)
 28484			v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 28485			v0.AddArg(y)
 28486			v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 28487			v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 28488			v2.AuxInt = -64
 28489			v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
 28490			v3.AddArg(y)
 28491			v2.AddArg(v3)
 28492			v1.AddArg(v2)
 28493			v0.AddArg(v1)
 28494			v.AddArg(v0)
 28495			return true
 28496		}
 28497	}
 28498	func rewriteValuePPC64_OpRsh64x64_0(v *Value) bool {
 28499		b := v.Block
 28500		typ := &b.Func.Config.Types
 28501		// match: (Rsh64x64 x (Const64 [c]))
 28502		// cond: uint64(c) < 64
 28503		// result: (SRADconst x [c])
 28504		for {
 28505			_ = v.Args[1]
 28506			x := v.Args[0]
 28507			v_1 := v.Args[1]
 28508			if v_1.Op != OpConst64 {
 28509				break
 28510			}
 28511			c := v_1.AuxInt
 28512			if !(uint64(c) < 64) {
 28513				break
 28514			}
 28515			v.reset(OpPPC64SRADconst)
 28516			v.AuxInt = c
 28517			v.AddArg(x)
 28518			return true
 28519		}
 28520		// match: (Rsh64x64 x (Const64 [c]))
 28521		// cond: uint64(c) >= 64
 28522		// result: (SRADconst x [63])
 28523		for {
 28524			_ = v.Args[1]
 28525			x := v.Args[0]
 28526			v_1 := v.Args[1]
 28527			if v_1.Op != OpConst64 {
 28528				break
 28529			}
 28530			c := v_1.AuxInt
 28531			if !(uint64(c) >= 64) {
 28532				break
 28533			}
 28534			v.reset(OpPPC64SRADconst)
 28535			v.AuxInt = 63
 28536			v.AddArg(x)
 28537			return true
 28538		}
 28539		// match: (Rsh64x64 x (MOVDconst [c]))
 28540		// cond: uint64(c) < 64
 28541		// result: (SRADconst x [c])
 28542		for {
 28543			_ = v.Args[1]
 28544			x := v.Args[0]
 28545			v_1 := v.Args[1]
 28546			if v_1.Op != OpPPC64MOVDconst {
 28547				break
 28548			}
 28549			c := v_1.AuxInt
 28550			if !(uint64(c) < 64) {
 28551				break
 28552			}
 28553			v.reset(OpPPC64SRADconst)
 28554			v.AuxInt = c
 28555			v.AddArg(x)
 28556			return true
 28557		}
 28558		// match: (Rsh64x64 x y)
 28559		// cond: shiftIsBounded(v)
 28560		// result: (SRAD x y)
 28561		for {
 28562			y := v.Args[1]
 28563			x := v.Args[0]
 28564			if !(shiftIsBounded(v)) {
 28565				break
 28566			}
 28567			v.reset(OpPPC64SRAD)
 28568			v.AddArg(x)
 28569			v.AddArg(y)
 28570			return true
 28571		}
 28572		// match: (Rsh64x64 x (AND y (MOVDconst [63])))
 28573		// cond:
 28574		// result: (SRAD x (ANDconst <typ.Int64> [63] y))
 28575		for {
 28576			_ = v.Args[1]
 28577			x := v.Args[0]
 28578			v_1 := v.Args[1]
 28579			if v_1.Op != OpPPC64AND {
 28580				break
 28581			}
 28582			_ = v_1.Args[1]
 28583			y := v_1.Args[0]
 28584			v_1_1 := v_1.Args[1]
 28585			if v_1_1.Op != OpPPC64MOVDconst {
 28586				break
 28587			}
 28588			if v_1_1.AuxInt != 63 {
 28589				break
 28590			}
 28591			v.reset(OpPPC64SRAD)
 28592			v.AddArg(x)
 28593			v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int64)
 28594			v0.AuxInt = 63
 28595			v0.AddArg(y)
 28596			v.AddArg(v0)
 28597			return true
 28598		}
 28599		// match: (Rsh64x64 x (AND (MOVDconst [63]) y))
 28600		// cond:
 28601		// result: (SRAD x (ANDconst <typ.Int64> [63] y))
 28602		for {
 28603			_ = v.Args[1]
 28604			x := v.Args[0]
 28605			v_1 := v.Args[1]
 28606			if v_1.Op != OpPPC64AND {
 28607				break
 28608			}
 28609			y := v_1.Args[1]
 28610			v_1_0 := v_1.Args[0]
 28611			if v_1_0.Op != OpPPC64MOVDconst {
 28612				break
 28613			}
 28614			if v_1_0.AuxInt != 63 {
 28615				break
 28616			}
 28617			v.reset(OpPPC64SRAD)
 28618			v.AddArg(x)
 28619			v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int64)
 28620			v0.AuxInt = 63
 28621			v0.AddArg(y)
 28622			v.AddArg(v0)
 28623			return true
 28624		}
 28625		// match: (Rsh64x64 x (ANDconst <typ.UInt> [63] y))
 28626		// cond:
 28627		// result: (SRAD x (ANDconst <typ.UInt> [63] y))
 28628		for {
 28629			_ = v.Args[1]
 28630			x := v.Args[0]
 28631			v_1 := v.Args[1]
 28632			if v_1.Op != OpPPC64ANDconst {
 28633				break
 28634			}
 28635			if v_1.Type != typ.UInt {
 28636				break
 28637			}
 28638			if v_1.AuxInt != 63 {
 28639				break
 28640			}
 28641			y := v_1.Args[0]
 28642			v.reset(OpPPC64SRAD)
 28643			v.AddArg(x)
 28644			v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 28645			v0.AuxInt = 63
 28646			v0.AddArg(y)
 28647			v.AddArg(v0)
 28648			return true
 28649		}
 28650		// match: (Rsh64x64 x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y)))
 28651		// cond:
 28652		// result: (SRAD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y)))
 28653		for {
 28654			_ = v.Args[1]
 28655			x := v.Args[0]
 28656			v_1 := v.Args[1]
 28657			if v_1.Op != OpPPC64SUB {
 28658				break
 28659			}
 28660			if v_1.Type != typ.UInt {
 28661				break
 28662			}
 28663			_ = v_1.Args[1]
 28664			v_1_0 := v_1.Args[0]
 28665			if v_1_0.Op != OpPPC64MOVDconst {
 28666				break
 28667			}
 28668			if v_1_0.AuxInt != 64 {
 28669				break
 28670			}
 28671			v_1_1 := v_1.Args[1]
 28672			if v_1_1.Op != OpPPC64ANDconst {
 28673				break
 28674			}
 28675			if v_1_1.Type != typ.UInt {
 28676				break
 28677			}
 28678			if v_1_1.AuxInt != 63 {
 28679				break
 28680			}
 28681			y := v_1_1.Args[0]
 28682			v.reset(OpPPC64SRAD)
 28683			v.AddArg(x)
 28684			v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 28685			v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 28686			v1.AuxInt = 64
 28687			v0.AddArg(v1)
 28688			v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 28689			v2.AuxInt = 63
 28690			v2.AddArg(y)
 28691			v0.AddArg(v2)
 28692			v.AddArg(v0)
 28693			return true
 28694		}
 28695		// match: (Rsh64x64 x (SUB <typ.UInt> (MOVDconst [64]) (AND <typ.UInt> y (MOVDconst [63]))))
 28696		// cond:
 28697		// result: (SRAD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y)))
 28698		for {
 28699			_ = v.Args[1]
 28700			x := v.Args[0]
 28701			v_1 := v.Args[1]
 28702			if v_1.Op != OpPPC64SUB {
 28703				break
 28704			}
 28705			if v_1.Type != typ.UInt {
 28706				break
 28707			}
 28708			_ = v_1.Args[1]
 28709			v_1_0 := v_1.Args[0]
 28710			if v_1_0.Op != OpPPC64MOVDconst {
 28711				break
 28712			}
 28713			if v_1_0.AuxInt != 64 {
 28714				break
 28715			}
 28716			v_1_1 := v_1.Args[1]
 28717			if v_1_1.Op != OpPPC64AND {
 28718				break
 28719			}
 28720			if v_1_1.Type != typ.UInt {
 28721				break
 28722			}
 28723			_ = v_1_1.Args[1]
 28724			y := v_1_1.Args[0]
 28725			v_1_1_1 := v_1_1.Args[1]
 28726			if v_1_1_1.Op != OpPPC64MOVDconst {
 28727				break
 28728			}
 28729			if v_1_1_1.AuxInt != 63 {
 28730				break
 28731			}
 28732			v.reset(OpPPC64SRAD)
 28733			v.AddArg(x)
 28734			v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 28735			v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 28736			v1.AuxInt = 64
 28737			v0.AddArg(v1)
 28738			v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 28739			v2.AuxInt = 63
 28740			v2.AddArg(y)
 28741			v0.AddArg(v2)
 28742			v.AddArg(v0)
 28743			return true
 28744		}
 28745		// match: (Rsh64x64 x (SUB <typ.UInt> (MOVDconst [64]) (AND <typ.UInt> (MOVDconst [63]) y)))
 28746		// cond:
 28747		// result: (SRAD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y)))
 28748		for {
 28749			_ = v.Args[1]
 28750			x := v.Args[0]
 28751			v_1 := v.Args[1]
 28752			if v_1.Op != OpPPC64SUB {
 28753				break
 28754			}
 28755			if v_1.Type != typ.UInt {
 28756				break
 28757			}
 28758			_ = v_1.Args[1]
 28759			v_1_0 := v_1.Args[0]
 28760			if v_1_0.Op != OpPPC64MOVDconst {
 28761				break
 28762			}
 28763			if v_1_0.AuxInt != 64 {
 28764				break
 28765			}
 28766			v_1_1 := v_1.Args[1]
 28767			if v_1_1.Op != OpPPC64AND {
 28768				break
 28769			}
 28770			if v_1_1.Type != typ.UInt {
 28771				break
 28772			}
 28773			y := v_1_1.Args[1]
 28774			v_1_1_0 := v_1_1.Args[0]
 28775			if v_1_1_0.Op != OpPPC64MOVDconst {
 28776				break
 28777			}
 28778			if v_1_1_0.AuxInt != 63 {
 28779				break
 28780			}
 28781			v.reset(OpPPC64SRAD)
 28782			v.AddArg(x)
 28783			v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 28784			v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 28785			v1.AuxInt = 64
 28786			v0.AddArg(v1)
 28787			v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 28788			v2.AuxInt = 63
 28789			v2.AddArg(y)
 28790			v0.AddArg(v2)
 28791			v.AddArg(v0)
 28792			return true
 28793		}
 28794		return false
 28795	}
 28796	func rewriteValuePPC64_OpRsh64x64_10(v *Value) bool {
 28797		b := v.Block
 28798		typ := &b.Func.Config.Types
 28799		// match: (Rsh64x64 x y)
 28800		// cond:
 28801		// result: (SRAD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] y))))
 28802		for {
 28803			y := v.Args[1]
 28804			x := v.Args[0]
 28805			v.reset(OpPPC64SRAD)
 28806			v.AddArg(x)
 28807			v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 28808			v0.AddArg(y)
 28809			v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 28810			v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 28811			v2.AuxInt = -64
 28812			v2.AddArg(y)
 28813			v1.AddArg(v2)
 28814			v0.AddArg(v1)
 28815			v.AddArg(v0)
 28816			return true
 28817		}
 28818	}
 28819	func rewriteValuePPC64_OpRsh64x8_0(v *Value) bool {
 28820		b := v.Block
 28821		typ := &b.Func.Config.Types
 28822		// match: (Rsh64x8 x y)
 28823		// cond: shiftIsBounded(v)
 28824		// result: (SRAD x y)
 28825		for {
 28826			y := v.Args[1]
 28827			x := v.Args[0]
 28828			if !(shiftIsBounded(v)) {
 28829				break
 28830			}
 28831			v.reset(OpPPC64SRAD)
 28832			v.AddArg(x)
 28833			v.AddArg(y)
 28834			return true
 28835		}
 28836		// match: (Rsh64x8 x y)
 28837		// cond:
 28838		// result: (SRAD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt8to64 y)))))
 28839		for {
 28840			y := v.Args[1]
 28841			x := v.Args[0]
 28842			v.reset(OpPPC64SRAD)
 28843			v.AddArg(x)
 28844			v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 28845			v0.AddArg(y)
 28846			v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 28847			v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 28848			v2.AuxInt = -64
 28849			v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
 28850			v3.AddArg(y)
 28851			v2.AddArg(v3)
 28852			v1.AddArg(v2)
 28853			v0.AddArg(v1)
 28854			v.AddArg(v0)
 28855			return true
 28856		}
 28857	}
 28858	func rewriteValuePPC64_OpRsh8Ux16_0(v *Value) bool {
 28859		b := v.Block
 28860		typ := &b.Func.Config.Types
 28861		// match: (Rsh8Ux16 x y)
 28862		// cond: shiftIsBounded(v)
 28863		// result: (SRW (MOVBZreg x) y)
 28864		for {
 28865			y := v.Args[1]
 28866			x := v.Args[0]
 28867			if !(shiftIsBounded(v)) {
 28868				break
 28869			}
 28870			v.reset(OpPPC64SRW)
 28871			v0 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
 28872			v0.AddArg(x)
 28873			v.AddArg(v0)
 28874			v.AddArg(y)
 28875			return true
 28876		}
 28877		// match: (Rsh8Ux16 x y)
 28878		// cond:
 28879		// result: (SRW (ZeroExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt16to64 y)))))
 28880		for {
 28881			y := v.Args[1]
 28882			x := v.Args[0]
 28883			v.reset(OpPPC64SRW)
 28884			v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 28885			v0.AddArg(x)
 28886			v.AddArg(v0)
 28887			v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 28888			v1.AddArg(y)
 28889			v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 28890			v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 28891			v3.AuxInt = -8
 28892			v4 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
 28893			v4.AddArg(y)
 28894			v3.AddArg(v4)
 28895			v2.AddArg(v3)
 28896			v1.AddArg(v2)
 28897			v.AddArg(v1)
 28898			return true
 28899		}
 28900	}
 28901	func rewriteValuePPC64_OpRsh8Ux32_0(v *Value) bool {
 28902		b := v.Block
 28903		typ := &b.Func.Config.Types
 28904		// match: (Rsh8Ux32 x (Const64 [c]))
 28905		// cond: uint32(c) < 8
 28906		// result: (SRWconst (ZeroExt8to32 x) [c])
 28907		for {
 28908			_ = v.Args[1]
 28909			x := v.Args[0]
 28910			v_1 := v.Args[1]
 28911			if v_1.Op != OpConst64 {
 28912				break
 28913			}
 28914			c := v_1.AuxInt
 28915			if !(uint32(c) < 8) {
 28916				break
 28917			}
 28918			v.reset(OpPPC64SRWconst)
 28919			v.AuxInt = c
 28920			v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 28921			v0.AddArg(x)
 28922			v.AddArg(v0)
 28923			return true
 28924		}
 28925		// match: (Rsh8Ux32 x (MOVDconst [c]))
 28926		// cond: uint32(c) < 8
 28927		// result: (SRWconst (ZeroExt8to32 x) [c])
 28928		for {
 28929			_ = v.Args[1]
 28930			x := v.Args[0]
 28931			v_1 := v.Args[1]
 28932			if v_1.Op != OpPPC64MOVDconst {
 28933				break
 28934			}
 28935			c := v_1.AuxInt
 28936			if !(uint32(c) < 8) {
 28937				break
 28938			}
 28939			v.reset(OpPPC64SRWconst)
 28940			v.AuxInt = c
 28941			v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 28942			v0.AddArg(x)
 28943			v.AddArg(v0)
 28944			return true
 28945		}
 28946		// match: (Rsh8Ux32 x y)
 28947		// cond: shiftIsBounded(v)
 28948		// result: (SRW (MOVBZreg x) y)
 28949		for {
 28950			y := v.Args[1]
 28951			x := v.Args[0]
 28952			if !(shiftIsBounded(v)) {
 28953				break
 28954			}
 28955			v.reset(OpPPC64SRW)
 28956			v0 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
 28957			v0.AddArg(x)
 28958			v.AddArg(v0)
 28959			v.AddArg(y)
 28960			return true
 28961		}
 28962		// match: (Rsh8Ux32 x y)
 28963		// cond:
 28964		// result: (SRW (ZeroExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt32to64 y)))))
 28965		for {
 28966			y := v.Args[1]
 28967			x := v.Args[0]
 28968			v.reset(OpPPC64SRW)
 28969			v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 28970			v0.AddArg(x)
 28971			v.AddArg(v0)
 28972			v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 28973			v1.AddArg(y)
 28974			v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 28975			v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 28976			v3.AuxInt = -8
 28977			v4 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
 28978			v4.AddArg(y)
 28979			v3.AddArg(v4)
 28980			v2.AddArg(v3)
 28981			v1.AddArg(v2)
 28982			v.AddArg(v1)
 28983			return true
 28984		}
 28985	}
 28986	func rewriteValuePPC64_OpRsh8Ux64_0(v *Value) bool {
 28987		b := v.Block
 28988		typ := &b.Func.Config.Types
 28989		// match: (Rsh8Ux64 x (Const64 [c]))
 28990		// cond: uint64(c) < 8
 28991		// result: (SRWconst (ZeroExt8to32 x) [c])
 28992		for {
 28993			_ = v.Args[1]
 28994			x := v.Args[0]
 28995			v_1 := v.Args[1]
 28996			if v_1.Op != OpConst64 {
 28997				break
 28998			}
 28999			c := v_1.AuxInt
 29000			if !(uint64(c) < 8) {
 29001				break
 29002			}
 29003			v.reset(OpPPC64SRWconst)
 29004			v.AuxInt = c
 29005			v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 29006			v0.AddArg(x)
 29007			v.AddArg(v0)
 29008			return true
 29009		}
 29010		// match: (Rsh8Ux64 _ (Const64 [c]))
 29011		// cond: uint64(c) >= 8
 29012		// result: (MOVDconst [0])
 29013		for {
 29014			_ = v.Args[1]
 29015			v_1 := v.Args[1]
 29016			if v_1.Op != OpConst64 {
 29017				break
 29018			}
 29019			c := v_1.AuxInt
 29020			if !(uint64(c) >= 8) {
 29021				break
 29022			}
 29023			v.reset(OpPPC64MOVDconst)
 29024			v.AuxInt = 0
 29025			return true
 29026		}
 29027		// match: (Rsh8Ux64 x (MOVDconst [c]))
 29028		// cond: uint64(c) < 8
 29029		// result: (SRWconst (ZeroExt8to32 x) [c])
 29030		for {
 29031			_ = v.Args[1]
 29032			x := v.Args[0]
 29033			v_1 := v.Args[1]
 29034			if v_1.Op != OpPPC64MOVDconst {
 29035				break
 29036			}
 29037			c := v_1.AuxInt
 29038			if !(uint64(c) < 8) {
 29039				break
 29040			}
 29041			v.reset(OpPPC64SRWconst)
 29042			v.AuxInt = c
 29043			v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 29044			v0.AddArg(x)
 29045			v.AddArg(v0)
 29046			return true
 29047		}
 29048		// match: (Rsh8Ux64 x y)
 29049		// cond: shiftIsBounded(v)
 29050		// result: (SRW (MOVBZreg x) y)
 29051		for {
 29052			y := v.Args[1]
 29053			x := v.Args[0]
 29054			if !(shiftIsBounded(v)) {
 29055				break
 29056			}
 29057			v.reset(OpPPC64SRW)
 29058			v0 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
 29059			v0.AddArg(x)
 29060			v.AddArg(v0)
 29061			v.AddArg(y)
 29062			return true
 29063		}
 29064		// match: (Rsh8Ux64 x y)
 29065		// cond:
 29066		// result: (SRW (ZeroExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] y))))
 29067		for {
 29068			y := v.Args[1]
 29069			x := v.Args[0]
 29070			v.reset(OpPPC64SRW)
 29071			v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 29072			v0.AddArg(x)
 29073			v.AddArg(v0)
 29074			v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 29075			v1.AddArg(y)
 29076			v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 29077			v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 29078			v3.AuxInt = -8
 29079			v3.AddArg(y)
 29080			v2.AddArg(v3)
 29081			v1.AddArg(v2)
 29082			v.AddArg(v1)
 29083			return true
 29084		}
 29085	}
 29086	func rewriteValuePPC64_OpRsh8Ux8_0(v *Value) bool {
 29087		b := v.Block
 29088		typ := &b.Func.Config.Types
 29089		// match: (Rsh8Ux8 x y)
 29090		// cond: shiftIsBounded(v)
 29091		// result: (SRW (MOVBZreg x) y)
 29092		for {
 29093			y := v.Args[1]
 29094			x := v.Args[0]
 29095			if !(shiftIsBounded(v)) {
 29096				break
 29097			}
 29098			v.reset(OpPPC64SRW)
 29099			v0 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
 29100			v0.AddArg(x)
 29101			v.AddArg(v0)
 29102			v.AddArg(y)
 29103			return true
 29104		}
 29105		// match: (Rsh8Ux8 x y)
 29106		// cond:
 29107		// result: (SRW (ZeroExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt8to64 y)))))
 29108		for {
 29109			y := v.Args[1]
 29110			x := v.Args[0]
 29111			v.reset(OpPPC64SRW)
 29112			v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 29113			v0.AddArg(x)
 29114			v.AddArg(v0)
 29115			v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 29116			v1.AddArg(y)
 29117			v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 29118			v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 29119			v3.AuxInt = -8
 29120			v4 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
 29121			v4.AddArg(y)
 29122			v3.AddArg(v4)
 29123			v2.AddArg(v3)
 29124			v1.AddArg(v2)
 29125			v.AddArg(v1)
 29126			return true
 29127		}
 29128	}
 29129	func rewriteValuePPC64_OpRsh8x16_0(v *Value) bool {
 29130		b := v.Block
 29131		typ := &b.Func.Config.Types
 29132		// match: (Rsh8x16 x y)
 29133		// cond: shiftIsBounded(v)
 29134		// result: (SRAW (MOVBreg x) y)
 29135		for {
 29136			y := v.Args[1]
 29137			x := v.Args[0]
 29138			if !(shiftIsBounded(v)) {
 29139				break
 29140			}
 29141			v.reset(OpPPC64SRAW)
 29142			v0 := b.NewValue0(v.Pos, OpPPC64MOVBreg, typ.Int64)
 29143			v0.AddArg(x)
 29144			v.AddArg(v0)
 29145			v.AddArg(y)
 29146			return true
 29147		}
 29148		// match: (Rsh8x16 x y)
 29149		// cond:
 29150		// result: (SRAW (SignExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt16to64 y)))))
 29151		for {
 29152			y := v.Args[1]
 29153			x := v.Args[0]
 29154			v.reset(OpPPC64SRAW)
 29155			v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 29156			v0.AddArg(x)
 29157			v.AddArg(v0)
 29158			v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 29159			v1.AddArg(y)
 29160			v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 29161			v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 29162			v3.AuxInt = -8
 29163			v4 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
 29164			v4.AddArg(y)
 29165			v3.AddArg(v4)
 29166			v2.AddArg(v3)
 29167			v1.AddArg(v2)
 29168			v.AddArg(v1)
 29169			return true
 29170		}
 29171	}
 29172	func rewriteValuePPC64_OpRsh8x32_0(v *Value) bool {
 29173		b := v.Block
 29174		typ := &b.Func.Config.Types
 29175		// match: (Rsh8x32 x (Const64 [c]))
 29176		// cond: uint32(c) < 8
 29177		// result: (SRAWconst (SignExt8to32 x) [c])
 29178		for {
 29179			_ = v.Args[1]
 29180			x := v.Args[0]
 29181			v_1 := v.Args[1]
 29182			if v_1.Op != OpConst64 {
 29183				break
 29184			}
 29185			c := v_1.AuxInt
 29186			if !(uint32(c) < 8) {
 29187				break
 29188			}
 29189			v.reset(OpPPC64SRAWconst)
 29190			v.AuxInt = c
 29191			v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 29192			v0.AddArg(x)
 29193			v.AddArg(v0)
 29194			return true
 29195		}
 29196		// match: (Rsh8x32 x (MOVDconst [c]))
 29197		// cond: uint32(c) < 8
 29198		// result: (SRAWconst (SignExt8to32 x) [c])
 29199		for {
 29200			_ = v.Args[1]
 29201			x := v.Args[0]
 29202			v_1 := v.Args[1]
 29203			if v_1.Op != OpPPC64MOVDconst {
 29204				break
 29205			}
 29206			c := v_1.AuxInt
 29207			if !(uint32(c) < 8) {
 29208				break
 29209			}
 29210			v.reset(OpPPC64SRAWconst)
 29211			v.AuxInt = c
 29212			v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 29213			v0.AddArg(x)
 29214			v.AddArg(v0)
 29215			return true
 29216		}
 29217		// match: (Rsh8x32 x y)
 29218		// cond: shiftIsBounded(v)
 29219		// result: (SRAW (MOVBreg x) y)
 29220		for {
 29221			y := v.Args[1]
 29222			x := v.Args[0]
 29223			if !(shiftIsBounded(v)) {
 29224				break
 29225			}
 29226			v.reset(OpPPC64SRAW)
 29227			v0 := b.NewValue0(v.Pos, OpPPC64MOVBreg, typ.Int64)
 29228			v0.AddArg(x)
 29229			v.AddArg(v0)
 29230			v.AddArg(y)
 29231			return true
 29232		}
 29233		// match: (Rsh8x32 x y)
 29234		// cond:
 29235		// result: (SRAW (SignExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt32to64 y)))))
 29236		for {
 29237			y := v.Args[1]
 29238			x := v.Args[0]
 29239			v.reset(OpPPC64SRAW)
 29240			v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 29241			v0.AddArg(x)
 29242			v.AddArg(v0)
 29243			v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 29244			v1.AddArg(y)
 29245			v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 29246			v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 29247			v3.AuxInt = -8
 29248			v4 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
 29249			v4.AddArg(y)
 29250			v3.AddArg(v4)
 29251			v2.AddArg(v3)
 29252			v1.AddArg(v2)
 29253			v.AddArg(v1)
 29254			return true
 29255		}
 29256	}
 29257	func rewriteValuePPC64_OpRsh8x64_0(v *Value) bool {
 29258		b := v.Block
 29259		typ := &b.Func.Config.Types
 29260		// match: (Rsh8x64 x (Const64 [c]))
 29261		// cond: uint64(c) < 8
 29262		// result: (SRAWconst (SignExt8to32 x) [c])
 29263		for {
 29264			_ = v.Args[1]
 29265			x := v.Args[0]
 29266			v_1 := v.Args[1]
 29267			if v_1.Op != OpConst64 {
 29268				break
 29269			}
 29270			c := v_1.AuxInt
 29271			if !(uint64(c) < 8) {
 29272				break
 29273			}
 29274			v.reset(OpPPC64SRAWconst)
 29275			v.AuxInt = c
 29276			v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 29277			v0.AddArg(x)
 29278			v.AddArg(v0)
 29279			return true
 29280		}
 29281		// match: (Rsh8x64 x (Const64 [c]))
 29282		// cond: uint64(c) >= 8
 29283		// result: (SRAWconst (SignExt8to32 x) [63])
 29284		for {
 29285			_ = v.Args[1]
 29286			x := v.Args[0]
 29287			v_1 := v.Args[1]
 29288			if v_1.Op != OpConst64 {
 29289				break
 29290			}
 29291			c := v_1.AuxInt
 29292			if !(uint64(c) >= 8) {
 29293				break
 29294			}
 29295			v.reset(OpPPC64SRAWconst)
 29296			v.AuxInt = 63
 29297			v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 29298			v0.AddArg(x)
 29299			v.AddArg(v0)
 29300			return true
 29301		}
 29302		// match: (Rsh8x64 x (MOVDconst [c]))
 29303		// cond: uint64(c) < 8
 29304		// result: (SRAWconst (SignExt8to32 x) [c])
 29305		for {
 29306			_ = v.Args[1]
 29307			x := v.Args[0]
 29308			v_1 := v.Args[1]
 29309			if v_1.Op != OpPPC64MOVDconst {
 29310				break
 29311			}
 29312			c := v_1.AuxInt
 29313			if !(uint64(c) < 8) {
 29314				break
 29315			}
 29316			v.reset(OpPPC64SRAWconst)
 29317			v.AuxInt = c
 29318			v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 29319			v0.AddArg(x)
 29320			v.AddArg(v0)
 29321			return true
 29322		}
 29323		// match: (Rsh8x64 x y)
 29324		// cond: shiftIsBounded(v)
 29325		// result: (SRAW (MOVBreg x) y)
 29326		for {
 29327			y := v.Args[1]
 29328			x := v.Args[0]
 29329			if !(shiftIsBounded(v)) {
 29330				break
 29331			}
 29332			v.reset(OpPPC64SRAW)
 29333			v0 := b.NewValue0(v.Pos, OpPPC64MOVBreg, typ.Int64)
 29334			v0.AddArg(x)
 29335			v.AddArg(v0)
 29336			v.AddArg(y)
 29337			return true
 29338		}
 29339		// match: (Rsh8x64 x y)
 29340		// cond:
 29341		// result: (SRAW (SignExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] y))))
 29342		for {
 29343			y := v.Args[1]
 29344			x := v.Args[0]
 29345			v.reset(OpPPC64SRAW)
 29346			v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 29347			v0.AddArg(x)
 29348			v.AddArg(v0)
 29349			v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 29350			v1.AddArg(y)
 29351			v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 29352			v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 29353			v3.AuxInt = -8
 29354			v3.AddArg(y)
 29355			v2.AddArg(v3)
 29356			v1.AddArg(v2)
 29357			v.AddArg(v1)
 29358			return true
 29359		}
 29360	}
 29361	func rewriteValuePPC64_OpRsh8x8_0(v *Value) bool {
 29362		b := v.Block
 29363		typ := &b.Func.Config.Types
 29364		// match: (Rsh8x8 x y)
 29365		// cond: shiftIsBounded(v)
 29366		// result: (SRAW (MOVBreg x) y)
 29367		for {
 29368			y := v.Args[1]
 29369			x := v.Args[0]
 29370			if !(shiftIsBounded(v)) {
 29371				break
 29372			}
 29373			v.reset(OpPPC64SRAW)
 29374			v0 := b.NewValue0(v.Pos, OpPPC64MOVBreg, typ.Int64)
 29375			v0.AddArg(x)
 29376			v.AddArg(v0)
 29377			v.AddArg(y)
 29378			return true
 29379		}
 29380		// match: (Rsh8x8 x y)
 29381		// cond:
 29382		// result: (SRAW (SignExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt8to64 y)))))
 29383		for {
 29384			y := v.Args[1]
 29385			x := v.Args[0]
 29386			v.reset(OpPPC64SRAW)
 29387			v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 29388			v0.AddArg(x)
 29389			v.AddArg(v0)
 29390			v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 29391			v1.AddArg(y)
 29392			v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 29393			v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 29394			v3.AuxInt = -8
 29395			v4 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
 29396			v4.AddArg(y)
 29397			v3.AddArg(v4)
 29398			v2.AddArg(v3)
 29399			v1.AddArg(v2)
 29400			v.AddArg(v1)
 29401			return true
 29402		}
 29403	}
 29404	func rewriteValuePPC64_OpSignExt16to32_0(v *Value) bool {
 29405		// match: (SignExt16to32 x)
 29406		// cond:
 29407		// result: (MOVHreg x)
 29408		for {
 29409			x := v.Args[0]
 29410			v.reset(OpPPC64MOVHreg)
 29411			v.AddArg(x)
 29412			return true
 29413		}
 29414	}
 29415	func rewriteValuePPC64_OpSignExt16to64_0(v *Value) bool {
 29416		// match: (SignExt16to64 x)
 29417		// cond:
 29418		// result: (MOVHreg x)
 29419		for {
 29420			x := v.Args[0]
 29421			v.reset(OpPPC64MOVHreg)
 29422			v.AddArg(x)
 29423			return true
 29424		}
 29425	}
 29426	func rewriteValuePPC64_OpSignExt32to64_0(v *Value) bool {
 29427		// match: (SignExt32to64 x)
 29428		// cond:
 29429		// result: (MOVWreg x)
 29430		for {
 29431			x := v.Args[0]
 29432			v.reset(OpPPC64MOVWreg)
 29433			v.AddArg(x)
 29434			return true
 29435		}
 29436	}
 29437	func rewriteValuePPC64_OpSignExt8to16_0(v *Value) bool {
 29438		// match: (SignExt8to16 x)
 29439		// cond:
 29440		// result: (MOVBreg x)
 29441		for {
 29442			x := v.Args[0]
 29443			v.reset(OpPPC64MOVBreg)
 29444			v.AddArg(x)
 29445			return true
 29446		}
 29447	}
 29448	func rewriteValuePPC64_OpSignExt8to32_0(v *Value) bool {
 29449		// match: (SignExt8to32 x)
 29450		// cond:
 29451		// result: (MOVBreg x)
 29452		for {
 29453			x := v.Args[0]
 29454			v.reset(OpPPC64MOVBreg)
 29455			v.AddArg(x)
 29456			return true
 29457		}
 29458	}
 29459	func rewriteValuePPC64_OpSignExt8to64_0(v *Value) bool {
 29460		// match: (SignExt8to64 x)
 29461		// cond:
 29462		// result: (MOVBreg x)
 29463		for {
 29464			x := v.Args[0]
 29465			v.reset(OpPPC64MOVBreg)
 29466			v.AddArg(x)
 29467			return true
 29468		}
 29469	}
 29470	func rewriteValuePPC64_OpSlicemask_0(v *Value) bool {
 29471		b := v.Block
 29472		// match: (Slicemask <t> x)
 29473		// cond:
 29474		// result: (SRADconst (NEG <t> x) [63])
 29475		for {
 29476			t := v.Type
 29477			x := v.Args[0]
 29478			v.reset(OpPPC64SRADconst)
 29479			v.AuxInt = 63
 29480			v0 := b.NewValue0(v.Pos, OpPPC64NEG, t)
 29481			v0.AddArg(x)
 29482			v.AddArg(v0)
 29483			return true
 29484		}
 29485	}
 29486	func rewriteValuePPC64_OpSqrt_0(v *Value) bool {
 29487		// match: (Sqrt x)
 29488		// cond:
 29489		// result: (FSQRT x)
 29490		for {
 29491			x := v.Args[0]
 29492			v.reset(OpPPC64FSQRT)
 29493			v.AddArg(x)
 29494			return true
 29495		}
 29496	}
 29497	func rewriteValuePPC64_OpStaticCall_0(v *Value) bool {
 29498		// match: (StaticCall [argwid] {target} mem)
 29499		// cond:
 29500		// result: (CALLstatic [argwid] {target} mem)
 29501		for {
 29502			argwid := v.AuxInt
 29503			target := v.Aux
 29504			mem := v.Args[0]
 29505			v.reset(OpPPC64CALLstatic)
 29506			v.AuxInt = argwid
 29507			v.Aux = target
 29508			v.AddArg(mem)
 29509			return true
 29510		}
 29511	}
 29512	func rewriteValuePPC64_OpStore_0(v *Value) bool {
 29513		// match: (Store {t} ptr val mem)
 29514		// cond: t.(*types.Type).Size() == 8 && is64BitFloat(val.Type)
 29515		// result: (FMOVDstore ptr val mem)
 29516		for {
 29517			t := v.Aux
 29518			mem := v.Args[2]
 29519			ptr := v.Args[0]
 29520			val := v.Args[1]
 29521			if !(t.(*types.Type).Size() == 8 && is64BitFloat(val.Type)) {
 29522				break
 29523			}
 29524			v.reset(OpPPC64FMOVDstore)
 29525			v.AddArg(ptr)
 29526			v.AddArg(val)
 29527			v.AddArg(mem)
 29528			return true
 29529		}
 29530		// match: (Store {t} ptr val mem)
 29531		// cond: t.(*types.Type).Size() == 8 && is32BitFloat(val.Type)
 29532		// result: (FMOVDstore ptr val mem)
 29533		for {
 29534			t := v.Aux
 29535			mem := v.Args[2]
 29536			ptr := v.Args[0]
 29537			val := v.Args[1]
 29538			if !(t.(*types.Type).Size() == 8 && is32BitFloat(val.Type)) {
 29539				break
 29540			}
 29541			v.reset(OpPPC64FMOVDstore)
 29542			v.AddArg(ptr)
 29543			v.AddArg(val)
 29544			v.AddArg(mem)
 29545			return true
 29546		}
 29547		// match: (Store {t} ptr val mem)
 29548		// cond: t.(*types.Type).Size() == 4 && is32BitFloat(val.Type)
 29549		// result: (FMOVSstore ptr val mem)
 29550		for {
 29551			t := v.Aux
 29552			mem := v.Args[2]
 29553			ptr := v.Args[0]
 29554			val := v.Args[1]
 29555			if !(t.(*types.Type).Size() == 4 && is32BitFloat(val.Type)) {
 29556				break
 29557			}
 29558			v.reset(OpPPC64FMOVSstore)
 29559			v.AddArg(ptr)
 29560			v.AddArg(val)
 29561			v.AddArg(mem)
 29562			return true
 29563		}
 29564		// match: (Store {t} ptr val mem)
 29565		// cond: t.(*types.Type).Size() == 8 && (is64BitInt(val.Type) || isPtr(val.Type))
 29566		// result: (MOVDstore ptr val mem)
 29567		for {
 29568			t := v.Aux
 29569			mem := v.Args[2]
 29570			ptr := v.Args[0]
 29571			val := v.Args[1]
 29572			if !(t.(*types.Type).Size() == 8 && (is64BitInt(val.Type) || isPtr(val.Type))) {
 29573				break
 29574			}
 29575			v.reset(OpPPC64MOVDstore)
 29576			v.AddArg(ptr)
 29577			v.AddArg(val)
 29578			v.AddArg(mem)
 29579			return true
 29580		}
 29581		// match: (Store {t} ptr val mem)
 29582		// cond: t.(*types.Type).Size() == 4 && is32BitInt(val.Type)
 29583		// result: (MOVWstore ptr val mem)
 29584		for {
 29585			t := v.Aux
 29586			mem := v.Args[2]
 29587			ptr := v.Args[0]
 29588			val := v.Args[1]
 29589			if !(t.(*types.Type).Size() == 4 && is32BitInt(val.Type)) {
 29590				break
 29591			}
 29592			v.reset(OpPPC64MOVWstore)
 29593			v.AddArg(ptr)
 29594			v.AddArg(val)
 29595			v.AddArg(mem)
 29596			return true
 29597		}
 29598		// match: (Store {t} ptr val mem)
 29599		// cond: t.(*types.Type).Size() == 2
 29600		// result: (MOVHstore ptr val mem)
 29601		for {
 29602			t := v.Aux
 29603			mem := v.Args[2]
 29604			ptr := v.Args[0]
 29605			val := v.Args[1]
 29606			if !(t.(*types.Type).Size() == 2) {
 29607				break
 29608			}
 29609			v.reset(OpPPC64MOVHstore)
 29610			v.AddArg(ptr)
 29611			v.AddArg(val)
 29612			v.AddArg(mem)
 29613			return true
 29614		}
 29615		// match: (Store {t} ptr val mem)
 29616		// cond: t.(*types.Type).Size() == 1
 29617		// result: (MOVBstore ptr val mem)
 29618		for {
 29619			t := v.Aux
 29620			mem := v.Args[2]
 29621			ptr := v.Args[0]
 29622			val := v.Args[1]
 29623			if !(t.(*types.Type).Size() == 1) {
 29624				break
 29625			}
 29626			v.reset(OpPPC64MOVBstore)
 29627			v.AddArg(ptr)
 29628			v.AddArg(val)
 29629			v.AddArg(mem)
 29630			return true
 29631		}
 29632		return false
 29633	}
 29634	func rewriteValuePPC64_OpSub16_0(v *Value) bool {
 29635		// match: (Sub16 x y)
 29636		// cond:
 29637		// result: (SUB x y)
 29638		for {
 29639			y := v.Args[1]
 29640			x := v.Args[0]
 29641			v.reset(OpPPC64SUB)
 29642			v.AddArg(x)
 29643			v.AddArg(y)
 29644			return true
 29645		}
 29646	}
 29647	func rewriteValuePPC64_OpSub32_0(v *Value) bool {
 29648		// match: (Sub32 x y)
 29649		// cond:
 29650		// result: (SUB x y)
 29651		for {
 29652			y := v.Args[1]
 29653			x := v.Args[0]
 29654			v.reset(OpPPC64SUB)
 29655			v.AddArg(x)
 29656			v.AddArg(y)
 29657			return true
 29658		}
 29659	}
 29660	func rewriteValuePPC64_OpSub32F_0(v *Value) bool {
 29661		// match: (Sub32F x y)
 29662		// cond:
 29663		// result: (FSUBS x y)
 29664		for {
 29665			y := v.Args[1]
 29666			x := v.Args[0]
 29667			v.reset(OpPPC64FSUBS)
 29668			v.AddArg(x)
 29669			v.AddArg(y)
 29670			return true
 29671		}
 29672	}
 29673	func rewriteValuePPC64_OpSub64_0(v *Value) bool {
 29674		// match: (Sub64 x y)
 29675		// cond:
 29676		// result: (SUB x y)
 29677		for {
 29678			y := v.Args[1]
 29679			x := v.Args[0]
 29680			v.reset(OpPPC64SUB)
 29681			v.AddArg(x)
 29682			v.AddArg(y)
 29683			return true
 29684		}
 29685	}
 29686	func rewriteValuePPC64_OpSub64F_0(v *Value) bool {
 29687		// match: (Sub64F x y)
 29688		// cond:
 29689		// result: (FSUB x y)
 29690		for {
 29691			y := v.Args[1]
 29692			x := v.Args[0]
 29693			v.reset(OpPPC64FSUB)
 29694			v.AddArg(x)
 29695			v.AddArg(y)
 29696			return true
 29697		}
 29698	}
 29699	func rewriteValuePPC64_OpSub8_0(v *Value) bool {
 29700		// match: (Sub8 x y)
 29701		// cond:
 29702		// result: (SUB x y)
 29703		for {
 29704			y := v.Args[1]
 29705			x := v.Args[0]
 29706			v.reset(OpPPC64SUB)
 29707			v.AddArg(x)
 29708			v.AddArg(y)
 29709			return true
 29710		}
 29711	}
 29712	func rewriteValuePPC64_OpSubPtr_0(v *Value) bool {
 29713		// match: (SubPtr x y)
 29714		// cond:
 29715		// result: (SUB x y)
 29716		for {
 29717			y := v.Args[1]
 29718			x := v.Args[0]
 29719			v.reset(OpPPC64SUB)
 29720			v.AddArg(x)
 29721			v.AddArg(y)
 29722			return true
 29723		}
 29724	}
 29725	func rewriteValuePPC64_OpTrunc_0(v *Value) bool {
 29726		// match: (Trunc x)
 29727		// cond:
 29728		// result: (FTRUNC x)
 29729		for {
 29730			x := v.Args[0]
 29731			v.reset(OpPPC64FTRUNC)
 29732			v.AddArg(x)
 29733			return true
 29734		}
 29735	}
 29736	func rewriteValuePPC64_OpTrunc16to8_0(v *Value) bool {
 29737		// match: (Trunc16to8 <t> x)
 29738		// cond: isSigned(t)
 29739		// result: (MOVBreg x)
 29740		for {
 29741			t := v.Type
 29742			x := v.Args[0]
 29743			if !(isSigned(t)) {
 29744				break
 29745			}
 29746			v.reset(OpPPC64MOVBreg)
 29747			v.AddArg(x)
 29748			return true
 29749		}
 29750		// match: (Trunc16to8 x)
 29751		// cond:
 29752		// result: (MOVBZreg x)
 29753		for {
 29754			x := v.Args[0]
 29755			v.reset(OpPPC64MOVBZreg)
 29756			v.AddArg(x)
 29757			return true
 29758		}
 29759	}
 29760	func rewriteValuePPC64_OpTrunc32to16_0(v *Value) bool {
 29761		// match: (Trunc32to16 <t> x)
 29762		// cond: isSigned(t)
 29763		// result: (MOVHreg x)
 29764		for {
 29765			t := v.Type
 29766			x := v.Args[0]
 29767			if !(isSigned(t)) {
 29768				break
 29769			}
 29770			v.reset(OpPPC64MOVHreg)
 29771			v.AddArg(x)
 29772			return true
 29773		}
 29774		// match: (Trunc32to16 x)
 29775		// cond:
 29776		// result: (MOVHZreg x)
 29777		for {
 29778			x := v.Args[0]
 29779			v.reset(OpPPC64MOVHZreg)
 29780			v.AddArg(x)
 29781			return true
 29782		}
 29783	}
 29784	func rewriteValuePPC64_OpTrunc32to8_0(v *Value) bool {
 29785		// match: (Trunc32to8 <t> x)
 29786		// cond: isSigned(t)
 29787		// result: (MOVBreg x)
 29788		for {
 29789			t := v.Type
 29790			x := v.Args[0]
 29791			if !(isSigned(t)) {
 29792				break
 29793			}
 29794			v.reset(OpPPC64MOVBreg)
 29795			v.AddArg(x)
 29796			return true
 29797		}
 29798		// match: (Trunc32to8 x)
 29799		// cond:
 29800		// result: (MOVBZreg x)
 29801		for {
 29802			x := v.Args[0]
 29803			v.reset(OpPPC64MOVBZreg)
 29804			v.AddArg(x)
 29805			return true
 29806		}
 29807	}
 29808	func rewriteValuePPC64_OpTrunc64to16_0(v *Value) bool {
 29809		// match: (Trunc64to16 <t> x)
 29810		// cond: isSigned(t)
 29811		// result: (MOVHreg x)
 29812		for {
 29813			t := v.Type
 29814			x := v.Args[0]
 29815			if !(isSigned(t)) {
 29816				break
 29817			}
 29818			v.reset(OpPPC64MOVHreg)
 29819			v.AddArg(x)
 29820			return true
 29821		}
 29822		// match: (Trunc64to16 x)
 29823		// cond:
 29824		// result: (MOVHZreg x)
 29825		for {
 29826			x := v.Args[0]
 29827			v.reset(OpPPC64MOVHZreg)
 29828			v.AddArg(x)
 29829			return true
 29830		}
 29831	}
 29832	func rewriteValuePPC64_OpTrunc64to32_0(v *Value) bool {
 29833		// match: (Trunc64to32 <t> x)
 29834		// cond: isSigned(t)
 29835		// result: (MOVWreg x)
 29836		for {
 29837			t := v.Type
 29838			x := v.Args[0]
 29839			if !(isSigned(t)) {
 29840				break
 29841			}
 29842			v.reset(OpPPC64MOVWreg)
 29843			v.AddArg(x)
 29844			return true
 29845		}
 29846		// match: (Trunc64to32 x)
 29847		// cond:
 29848		// result: (MOVWZreg x)
 29849		for {
 29850			x := v.Args[0]
 29851			v.reset(OpPPC64MOVWZreg)
 29852			v.AddArg(x)
 29853			return true
 29854		}
 29855	}
 29856	func rewriteValuePPC64_OpTrunc64to8_0(v *Value) bool {
 29857		// match: (Trunc64to8 <t> x)
 29858		// cond: isSigned(t)
 29859		// result: (MOVBreg x)
 29860		for {
 29861			t := v.Type
 29862			x := v.Args[0]
 29863			if !(isSigned(t)) {
 29864				break
 29865			}
 29866			v.reset(OpPPC64MOVBreg)
 29867			v.AddArg(x)
 29868			return true
 29869		}
 29870		// match: (Trunc64to8 x)
 29871		// cond:
 29872		// result: (MOVBZreg x)
 29873		for {
 29874			x := v.Args[0]
 29875			v.reset(OpPPC64MOVBZreg)
 29876			v.AddArg(x)
 29877			return true
 29878		}
 29879	}
 29880	func rewriteValuePPC64_OpWB_0(v *Value) bool {
 29881		// match: (WB {fn} destptr srcptr mem)
 29882		// cond:
 29883		// result: (LoweredWB {fn} destptr srcptr mem)
 29884		for {
 29885			fn := v.Aux
 29886			mem := v.Args[2]
 29887			destptr := v.Args[0]
 29888			srcptr := v.Args[1]
 29889			v.reset(OpPPC64LoweredWB)
 29890			v.Aux = fn
 29891			v.AddArg(destptr)
 29892			v.AddArg(srcptr)
 29893			v.AddArg(mem)
 29894			return true
 29895		}
 29896	}
 29897	func rewriteValuePPC64_OpXor16_0(v *Value) bool {
 29898		// match: (Xor16 x y)
 29899		// cond:
 29900		// result: (XOR x y)
 29901		for {
 29902			y := v.Args[1]
 29903			x := v.Args[0]
 29904			v.reset(OpPPC64XOR)
 29905			v.AddArg(x)
 29906			v.AddArg(y)
 29907			return true
 29908		}
 29909	}
 29910	func rewriteValuePPC64_OpXor32_0(v *Value) bool {
 29911		// match: (Xor32 x y)
 29912		// cond:
 29913		// result: (XOR x y)
 29914		for {
 29915			y := v.Args[1]
 29916			x := v.Args[0]
 29917			v.reset(OpPPC64XOR)
 29918			v.AddArg(x)
 29919			v.AddArg(y)
 29920			return true
 29921		}
 29922	}
 29923	func rewriteValuePPC64_OpXor64_0(v *Value) bool {
 29924		// match: (Xor64 x y)
 29925		// cond:
 29926		// result: (XOR x y)
 29927		for {
 29928			y := v.Args[1]
 29929			x := v.Args[0]
 29930			v.reset(OpPPC64XOR)
 29931			v.AddArg(x)
 29932			v.AddArg(y)
 29933			return true
 29934		}
 29935	}
 29936	func rewriteValuePPC64_OpXor8_0(v *Value) bool {
 29937		// match: (Xor8 x y)
 29938		// cond:
 29939		// result: (XOR x y)
 29940		for {
 29941			y := v.Args[1]
 29942			x := v.Args[0]
 29943			v.reset(OpPPC64XOR)
 29944			v.AddArg(x)
 29945			v.AddArg(y)
 29946			return true
 29947		}
 29948	}
 29949	func rewriteValuePPC64_OpZero_0(v *Value) bool {
 29950		b := v.Block
 29951		// match: (Zero [0] _ mem)
 29952		// cond:
 29953		// result: mem
 29954		for {
 29955			if v.AuxInt != 0 {
 29956				break
 29957			}
 29958			mem := v.Args[1]
 29959			v.reset(OpCopy)
 29960			v.Type = mem.Type
 29961			v.AddArg(mem)
 29962			return true
 29963		}
 29964		// match: (Zero [1] destptr mem)
 29965		// cond:
 29966		// result: (MOVBstorezero destptr mem)
 29967		for {
 29968			if v.AuxInt != 1 {
 29969				break
 29970			}
 29971			mem := v.Args[1]
 29972			destptr := v.Args[0]
 29973			v.reset(OpPPC64MOVBstorezero)
 29974			v.AddArg(destptr)
 29975			v.AddArg(mem)
 29976			return true
 29977		}
 29978		// match: (Zero [2] destptr mem)
 29979		// cond:
 29980		// result: (MOVHstorezero destptr mem)
 29981		for {
 29982			if v.AuxInt != 2 {
 29983				break
 29984			}
 29985			mem := v.Args[1]
 29986			destptr := v.Args[0]
 29987			v.reset(OpPPC64MOVHstorezero)
 29988			v.AddArg(destptr)
 29989			v.AddArg(mem)
 29990			return true
 29991		}
 29992		// match: (Zero [3] destptr mem)
 29993		// cond:
 29994		// result: (MOVBstorezero [2] destptr (MOVHstorezero destptr mem))
 29995		for {
 29996			if v.AuxInt != 3 {
 29997				break
 29998			}
 29999			mem := v.Args[1]
 30000			destptr := v.Args[0]
 30001			v.reset(OpPPC64MOVBstorezero)
 30002			v.AuxInt = 2
 30003			v.AddArg(destptr)
 30004			v0 := b.NewValue0(v.Pos, OpPPC64MOVHstorezero, types.TypeMem)
 30005			v0.AddArg(destptr)
 30006			v0.AddArg(mem)
 30007			v.AddArg(v0)
 30008			return true
 30009		}
 30010		// match: (Zero [4] destptr mem)
 30011		// cond:
 30012		// result: (MOVWstorezero destptr mem)
 30013		for {
 30014			if v.AuxInt != 4 {
 30015				break
 30016			}
 30017			mem := v.Args[1]
 30018			destptr := v.Args[0]
 30019			v.reset(OpPPC64MOVWstorezero)
 30020			v.AddArg(destptr)
 30021			v.AddArg(mem)
 30022			return true
 30023		}
 30024		// match: (Zero [5] destptr mem)
 30025		// cond:
 30026		// result: (MOVBstorezero [4] destptr (MOVWstorezero destptr mem))
 30027		for {
 30028			if v.AuxInt != 5 {
 30029				break
 30030			}
 30031			mem := v.Args[1]
 30032			destptr := v.Args[0]
 30033			v.reset(OpPPC64MOVBstorezero)
 30034			v.AuxInt = 4
 30035			v.AddArg(destptr)
 30036			v0 := b.NewValue0(v.Pos, OpPPC64MOVWstorezero, types.TypeMem)
 30037			v0.AddArg(destptr)
 30038			v0.AddArg(mem)
 30039			v.AddArg(v0)
 30040			return true
 30041		}
 30042		// match: (Zero [6] destptr mem)
 30043		// cond:
 30044		// result: (MOVHstorezero [4] destptr (MOVWstorezero destptr mem))
 30045		for {
 30046			if v.AuxInt != 6 {
 30047				break
 30048			}
 30049			mem := v.Args[1]
 30050			destptr := v.Args[0]
 30051			v.reset(OpPPC64MOVHstorezero)
 30052			v.AuxInt = 4
 30053			v.AddArg(destptr)
 30054			v0 := b.NewValue0(v.Pos, OpPPC64MOVWstorezero, types.TypeMem)
 30055			v0.AddArg(destptr)
 30056			v0.AddArg(mem)
 30057			v.AddArg(v0)
 30058			return true
 30059		}
 30060		// match: (Zero [7] destptr mem)
 30061		// cond:
 30062		// result: (MOVBstorezero [6] destptr (MOVHstorezero [4] destptr (MOVWstorezero destptr mem)))
 30063		for {
 30064			if v.AuxInt != 7 {
 30065				break
 30066			}
 30067			mem := v.Args[1]
 30068			destptr := v.Args[0]
 30069			v.reset(OpPPC64MOVBstorezero)
 30070			v.AuxInt = 6
 30071			v.AddArg(destptr)
 30072			v0 := b.NewValue0(v.Pos, OpPPC64MOVHstorezero, types.TypeMem)
 30073			v0.AuxInt = 4
 30074			v0.AddArg(destptr)
 30075			v1 := b.NewValue0(v.Pos, OpPPC64MOVWstorezero, types.TypeMem)
 30076			v1.AddArg(destptr)
 30077			v1.AddArg(mem)
 30078			v0.AddArg(v1)
 30079			v.AddArg(v0)
 30080			return true
 30081		}
 30082		// match: (Zero [8] {t} destptr mem)
 30083		// cond: t.(*types.Type).Alignment()%4 == 0
 30084		// result: (MOVDstorezero destptr mem)
 30085		for {
 30086			if v.AuxInt != 8 {
 30087				break
 30088			}
 30089			t := v.Aux
 30090			mem := v.Args[1]
 30091			destptr := v.Args[0]
 30092			if !(t.(*types.Type).Alignment()%4 == 0) {
 30093				break
 30094			}
 30095			v.reset(OpPPC64MOVDstorezero)
 30096			v.AddArg(destptr)
 30097			v.AddArg(mem)
 30098			return true
 30099		}
 30100		// match: (Zero [8] destptr mem)
 30101		// cond:
 30102		// result: (MOVWstorezero [4] destptr (MOVWstorezero [0] destptr mem))
 30103		for {
 30104			if v.AuxInt != 8 {
 30105				break
 30106			}
 30107			mem := v.Args[1]
 30108			destptr := v.Args[0]
 30109			v.reset(OpPPC64MOVWstorezero)
 30110			v.AuxInt = 4
 30111			v.AddArg(destptr)
 30112			v0 := b.NewValue0(v.Pos, OpPPC64MOVWstorezero, types.TypeMem)
 30113			v0.AuxInt = 0
 30114			v0.AddArg(destptr)
 30115			v0.AddArg(mem)
 30116			v.AddArg(v0)
 30117			return true
 30118		}
 30119		return false
 30120	}
 30121	func rewriteValuePPC64_OpZero_10(v *Value) bool {
 30122		b := v.Block
 30123		// match: (Zero [12] {t} destptr mem)
 30124		// cond: t.(*types.Type).Alignment()%4 == 0
 30125		// result: (MOVWstorezero [8] destptr (MOVDstorezero [0] destptr mem))
 30126		for {
 30127			if v.AuxInt != 12 {
 30128				break
 30129			}
 30130			t := v.Aux
 30131			mem := v.Args[1]
 30132			destptr := v.Args[0]
 30133			if !(t.(*types.Type).Alignment()%4 == 0) {
 30134				break
 30135			}
 30136			v.reset(OpPPC64MOVWstorezero)
 30137			v.AuxInt = 8
 30138			v.AddArg(destptr)
 30139			v0 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, types.TypeMem)
 30140			v0.AuxInt = 0
 30141			v0.AddArg(destptr)
 30142			v0.AddArg(mem)
 30143			v.AddArg(v0)
 30144			return true
 30145		}
 30146		// match: (Zero [16] {t} destptr mem)
 30147		// cond: t.(*types.Type).Alignment()%4 == 0
 30148		// result: (MOVDstorezero [8] destptr (MOVDstorezero [0] destptr mem))
 30149		for {
 30150			if v.AuxInt != 16 {
 30151				break
 30152			}
 30153			t := v.Aux
 30154			mem := v.Args[1]
 30155			destptr := v.Args[0]
 30156			if !(t.(*types.Type).Alignment()%4 == 0) {
 30157				break
 30158			}
 30159			v.reset(OpPPC64MOVDstorezero)
 30160			v.AuxInt = 8
 30161			v.AddArg(destptr)
 30162			v0 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, types.TypeMem)
 30163			v0.AuxInt = 0
 30164			v0.AddArg(destptr)
 30165			v0.AddArg(mem)
 30166			v.AddArg(v0)
 30167			return true
 30168		}
 30169		// match: (Zero [24] {t} destptr mem)
 30170		// cond: t.(*types.Type).Alignment()%4 == 0
 30171		// result: (MOVDstorezero [16] destptr (MOVDstorezero [8] destptr (MOVDstorezero [0] destptr mem)))
 30172		for {
 30173			if v.AuxInt != 24 {
 30174				break
 30175			}
 30176			t := v.Aux
 30177			mem := v.Args[1]
 30178			destptr := v.Args[0]
 30179			if !(t.(*types.Type).Alignment()%4 == 0) {
 30180				break
 30181			}
 30182			v.reset(OpPPC64MOVDstorezero)
 30183			v.AuxInt = 16
 30184			v.AddArg(destptr)
 30185			v0 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, types.TypeMem)
 30186			v0.AuxInt = 8
 30187			v0.AddArg(destptr)
 30188			v1 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, types.TypeMem)
 30189			v1.AuxInt = 0
 30190			v1.AddArg(destptr)
 30191			v1.AddArg(mem)
 30192			v0.AddArg(v1)
 30193			v.AddArg(v0)
 30194			return true
 30195		}
 30196		// match: (Zero [32] {t} destptr mem)
 30197		// cond: t.(*types.Type).Alignment()%4 == 0
 30198		// result: (MOVDstorezero [24] destptr (MOVDstorezero [16] destptr (MOVDstorezero [8] destptr (MOVDstorezero [0] destptr mem))))
 30199		for {
 30200			if v.AuxInt != 32 {
 30201				break
 30202			}
 30203			t := v.Aux
 30204			mem := v.Args[1]
 30205			destptr := v.Args[0]
 30206			if !(t.(*types.Type).Alignment()%4 == 0) {
 30207				break
 30208			}
 30209			v.reset(OpPPC64MOVDstorezero)
 30210			v.AuxInt = 24
 30211			v.AddArg(destptr)
 30212			v0 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, types.TypeMem)
 30213			v0.AuxInt = 16
 30214			v0.AddArg(destptr)
 30215			v1 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, types.TypeMem)
 30216			v1.AuxInt = 8
 30217			v1.AddArg(destptr)
 30218			v2 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, types.TypeMem)
 30219			v2.AuxInt = 0
 30220			v2.AddArg(destptr)
 30221			v2.AddArg(mem)
 30222			v1.AddArg(v2)
 30223			v0.AddArg(v1)
 30224			v.AddArg(v0)
 30225			return true
 30226		}
 30227		// match: (Zero [s] ptr mem)
 30228		// cond:
 30229		// result: (LoweredZero [s] ptr mem)
 30230		for {
 30231			s := v.AuxInt
 30232			mem := v.Args[1]
 30233			ptr := v.Args[0]
 30234			v.reset(OpPPC64LoweredZero)
 30235			v.AuxInt = s
 30236			v.AddArg(ptr)
 30237			v.AddArg(mem)
 30238			return true
 30239		}
 30240	}
 30241	func rewriteValuePPC64_OpZeroExt16to32_0(v *Value) bool {
 30242		// match: (ZeroExt16to32 x)
 30243		// cond:
 30244		// result: (MOVHZreg x)
 30245		for {
 30246			x := v.Args[0]
 30247			v.reset(OpPPC64MOVHZreg)
 30248			v.AddArg(x)
 30249			return true
 30250		}
 30251	}
 30252	func rewriteValuePPC64_OpZeroExt16to64_0(v *Value) bool {
 30253		// match: (ZeroExt16to64 x)
 30254		// cond:
 30255		// result: (MOVHZreg x)
 30256		for {
 30257			x := v.Args[0]
 30258			v.reset(OpPPC64MOVHZreg)
 30259			v.AddArg(x)
 30260			return true
 30261		}
 30262	}
 30263	func rewriteValuePPC64_OpZeroExt32to64_0(v *Value) bool {
 30264		// match: (ZeroExt32to64 x)
 30265		// cond:
 30266		// result: (MOVWZreg x)
 30267		for {
 30268			x := v.Args[0]
 30269			v.reset(OpPPC64MOVWZreg)
 30270			v.AddArg(x)
 30271			return true
 30272		}
 30273	}
 30274	func rewriteValuePPC64_OpZeroExt8to16_0(v *Value) bool {
 30275		// match: (ZeroExt8to16 x)
 30276		// cond:
 30277		// result: (MOVBZreg x)
 30278		for {
 30279			x := v.Args[0]
 30280			v.reset(OpPPC64MOVBZreg)
 30281			v.AddArg(x)
 30282			return true
 30283		}
 30284	}
 30285	func rewriteValuePPC64_OpZeroExt8to32_0(v *Value) bool {
 30286		// match: (ZeroExt8to32 x)
 30287		// cond:
 30288		// result: (MOVBZreg x)
 30289		for {
 30290			x := v.Args[0]
 30291			v.reset(OpPPC64MOVBZreg)
 30292			v.AddArg(x)
 30293			return true
 30294		}
 30295	}
 30296	func rewriteValuePPC64_OpZeroExt8to64_0(v *Value) bool {
 30297		// match: (ZeroExt8to64 x)
 30298		// cond:
 30299		// result: (MOVBZreg x)
 30300		for {
 30301			x := v.Args[0]
 30302			v.reset(OpPPC64MOVBZreg)
 30303			v.AddArg(x)
 30304			return true
 30305		}
 30306	}
 30307	func rewriteBlockPPC64(b *Block) bool {
 30308		config := b.Func.Config
 30309		typ := &config.Types
 30310		_ = typ
 30311		v := b.Control
 30312		_ = v
 30313		switch b.Kind {
 30314		case BlockPPC64EQ:
 30315			// match: (EQ (CMPconst [0] (ANDconst [c] x)) yes no)
 30316			// cond:
 30317			// result: (EQ (ANDCCconst [c] x) yes no)
 30318			for v.Op == OpPPC64CMPconst {
 30319				if v.AuxInt != 0 {
 30320					break
 30321				}
 30322				v_0 := v.Args[0]
 30323				if v_0.Op != OpPPC64ANDconst {
 30324					break
 30325				}
 30326				c := v_0.AuxInt
 30327				x := v_0.Args[0]
 30328				b.Kind = BlockPPC64EQ
 30329				v0 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.TypeFlags)
 30330				v0.AuxInt = c
 30331				v0.AddArg(x)
 30332				b.SetControl(v0)
 30333				b.Aux = nil
 30334				return true
 30335			}
 30336			// match: (EQ (CMPWconst [0] (ANDconst [c] x)) yes no)
 30337			// cond:
 30338			// result: (EQ (ANDCCconst [c] x) yes no)
 30339			for v.Op == OpPPC64CMPWconst {
 30340				if v.AuxInt != 0 {
 30341					break
 30342				}
 30343				v_0 := v.Args[0]
 30344				if v_0.Op != OpPPC64ANDconst {
 30345					break
 30346				}
 30347				c := v_0.AuxInt
 30348				x := v_0.Args[0]
 30349				b.Kind = BlockPPC64EQ
 30350				v0 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.TypeFlags)
 30351				v0.AuxInt = c
 30352				v0.AddArg(x)
 30353				b.SetControl(v0)
 30354				b.Aux = nil
 30355				return true
 30356			}
 30357			// match: (EQ (FlagEQ) yes no)
 30358			// cond:
 30359			// result: (First nil yes no)
 30360			for v.Op == OpPPC64FlagEQ {
 30361				b.Kind = BlockFirst
 30362				b.SetControl(nil)
 30363				b.Aux = nil
 30364				return true
 30365			}
 30366			// match: (EQ (FlagLT) yes no)
 30367			// cond:
 30368			// result: (First nil no yes)
 30369			for v.Op == OpPPC64FlagLT {
 30370				b.Kind = BlockFirst
 30371				b.SetControl(nil)
 30372				b.Aux = nil
 30373				b.swapSuccessors()
 30374				return true
 30375			}
 30376			// match: (EQ (FlagGT) yes no)
 30377			// cond:
 30378			// result: (First nil no yes)
 30379			for v.Op == OpPPC64FlagGT {
 30380				b.Kind = BlockFirst
 30381				b.SetControl(nil)
 30382				b.Aux = nil
 30383				b.swapSuccessors()
 30384				return true
 30385			}
 30386			// match: (EQ (InvertFlags cmp) yes no)
 30387			// cond:
 30388			// result: (EQ cmp yes no)
 30389			for v.Op == OpPPC64InvertFlags {
 30390				cmp := v.Args[0]
 30391				b.Kind = BlockPPC64EQ
 30392				b.SetControl(cmp)
 30393				b.Aux = nil
 30394				return true
 30395			}
 30396			// match: (EQ (CMPconst [0] (ANDconst [c] x)) yes no)
 30397			// cond:
 30398			// result: (EQ (ANDCCconst [c] x) yes no)
 30399			for v.Op == OpPPC64CMPconst {
 30400				if v.AuxInt != 0 {
 30401					break
 30402				}
 30403				v_0 := v.Args[0]
 30404				if v_0.Op != OpPPC64ANDconst {
 30405					break
 30406				}
 30407				c := v_0.AuxInt
 30408				x := v_0.Args[0]
 30409				b.Kind = BlockPPC64EQ
 30410				v0 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.TypeFlags)
 30411				v0.AuxInt = c
 30412				v0.AddArg(x)
 30413				b.SetControl(v0)
 30414				b.Aux = nil
 30415				return true
 30416			}
 30417			// match: (EQ (CMPWconst [0] (ANDconst [c] x)) yes no)
 30418			// cond:
 30419			// result: (EQ (ANDCCconst [c] x) yes no)
 30420			for v.Op == OpPPC64CMPWconst {
 30421				if v.AuxInt != 0 {
 30422					break
 30423				}
 30424				v_0 := v.Args[0]
 30425				if v_0.Op != OpPPC64ANDconst {
 30426					break
 30427				}
 30428				c := v_0.AuxInt
 30429				x := v_0.Args[0]
 30430				b.Kind = BlockPPC64EQ
 30431				v0 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.TypeFlags)
 30432				v0.AuxInt = c
 30433				v0.AddArg(x)
 30434				b.SetControl(v0)
 30435				b.Aux = nil
 30436				return true
 30437			}
 30438			// match: (EQ (CMPconst [0] z:(AND x y)) yes no)
 30439			// cond: z.Uses == 1
 30440			// result: (EQ (ANDCC x y) yes no)
 30441			for v.Op == OpPPC64CMPconst {
 30442				if v.AuxInt != 0 {
 30443					break
 30444				}
 30445				z := v.Args[0]
 30446				if z.Op != OpPPC64AND {
 30447					break
 30448				}
 30449				y := z.Args[1]
 30450				x := z.Args[0]
 30451				if !(z.Uses == 1) {
 30452					break
 30453				}
 30454				b.Kind = BlockPPC64EQ
 30455				v0 := b.NewValue0(v.Pos, OpPPC64ANDCC, types.TypeFlags)
 30456				v0.AddArg(x)
 30457				v0.AddArg(y)
 30458				b.SetControl(v0)
 30459				b.Aux = nil
 30460				return true
 30461			}
 30462			// match: (EQ (CMPconst [0] z:(OR x y)) yes no)
 30463			// cond: z.Uses == 1
 30464			// result: (EQ (ORCC x y) yes no)
 30465			for v.Op == OpPPC64CMPconst {
 30466				if v.AuxInt != 0 {
 30467					break
 30468				}
 30469				z := v.Args[0]
 30470				if z.Op != OpPPC64OR {
 30471					break
 30472				}
 30473				y := z.Args[1]
 30474				x := z.Args[0]
 30475				if !(z.Uses == 1) {
 30476					break
 30477				}
 30478				b.Kind = BlockPPC64EQ
 30479				v0 := b.NewValue0(v.Pos, OpPPC64ORCC, types.TypeFlags)
 30480				v0.AddArg(x)
 30481				v0.AddArg(y)
 30482				b.SetControl(v0)
 30483				b.Aux = nil
 30484				return true
 30485			}
 30486			// match: (EQ (CMPconst [0] z:(XOR x y)) yes no)
 30487			// cond: z.Uses == 1
 30488			// result: (EQ (XORCC x y) yes no)
 30489			for v.Op == OpPPC64CMPconst {
 30490				if v.AuxInt != 0 {
 30491					break
 30492				}
 30493				z := v.Args[0]
 30494				if z.Op != OpPPC64XOR {
 30495					break
 30496				}
 30497				y := z.Args[1]
 30498				x := z.Args[0]
 30499				if !(z.Uses == 1) {
 30500					break
 30501				}
 30502				b.Kind = BlockPPC64EQ
 30503				v0 := b.NewValue0(v.Pos, OpPPC64XORCC, types.TypeFlags)
 30504				v0.AddArg(x)
 30505				v0.AddArg(y)
 30506				b.SetControl(v0)
 30507				b.Aux = nil
 30508				return true
 30509			}
 30510		case BlockPPC64GE:
 30511			// match: (GE (FlagEQ) yes no)
 30512			// cond:
 30513			// result: (First nil yes no)
 30514			for v.Op == OpPPC64FlagEQ {
 30515				b.Kind = BlockFirst
 30516				b.SetControl(nil)
 30517				b.Aux = nil
 30518				return true
 30519			}
 30520			// match: (GE (FlagLT) yes no)
 30521			// cond:
 30522			// result: (First nil no yes)
 30523			for v.Op == OpPPC64FlagLT {
 30524				b.Kind = BlockFirst
 30525				b.SetControl(nil)
 30526				b.Aux = nil
 30527				b.swapSuccessors()
 30528				return true
 30529			}
 30530			// match: (GE (FlagGT) yes no)
 30531			// cond:
 30532			// result: (First nil yes no)
 30533			for v.Op == OpPPC64FlagGT {
 30534				b.Kind = BlockFirst
 30535				b.SetControl(nil)
 30536				b.Aux = nil
 30537				return true
 30538			}
 30539			// match: (GE (InvertFlags cmp) yes no)
 30540			// cond:
 30541			// result: (LE cmp yes no)
 30542			for v.Op == OpPPC64InvertFlags {
 30543				cmp := v.Args[0]
 30544				b.Kind = BlockPPC64LE
 30545				b.SetControl(cmp)
 30546				b.Aux = nil
 30547				return true
 30548			}
 30549			// match: (GE (CMPconst [0] (ANDconst [c] x)) yes no)
 30550			// cond:
 30551			// result: (GE (ANDCCconst [c] x) yes no)
 30552			for v.Op == OpPPC64CMPconst {
 30553				if v.AuxInt != 0 {
 30554					break
 30555				}
 30556				v_0 := v.Args[0]
 30557				if v_0.Op != OpPPC64ANDconst {
 30558					break
 30559				}
 30560				c := v_0.AuxInt
 30561				x := v_0.Args[0]
 30562				b.Kind = BlockPPC64GE
 30563				v0 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.TypeFlags)
 30564				v0.AuxInt = c
 30565				v0.AddArg(x)
 30566				b.SetControl(v0)
 30567				b.Aux = nil
 30568				return true
 30569			}
 30570			// match: (GE (CMPWconst [0] (ANDconst [c] x)) yes no)
 30571			// cond:
 30572			// result: (GE (ANDCCconst [c] x) yes no)
 30573			for v.Op == OpPPC64CMPWconst {
 30574				if v.AuxInt != 0 {
 30575					break
 30576				}
 30577				v_0 := v.Args[0]
 30578				if v_0.Op != OpPPC64ANDconst {
 30579					break
 30580				}
 30581				c := v_0.AuxInt
 30582				x := v_0.Args[0]
 30583				b.Kind = BlockPPC64GE
 30584				v0 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.TypeFlags)
 30585				v0.AuxInt = c
 30586				v0.AddArg(x)
 30587				b.SetControl(v0)
 30588				b.Aux = nil
 30589				return true
 30590			}
 30591			// match: (GE (CMPconst [0] z:(AND x y)) yes no)
 30592			// cond: z.Uses == 1
 30593			// result: (GE (ANDCC x y) yes no)
 30594			for v.Op == OpPPC64CMPconst {
 30595				if v.AuxInt != 0 {
 30596					break
 30597				}
 30598				z := v.Args[0]
 30599				if z.Op != OpPPC64AND {
 30600					break
 30601				}
 30602				y := z.Args[1]
 30603				x := z.Args[0]
 30604				if !(z.Uses == 1) {
 30605					break
 30606				}
 30607				b.Kind = BlockPPC64GE
 30608				v0 := b.NewValue0(v.Pos, OpPPC64ANDCC, types.TypeFlags)
 30609				v0.AddArg(x)
 30610				v0.AddArg(y)
 30611				b.SetControl(v0)
 30612				b.Aux = nil
 30613				return true
 30614			}
 30615			// match: (GE (CMPconst [0] z:(OR x y)) yes no)
 30616			// cond: z.Uses == 1
 30617			// result: (GE (ORCC x y) yes no)
 30618			for v.Op == OpPPC64CMPconst {
 30619				if v.AuxInt != 0 {
 30620					break
 30621				}
 30622				z := v.Args[0]
 30623				if z.Op != OpPPC64OR {
 30624					break
 30625				}
 30626				y := z.Args[1]
 30627				x := z.Args[0]
 30628				if !(z.Uses == 1) {
 30629					break
 30630				}
 30631				b.Kind = BlockPPC64GE
 30632				v0 := b.NewValue0(v.Pos, OpPPC64ORCC, types.TypeFlags)
 30633				v0.AddArg(x)
 30634				v0.AddArg(y)
 30635				b.SetControl(v0)
 30636				b.Aux = nil
 30637				return true
 30638			}
 30639			// match: (GE (CMPconst [0] z:(XOR x y)) yes no)
 30640			// cond: z.Uses == 1
 30641			// result: (GE (XORCC x y) yes no)
 30642			for v.Op == OpPPC64CMPconst {
 30643				if v.AuxInt != 0 {
 30644					break
 30645				}
 30646				z := v.Args[0]
 30647				if z.Op != OpPPC64XOR {
 30648					break
 30649				}
 30650				y := z.Args[1]
 30651				x := z.Args[0]
 30652				if !(z.Uses == 1) {
 30653					break
 30654				}
 30655				b.Kind = BlockPPC64GE
 30656				v0 := b.NewValue0(v.Pos, OpPPC64XORCC, types.TypeFlags)
 30657				v0.AddArg(x)
 30658				v0.AddArg(y)
 30659				b.SetControl(v0)
 30660				b.Aux = nil
 30661				return true
 30662			}
 30663		case BlockPPC64GT:
 30664			// match: (GT (FlagEQ) yes no)
 30665			// cond:
 30666			// result: (First nil no yes)
 30667			for v.Op == OpPPC64FlagEQ {
 30668				b.Kind = BlockFirst
 30669				b.SetControl(nil)
 30670				b.Aux = nil
 30671				b.swapSuccessors()
 30672				return true
 30673			}
 30674			// match: (GT (FlagLT) yes no)
 30675			// cond:
 30676			// result: (First nil no yes)
 30677			for v.Op == OpPPC64FlagLT {
 30678				b.Kind = BlockFirst
 30679				b.SetControl(nil)
 30680				b.Aux = nil
 30681				b.swapSuccessors()
 30682				return true
 30683			}
 30684			// match: (GT (FlagGT) yes no)
 30685			// cond:
 30686			// result: (First nil yes no)
 30687			for v.Op == OpPPC64FlagGT {
 30688				b.Kind = BlockFirst
 30689				b.SetControl(nil)
 30690				b.Aux = nil
 30691				return true
 30692			}
 30693			// match: (GT (InvertFlags cmp) yes no)
 30694			// cond:
 30695			// result: (LT cmp yes no)
 30696			for v.Op == OpPPC64InvertFlags {
 30697				cmp := v.Args[0]
 30698				b.Kind = BlockPPC64LT
 30699				b.SetControl(cmp)
 30700				b.Aux = nil
 30701				return true
 30702			}
 30703			// match: (GT (CMPconst [0] (ANDconst [c] x)) yes no)
 30704			// cond:
 30705			// result: (GT (ANDCCconst [c] x) yes no)
 30706			for v.Op == OpPPC64CMPconst {
 30707				if v.AuxInt != 0 {
 30708					break
 30709				}
 30710				v_0 := v.Args[0]
 30711				if v_0.Op != OpPPC64ANDconst {
 30712					break
 30713				}
 30714				c := v_0.AuxInt
 30715				x := v_0.Args[0]
 30716				b.Kind = BlockPPC64GT
 30717				v0 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.TypeFlags)
 30718				v0.AuxInt = c
 30719				v0.AddArg(x)
 30720				b.SetControl(v0)
 30721				b.Aux = nil
 30722				return true
 30723			}
 30724			// match: (GT (CMPWconst [0] (ANDconst [c] x)) yes no)
 30725			// cond:
 30726			// result: (GT (ANDCCconst [c] x) yes no)
 30727			for v.Op == OpPPC64CMPWconst {
 30728				if v.AuxInt != 0 {
 30729					break
 30730				}
 30731				v_0 := v.Args[0]
 30732				if v_0.Op != OpPPC64ANDconst {
 30733					break
 30734				}
 30735				c := v_0.AuxInt
 30736				x := v_0.Args[0]
 30737				b.Kind = BlockPPC64GT
 30738				v0 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.TypeFlags)
 30739				v0.AuxInt = c
 30740				v0.AddArg(x)
 30741				b.SetControl(v0)
 30742				b.Aux = nil
 30743				return true
 30744			}
 30745			// match: (GT (CMPconst [0] z:(AND x y)) yes no)
 30746			// cond: z.Uses == 1
 30747			// result: (GT (ANDCC x y) yes no)
 30748			for v.Op == OpPPC64CMPconst {
 30749				if v.AuxInt != 0 {
 30750					break
 30751				}
 30752				z := v.Args[0]
 30753				if z.Op != OpPPC64AND {
 30754					break
 30755				}
 30756				y := z.Args[1]
 30757				x := z.Args[0]
 30758				if !(z.Uses == 1) {
 30759					break
 30760				}
 30761				b.Kind = BlockPPC64GT
 30762				v0 := b.NewValue0(v.Pos, OpPPC64ANDCC, types.TypeFlags)
 30763				v0.AddArg(x)
 30764				v0.AddArg(y)
 30765				b.SetControl(v0)
 30766				b.Aux = nil
 30767				return true
 30768			}
 30769			// match: (GT (CMPconst [0] z:(OR x y)) yes no)
 30770			// cond: z.Uses == 1
 30771			// result: (GT (ORCC x y) yes no)
 30772			for v.Op == OpPPC64CMPconst {
 30773				if v.AuxInt != 0 {
 30774					break
 30775				}
 30776				z := v.Args[0]
 30777				if z.Op != OpPPC64OR {
 30778					break
 30779				}
 30780				y := z.Args[1]
 30781				x := z.Args[0]
 30782				if !(z.Uses == 1) {
 30783					break
 30784				}
 30785				b.Kind = BlockPPC64GT
 30786				v0 := b.NewValue0(v.Pos, OpPPC64ORCC, types.TypeFlags)
 30787				v0.AddArg(x)
 30788				v0.AddArg(y)
 30789				b.SetControl(v0)
 30790				b.Aux = nil
 30791				return true
 30792			}
 30793			// match: (GT (CMPconst [0] z:(XOR x y)) yes no)
 30794			// cond: z.Uses == 1
 30795			// result: (GT (XORCC x y) yes no)
 30796			for v.Op == OpPPC64CMPconst {
 30797				if v.AuxInt != 0 {
 30798					break
 30799				}
 30800				z := v.Args[0]
 30801				if z.Op != OpPPC64XOR {
 30802					break
 30803				}
 30804				y := z.Args[1]
 30805				x := z.Args[0]
 30806				if !(z.Uses == 1) {
 30807					break
 30808				}
 30809				b.Kind = BlockPPC64GT
 30810				v0 := b.NewValue0(v.Pos, OpPPC64XORCC, types.TypeFlags)
 30811				v0.AddArg(x)
 30812				v0.AddArg(y)
 30813				b.SetControl(v0)
 30814				b.Aux = nil
 30815				return true
 30816			}
 30817		case BlockIf:
 30818			// match: (If (Equal cc) yes no)
 30819			// cond:
 30820			// result: (EQ cc yes no)
 30821			for v.Op == OpPPC64Equal {
 30822				cc := v.Args[0]
 30823				b.Kind = BlockPPC64EQ
 30824				b.SetControl(cc)
 30825				b.Aux = nil
 30826				return true
 30827			}
 30828			// match: (If (NotEqual cc) yes no)
 30829			// cond:
 30830			// result: (NE cc yes no)
 30831			for v.Op == OpPPC64NotEqual {
 30832				cc := v.Args[0]
 30833				b.Kind = BlockPPC64NE
 30834				b.SetControl(cc)
 30835				b.Aux = nil
 30836				return true
 30837			}
 30838			// match: (If (LessThan cc) yes no)
 30839			// cond:
 30840			// result: (LT cc yes no)
 30841			for v.Op == OpPPC64LessThan {
 30842				cc := v.Args[0]
 30843				b.Kind = BlockPPC64LT
 30844				b.SetControl(cc)
 30845				b.Aux = nil
 30846				return true
 30847			}
 30848			// match: (If (LessEqual cc) yes no)
 30849			// cond:
 30850			// result: (LE cc yes no)
 30851			for v.Op == OpPPC64LessEqual {
 30852				cc := v.Args[0]
 30853				b.Kind = BlockPPC64LE
 30854				b.SetControl(cc)
 30855				b.Aux = nil
 30856				return true
 30857			}
 30858			// match: (If (GreaterThan cc) yes no)
 30859			// cond:
 30860			// result: (GT cc yes no)
 30861			for v.Op == OpPPC64GreaterThan {
 30862				cc := v.Args[0]
 30863				b.Kind = BlockPPC64GT
 30864				b.SetControl(cc)
 30865				b.Aux = nil
 30866				return true
 30867			}
 30868			// match: (If (GreaterEqual cc) yes no)
 30869			// cond:
 30870			// result: (GE cc yes no)
 30871			for v.Op == OpPPC64GreaterEqual {
 30872				cc := v.Args[0]
 30873				b.Kind = BlockPPC64GE
 30874				b.SetControl(cc)
 30875				b.Aux = nil
 30876				return true
 30877			}
 30878			// match: (If (FLessThan cc) yes no)
 30879			// cond:
 30880			// result: (FLT cc yes no)
 30881			for v.Op == OpPPC64FLessThan {
 30882				cc := v.Args[0]
 30883				b.Kind = BlockPPC64FLT
 30884				b.SetControl(cc)
 30885				b.Aux = nil
 30886				return true
 30887			}
 30888			// match: (If (FLessEqual cc) yes no)
 30889			// cond:
 30890			// result: (FLE cc yes no)
 30891			for v.Op == OpPPC64FLessEqual {
 30892				cc := v.Args[0]
 30893				b.Kind = BlockPPC64FLE
 30894				b.SetControl(cc)
 30895				b.Aux = nil
 30896				return true
 30897			}
 30898			// match: (If (FGreaterThan cc) yes no)
 30899			// cond:
 30900			// result: (FGT cc yes no)
 30901			for v.Op == OpPPC64FGreaterThan {
 30902				cc := v.Args[0]
 30903				b.Kind = BlockPPC64FGT
 30904				b.SetControl(cc)
 30905				b.Aux = nil
 30906				return true
 30907			}
 30908			// match: (If (FGreaterEqual cc) yes no)
 30909			// cond:
 30910			// result: (FGE cc yes no)
 30911			for v.Op == OpPPC64FGreaterEqual {
 30912				cc := v.Args[0]
 30913				b.Kind = BlockPPC64FGE
 30914				b.SetControl(cc)
 30915				b.Aux = nil
 30916				return true
 30917			}
 30918			// match: (If cond yes no)
 30919			// cond:
 30920			// result: (NE (CMPWconst [0] cond) yes no)
 30921			for {
 30922				cond := b.Control
 30923				b.Kind = BlockPPC64NE
 30924				v0 := b.NewValue0(v.Pos, OpPPC64CMPWconst, types.TypeFlags)
 30925				v0.AuxInt = 0
 30926				v0.AddArg(cond)
 30927				b.SetControl(v0)
 30928				b.Aux = nil
 30929				return true
 30930			}
 30931		case BlockPPC64LE:
 30932			// match: (LE (FlagEQ) yes no)
 30933			// cond:
 30934			// result: (First nil yes no)
 30935			for v.Op == OpPPC64FlagEQ {
 30936				b.Kind = BlockFirst
 30937				b.SetControl(nil)
 30938				b.Aux = nil
 30939				return true
 30940			}
 30941			// match: (LE (FlagLT) yes no)
 30942			// cond:
 30943			// result: (First nil yes no)
 30944			for v.Op == OpPPC64FlagLT {
 30945				b.Kind = BlockFirst
 30946				b.SetControl(nil)
 30947				b.Aux = nil
 30948				return true
 30949			}
 30950			// match: (LE (FlagGT) yes no)
 30951			// cond:
 30952			// result: (First nil no yes)
 30953			for v.Op == OpPPC64FlagGT {
 30954				b.Kind = BlockFirst
 30955				b.SetControl(nil)
 30956				b.Aux = nil
 30957				b.swapSuccessors()
 30958				return true
 30959			}
 30960			// match: (LE (InvertFlags cmp) yes no)
 30961			// cond:
 30962			// result: (GE cmp yes no)
 30963			for v.Op == OpPPC64InvertFlags {
 30964				cmp := v.Args[0]
 30965				b.Kind = BlockPPC64GE
 30966				b.SetControl(cmp)
 30967				b.Aux = nil
 30968				return true
 30969			}
 30970			// match: (LE (CMPconst [0] (ANDconst [c] x)) yes no)
 30971			// cond:
 30972			// result: (LE (ANDCCconst [c] x) yes no)
 30973			for v.Op == OpPPC64CMPconst {
 30974				if v.AuxInt != 0 {
 30975					break
 30976				}
 30977				v_0 := v.Args[0]
 30978				if v_0.Op != OpPPC64ANDconst {
 30979					break
 30980				}
 30981				c := v_0.AuxInt
 30982				x := v_0.Args[0]
 30983				b.Kind = BlockPPC64LE
 30984				v0 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.TypeFlags)
 30985				v0.AuxInt = c
 30986				v0.AddArg(x)
 30987				b.SetControl(v0)
 30988				b.Aux = nil
 30989				return true
 30990			}
 30991			// match: (LE (CMPWconst [0] (ANDconst [c] x)) yes no)
 30992			// cond:
 30993			// result: (LE (ANDCCconst [c] x) yes no)
 30994			for v.Op == OpPPC64CMPWconst {
 30995				if v.AuxInt != 0 {
 30996					break
 30997				}
 30998				v_0 := v.Args[0]
 30999				if v_0.Op != OpPPC64ANDconst {
 31000					break
 31001				}
 31002				c := v_0.AuxInt
 31003				x := v_0.Args[0]
 31004				b.Kind = BlockPPC64LE
 31005				v0 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.TypeFlags)
 31006				v0.AuxInt = c
 31007				v0.AddArg(x)
 31008				b.SetControl(v0)
 31009				b.Aux = nil
 31010				return true
 31011			}
 31012			// match: (LE (CMPconst [0] z:(AND x y)) yes no)
 31013			// cond: z.Uses == 1
 31014			// result: (LE (ANDCC x y) yes no)
 31015			for v.Op == OpPPC64CMPconst {
 31016				if v.AuxInt != 0 {
 31017					break
 31018				}
 31019				z := v.Args[0]
 31020				if z.Op != OpPPC64AND {
 31021					break
 31022				}
 31023				y := z.Args[1]
 31024				x := z.Args[0]
 31025				if !(z.Uses == 1) {
 31026					break
 31027				}
 31028				b.Kind = BlockPPC64LE
 31029				v0 := b.NewValue0(v.Pos, OpPPC64ANDCC, types.TypeFlags)
 31030				v0.AddArg(x)
 31031				v0.AddArg(y)
 31032				b.SetControl(v0)
 31033				b.Aux = nil
 31034				return true
 31035			}
 31036			// match: (LE (CMPconst [0] z:(OR x y)) yes no)
 31037			// cond: z.Uses == 1
 31038			// result: (LE (ORCC x y) yes no)
 31039			for v.Op == OpPPC64CMPconst {
 31040				if v.AuxInt != 0 {
 31041					break
 31042				}
 31043				z := v.Args[0]
 31044				if z.Op != OpPPC64OR {
 31045					break
 31046				}
 31047				y := z.Args[1]
 31048				x := z.Args[0]
 31049				if !(z.Uses == 1) {
 31050					break
 31051				}
 31052				b.Kind = BlockPPC64LE
 31053				v0 := b.NewValue0(v.Pos, OpPPC64ORCC, types.TypeFlags)
 31054				v0.AddArg(x)
 31055				v0.AddArg(y)
 31056				b.SetControl(v0)
 31057				b.Aux = nil
 31058				return true
 31059			}
 31060			// match: (LE (CMPconst [0] z:(XOR x y)) yes no)
 31061			// cond: z.Uses == 1
 31062			// result: (LE (XORCC x y) yes no)
 31063			for v.Op == OpPPC64CMPconst {
 31064				if v.AuxInt != 0 {
 31065					break
 31066				}
 31067				z := v.Args[0]
 31068				if z.Op != OpPPC64XOR {
 31069					break
 31070				}
 31071				y := z.Args[1]
 31072				x := z.Args[0]
 31073				if !(z.Uses == 1) {
 31074					break
 31075				}
 31076				b.Kind = BlockPPC64LE
 31077				v0 := b.NewValue0(v.Pos, OpPPC64XORCC, types.TypeFlags)
 31078				v0.AddArg(x)
 31079				v0.AddArg(y)
 31080				b.SetControl(v0)
 31081				b.Aux = nil
 31082				return true
 31083			}
 31084		case BlockPPC64LT:
 31085			// match: (LT (FlagEQ) yes no)
 31086			// cond:
 31087			// result: (First nil no yes)
 31088			for v.Op == OpPPC64FlagEQ {
 31089				b.Kind = BlockFirst
 31090				b.SetControl(nil)
 31091				b.Aux = nil
 31092				b.swapSuccessors()
 31093				return true
 31094			}
 31095			// match: (LT (FlagLT) yes no)
 31096			// cond:
 31097			// result: (First nil yes no)
 31098			for v.Op == OpPPC64FlagLT {
 31099				b.Kind = BlockFirst
 31100				b.SetControl(nil)
 31101				b.Aux = nil
 31102				return true
 31103			}
 31104			// match: (LT (FlagGT) yes no)
 31105			// cond:
 31106			// result: (First nil no yes)
 31107			for v.Op == OpPPC64FlagGT {
 31108				b.Kind = BlockFirst
 31109				b.SetControl(nil)
 31110				b.Aux = nil
 31111				b.swapSuccessors()
 31112				return true
 31113			}
 31114			// match: (LT (InvertFlags cmp) yes no)
 31115			// cond:
 31116			// result: (GT cmp yes no)
 31117			for v.Op == OpPPC64InvertFlags {
 31118				cmp := v.Args[0]
 31119				b.Kind = BlockPPC64GT
 31120				b.SetControl(cmp)
 31121				b.Aux = nil
 31122				return true
 31123			}
 31124			// match: (LT (CMPconst [0] (ANDconst [c] x)) yes no)
 31125			// cond:
 31126			// result: (LT (ANDCCconst [c] x) yes no)
 31127			for v.Op == OpPPC64CMPconst {
 31128				if v.AuxInt != 0 {
 31129					break
 31130				}
 31131				v_0 := v.Args[0]
 31132				if v_0.Op != OpPPC64ANDconst {
 31133					break
 31134				}
 31135				c := v_0.AuxInt
 31136				x := v_0.Args[0]
 31137				b.Kind = BlockPPC64LT
 31138				v0 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.TypeFlags)
 31139				v0.AuxInt = c
 31140				v0.AddArg(x)
 31141				b.SetControl(v0)
 31142				b.Aux = nil
 31143				return true
 31144			}
 31145			// match: (LT (CMPWconst [0] (ANDconst [c] x)) yes no)
 31146			// cond:
 31147			// result: (LT (ANDCCconst [c] x) yes no)
 31148			for v.Op == OpPPC64CMPWconst {
 31149				if v.AuxInt != 0 {
 31150					break
 31151				}
 31152				v_0 := v.Args[0]
 31153				if v_0.Op != OpPPC64ANDconst {
 31154					break
 31155				}
 31156				c := v_0.AuxInt
 31157				x := v_0.Args[0]
 31158				b.Kind = BlockPPC64LT
 31159				v0 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.TypeFlags)
 31160				v0.AuxInt = c
 31161				v0.AddArg(x)
 31162				b.SetControl(v0)
 31163				b.Aux = nil
 31164				return true
 31165			}
 31166			// match: (LT (CMPconst [0] z:(AND x y)) yes no)
 31167			// cond: z.Uses == 1
 31168			// result: (LT (ANDCC x y) yes no)
 31169			for v.Op == OpPPC64CMPconst {
 31170				if v.AuxInt != 0 {
 31171					break
 31172				}
 31173				z := v.Args[0]
 31174				if z.Op != OpPPC64AND {
 31175					break
 31176				}
 31177				y := z.Args[1]
 31178				x := z.Args[0]
 31179				if !(z.Uses == 1) {
 31180					break
 31181				}
 31182				b.Kind = BlockPPC64LT
 31183				v0 := b.NewValue0(v.Pos, OpPPC64ANDCC, types.TypeFlags)
 31184				v0.AddArg(x)
 31185				v0.AddArg(y)
 31186				b.SetControl(v0)
 31187				b.Aux = nil
 31188				return true
 31189			}
 31190			// match: (LT (CMPconst [0] z:(OR x y)) yes no)
 31191			// cond: z.Uses == 1
 31192			// result: (LT (ORCC x y) yes no)
 31193			for v.Op == OpPPC64CMPconst {
 31194				if v.AuxInt != 0 {
 31195					break
 31196				}
 31197				z := v.Args[0]
 31198				if z.Op != OpPPC64OR {
 31199					break
 31200				}
 31201				y := z.Args[1]
 31202				x := z.Args[0]
 31203				if !(z.Uses == 1) {
 31204					break
 31205				}
 31206				b.Kind = BlockPPC64LT
 31207				v0 := b.NewValue0(v.Pos, OpPPC64ORCC, types.TypeFlags)
 31208				v0.AddArg(x)
 31209				v0.AddArg(y)
 31210				b.SetControl(v0)
 31211				b.Aux = nil
 31212				return true
 31213			}
 31214			// match: (LT (CMPconst [0] z:(XOR x y)) yes no)
 31215			// cond: z.Uses == 1
 31216			// result: (LT (XORCC x y) yes no)
 31217			for v.Op == OpPPC64CMPconst {
 31218				if v.AuxInt != 0 {
 31219					break
 31220				}
 31221				z := v.Args[0]
 31222				if z.Op != OpPPC64XOR {
 31223					break
 31224				}
 31225				y := z.Args[1]
 31226				x := z.Args[0]
 31227				if !(z.Uses == 1) {
 31228					break
 31229				}
 31230				b.Kind = BlockPPC64LT
 31231				v0 := b.NewValue0(v.Pos, OpPPC64XORCC, types.TypeFlags)
 31232				v0.AddArg(x)
 31233				v0.AddArg(y)
 31234				b.SetControl(v0)
 31235				b.Aux = nil
 31236				return true
 31237			}
 31238		case BlockPPC64NE:
 31239			// match: (NE (CMPWconst [0] (Equal cc)) yes no)
 31240			// cond:
 31241			// result: (EQ cc yes no)
 31242			for v.Op == OpPPC64CMPWconst {
 31243				if v.AuxInt != 0 {
 31244					break
 31245				}
 31246				v_0 := v.Args[0]
 31247				if v_0.Op != OpPPC64Equal {
 31248					break
 31249				}
 31250				cc := v_0.Args[0]
 31251				b.Kind = BlockPPC64EQ
 31252				b.SetControl(cc)
 31253				b.Aux = nil
 31254				return true
 31255			}
 31256			// match: (NE (CMPWconst [0] (NotEqual cc)) yes no)
 31257			// cond:
 31258			// result: (NE cc yes no)
 31259			for v.Op == OpPPC64CMPWconst {
 31260				if v.AuxInt != 0 {
 31261					break
 31262				}
 31263				v_0 := v.Args[0]
 31264				if v_0.Op != OpPPC64NotEqual {
 31265					break
 31266				}
 31267				cc := v_0.Args[0]
 31268				b.Kind = BlockPPC64NE
 31269				b.SetControl(cc)
 31270				b.Aux = nil
 31271				return true
 31272			}
 31273			// match: (NE (CMPWconst [0] (LessThan cc)) yes no)
 31274			// cond:
 31275			// result: (LT cc yes no)
 31276			for v.Op == OpPPC64CMPWconst {
 31277				if v.AuxInt != 0 {
 31278					break
 31279				}
 31280				v_0 := v.Args[0]
 31281				if v_0.Op != OpPPC64LessThan {
 31282					break
 31283				}
 31284				cc := v_0.Args[0]
 31285				b.Kind = BlockPPC64LT
 31286				b.SetControl(cc)
 31287				b.Aux = nil
 31288				return true
 31289			}
 31290			// match: (NE (CMPWconst [0] (LessEqual cc)) yes no)
 31291			// cond:
 31292			// result: (LE cc yes no)
 31293			for v.Op == OpPPC64CMPWconst {
 31294				if v.AuxInt != 0 {
 31295					break
 31296				}
 31297				v_0 := v.Args[0]
 31298				if v_0.Op != OpPPC64LessEqual {
 31299					break
 31300				}
 31301				cc := v_0.Args[0]
 31302				b.Kind = BlockPPC64LE
 31303				b.SetControl(cc)
 31304				b.Aux = nil
 31305				return true
 31306			}
 31307			// match: (NE (CMPWconst [0] (GreaterThan cc)) yes no)
 31308			// cond:
 31309			// result: (GT cc yes no)
 31310			for v.Op == OpPPC64CMPWconst {
 31311				if v.AuxInt != 0 {
 31312					break
 31313				}
 31314				v_0 := v.Args[0]
 31315				if v_0.Op != OpPPC64GreaterThan {
 31316					break
 31317				}
 31318				cc := v_0.Args[0]
 31319				b.Kind = BlockPPC64GT
 31320				b.SetControl(cc)
 31321				b.Aux = nil
 31322				return true
 31323			}
 31324			// match: (NE (CMPWconst [0] (GreaterEqual cc)) yes no)
 31325			// cond:
 31326			// result: (GE cc yes no)
 31327			for v.Op == OpPPC64CMPWconst {
 31328				if v.AuxInt != 0 {
 31329					break
 31330				}
 31331				v_0 := v.Args[0]
 31332				if v_0.Op != OpPPC64GreaterEqual {
 31333					break
 31334				}
 31335				cc := v_0.Args[0]
 31336				b.Kind = BlockPPC64GE
 31337				b.SetControl(cc)
 31338				b.Aux = nil
 31339				return true
 31340			}
 31341			// match: (NE (CMPWconst [0] (FLessThan cc)) yes no)
 31342			// cond:
 31343			// result: (FLT cc yes no)
 31344			for v.Op == OpPPC64CMPWconst {
 31345				if v.AuxInt != 0 {
 31346					break
 31347				}
 31348				v_0 := v.Args[0]
 31349				if v_0.Op != OpPPC64FLessThan {
 31350					break
 31351				}
 31352				cc := v_0.Args[0]
 31353				b.Kind = BlockPPC64FLT
 31354				b.SetControl(cc)
 31355				b.Aux = nil
 31356				return true
 31357			}
 31358			// match: (NE (CMPWconst [0] (FLessEqual cc)) yes no)
 31359			// cond:
 31360			// result: (FLE cc yes no)
 31361			for v.Op == OpPPC64CMPWconst {
 31362				if v.AuxInt != 0 {
 31363					break
 31364				}
 31365				v_0 := v.Args[0]
 31366				if v_0.Op != OpPPC64FLessEqual {
 31367					break
 31368				}
 31369				cc := v_0.Args[0]
 31370				b.Kind = BlockPPC64FLE
 31371				b.SetControl(cc)
 31372				b.Aux = nil
 31373				return true
 31374			}
 31375			// match: (NE (CMPWconst [0] (FGreaterThan cc)) yes no)
 31376			// cond:
 31377			// result: (FGT cc yes no)
 31378			for v.Op == OpPPC64CMPWconst {
 31379				if v.AuxInt != 0 {
 31380					break
 31381				}
 31382				v_0 := v.Args[0]
 31383				if v_0.Op != OpPPC64FGreaterThan {
 31384					break
 31385				}
 31386				cc := v_0.Args[0]
 31387				b.Kind = BlockPPC64FGT
 31388				b.SetControl(cc)
 31389				b.Aux = nil
 31390				return true
 31391			}
 31392			// match: (NE (CMPWconst [0] (FGreaterEqual cc)) yes no)
 31393			// cond:
 31394			// result: (FGE cc yes no)
 31395			for v.Op == OpPPC64CMPWconst {
 31396				if v.AuxInt != 0 {
 31397					break
 31398				}
 31399				v_0 := v.Args[0]
 31400				if v_0.Op != OpPPC64FGreaterEqual {
 31401					break
 31402				}
 31403				cc := v_0.Args[0]
 31404				b.Kind = BlockPPC64FGE
 31405				b.SetControl(cc)
 31406				b.Aux = nil
 31407				return true
 31408			}
 31409			// match: (NE (CMPconst [0] (ANDconst [c] x)) yes no)
 31410			// cond:
 31411			// result: (NE (ANDCCconst [c] x) yes no)
 31412			for v.Op == OpPPC64CMPconst {
 31413				if v.AuxInt != 0 {
 31414					break
 31415				}
 31416				v_0 := v.Args[0]
 31417				if v_0.Op != OpPPC64ANDconst {
 31418					break
 31419				}
 31420				c := v_0.AuxInt
 31421				x := v_0.Args[0]
 31422				b.Kind = BlockPPC64NE
 31423				v0 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.TypeFlags)
 31424				v0.AuxInt = c
 31425				v0.AddArg(x)
 31426				b.SetControl(v0)
 31427				b.Aux = nil
 31428				return true
 31429			}
 31430			// match: (NE (CMPWconst [0] (ANDconst [c] x)) yes no)
 31431			// cond:
 31432			// result: (NE (ANDCCconst [c] x) yes no)
 31433			for v.Op == OpPPC64CMPWconst {
 31434				if v.AuxInt != 0 {
 31435					break
 31436				}
 31437				v_0 := v.Args[0]
 31438				if v_0.Op != OpPPC64ANDconst {
 31439					break
 31440				}
 31441				c := v_0.AuxInt
 31442				x := v_0.Args[0]
 31443				b.Kind = BlockPPC64NE
 31444				v0 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.TypeFlags)
 31445				v0.AuxInt = c
 31446				v0.AddArg(x)
 31447				b.SetControl(v0)
 31448				b.Aux = nil
 31449				return true
 31450			}
 31451			// match: (NE (FlagEQ) yes no)
 31452			// cond:
 31453			// result: (First nil no yes)
 31454			for v.Op == OpPPC64FlagEQ {
 31455				b.Kind = BlockFirst
 31456				b.SetControl(nil)
 31457				b.Aux = nil
 31458				b.swapSuccessors()
 31459				return true
 31460			}
 31461			// match: (NE (FlagLT) yes no)
 31462			// cond:
 31463			// result: (First nil yes no)
 31464			for v.Op == OpPPC64FlagLT {
 31465				b.Kind = BlockFirst
 31466				b.SetControl(nil)
 31467				b.Aux = nil
 31468				return true
 31469			}
 31470			// match: (NE (FlagGT) yes no)
 31471			// cond:
 31472			// result: (First nil yes no)
 31473			for v.Op == OpPPC64FlagGT {
 31474				b.Kind = BlockFirst
 31475				b.SetControl(nil)
 31476				b.Aux = nil
 31477				return true
 31478			}
 31479			// match: (NE (InvertFlags cmp) yes no)
 31480			// cond:
 31481			// result: (NE cmp yes no)
 31482			for v.Op == OpPPC64InvertFlags {
 31483				cmp := v.Args[0]
 31484				b.Kind = BlockPPC64NE
 31485				b.SetControl(cmp)
 31486				b.Aux = nil
 31487				return true
 31488			}
 31489			// match: (NE (CMPconst [0] (ANDconst [c] x)) yes no)
 31490			// cond:
 31491			// result: (NE (ANDCCconst [c] x) yes no)
 31492			for v.Op == OpPPC64CMPconst {
 31493				if v.AuxInt != 0 {
 31494					break
 31495				}
 31496				v_0 := v.Args[0]
 31497				if v_0.Op != OpPPC64ANDconst {
 31498					break
 31499				}
 31500				c := v_0.AuxInt
 31501				x := v_0.Args[0]
 31502				b.Kind = BlockPPC64NE
 31503				v0 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.TypeFlags)
 31504				v0.AuxInt = c
 31505				v0.AddArg(x)
 31506				b.SetControl(v0)
 31507				b.Aux = nil
 31508				return true
 31509			}
 31510			// match: (NE (CMPWconst [0] (ANDconst [c] x)) yes no)
 31511			// cond:
 31512			// result: (NE (ANDCCconst [c] x) yes no)
 31513			for v.Op == OpPPC64CMPWconst {
 31514				if v.AuxInt != 0 {
 31515					break
 31516				}
 31517				v_0 := v.Args[0]
 31518				if v_0.Op != OpPPC64ANDconst {
 31519					break
 31520				}
 31521				c := v_0.AuxInt
 31522				x := v_0.Args[0]
 31523				b.Kind = BlockPPC64NE
 31524				v0 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.TypeFlags)
 31525				v0.AuxInt = c
 31526				v0.AddArg(x)
 31527				b.SetControl(v0)
 31528				b.Aux = nil
 31529				return true
 31530			}
 31531			// match: (NE (CMPconst [0] z:(AND x y)) yes no)
 31532			// cond: z.Uses == 1
 31533			// result: (NE (ANDCC x y) yes no)
 31534			for v.Op == OpPPC64CMPconst {
 31535				if v.AuxInt != 0 {
 31536					break
 31537				}
 31538				z := v.Args[0]
 31539				if z.Op != OpPPC64AND {
 31540					break
 31541				}
 31542				y := z.Args[1]
 31543				x := z.Args[0]
 31544				if !(z.Uses == 1) {
 31545					break
 31546				}
 31547				b.Kind = BlockPPC64NE
 31548				v0 := b.NewValue0(v.Pos, OpPPC64ANDCC, types.TypeFlags)
 31549				v0.AddArg(x)
 31550				v0.AddArg(y)
 31551				b.SetControl(v0)
 31552				b.Aux = nil
 31553				return true
 31554			}
 31555			// match: (NE (CMPconst [0] z:(OR x y)) yes no)
 31556			// cond: z.Uses == 1
 31557			// result: (NE (ORCC x y) yes no)
 31558			for v.Op == OpPPC64CMPconst {
 31559				if v.AuxInt != 0 {
 31560					break
 31561				}
 31562				z := v.Args[0]
 31563				if z.Op != OpPPC64OR {
 31564					break
 31565				}
 31566				y := z.Args[1]
 31567				x := z.Args[0]
 31568				if !(z.Uses == 1) {
 31569					break
 31570				}
 31571				b.Kind = BlockPPC64NE
 31572				v0 := b.NewValue0(v.Pos, OpPPC64ORCC, types.TypeFlags)
 31573				v0.AddArg(x)
 31574				v0.AddArg(y)
 31575				b.SetControl(v0)
 31576				b.Aux = nil
 31577				return true
 31578			}
 31579			// match: (NE (CMPconst [0] z:(XOR x y)) yes no)
 31580			// cond: z.Uses == 1
 31581			// result: (NE (XORCC x y) yes no)
 31582			for v.Op == OpPPC64CMPconst {
 31583				if v.AuxInt != 0 {
 31584					break
 31585				}
 31586				z := v.Args[0]
 31587				if z.Op != OpPPC64XOR {
 31588					break
 31589				}
 31590				y := z.Args[1]
 31591				x := z.Args[0]
 31592				if !(z.Uses == 1) {
 31593					break
 31594				}
 31595				b.Kind = BlockPPC64NE
 31596				v0 := b.NewValue0(v.Pos, OpPPC64XORCC, types.TypeFlags)
 31597				v0.AddArg(x)
 31598				v0.AddArg(y)
 31599				b.SetControl(v0)
 31600				b.Aux = nil
 31601				return true
 31602			}
 31603		}
 31604		return false
 31605	}
 31606	

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