Source file src/pkg/cmd/compile/internal/ssa/opGen.go
1
2
3 package ssa
4
5 import (
6 "cmd/internal/obj"
7 "cmd/internal/obj/arm"
8 "cmd/internal/obj/arm64"
9 "cmd/internal/obj/mips"
10 "cmd/internal/obj/ppc64"
11 "cmd/internal/obj/s390x"
12 "cmd/internal/obj/wasm"
13 "cmd/internal/obj/x86"
14 )
15
16 const (
17 BlockInvalid BlockKind = iota
18
19 Block386EQ
20 Block386NE
21 Block386LT
22 Block386LE
23 Block386GT
24 Block386GE
25 Block386OS
26 Block386OC
27 Block386ULT
28 Block386ULE
29 Block386UGT
30 Block386UGE
31 Block386EQF
32 Block386NEF
33 Block386ORD
34 Block386NAN
35
36 BlockAMD64EQ
37 BlockAMD64NE
38 BlockAMD64LT
39 BlockAMD64LE
40 BlockAMD64GT
41 BlockAMD64GE
42 BlockAMD64OS
43 BlockAMD64OC
44 BlockAMD64ULT
45 BlockAMD64ULE
46 BlockAMD64UGT
47 BlockAMD64UGE
48 BlockAMD64EQF
49 BlockAMD64NEF
50 BlockAMD64ORD
51 BlockAMD64NAN
52
53 BlockARMEQ
54 BlockARMNE
55 BlockARMLT
56 BlockARMLE
57 BlockARMGT
58 BlockARMGE
59 BlockARMULT
60 BlockARMULE
61 BlockARMUGT
62 BlockARMUGE
63
64 BlockARM64EQ
65 BlockARM64NE
66 BlockARM64LT
67 BlockARM64LE
68 BlockARM64GT
69 BlockARM64GE
70 BlockARM64ULT
71 BlockARM64ULE
72 BlockARM64UGT
73 BlockARM64UGE
74 BlockARM64Z
75 BlockARM64NZ
76 BlockARM64ZW
77 BlockARM64NZW
78 BlockARM64TBZ
79 BlockARM64TBNZ
80 BlockARM64FLT
81 BlockARM64FLE
82 BlockARM64FGT
83 BlockARM64FGE
84
85 BlockMIPSEQ
86 BlockMIPSNE
87 BlockMIPSLTZ
88 BlockMIPSLEZ
89 BlockMIPSGTZ
90 BlockMIPSGEZ
91 BlockMIPSFPT
92 BlockMIPSFPF
93
94 BlockMIPS64EQ
95 BlockMIPS64NE
96 BlockMIPS64LTZ
97 BlockMIPS64LEZ
98 BlockMIPS64GTZ
99 BlockMIPS64GEZ
100 BlockMIPS64FPT
101 BlockMIPS64FPF
102
103 BlockPPC64EQ
104 BlockPPC64NE
105 BlockPPC64LT
106 BlockPPC64LE
107 BlockPPC64GT
108 BlockPPC64GE
109 BlockPPC64FLT
110 BlockPPC64FLE
111 BlockPPC64FGT
112 BlockPPC64FGE
113
114 BlockS390XEQ
115 BlockS390XNE
116 BlockS390XLT
117 BlockS390XLE
118 BlockS390XGT
119 BlockS390XGE
120 BlockS390XGTF
121 BlockS390XGEF
122
123 BlockPlain
124 BlockIf
125 BlockDefer
126 BlockRet
127 BlockRetJmp
128 BlockExit
129 BlockFirst
130 )
131
132 var blockString = [...]string{
133 BlockInvalid: "BlockInvalid",
134
135 Block386EQ: "EQ",
136 Block386NE: "NE",
137 Block386LT: "LT",
138 Block386LE: "LE",
139 Block386GT: "GT",
140 Block386GE: "GE",
141 Block386OS: "OS",
142 Block386OC: "OC",
143 Block386ULT: "ULT",
144 Block386ULE: "ULE",
145 Block386UGT: "UGT",
146 Block386UGE: "UGE",
147 Block386EQF: "EQF",
148 Block386NEF: "NEF",
149 Block386ORD: "ORD",
150 Block386NAN: "NAN",
151
152 BlockAMD64EQ: "EQ",
153 BlockAMD64NE: "NE",
154 BlockAMD64LT: "LT",
155 BlockAMD64LE: "LE",
156 BlockAMD64GT: "GT",
157 BlockAMD64GE: "GE",
158 BlockAMD64OS: "OS",
159 BlockAMD64OC: "OC",
160 BlockAMD64ULT: "ULT",
161 BlockAMD64ULE: "ULE",
162 BlockAMD64UGT: "UGT",
163 BlockAMD64UGE: "UGE",
164 BlockAMD64EQF: "EQF",
165 BlockAMD64NEF: "NEF",
166 BlockAMD64ORD: "ORD",
167 BlockAMD64NAN: "NAN",
168
169 BlockARMEQ: "EQ",
170 BlockARMNE: "NE",
171 BlockARMLT: "LT",
172 BlockARMLE: "LE",
173 BlockARMGT: "GT",
174 BlockARMGE: "GE",
175 BlockARMULT: "ULT",
176 BlockARMULE: "ULE",
177 BlockARMUGT: "UGT",
178 BlockARMUGE: "UGE",
179
180 BlockARM64EQ: "EQ",
181 BlockARM64NE: "NE",
182 BlockARM64LT: "LT",
183 BlockARM64LE: "LE",
184 BlockARM64GT: "GT",
185 BlockARM64GE: "GE",
186 BlockARM64ULT: "ULT",
187 BlockARM64ULE: "ULE",
188 BlockARM64UGT: "UGT",
189 BlockARM64UGE: "UGE",
190 BlockARM64Z: "Z",
191 BlockARM64NZ: "NZ",
192 BlockARM64ZW: "ZW",
193 BlockARM64NZW: "NZW",
194 BlockARM64TBZ: "TBZ",
195 BlockARM64TBNZ: "TBNZ",
196 BlockARM64FLT: "FLT",
197 BlockARM64FLE: "FLE",
198 BlockARM64FGT: "FGT",
199 BlockARM64FGE: "FGE",
200
201 BlockMIPSEQ: "EQ",
202 BlockMIPSNE: "NE",
203 BlockMIPSLTZ: "LTZ",
204 BlockMIPSLEZ: "LEZ",
205 BlockMIPSGTZ: "GTZ",
206 BlockMIPSGEZ: "GEZ",
207 BlockMIPSFPT: "FPT",
208 BlockMIPSFPF: "FPF",
209
210 BlockMIPS64EQ: "EQ",
211 BlockMIPS64NE: "NE",
212 BlockMIPS64LTZ: "LTZ",
213 BlockMIPS64LEZ: "LEZ",
214 BlockMIPS64GTZ: "GTZ",
215 BlockMIPS64GEZ: "GEZ",
216 BlockMIPS64FPT: "FPT",
217 BlockMIPS64FPF: "FPF",
218
219 BlockPPC64EQ: "EQ",
220 BlockPPC64NE: "NE",
221 BlockPPC64LT: "LT",
222 BlockPPC64LE: "LE",
223 BlockPPC64GT: "GT",
224 BlockPPC64GE: "GE",
225 BlockPPC64FLT: "FLT",
226 BlockPPC64FLE: "FLE",
227 BlockPPC64FGT: "FGT",
228 BlockPPC64FGE: "FGE",
229
230 BlockS390XEQ: "EQ",
231 BlockS390XNE: "NE",
232 BlockS390XLT: "LT",
233 BlockS390XLE: "LE",
234 BlockS390XGT: "GT",
235 BlockS390XGE: "GE",
236 BlockS390XGTF: "GTF",
237 BlockS390XGEF: "GEF",
238
239 BlockPlain: "Plain",
240 BlockIf: "If",
241 BlockDefer: "Defer",
242 BlockRet: "Ret",
243 BlockRetJmp: "RetJmp",
244 BlockExit: "Exit",
245 BlockFirst: "First",
246 }
247
248 func (k BlockKind) String() string { return blockString[k] }
249
250 const (
251 OpInvalid Op = iota
252
253 Op386ADDSS
254 Op386ADDSD
255 Op386SUBSS
256 Op386SUBSD
257 Op386MULSS
258 Op386MULSD
259 Op386DIVSS
260 Op386DIVSD
261 Op386MOVSSload
262 Op386MOVSDload
263 Op386MOVSSconst
264 Op386MOVSDconst
265 Op386MOVSSloadidx1
266 Op386MOVSSloadidx4
267 Op386MOVSDloadidx1
268 Op386MOVSDloadidx8
269 Op386MOVSSstore
270 Op386MOVSDstore
271 Op386MOVSSstoreidx1
272 Op386MOVSSstoreidx4
273 Op386MOVSDstoreidx1
274 Op386MOVSDstoreidx8
275 Op386ADDSSload
276 Op386ADDSDload
277 Op386SUBSSload
278 Op386SUBSDload
279 Op386MULSSload
280 Op386MULSDload
281 Op386DIVSSload
282 Op386DIVSDload
283 Op386ADDL
284 Op386ADDLconst
285 Op386ADDLcarry
286 Op386ADDLconstcarry
287 Op386ADCL
288 Op386ADCLconst
289 Op386SUBL
290 Op386SUBLconst
291 Op386SUBLcarry
292 Op386SUBLconstcarry
293 Op386SBBL
294 Op386SBBLconst
295 Op386MULL
296 Op386MULLconst
297 Op386MULLU
298 Op386HMULL
299 Op386HMULLU
300 Op386MULLQU
301 Op386AVGLU
302 Op386DIVL
303 Op386DIVW
304 Op386DIVLU
305 Op386DIVWU
306 Op386MODL
307 Op386MODW
308 Op386MODLU
309 Op386MODWU
310 Op386ANDL
311 Op386ANDLconst
312 Op386ORL
313 Op386ORLconst
314 Op386XORL
315 Op386XORLconst
316 Op386CMPL
317 Op386CMPW
318 Op386CMPB
319 Op386CMPLconst
320 Op386CMPWconst
321 Op386CMPBconst
322 Op386CMPLload
323 Op386CMPWload
324 Op386CMPBload
325 Op386CMPLconstload
326 Op386CMPWconstload
327 Op386CMPBconstload
328 Op386UCOMISS
329 Op386UCOMISD
330 Op386TESTL
331 Op386TESTW
332 Op386TESTB
333 Op386TESTLconst
334 Op386TESTWconst
335 Op386TESTBconst
336 Op386SHLL
337 Op386SHLLconst
338 Op386SHRL
339 Op386SHRW
340 Op386SHRB
341 Op386SHRLconst
342 Op386SHRWconst
343 Op386SHRBconst
344 Op386SARL
345 Op386SARW
346 Op386SARB
347 Op386SARLconst
348 Op386SARWconst
349 Op386SARBconst
350 Op386ROLLconst
351 Op386ROLWconst
352 Op386ROLBconst
353 Op386ADDLload
354 Op386SUBLload
355 Op386MULLload
356 Op386ANDLload
357 Op386ORLload
358 Op386XORLload
359 Op386ADDLloadidx4
360 Op386SUBLloadidx4
361 Op386MULLloadidx4
362 Op386ANDLloadidx4
363 Op386ORLloadidx4
364 Op386XORLloadidx4
365 Op386NEGL
366 Op386NOTL
367 Op386BSFL
368 Op386BSFW
369 Op386BSRL
370 Op386BSRW
371 Op386BSWAPL
372 Op386SQRTSD
373 Op386SBBLcarrymask
374 Op386SETEQ
375 Op386SETNE
376 Op386SETL
377 Op386SETLE
378 Op386SETG
379 Op386SETGE
380 Op386SETB
381 Op386SETBE
382 Op386SETA
383 Op386SETAE
384 Op386SETO
385 Op386SETEQF
386 Op386SETNEF
387 Op386SETORD
388 Op386SETNAN
389 Op386SETGF
390 Op386SETGEF
391 Op386MOVBLSX
392 Op386MOVBLZX
393 Op386MOVWLSX
394 Op386MOVWLZX
395 Op386MOVLconst
396 Op386CVTTSD2SL
397 Op386CVTTSS2SL
398 Op386CVTSL2SS
399 Op386CVTSL2SD
400 Op386CVTSD2SS
401 Op386CVTSS2SD
402 Op386PXOR
403 Op386LEAL
404 Op386LEAL1
405 Op386LEAL2
406 Op386LEAL4
407 Op386LEAL8
408 Op386MOVBload
409 Op386MOVBLSXload
410 Op386MOVWload
411 Op386MOVWLSXload
412 Op386MOVLload
413 Op386MOVBstore
414 Op386MOVWstore
415 Op386MOVLstore
416 Op386ADDLmodify
417 Op386SUBLmodify
418 Op386ANDLmodify
419 Op386ORLmodify
420 Op386XORLmodify
421 Op386ADDLmodifyidx4
422 Op386SUBLmodifyidx4
423 Op386ANDLmodifyidx4
424 Op386ORLmodifyidx4
425 Op386XORLmodifyidx4
426 Op386ADDLconstmodify
427 Op386ANDLconstmodify
428 Op386ORLconstmodify
429 Op386XORLconstmodify
430 Op386ADDLconstmodifyidx4
431 Op386ANDLconstmodifyidx4
432 Op386ORLconstmodifyidx4
433 Op386XORLconstmodifyidx4
434 Op386MOVBloadidx1
435 Op386MOVWloadidx1
436 Op386MOVWloadidx2
437 Op386MOVLloadidx1
438 Op386MOVLloadidx4
439 Op386MOVBstoreidx1
440 Op386MOVWstoreidx1
441 Op386MOVWstoreidx2
442 Op386MOVLstoreidx1
443 Op386MOVLstoreidx4
444 Op386MOVBstoreconst
445 Op386MOVWstoreconst
446 Op386MOVLstoreconst
447 Op386MOVBstoreconstidx1
448 Op386MOVWstoreconstidx1
449 Op386MOVWstoreconstidx2
450 Op386MOVLstoreconstidx1
451 Op386MOVLstoreconstidx4
452 Op386DUFFZERO
453 Op386REPSTOSL
454 Op386CALLstatic
455 Op386CALLclosure
456 Op386CALLinter
457 Op386DUFFCOPY
458 Op386REPMOVSL
459 Op386InvertFlags
460 Op386LoweredGetG
461 Op386LoweredGetClosurePtr
462 Op386LoweredGetCallerPC
463 Op386LoweredGetCallerSP
464 Op386LoweredNilCheck
465 Op386LoweredWB
466 Op386LoweredPanicBoundsA
467 Op386LoweredPanicBoundsB
468 Op386LoweredPanicBoundsC
469 Op386LoweredPanicExtendA
470 Op386LoweredPanicExtendB
471 Op386LoweredPanicExtendC
472 Op386FlagEQ
473 Op386FlagLT_ULT
474 Op386FlagLT_UGT
475 Op386FlagGT_UGT
476 Op386FlagGT_ULT
477 Op386FCHS
478 Op386MOVSSconst1
479 Op386MOVSDconst1
480 Op386MOVSSconst2
481 Op386MOVSDconst2
482
483 OpAMD64ADDSS
484 OpAMD64ADDSD
485 OpAMD64SUBSS
486 OpAMD64SUBSD
487 OpAMD64MULSS
488 OpAMD64MULSD
489 OpAMD64DIVSS
490 OpAMD64DIVSD
491 OpAMD64MOVSSload
492 OpAMD64MOVSDload
493 OpAMD64MOVSSconst
494 OpAMD64MOVSDconst
495 OpAMD64MOVSSloadidx1
496 OpAMD64MOVSSloadidx4
497 OpAMD64MOVSDloadidx1
498 OpAMD64MOVSDloadidx8
499 OpAMD64MOVSSstore
500 OpAMD64MOVSDstore
501 OpAMD64MOVSSstoreidx1
502 OpAMD64MOVSSstoreidx4
503 OpAMD64MOVSDstoreidx1
504 OpAMD64MOVSDstoreidx8
505 OpAMD64ADDSSload
506 OpAMD64ADDSDload
507 OpAMD64SUBSSload
508 OpAMD64SUBSDload
509 OpAMD64MULSSload
510 OpAMD64MULSDload
511 OpAMD64DIVSSload
512 OpAMD64DIVSDload
513 OpAMD64ADDQ
514 OpAMD64ADDL
515 OpAMD64ADDQconst
516 OpAMD64ADDLconst
517 OpAMD64ADDQconstmodify
518 OpAMD64ADDLconstmodify
519 OpAMD64SUBQ
520 OpAMD64SUBL
521 OpAMD64SUBQconst
522 OpAMD64SUBLconst
523 OpAMD64MULQ
524 OpAMD64MULL
525 OpAMD64MULQconst
526 OpAMD64MULLconst
527 OpAMD64MULLU
528 OpAMD64MULQU
529 OpAMD64HMULQ
530 OpAMD64HMULL
531 OpAMD64HMULQU
532 OpAMD64HMULLU
533 OpAMD64AVGQU
534 OpAMD64DIVQ
535 OpAMD64DIVL
536 OpAMD64DIVW
537 OpAMD64DIVQU
538 OpAMD64DIVLU
539 OpAMD64DIVWU
540 OpAMD64NEGLflags
541 OpAMD64ADDQcarry
542 OpAMD64ADCQ
543 OpAMD64ADDQconstcarry
544 OpAMD64ADCQconst
545 OpAMD64SUBQborrow
546 OpAMD64SBBQ
547 OpAMD64SUBQconstborrow
548 OpAMD64SBBQconst
549 OpAMD64MULQU2
550 OpAMD64DIVQU2
551 OpAMD64ANDQ
552 OpAMD64ANDL
553 OpAMD64ANDQconst
554 OpAMD64ANDLconst
555 OpAMD64ANDQconstmodify
556 OpAMD64ANDLconstmodify
557 OpAMD64ORQ
558 OpAMD64ORL
559 OpAMD64ORQconst
560 OpAMD64ORLconst
561 OpAMD64ORQconstmodify
562 OpAMD64ORLconstmodify
563 OpAMD64XORQ
564 OpAMD64XORL
565 OpAMD64XORQconst
566 OpAMD64XORLconst
567 OpAMD64XORQconstmodify
568 OpAMD64XORLconstmodify
569 OpAMD64CMPQ
570 OpAMD64CMPL
571 OpAMD64CMPW
572 OpAMD64CMPB
573 OpAMD64CMPQconst
574 OpAMD64CMPLconst
575 OpAMD64CMPWconst
576 OpAMD64CMPBconst
577 OpAMD64CMPQload
578 OpAMD64CMPLload
579 OpAMD64CMPWload
580 OpAMD64CMPBload
581 OpAMD64CMPQconstload
582 OpAMD64CMPLconstload
583 OpAMD64CMPWconstload
584 OpAMD64CMPBconstload
585 OpAMD64UCOMISS
586 OpAMD64UCOMISD
587 OpAMD64BTL
588 OpAMD64BTQ
589 OpAMD64BTCL
590 OpAMD64BTCQ
591 OpAMD64BTRL
592 OpAMD64BTRQ
593 OpAMD64BTSL
594 OpAMD64BTSQ
595 OpAMD64BTLconst
596 OpAMD64BTQconst
597 OpAMD64BTCLconst
598 OpAMD64BTCQconst
599 OpAMD64BTRLconst
600 OpAMD64BTRQconst
601 OpAMD64BTSLconst
602 OpAMD64BTSQconst
603 OpAMD64BTCQmodify
604 OpAMD64BTCLmodify
605 OpAMD64BTSQmodify
606 OpAMD64BTSLmodify
607 OpAMD64BTRQmodify
608 OpAMD64BTRLmodify
609 OpAMD64BTCQconstmodify
610 OpAMD64BTCLconstmodify
611 OpAMD64BTSQconstmodify
612 OpAMD64BTSLconstmodify
613 OpAMD64BTRQconstmodify
614 OpAMD64BTRLconstmodify
615 OpAMD64TESTQ
616 OpAMD64TESTL
617 OpAMD64TESTW
618 OpAMD64TESTB
619 OpAMD64TESTQconst
620 OpAMD64TESTLconst
621 OpAMD64TESTWconst
622 OpAMD64TESTBconst
623 OpAMD64SHLQ
624 OpAMD64SHLL
625 OpAMD64SHLQconst
626 OpAMD64SHLLconst
627 OpAMD64SHRQ
628 OpAMD64SHRL
629 OpAMD64SHRW
630 OpAMD64SHRB
631 OpAMD64SHRQconst
632 OpAMD64SHRLconst
633 OpAMD64SHRWconst
634 OpAMD64SHRBconst
635 OpAMD64SARQ
636 OpAMD64SARL
637 OpAMD64SARW
638 OpAMD64SARB
639 OpAMD64SARQconst
640 OpAMD64SARLconst
641 OpAMD64SARWconst
642 OpAMD64SARBconst
643 OpAMD64ROLQ
644 OpAMD64ROLL
645 OpAMD64ROLW
646 OpAMD64ROLB
647 OpAMD64RORQ
648 OpAMD64RORL
649 OpAMD64RORW
650 OpAMD64RORB
651 OpAMD64ROLQconst
652 OpAMD64ROLLconst
653 OpAMD64ROLWconst
654 OpAMD64ROLBconst
655 OpAMD64ADDLload
656 OpAMD64ADDQload
657 OpAMD64SUBQload
658 OpAMD64SUBLload
659 OpAMD64ANDLload
660 OpAMD64ANDQload
661 OpAMD64ORQload
662 OpAMD64ORLload
663 OpAMD64XORQload
664 OpAMD64XORLload
665 OpAMD64ADDQmodify
666 OpAMD64SUBQmodify
667 OpAMD64ANDQmodify
668 OpAMD64ORQmodify
669 OpAMD64XORQmodify
670 OpAMD64ADDLmodify
671 OpAMD64SUBLmodify
672 OpAMD64ANDLmodify
673 OpAMD64ORLmodify
674 OpAMD64XORLmodify
675 OpAMD64NEGQ
676 OpAMD64NEGL
677 OpAMD64NOTQ
678 OpAMD64NOTL
679 OpAMD64BSFQ
680 OpAMD64BSFL
681 OpAMD64BSRQ
682 OpAMD64BSRL
683 OpAMD64CMOVQEQ
684 OpAMD64CMOVQNE
685 OpAMD64CMOVQLT
686 OpAMD64CMOVQGT
687 OpAMD64CMOVQLE
688 OpAMD64CMOVQGE
689 OpAMD64CMOVQLS
690 OpAMD64CMOVQHI
691 OpAMD64CMOVQCC
692 OpAMD64CMOVQCS
693 OpAMD64CMOVLEQ
694 OpAMD64CMOVLNE
695 OpAMD64CMOVLLT
696 OpAMD64CMOVLGT
697 OpAMD64CMOVLLE
698 OpAMD64CMOVLGE
699 OpAMD64CMOVLLS
700 OpAMD64CMOVLHI
701 OpAMD64CMOVLCC
702 OpAMD64CMOVLCS
703 OpAMD64CMOVWEQ
704 OpAMD64CMOVWNE
705 OpAMD64CMOVWLT
706 OpAMD64CMOVWGT
707 OpAMD64CMOVWLE
708 OpAMD64CMOVWGE
709 OpAMD64CMOVWLS
710 OpAMD64CMOVWHI
711 OpAMD64CMOVWCC
712 OpAMD64CMOVWCS
713 OpAMD64CMOVQEQF
714 OpAMD64CMOVQNEF
715 OpAMD64CMOVQGTF
716 OpAMD64CMOVQGEF
717 OpAMD64CMOVLEQF
718 OpAMD64CMOVLNEF
719 OpAMD64CMOVLGTF
720 OpAMD64CMOVLGEF
721 OpAMD64CMOVWEQF
722 OpAMD64CMOVWNEF
723 OpAMD64CMOVWGTF
724 OpAMD64CMOVWGEF
725 OpAMD64BSWAPQ
726 OpAMD64BSWAPL
727 OpAMD64POPCNTQ
728 OpAMD64POPCNTL
729 OpAMD64SQRTSD
730 OpAMD64ROUNDSD
731 OpAMD64SBBQcarrymask
732 OpAMD64SBBLcarrymask
733 OpAMD64SETEQ
734 OpAMD64SETNE
735 OpAMD64SETL
736 OpAMD64SETLE
737 OpAMD64SETG
738 OpAMD64SETGE
739 OpAMD64SETB
740 OpAMD64SETBE
741 OpAMD64SETA
742 OpAMD64SETAE
743 OpAMD64SETO
744 OpAMD64SETEQstore
745 OpAMD64SETNEstore
746 OpAMD64SETLstore
747 OpAMD64SETLEstore
748 OpAMD64SETGstore
749 OpAMD64SETGEstore
750 OpAMD64SETBstore
751 OpAMD64SETBEstore
752 OpAMD64SETAstore
753 OpAMD64SETAEstore
754 OpAMD64SETEQF
755 OpAMD64SETNEF
756 OpAMD64SETORD
757 OpAMD64SETNAN
758 OpAMD64SETGF
759 OpAMD64SETGEF
760 OpAMD64MOVBQSX
761 OpAMD64MOVBQZX
762 OpAMD64MOVWQSX
763 OpAMD64MOVWQZX
764 OpAMD64MOVLQSX
765 OpAMD64MOVLQZX
766 OpAMD64MOVLconst
767 OpAMD64MOVQconst
768 OpAMD64CVTTSD2SL
769 OpAMD64CVTTSD2SQ
770 OpAMD64CVTTSS2SL
771 OpAMD64CVTTSS2SQ
772 OpAMD64CVTSL2SS
773 OpAMD64CVTSL2SD
774 OpAMD64CVTSQ2SS
775 OpAMD64CVTSQ2SD
776 OpAMD64CVTSD2SS
777 OpAMD64CVTSS2SD
778 OpAMD64MOVQi2f
779 OpAMD64MOVQf2i
780 OpAMD64MOVLi2f
781 OpAMD64MOVLf2i
782 OpAMD64PXOR
783 OpAMD64LEAQ
784 OpAMD64LEAL
785 OpAMD64LEAW
786 OpAMD64LEAQ1
787 OpAMD64LEAL1
788 OpAMD64LEAW1
789 OpAMD64LEAQ2
790 OpAMD64LEAL2
791 OpAMD64LEAW2
792 OpAMD64LEAQ4
793 OpAMD64LEAL4
794 OpAMD64LEAW4
795 OpAMD64LEAQ8
796 OpAMD64LEAL8
797 OpAMD64LEAW8
798 OpAMD64MOVBload
799 OpAMD64MOVBQSXload
800 OpAMD64MOVWload
801 OpAMD64MOVWQSXload
802 OpAMD64MOVLload
803 OpAMD64MOVLQSXload
804 OpAMD64MOVQload
805 OpAMD64MOVBstore
806 OpAMD64MOVWstore
807 OpAMD64MOVLstore
808 OpAMD64MOVQstore
809 OpAMD64MOVOload
810 OpAMD64MOVOstore
811 OpAMD64MOVBloadidx1
812 OpAMD64MOVWloadidx1
813 OpAMD64MOVWloadidx2
814 OpAMD64MOVLloadidx1
815 OpAMD64MOVLloadidx4
816 OpAMD64MOVLloadidx8
817 OpAMD64MOVQloadidx1
818 OpAMD64MOVQloadidx8
819 OpAMD64MOVBstoreidx1
820 OpAMD64MOVWstoreidx1
821 OpAMD64MOVWstoreidx2
822 OpAMD64MOVLstoreidx1
823 OpAMD64MOVLstoreidx4
824 OpAMD64MOVLstoreidx8
825 OpAMD64MOVQstoreidx1
826 OpAMD64MOVQstoreidx8
827 OpAMD64MOVBstoreconst
828 OpAMD64MOVWstoreconst
829 OpAMD64MOVLstoreconst
830 OpAMD64MOVQstoreconst
831 OpAMD64MOVBstoreconstidx1
832 OpAMD64MOVWstoreconstidx1
833 OpAMD64MOVWstoreconstidx2
834 OpAMD64MOVLstoreconstidx1
835 OpAMD64MOVLstoreconstidx4
836 OpAMD64MOVQstoreconstidx1
837 OpAMD64MOVQstoreconstidx8
838 OpAMD64DUFFZERO
839 OpAMD64MOVOconst
840 OpAMD64REPSTOSQ
841 OpAMD64CALLstatic
842 OpAMD64CALLclosure
843 OpAMD64CALLinter
844 OpAMD64DUFFCOPY
845 OpAMD64REPMOVSQ
846 OpAMD64InvertFlags
847 OpAMD64LoweredGetG
848 OpAMD64LoweredGetClosurePtr
849 OpAMD64LoweredGetCallerPC
850 OpAMD64LoweredGetCallerSP
851 OpAMD64LoweredNilCheck
852 OpAMD64LoweredWB
853 OpAMD64LoweredPanicBoundsA
854 OpAMD64LoweredPanicBoundsB
855 OpAMD64LoweredPanicBoundsC
856 OpAMD64LoweredPanicExtendA
857 OpAMD64LoweredPanicExtendB
858 OpAMD64LoweredPanicExtendC
859 OpAMD64FlagEQ
860 OpAMD64FlagLT_ULT
861 OpAMD64FlagLT_UGT
862 OpAMD64FlagGT_UGT
863 OpAMD64FlagGT_ULT
864 OpAMD64MOVBatomicload
865 OpAMD64MOVLatomicload
866 OpAMD64MOVQatomicload
867 OpAMD64XCHGL
868 OpAMD64XCHGQ
869 OpAMD64XADDLlock
870 OpAMD64XADDQlock
871 OpAMD64AddTupleFirst32
872 OpAMD64AddTupleFirst64
873 OpAMD64CMPXCHGLlock
874 OpAMD64CMPXCHGQlock
875 OpAMD64ANDBlock
876 OpAMD64ORBlock
877
878 OpARMADD
879 OpARMADDconst
880 OpARMSUB
881 OpARMSUBconst
882 OpARMRSB
883 OpARMRSBconst
884 OpARMMUL
885 OpARMHMUL
886 OpARMHMULU
887 OpARMCALLudiv
888 OpARMADDS
889 OpARMADDSconst
890 OpARMADC
891 OpARMADCconst
892 OpARMSUBS
893 OpARMSUBSconst
894 OpARMRSBSconst
895 OpARMSBC
896 OpARMSBCconst
897 OpARMRSCconst
898 OpARMMULLU
899 OpARMMULA
900 OpARMMULS
901 OpARMADDF
902 OpARMADDD
903 OpARMSUBF
904 OpARMSUBD
905 OpARMMULF
906 OpARMMULD
907 OpARMNMULF
908 OpARMNMULD
909 OpARMDIVF
910 OpARMDIVD
911 OpARMMULAF
912 OpARMMULAD
913 OpARMMULSF
914 OpARMMULSD
915 OpARMAND
916 OpARMANDconst
917 OpARMOR
918 OpARMORconst
919 OpARMXOR
920 OpARMXORconst
921 OpARMBIC
922 OpARMBICconst
923 OpARMBFX
924 OpARMBFXU
925 OpARMMVN
926 OpARMNEGF
927 OpARMNEGD
928 OpARMSQRTD
929 OpARMCLZ
930 OpARMREV
931 OpARMREV16
932 OpARMRBIT
933 OpARMSLL
934 OpARMSLLconst
935 OpARMSRL
936 OpARMSRLconst
937 OpARMSRA
938 OpARMSRAconst
939 OpARMSRRconst
940 OpARMADDshiftLL
941 OpARMADDshiftRL
942 OpARMADDshiftRA
943 OpARMSUBshiftLL
944 OpARMSUBshiftRL
945 OpARMSUBshiftRA
946 OpARMRSBshiftLL
947 OpARMRSBshiftRL
948 OpARMRSBshiftRA
949 OpARMANDshiftLL
950 OpARMANDshiftRL
951 OpARMANDshiftRA
952 OpARMORshiftLL
953 OpARMORshiftRL
954 OpARMORshiftRA
955 OpARMXORshiftLL
956 OpARMXORshiftRL
957 OpARMXORshiftRA
958 OpARMXORshiftRR
959 OpARMBICshiftLL
960 OpARMBICshiftRL
961 OpARMBICshiftRA
962 OpARMMVNshiftLL
963 OpARMMVNshiftRL
964 OpARMMVNshiftRA
965 OpARMADCshiftLL
966 OpARMADCshiftRL
967 OpARMADCshiftRA
968 OpARMSBCshiftLL
969 OpARMSBCshiftRL
970 OpARMSBCshiftRA
971 OpARMRSCshiftLL
972 OpARMRSCshiftRL
973 OpARMRSCshiftRA
974 OpARMADDSshiftLL
975 OpARMADDSshiftRL
976 OpARMADDSshiftRA
977 OpARMSUBSshiftLL
978 OpARMSUBSshiftRL
979 OpARMSUBSshiftRA
980 OpARMRSBSshiftLL
981 OpARMRSBSshiftRL
982 OpARMRSBSshiftRA
983 OpARMADDshiftLLreg
984 OpARMADDshiftRLreg
985 OpARMADDshiftRAreg
986 OpARMSUBshiftLLreg
987 OpARMSUBshiftRLreg
988 OpARMSUBshiftRAreg
989 OpARMRSBshiftLLreg
990 OpARMRSBshiftRLreg
991 OpARMRSBshiftRAreg
992 OpARMANDshiftLLreg
993 OpARMANDshiftRLreg
994 OpARMANDshiftRAreg
995 OpARMORshiftLLreg
996 OpARMORshiftRLreg
997 OpARMORshiftRAreg
998 OpARMXORshiftLLreg
999 OpARMXORshiftRLreg
1000 OpARMXORshiftRAreg
1001 OpARMBICshiftLLreg
1002 OpARMBICshiftRLreg
1003 OpARMBICshiftRAreg
1004 OpARMMVNshiftLLreg
1005 OpARMMVNshiftRLreg
1006 OpARMMVNshiftRAreg
1007 OpARMADCshiftLLreg
1008 OpARMADCshiftRLreg
1009 OpARMADCshiftRAreg
1010 OpARMSBCshiftLLreg
1011 OpARMSBCshiftRLreg
1012 OpARMSBCshiftRAreg
1013 OpARMRSCshiftLLreg
1014 OpARMRSCshiftRLreg
1015 OpARMRSCshiftRAreg
1016 OpARMADDSshiftLLreg
1017 OpARMADDSshiftRLreg
1018 OpARMADDSshiftRAreg
1019 OpARMSUBSshiftLLreg
1020 OpARMSUBSshiftRLreg
1021 OpARMSUBSshiftRAreg
1022 OpARMRSBSshiftLLreg
1023 OpARMRSBSshiftRLreg
1024 OpARMRSBSshiftRAreg
1025 OpARMCMP
1026 OpARMCMPconst
1027 OpARMCMN
1028 OpARMCMNconst
1029 OpARMTST
1030 OpARMTSTconst
1031 OpARMTEQ
1032 OpARMTEQconst
1033 OpARMCMPF
1034 OpARMCMPD
1035 OpARMCMPshiftLL
1036 OpARMCMPshiftRL
1037 OpARMCMPshiftRA
1038 OpARMCMNshiftLL
1039 OpARMCMNshiftRL
1040 OpARMCMNshiftRA
1041 OpARMTSTshiftLL
1042 OpARMTSTshiftRL
1043 OpARMTSTshiftRA
1044 OpARMTEQshiftLL
1045 OpARMTEQshiftRL
1046 OpARMTEQshiftRA
1047 OpARMCMPshiftLLreg
1048 OpARMCMPshiftRLreg
1049 OpARMCMPshiftRAreg
1050 OpARMCMNshiftLLreg
1051 OpARMCMNshiftRLreg
1052 OpARMCMNshiftRAreg
1053 OpARMTSTshiftLLreg
1054 OpARMTSTshiftRLreg
1055 OpARMTSTshiftRAreg
1056 OpARMTEQshiftLLreg
1057 OpARMTEQshiftRLreg
1058 OpARMTEQshiftRAreg
1059 OpARMCMPF0
1060 OpARMCMPD0
1061 OpARMMOVWconst
1062 OpARMMOVFconst
1063 OpARMMOVDconst
1064 OpARMMOVWaddr
1065 OpARMMOVBload
1066 OpARMMOVBUload
1067 OpARMMOVHload
1068 OpARMMOVHUload
1069 OpARMMOVWload
1070 OpARMMOVFload
1071 OpARMMOVDload
1072 OpARMMOVBstore
1073 OpARMMOVHstore
1074 OpARMMOVWstore
1075 OpARMMOVFstore
1076 OpARMMOVDstore
1077 OpARMMOVWloadidx
1078 OpARMMOVWloadshiftLL
1079 OpARMMOVWloadshiftRL
1080 OpARMMOVWloadshiftRA
1081 OpARMMOVBUloadidx
1082 OpARMMOVBloadidx
1083 OpARMMOVHUloadidx
1084 OpARMMOVHloadidx
1085 OpARMMOVWstoreidx
1086 OpARMMOVWstoreshiftLL
1087 OpARMMOVWstoreshiftRL
1088 OpARMMOVWstoreshiftRA
1089 OpARMMOVBstoreidx
1090 OpARMMOVHstoreidx
1091 OpARMMOVBreg
1092 OpARMMOVBUreg
1093 OpARMMOVHreg
1094 OpARMMOVHUreg
1095 OpARMMOVWreg
1096 OpARMMOVWnop
1097 OpARMMOVWF
1098 OpARMMOVWD
1099 OpARMMOVWUF
1100 OpARMMOVWUD
1101 OpARMMOVFW
1102 OpARMMOVDW
1103 OpARMMOVFWU
1104 OpARMMOVDWU
1105 OpARMMOVFD
1106 OpARMMOVDF
1107 OpARMCMOVWHSconst
1108 OpARMCMOVWLSconst
1109 OpARMSRAcond
1110 OpARMCALLstatic
1111 OpARMCALLclosure
1112 OpARMCALLinter
1113 OpARMLoweredNilCheck
1114 OpARMEqual
1115 OpARMNotEqual
1116 OpARMLessThan
1117 OpARMLessEqual
1118 OpARMGreaterThan
1119 OpARMGreaterEqual
1120 OpARMLessThanU
1121 OpARMLessEqualU
1122 OpARMGreaterThanU
1123 OpARMGreaterEqualU
1124 OpARMDUFFZERO
1125 OpARMDUFFCOPY
1126 OpARMLoweredZero
1127 OpARMLoweredMove
1128 OpARMLoweredGetClosurePtr
1129 OpARMLoweredGetCallerSP
1130 OpARMLoweredGetCallerPC
1131 OpARMLoweredPanicBoundsA
1132 OpARMLoweredPanicBoundsB
1133 OpARMLoweredPanicBoundsC
1134 OpARMLoweredPanicExtendA
1135 OpARMLoweredPanicExtendB
1136 OpARMLoweredPanicExtendC
1137 OpARMFlagEQ
1138 OpARMFlagLT_ULT
1139 OpARMFlagLT_UGT
1140 OpARMFlagGT_UGT
1141 OpARMFlagGT_ULT
1142 OpARMInvertFlags
1143 OpARMLoweredWB
1144
1145 OpARM64ADCSflags
1146 OpARM64ADCzerocarry
1147 OpARM64ADD
1148 OpARM64ADDconst
1149 OpARM64ADDSconstflags
1150 OpARM64ADDSflags
1151 OpARM64SUB
1152 OpARM64SUBconst
1153 OpARM64SBCSflags
1154 OpARM64SUBSflags
1155 OpARM64MUL
1156 OpARM64MULW
1157 OpARM64MNEG
1158 OpARM64MNEGW
1159 OpARM64MULH
1160 OpARM64UMULH
1161 OpARM64MULL
1162 OpARM64UMULL
1163 OpARM64DIV
1164 OpARM64UDIV
1165 OpARM64DIVW
1166 OpARM64UDIVW
1167 OpARM64MOD
1168 OpARM64UMOD
1169 OpARM64MODW
1170 OpARM64UMODW
1171 OpARM64FADDS
1172 OpARM64FADDD
1173 OpARM64FSUBS
1174 OpARM64FSUBD
1175 OpARM64FMULS
1176 OpARM64FMULD
1177 OpARM64FNMULS
1178 OpARM64FNMULD
1179 OpARM64FDIVS
1180 OpARM64FDIVD
1181 OpARM64AND
1182 OpARM64ANDconst
1183 OpARM64OR
1184 OpARM64ORconst
1185 OpARM64XOR
1186 OpARM64XORconst
1187 OpARM64BIC
1188 OpARM64EON
1189 OpARM64ORN
1190 OpARM64LoweredMuluhilo
1191 OpARM64MVN
1192 OpARM64NEG
1193 OpARM64NEGSflags
1194 OpARM64NGCzerocarry
1195 OpARM64FABSD
1196 OpARM64FNEGS
1197 OpARM64FNEGD
1198 OpARM64FSQRTD
1199 OpARM64REV
1200 OpARM64REVW
1201 OpARM64REV16W
1202 OpARM64RBIT
1203 OpARM64RBITW
1204 OpARM64CLZ
1205 OpARM64CLZW
1206 OpARM64VCNT
1207 OpARM64VUADDLV
1208 OpARM64LoweredRound32F
1209 OpARM64LoweredRound64F
1210 OpARM64FMADDS
1211 OpARM64FMADDD
1212 OpARM64FNMADDS
1213 OpARM64FNMADDD
1214 OpARM64FMSUBS
1215 OpARM64FMSUBD
1216 OpARM64FNMSUBS
1217 OpARM64FNMSUBD
1218 OpARM64MADD
1219 OpARM64MADDW
1220 OpARM64MSUB
1221 OpARM64MSUBW
1222 OpARM64SLL
1223 OpARM64SLLconst
1224 OpARM64SRL
1225 OpARM64SRLconst
1226 OpARM64SRA
1227 OpARM64SRAconst
1228 OpARM64ROR
1229 OpARM64RORW
1230 OpARM64RORconst
1231 OpARM64RORWconst
1232 OpARM64EXTRconst
1233 OpARM64EXTRWconst
1234 OpARM64CMP
1235 OpARM64CMPconst
1236 OpARM64CMPW
1237 OpARM64CMPWconst
1238 OpARM64CMN
1239 OpARM64CMNconst
1240 OpARM64CMNW
1241 OpARM64CMNWconst
1242 OpARM64TST
1243 OpARM64TSTconst
1244 OpARM64TSTW
1245 OpARM64TSTWconst
1246 OpARM64FCMPS
1247 OpARM64FCMPD
1248 OpARM64FCMPS0
1249 OpARM64FCMPD0
1250 OpARM64MVNshiftLL
1251 OpARM64MVNshiftRL
1252 OpARM64MVNshiftRA
1253 OpARM64NEGshiftLL
1254 OpARM64NEGshiftRL
1255 OpARM64NEGshiftRA
1256 OpARM64ADDshiftLL
1257 OpARM64ADDshiftRL
1258 OpARM64ADDshiftRA
1259 OpARM64SUBshiftLL
1260 OpARM64SUBshiftRL
1261 OpARM64SUBshiftRA
1262 OpARM64ANDshiftLL
1263 OpARM64ANDshiftRL
1264 OpARM64ANDshiftRA
1265 OpARM64ORshiftLL
1266 OpARM64ORshiftRL
1267 OpARM64ORshiftRA
1268 OpARM64XORshiftLL
1269 OpARM64XORshiftRL
1270 OpARM64XORshiftRA
1271 OpARM64BICshiftLL
1272 OpARM64BICshiftRL
1273 OpARM64BICshiftRA
1274 OpARM64EONshiftLL
1275 OpARM64EONshiftRL
1276 OpARM64EONshiftRA
1277 OpARM64ORNshiftLL
1278 OpARM64ORNshiftRL
1279 OpARM64ORNshiftRA
1280 OpARM64CMPshiftLL
1281 OpARM64CMPshiftRL
1282 OpARM64CMPshiftRA
1283 OpARM64CMNshiftLL
1284 OpARM64CMNshiftRL
1285 OpARM64CMNshiftRA
1286 OpARM64TSTshiftLL
1287 OpARM64TSTshiftRL
1288 OpARM64TSTshiftRA
1289 OpARM64BFI
1290 OpARM64BFXIL
1291 OpARM64SBFIZ
1292 OpARM64SBFX
1293 OpARM64UBFIZ
1294 OpARM64UBFX
1295 OpARM64MOVDconst
1296 OpARM64FMOVSconst
1297 OpARM64FMOVDconst
1298 OpARM64MOVDaddr
1299 OpARM64MOVBload
1300 OpARM64MOVBUload
1301 OpARM64MOVHload
1302 OpARM64MOVHUload
1303 OpARM64MOVWload
1304 OpARM64MOVWUload
1305 OpARM64MOVDload
1306 OpARM64FMOVSload
1307 OpARM64FMOVDload
1308 OpARM64MOVDloadidx
1309 OpARM64MOVWloadidx
1310 OpARM64MOVWUloadidx
1311 OpARM64MOVHloadidx
1312 OpARM64MOVHUloadidx
1313 OpARM64MOVBloadidx
1314 OpARM64MOVBUloadidx
1315 OpARM64FMOVSloadidx
1316 OpARM64FMOVDloadidx
1317 OpARM64MOVHloadidx2
1318 OpARM64MOVHUloadidx2
1319 OpARM64MOVWloadidx4
1320 OpARM64MOVWUloadidx4
1321 OpARM64MOVDloadidx8
1322 OpARM64MOVBstore
1323 OpARM64MOVHstore
1324 OpARM64MOVWstore
1325 OpARM64MOVDstore
1326 OpARM64STP
1327 OpARM64FMOVSstore
1328 OpARM64FMOVDstore
1329 OpARM64MOVBstoreidx
1330 OpARM64MOVHstoreidx
1331 OpARM64MOVWstoreidx
1332 OpARM64MOVDstoreidx
1333 OpARM64FMOVSstoreidx
1334 OpARM64FMOVDstoreidx
1335 OpARM64MOVHstoreidx2
1336 OpARM64MOVWstoreidx4
1337 OpARM64MOVDstoreidx8
1338 OpARM64MOVBstorezero
1339 OpARM64MOVHstorezero
1340 OpARM64MOVWstorezero
1341 OpARM64MOVDstorezero
1342 OpARM64MOVQstorezero
1343 OpARM64MOVBstorezeroidx
1344 OpARM64MOVHstorezeroidx
1345 OpARM64MOVWstorezeroidx
1346 OpARM64MOVDstorezeroidx
1347 OpARM64MOVHstorezeroidx2
1348 OpARM64MOVWstorezeroidx4
1349 OpARM64MOVDstorezeroidx8
1350 OpARM64FMOVDgpfp
1351 OpARM64FMOVDfpgp
1352 OpARM64FMOVSgpfp
1353 OpARM64FMOVSfpgp
1354 OpARM64MOVBreg
1355 OpARM64MOVBUreg
1356 OpARM64MOVHreg
1357 OpARM64MOVHUreg
1358 OpARM64MOVWreg
1359 OpARM64MOVWUreg
1360 OpARM64MOVDreg
1361 OpARM64MOVDnop
1362 OpARM64SCVTFWS
1363 OpARM64SCVTFWD
1364 OpARM64UCVTFWS
1365 OpARM64UCVTFWD
1366 OpARM64SCVTFS
1367 OpARM64SCVTFD
1368 OpARM64UCVTFS
1369 OpARM64UCVTFD
1370 OpARM64FCVTZSSW
1371 OpARM64FCVTZSDW
1372 OpARM64FCVTZUSW
1373 OpARM64FCVTZUDW
1374 OpARM64FCVTZSS
1375 OpARM64FCVTZSD
1376 OpARM64FCVTZUS
1377 OpARM64FCVTZUD
1378 OpARM64FCVTSD
1379 OpARM64FCVTDS
1380 OpARM64FRINTAD
1381 OpARM64FRINTMD
1382 OpARM64FRINTND
1383 OpARM64FRINTPD
1384 OpARM64FRINTZD
1385 OpARM64CSEL
1386 OpARM64CSEL0
1387 OpARM64CALLstatic
1388 OpARM64CALLclosure
1389 OpARM64CALLinter
1390 OpARM64LoweredNilCheck
1391 OpARM64Equal
1392 OpARM64NotEqual
1393 OpARM64LessThan
1394 OpARM64LessEqual
1395 OpARM64GreaterThan
1396 OpARM64GreaterEqual
1397 OpARM64LessThanU
1398 OpARM64LessEqualU
1399 OpARM64GreaterThanU
1400 OpARM64GreaterEqualU
1401 OpARM64LessThanF
1402 OpARM64LessEqualF
1403 OpARM64GreaterThanF
1404 OpARM64GreaterEqualF
1405 OpARM64DUFFZERO
1406 OpARM64LoweredZero
1407 OpARM64DUFFCOPY
1408 OpARM64LoweredMove
1409 OpARM64LoweredGetClosurePtr
1410 OpARM64LoweredGetCallerSP
1411 OpARM64LoweredGetCallerPC
1412 OpARM64FlagEQ
1413 OpARM64FlagLT_ULT
1414 OpARM64FlagLT_UGT
1415 OpARM64FlagGT_UGT
1416 OpARM64FlagGT_ULT
1417 OpARM64InvertFlags
1418 OpARM64LDAR
1419 OpARM64LDARB
1420 OpARM64LDARW
1421 OpARM64STLR
1422 OpARM64STLRW
1423 OpARM64LoweredAtomicExchange64
1424 OpARM64LoweredAtomicExchange32
1425 OpARM64LoweredAtomicAdd64
1426 OpARM64LoweredAtomicAdd32
1427 OpARM64LoweredAtomicAdd64Variant
1428 OpARM64LoweredAtomicAdd32Variant
1429 OpARM64LoweredAtomicCas64
1430 OpARM64LoweredAtomicCas32
1431 OpARM64LoweredAtomicAnd8
1432 OpARM64LoweredAtomicOr8
1433 OpARM64LoweredWB
1434 OpARM64LoweredPanicBoundsA
1435 OpARM64LoweredPanicBoundsB
1436 OpARM64LoweredPanicBoundsC
1437
1438 OpMIPSADD
1439 OpMIPSADDconst
1440 OpMIPSSUB
1441 OpMIPSSUBconst
1442 OpMIPSMUL
1443 OpMIPSMULT
1444 OpMIPSMULTU
1445 OpMIPSDIV
1446 OpMIPSDIVU
1447 OpMIPSADDF
1448 OpMIPSADDD
1449 OpMIPSSUBF
1450 OpMIPSSUBD
1451 OpMIPSMULF
1452 OpMIPSMULD
1453 OpMIPSDIVF
1454 OpMIPSDIVD
1455 OpMIPSAND
1456 OpMIPSANDconst
1457 OpMIPSOR
1458 OpMIPSORconst
1459 OpMIPSXOR
1460 OpMIPSXORconst
1461 OpMIPSNOR
1462 OpMIPSNORconst
1463 OpMIPSNEG
1464 OpMIPSNEGF
1465 OpMIPSNEGD
1466 OpMIPSSQRTD
1467 OpMIPSSLL
1468 OpMIPSSLLconst
1469 OpMIPSSRL
1470 OpMIPSSRLconst
1471 OpMIPSSRA
1472 OpMIPSSRAconst
1473 OpMIPSCLZ
1474 OpMIPSSGT
1475 OpMIPSSGTconst
1476 OpMIPSSGTzero
1477 OpMIPSSGTU
1478 OpMIPSSGTUconst
1479 OpMIPSSGTUzero
1480 OpMIPSCMPEQF
1481 OpMIPSCMPEQD
1482 OpMIPSCMPGEF
1483 OpMIPSCMPGED
1484 OpMIPSCMPGTF
1485 OpMIPSCMPGTD
1486 OpMIPSMOVWconst
1487 OpMIPSMOVFconst
1488 OpMIPSMOVDconst
1489 OpMIPSMOVWaddr
1490 OpMIPSMOVBload
1491 OpMIPSMOVBUload
1492 OpMIPSMOVHload
1493 OpMIPSMOVHUload
1494 OpMIPSMOVWload
1495 OpMIPSMOVFload
1496 OpMIPSMOVDload
1497 OpMIPSMOVBstore
1498 OpMIPSMOVHstore
1499 OpMIPSMOVWstore
1500 OpMIPSMOVFstore
1501 OpMIPSMOVDstore
1502 OpMIPSMOVBstorezero
1503 OpMIPSMOVHstorezero
1504 OpMIPSMOVWstorezero
1505 OpMIPSMOVBreg
1506 OpMIPSMOVBUreg
1507 OpMIPSMOVHreg
1508 OpMIPSMOVHUreg
1509 OpMIPSMOVWreg
1510 OpMIPSMOVWnop
1511 OpMIPSCMOVZ
1512 OpMIPSCMOVZzero
1513 OpMIPSMOVWF
1514 OpMIPSMOVWD
1515 OpMIPSTRUNCFW
1516 OpMIPSTRUNCDW
1517 OpMIPSMOVFD
1518 OpMIPSMOVDF
1519 OpMIPSCALLstatic
1520 OpMIPSCALLclosure
1521 OpMIPSCALLinter
1522 OpMIPSLoweredAtomicLoad
1523 OpMIPSLoweredAtomicStore
1524 OpMIPSLoweredAtomicStorezero
1525 OpMIPSLoweredAtomicExchange
1526 OpMIPSLoweredAtomicAdd
1527 OpMIPSLoweredAtomicAddconst
1528 OpMIPSLoweredAtomicCas
1529 OpMIPSLoweredAtomicAnd
1530 OpMIPSLoweredAtomicOr
1531 OpMIPSLoweredZero
1532 OpMIPSLoweredMove
1533 OpMIPSLoweredNilCheck
1534 OpMIPSFPFlagTrue
1535 OpMIPSFPFlagFalse
1536 OpMIPSLoweredGetClosurePtr
1537 OpMIPSLoweredGetCallerSP
1538 OpMIPSLoweredGetCallerPC
1539 OpMIPSLoweredWB
1540 OpMIPSLoweredPanicBoundsA
1541 OpMIPSLoweredPanicBoundsB
1542 OpMIPSLoweredPanicBoundsC
1543 OpMIPSLoweredPanicExtendA
1544 OpMIPSLoweredPanicExtendB
1545 OpMIPSLoweredPanicExtendC
1546
1547 OpMIPS64ADDV
1548 OpMIPS64ADDVconst
1549 OpMIPS64SUBV
1550 OpMIPS64SUBVconst
1551 OpMIPS64MULV
1552 OpMIPS64MULVU
1553 OpMIPS64DIVV
1554 OpMIPS64DIVVU
1555 OpMIPS64ADDF
1556 OpMIPS64ADDD
1557 OpMIPS64SUBF
1558 OpMIPS64SUBD
1559 OpMIPS64MULF
1560 OpMIPS64MULD
1561 OpMIPS64DIVF
1562 OpMIPS64DIVD
1563 OpMIPS64AND
1564 OpMIPS64ANDconst
1565 OpMIPS64OR
1566 OpMIPS64ORconst
1567 OpMIPS64XOR
1568 OpMIPS64XORconst
1569 OpMIPS64NOR
1570 OpMIPS64NORconst
1571 OpMIPS64NEGV
1572 OpMIPS64NEGF
1573 OpMIPS64NEGD
1574 OpMIPS64SQRTD
1575 OpMIPS64SLLV
1576 OpMIPS64SLLVconst
1577 OpMIPS64SRLV
1578 OpMIPS64SRLVconst
1579 OpMIPS64SRAV
1580 OpMIPS64SRAVconst
1581 OpMIPS64SGT
1582 OpMIPS64SGTconst
1583 OpMIPS64SGTU
1584 OpMIPS64SGTUconst
1585 OpMIPS64CMPEQF
1586 OpMIPS64CMPEQD
1587 OpMIPS64CMPGEF
1588 OpMIPS64CMPGED
1589 OpMIPS64CMPGTF
1590 OpMIPS64CMPGTD
1591 OpMIPS64MOVVconst
1592 OpMIPS64MOVFconst
1593 OpMIPS64MOVDconst
1594 OpMIPS64MOVVaddr
1595 OpMIPS64MOVBload
1596 OpMIPS64MOVBUload
1597 OpMIPS64MOVHload
1598 OpMIPS64MOVHUload
1599 OpMIPS64MOVWload
1600 OpMIPS64MOVWUload
1601 OpMIPS64MOVVload
1602 OpMIPS64MOVFload
1603 OpMIPS64MOVDload
1604 OpMIPS64MOVBstore
1605 OpMIPS64MOVHstore
1606 OpMIPS64MOVWstore
1607 OpMIPS64MOVVstore
1608 OpMIPS64MOVFstore
1609 OpMIPS64MOVDstore
1610 OpMIPS64MOVBstorezero
1611 OpMIPS64MOVHstorezero
1612 OpMIPS64MOVWstorezero
1613 OpMIPS64MOVVstorezero
1614 OpMIPS64MOVBreg
1615 OpMIPS64MOVBUreg
1616 OpMIPS64MOVHreg
1617 OpMIPS64MOVHUreg
1618 OpMIPS64MOVWreg
1619 OpMIPS64MOVWUreg
1620 OpMIPS64MOVVreg
1621 OpMIPS64MOVVnop
1622 OpMIPS64MOVWF
1623 OpMIPS64MOVWD
1624 OpMIPS64MOVVF
1625 OpMIPS64MOVVD
1626 OpMIPS64TRUNCFW
1627 OpMIPS64TRUNCDW
1628 OpMIPS64TRUNCFV
1629 OpMIPS64TRUNCDV
1630 OpMIPS64MOVFD
1631 OpMIPS64MOVDF
1632 OpMIPS64CALLstatic
1633 OpMIPS64CALLclosure
1634 OpMIPS64CALLinter
1635 OpMIPS64DUFFZERO
1636 OpMIPS64LoweredZero
1637 OpMIPS64LoweredMove
1638 OpMIPS64LoweredAtomicLoad8
1639 OpMIPS64LoweredAtomicLoad32
1640 OpMIPS64LoweredAtomicLoad64
1641 OpMIPS64LoweredAtomicStore32
1642 OpMIPS64LoweredAtomicStore64
1643 OpMIPS64LoweredAtomicStorezero32
1644 OpMIPS64LoweredAtomicStorezero64
1645 OpMIPS64LoweredAtomicExchange32
1646 OpMIPS64LoweredAtomicExchange64
1647 OpMIPS64LoweredAtomicAdd32
1648 OpMIPS64LoweredAtomicAdd64
1649 OpMIPS64LoweredAtomicAddconst32
1650 OpMIPS64LoweredAtomicAddconst64
1651 OpMIPS64LoweredAtomicCas32
1652 OpMIPS64LoweredAtomicCas64
1653 OpMIPS64LoweredNilCheck
1654 OpMIPS64FPFlagTrue
1655 OpMIPS64FPFlagFalse
1656 OpMIPS64LoweredGetClosurePtr
1657 OpMIPS64LoweredGetCallerSP
1658 OpMIPS64LoweredGetCallerPC
1659 OpMIPS64LoweredWB
1660 OpMIPS64LoweredPanicBoundsA
1661 OpMIPS64LoweredPanicBoundsB
1662 OpMIPS64LoweredPanicBoundsC
1663
1664 OpPPC64ADD
1665 OpPPC64ADDconst
1666 OpPPC64FADD
1667 OpPPC64FADDS
1668 OpPPC64SUB
1669 OpPPC64FSUB
1670 OpPPC64FSUBS
1671 OpPPC64MULLD
1672 OpPPC64MULLW
1673 OpPPC64MULHD
1674 OpPPC64MULHW
1675 OpPPC64MULHDU
1676 OpPPC64MULHWU
1677 OpPPC64LoweredMuluhilo
1678 OpPPC64FMUL
1679 OpPPC64FMULS
1680 OpPPC64FMADD
1681 OpPPC64FMADDS
1682 OpPPC64FMSUB
1683 OpPPC64FMSUBS
1684 OpPPC64SRAD
1685 OpPPC64SRAW
1686 OpPPC64SRD
1687 OpPPC64SRW
1688 OpPPC64SLD
1689 OpPPC64SLW
1690 OpPPC64ROTL
1691 OpPPC64ROTLW
1692 OpPPC64LoweredAdd64Carry
1693 OpPPC64ADDconstForCarry
1694 OpPPC64MaskIfNotCarry
1695 OpPPC64SRADconst
1696 OpPPC64SRAWconst
1697 OpPPC64SRDconst
1698 OpPPC64SRWconst
1699 OpPPC64SLDconst
1700 OpPPC64SLWconst
1701 OpPPC64ROTLconst
1702 OpPPC64ROTLWconst
1703 OpPPC64CNTLZD
1704 OpPPC64CNTLZW
1705 OpPPC64CNTTZD
1706 OpPPC64CNTTZW
1707 OpPPC64POPCNTD
1708 OpPPC64POPCNTW
1709 OpPPC64POPCNTB
1710 OpPPC64FDIV
1711 OpPPC64FDIVS
1712 OpPPC64DIVD
1713 OpPPC64DIVW
1714 OpPPC64DIVDU
1715 OpPPC64DIVWU
1716 OpPPC64FCTIDZ
1717 OpPPC64FCTIWZ
1718 OpPPC64FCFID
1719 OpPPC64FCFIDS
1720 OpPPC64FRSP
1721 OpPPC64MFVSRD
1722 OpPPC64MTVSRD
1723 OpPPC64AND
1724 OpPPC64ANDN
1725 OpPPC64ANDCC
1726 OpPPC64OR
1727 OpPPC64ORN
1728 OpPPC64ORCC
1729 OpPPC64NOR
1730 OpPPC64XOR
1731 OpPPC64XORCC
1732 OpPPC64EQV
1733 OpPPC64NEG
1734 OpPPC64FNEG
1735 OpPPC64FSQRT
1736 OpPPC64FSQRTS
1737 OpPPC64FFLOOR
1738 OpPPC64FCEIL
1739 OpPPC64FTRUNC
1740 OpPPC64FROUND
1741 OpPPC64FABS
1742 OpPPC64FNABS
1743 OpPPC64FCPSGN
1744 OpPPC64ORconst
1745 OpPPC64XORconst
1746 OpPPC64ANDconst
1747 OpPPC64ANDCCconst
1748 OpPPC64MOVBreg
1749 OpPPC64MOVBZreg
1750 OpPPC64MOVHreg
1751 OpPPC64MOVHZreg
1752 OpPPC64MOVWreg
1753 OpPPC64MOVWZreg
1754 OpPPC64MOVBZload
1755 OpPPC64MOVHload
1756 OpPPC64MOVHZload
1757 OpPPC64MOVWload
1758 OpPPC64MOVWZload
1759 OpPPC64MOVDload
1760 OpPPC64MOVDBRload
1761 OpPPC64MOVWBRload
1762 OpPPC64MOVHBRload
1763 OpPPC64MOVBZloadidx
1764 OpPPC64MOVHloadidx
1765 OpPPC64MOVHZloadidx
1766 OpPPC64MOVWloadidx
1767 OpPPC64MOVWZloadidx
1768 OpPPC64MOVDloadidx
1769 OpPPC64MOVHBRloadidx
1770 OpPPC64MOVWBRloadidx
1771 OpPPC64MOVDBRloadidx
1772 OpPPC64FMOVDloadidx
1773 OpPPC64FMOVSloadidx
1774 OpPPC64MOVDBRstore
1775 OpPPC64MOVWBRstore
1776 OpPPC64MOVHBRstore
1777 OpPPC64FMOVDload
1778 OpPPC64FMOVSload
1779 OpPPC64MOVBstore
1780 OpPPC64MOVHstore
1781 OpPPC64MOVWstore
1782 OpPPC64MOVDstore
1783 OpPPC64FMOVDstore
1784 OpPPC64FMOVSstore
1785 OpPPC64MOVBstoreidx
1786 OpPPC64MOVHstoreidx
1787 OpPPC64MOVWstoreidx
1788 OpPPC64MOVDstoreidx
1789 OpPPC64FMOVDstoreidx
1790 OpPPC64FMOVSstoreidx
1791 OpPPC64MOVHBRstoreidx
1792 OpPPC64MOVWBRstoreidx
1793 OpPPC64MOVDBRstoreidx
1794 OpPPC64MOVBstorezero
1795 OpPPC64MOVHstorezero
1796 OpPPC64MOVWstorezero
1797 OpPPC64MOVDstorezero
1798 OpPPC64MOVDaddr
1799 OpPPC64MOVDconst
1800 OpPPC64FMOVDconst
1801 OpPPC64FMOVSconst
1802 OpPPC64FCMPU
1803 OpPPC64CMP
1804 OpPPC64CMPU
1805 OpPPC64CMPW
1806 OpPPC64CMPWU
1807 OpPPC64CMPconst
1808 OpPPC64CMPUconst
1809 OpPPC64CMPWconst
1810 OpPPC64CMPWUconst
1811 OpPPC64Equal
1812 OpPPC64NotEqual
1813 OpPPC64LessThan
1814 OpPPC64FLessThan
1815 OpPPC64LessEqual
1816 OpPPC64FLessEqual
1817 OpPPC64GreaterThan
1818 OpPPC64FGreaterThan
1819 OpPPC64GreaterEqual
1820 OpPPC64FGreaterEqual
1821 OpPPC64LoweredGetClosurePtr
1822 OpPPC64LoweredGetCallerSP
1823 OpPPC64LoweredGetCallerPC
1824 OpPPC64LoweredNilCheck
1825 OpPPC64LoweredRound32F
1826 OpPPC64LoweredRound64F
1827 OpPPC64CALLstatic
1828 OpPPC64CALLclosure
1829 OpPPC64CALLinter
1830 OpPPC64LoweredZero
1831 OpPPC64LoweredMove
1832 OpPPC64LoweredAtomicStore32
1833 OpPPC64LoweredAtomicStore64
1834 OpPPC64LoweredAtomicLoad8
1835 OpPPC64LoweredAtomicLoad32
1836 OpPPC64LoweredAtomicLoad64
1837 OpPPC64LoweredAtomicLoadPtr
1838 OpPPC64LoweredAtomicAdd32
1839 OpPPC64LoweredAtomicAdd64
1840 OpPPC64LoweredAtomicExchange32
1841 OpPPC64LoweredAtomicExchange64
1842 OpPPC64LoweredAtomicCas64
1843 OpPPC64LoweredAtomicCas32
1844 OpPPC64LoweredAtomicAnd8
1845 OpPPC64LoweredAtomicOr8
1846 OpPPC64LoweredWB
1847 OpPPC64LoweredPanicBoundsA
1848 OpPPC64LoweredPanicBoundsB
1849 OpPPC64LoweredPanicBoundsC
1850 OpPPC64InvertFlags
1851 OpPPC64FlagEQ
1852 OpPPC64FlagLT
1853 OpPPC64FlagGT
1854
1855 OpS390XFADDS
1856 OpS390XFADD
1857 OpS390XFSUBS
1858 OpS390XFSUB
1859 OpS390XFMULS
1860 OpS390XFMUL
1861 OpS390XFDIVS
1862 OpS390XFDIV
1863 OpS390XFNEGS
1864 OpS390XFNEG
1865 OpS390XFMADDS
1866 OpS390XFMADD
1867 OpS390XFMSUBS
1868 OpS390XFMSUB
1869 OpS390XLPDFR
1870 OpS390XLNDFR
1871 OpS390XCPSDR
1872 OpS390XFIDBR
1873 OpS390XFMOVSload
1874 OpS390XFMOVDload
1875 OpS390XFMOVSconst
1876 OpS390XFMOVDconst
1877 OpS390XFMOVSloadidx
1878 OpS390XFMOVDloadidx
1879 OpS390XFMOVSstore
1880 OpS390XFMOVDstore
1881 OpS390XFMOVSstoreidx
1882 OpS390XFMOVDstoreidx
1883 OpS390XADD
1884 OpS390XADDW
1885 OpS390XADDconst
1886 OpS390XADDWconst
1887 OpS390XADDload
1888 OpS390XADDWload
1889 OpS390XSUB
1890 OpS390XSUBW
1891 OpS390XSUBconst
1892 OpS390XSUBWconst
1893 OpS390XSUBload
1894 OpS390XSUBWload
1895 OpS390XMULLD
1896 OpS390XMULLW
1897 OpS390XMULLDconst
1898 OpS390XMULLWconst
1899 OpS390XMULLDload
1900 OpS390XMULLWload
1901 OpS390XMULHD
1902 OpS390XMULHDU
1903 OpS390XDIVD
1904 OpS390XDIVW
1905 OpS390XDIVDU
1906 OpS390XDIVWU
1907 OpS390XMODD
1908 OpS390XMODW
1909 OpS390XMODDU
1910 OpS390XMODWU
1911 OpS390XAND
1912 OpS390XANDW
1913 OpS390XANDconst
1914 OpS390XANDWconst
1915 OpS390XANDload
1916 OpS390XANDWload
1917 OpS390XOR
1918 OpS390XORW
1919 OpS390XORconst
1920 OpS390XORWconst
1921 OpS390XORload
1922 OpS390XORWload
1923 OpS390XXOR
1924 OpS390XXORW
1925 OpS390XXORconst
1926 OpS390XXORWconst
1927 OpS390XXORload
1928 OpS390XXORWload
1929 OpS390XADDC
1930 OpS390XADDCconst
1931 OpS390XADDE
1932 OpS390XSUBC
1933 OpS390XSUBE
1934 OpS390XCMP
1935 OpS390XCMPW
1936 OpS390XCMPU
1937 OpS390XCMPWU
1938 OpS390XCMPconst
1939 OpS390XCMPWconst
1940 OpS390XCMPUconst
1941 OpS390XCMPWUconst
1942 OpS390XFCMPS
1943 OpS390XFCMP
1944 OpS390XSLD
1945 OpS390XSLW
1946 OpS390XSLDconst
1947 OpS390XSLWconst
1948 OpS390XSRD
1949 OpS390XSRW
1950 OpS390XSRDconst
1951 OpS390XSRWconst
1952 OpS390XSRAD
1953 OpS390XSRAW
1954 OpS390XSRADconst
1955 OpS390XSRAWconst
1956 OpS390XRLLG
1957 OpS390XRLL
1958 OpS390XRLLGconst
1959 OpS390XRLLconst
1960 OpS390XNEG
1961 OpS390XNEGW
1962 OpS390XNOT
1963 OpS390XNOTW
1964 OpS390XFSQRT
1965 OpS390XMOVDEQ
1966 OpS390XMOVDNE
1967 OpS390XMOVDLT
1968 OpS390XMOVDLE
1969 OpS390XMOVDGT
1970 OpS390XMOVDGE
1971 OpS390XMOVDGTnoinv
1972 OpS390XMOVDGEnoinv
1973 OpS390XMOVBreg
1974 OpS390XMOVBZreg
1975 OpS390XMOVHreg
1976 OpS390XMOVHZreg
1977 OpS390XMOVWreg
1978 OpS390XMOVWZreg
1979 OpS390XMOVDreg
1980 OpS390XMOVDnop
1981 OpS390XMOVDconst
1982 OpS390XLDGR
1983 OpS390XLGDR
1984 OpS390XCFDBRA
1985 OpS390XCGDBRA
1986 OpS390XCFEBRA
1987 OpS390XCGEBRA
1988 OpS390XCEFBRA
1989 OpS390XCDFBRA
1990 OpS390XCEGBRA
1991 OpS390XCDGBRA
1992 OpS390XLEDBR
1993 OpS390XLDEBR
1994 OpS390XMOVDaddr
1995 OpS390XMOVDaddridx
1996 OpS390XMOVBZload
1997 OpS390XMOVBload
1998 OpS390XMOVHZload
1999 OpS390XMOVHload
2000 OpS390XMOVWZload
2001 OpS390XMOVWload
2002 OpS390XMOVDload
2003 OpS390XMOVWBR
2004 OpS390XMOVDBR
2005 OpS390XMOVHBRload
2006 OpS390XMOVWBRload
2007 OpS390XMOVDBRload
2008 OpS390XMOVBstore
2009 OpS390XMOVHstore
2010 OpS390XMOVWstore
2011 OpS390XMOVDstore
2012 OpS390XMOVHBRstore
2013 OpS390XMOVWBRstore
2014 OpS390XMOVDBRstore
2015 OpS390XMVC
2016 OpS390XMOVBZloadidx
2017 OpS390XMOVBloadidx
2018 OpS390XMOVHZloadidx
2019 OpS390XMOVHloadidx
2020 OpS390XMOVWZloadidx
2021 OpS390XMOVWloadidx
2022 OpS390XMOVDloadidx
2023 OpS390XMOVHBRloadidx
2024 OpS390XMOVWBRloadidx
2025 OpS390XMOVDBRloadidx
2026 OpS390XMOVBstoreidx
2027 OpS390XMOVHstoreidx
2028 OpS390XMOVWstoreidx
2029 OpS390XMOVDstoreidx
2030 OpS390XMOVHBRstoreidx
2031 OpS390XMOVWBRstoreidx
2032 OpS390XMOVDBRstoreidx
2033 OpS390XMOVBstoreconst
2034 OpS390XMOVHstoreconst
2035 OpS390XMOVWstoreconst
2036 OpS390XMOVDstoreconst
2037 OpS390XCLEAR
2038 OpS390XCALLstatic
2039 OpS390XCALLclosure
2040 OpS390XCALLinter
2041 OpS390XInvertFlags
2042 OpS390XLoweredGetG
2043 OpS390XLoweredGetClosurePtr
2044 OpS390XLoweredGetCallerSP
2045 OpS390XLoweredGetCallerPC
2046 OpS390XLoweredNilCheck
2047 OpS390XLoweredRound32F
2048 OpS390XLoweredRound64F
2049 OpS390XLoweredWB
2050 OpS390XLoweredPanicBoundsA
2051 OpS390XLoweredPanicBoundsB
2052 OpS390XLoweredPanicBoundsC
2053 OpS390XFlagEQ
2054 OpS390XFlagLT
2055 OpS390XFlagGT
2056 OpS390XFlagOV
2057 OpS390XSYNC
2058 OpS390XMOVBZatomicload
2059 OpS390XMOVWZatomicload
2060 OpS390XMOVDatomicload
2061 OpS390XMOVWatomicstore
2062 OpS390XMOVDatomicstore
2063 OpS390XLAA
2064 OpS390XLAAG
2065 OpS390XAddTupleFirst32
2066 OpS390XAddTupleFirst64
2067 OpS390XLoweredAtomicCas32
2068 OpS390XLoweredAtomicCas64
2069 OpS390XLoweredAtomicExchange32
2070 OpS390XLoweredAtomicExchange64
2071 OpS390XFLOGR
2072 OpS390XPOPCNT
2073 OpS390XSumBytes2
2074 OpS390XSumBytes4
2075 OpS390XSumBytes8
2076 OpS390XSTMG2
2077 OpS390XSTMG3
2078 OpS390XSTMG4
2079 OpS390XSTM2
2080 OpS390XSTM3
2081 OpS390XSTM4
2082 OpS390XLoweredMove
2083 OpS390XLoweredZero
2084
2085 OpWasmLoweredStaticCall
2086 OpWasmLoweredClosureCall
2087 OpWasmLoweredInterCall
2088 OpWasmLoweredAddr
2089 OpWasmLoweredMove
2090 OpWasmLoweredZero
2091 OpWasmLoweredGetClosurePtr
2092 OpWasmLoweredGetCallerPC
2093 OpWasmLoweredGetCallerSP
2094 OpWasmLoweredNilCheck
2095 OpWasmLoweredWB
2096 OpWasmLoweredRound32F
2097 OpWasmLoweredConvert
2098 OpWasmSelect
2099 OpWasmI64Load8U
2100 OpWasmI64Load8S
2101 OpWasmI64Load16U
2102 OpWasmI64Load16S
2103 OpWasmI64Load32U
2104 OpWasmI64Load32S
2105 OpWasmI64Load
2106 OpWasmI64Store8
2107 OpWasmI64Store16
2108 OpWasmI64Store32
2109 OpWasmI64Store
2110 OpWasmF32Load
2111 OpWasmF64Load
2112 OpWasmF32Store
2113 OpWasmF64Store
2114 OpWasmI64Const
2115 OpWasmF64Const
2116 OpWasmI64Eqz
2117 OpWasmI64Eq
2118 OpWasmI64Ne
2119 OpWasmI64LtS
2120 OpWasmI64LtU
2121 OpWasmI64GtS
2122 OpWasmI64GtU
2123 OpWasmI64LeS
2124 OpWasmI64LeU
2125 OpWasmI64GeS
2126 OpWasmI64GeU
2127 OpWasmF64Eq
2128 OpWasmF64Ne
2129 OpWasmF64Lt
2130 OpWasmF64Gt
2131 OpWasmF64Le
2132 OpWasmF64Ge
2133 OpWasmI64Add
2134 OpWasmI64AddConst
2135 OpWasmI64Sub
2136 OpWasmI64Mul
2137 OpWasmI64DivS
2138 OpWasmI64DivU
2139 OpWasmI64RemS
2140 OpWasmI64RemU
2141 OpWasmI64And
2142 OpWasmI64Or
2143 OpWasmI64Xor
2144 OpWasmI64Shl
2145 OpWasmI64ShrS
2146 OpWasmI64ShrU
2147 OpWasmF64Neg
2148 OpWasmF64Add
2149 OpWasmF64Sub
2150 OpWasmF64Mul
2151 OpWasmF64Div
2152 OpWasmI64TruncSatF64S
2153 OpWasmI64TruncSatF64U
2154 OpWasmF64ConvertI64S
2155 OpWasmF64ConvertI64U
2156 OpWasmI64Extend8S
2157 OpWasmI64Extend16S
2158 OpWasmI64Extend32S
2159 OpWasmF64Sqrt
2160 OpWasmF64Trunc
2161 OpWasmF64Ceil
2162 OpWasmF64Floor
2163 OpWasmF64Nearest
2164 OpWasmF64Abs
2165 OpWasmF64Copysign
2166 OpWasmI64Ctz
2167 OpWasmI64Clz
2168 OpWasmI64Rotl
2169 OpWasmI64Popcnt
2170
2171 OpAdd8
2172 OpAdd16
2173 OpAdd32
2174 OpAdd64
2175 OpAddPtr
2176 OpAdd32F
2177 OpAdd64F
2178 OpSub8
2179 OpSub16
2180 OpSub32
2181 OpSub64
2182 OpSubPtr
2183 OpSub32F
2184 OpSub64F
2185 OpMul8
2186 OpMul16
2187 OpMul32
2188 OpMul64
2189 OpMul32F
2190 OpMul64F
2191 OpDiv32F
2192 OpDiv64F
2193 OpHmul32
2194 OpHmul32u
2195 OpHmul64
2196 OpHmul64u
2197 OpMul32uhilo
2198 OpMul64uhilo
2199 OpMul32uover
2200 OpMul64uover
2201 OpAvg32u
2202 OpAvg64u
2203 OpDiv8
2204 OpDiv8u
2205 OpDiv16
2206 OpDiv16u
2207 OpDiv32
2208 OpDiv32u
2209 OpDiv64
2210 OpDiv64u
2211 OpDiv128u
2212 OpMod8
2213 OpMod8u
2214 OpMod16
2215 OpMod16u
2216 OpMod32
2217 OpMod32u
2218 OpMod64
2219 OpMod64u
2220 OpAnd8
2221 OpAnd16
2222 OpAnd32
2223 OpAnd64
2224 OpOr8
2225 OpOr16
2226 OpOr32
2227 OpOr64
2228 OpXor8
2229 OpXor16
2230 OpXor32
2231 OpXor64
2232 OpLsh8x8
2233 OpLsh8x16
2234 OpLsh8x32
2235 OpLsh8x64
2236 OpLsh16x8
2237 OpLsh16x16
2238 OpLsh16x32
2239 OpLsh16x64
2240 OpLsh32x8
2241 OpLsh32x16
2242 OpLsh32x32
2243 OpLsh32x64
2244 OpLsh64x8
2245 OpLsh64x16
2246 OpLsh64x32
2247 OpLsh64x64
2248 OpRsh8x8
2249 OpRsh8x16
2250 OpRsh8x32
2251 OpRsh8x64
2252 OpRsh16x8
2253 OpRsh16x16
2254 OpRsh16x32
2255 OpRsh16x64
2256 OpRsh32x8
2257 OpRsh32x16
2258 OpRsh32x32
2259 OpRsh32x64
2260 OpRsh64x8
2261 OpRsh64x16
2262 OpRsh64x32
2263 OpRsh64x64
2264 OpRsh8Ux8
2265 OpRsh8Ux16
2266 OpRsh8Ux32
2267 OpRsh8Ux64
2268 OpRsh16Ux8
2269 OpRsh16Ux16
2270 OpRsh16Ux32
2271 OpRsh16Ux64
2272 OpRsh32Ux8
2273 OpRsh32Ux16
2274 OpRsh32Ux32
2275 OpRsh32Ux64
2276 OpRsh64Ux8
2277 OpRsh64Ux16
2278 OpRsh64Ux32
2279 OpRsh64Ux64
2280 OpEq8
2281 OpEq16
2282 OpEq32
2283 OpEq64
2284 OpEqPtr
2285 OpEqInter
2286 OpEqSlice
2287 OpEq32F
2288 OpEq64F
2289 OpNeq8
2290 OpNeq16
2291 OpNeq32
2292 OpNeq64
2293 OpNeqPtr
2294 OpNeqInter
2295 OpNeqSlice
2296 OpNeq32F
2297 OpNeq64F
2298 OpLess8
2299 OpLess8U
2300 OpLess16
2301 OpLess16U
2302 OpLess32
2303 OpLess32U
2304 OpLess64
2305 OpLess64U
2306 OpLess32F
2307 OpLess64F
2308 OpLeq8
2309 OpLeq8U
2310 OpLeq16
2311 OpLeq16U
2312 OpLeq32
2313 OpLeq32U
2314 OpLeq64
2315 OpLeq64U
2316 OpLeq32F
2317 OpLeq64F
2318 OpGreater8
2319 OpGreater8U
2320 OpGreater16
2321 OpGreater16U
2322 OpGreater32
2323 OpGreater32U
2324 OpGreater64
2325 OpGreater64U
2326 OpGreater32F
2327 OpGreater64F
2328 OpGeq8
2329 OpGeq8U
2330 OpGeq16
2331 OpGeq16U
2332 OpGeq32
2333 OpGeq32U
2334 OpGeq64
2335 OpGeq64U
2336 OpGeq32F
2337 OpGeq64F
2338 OpCondSelect
2339 OpAndB
2340 OpOrB
2341 OpEqB
2342 OpNeqB
2343 OpNot
2344 OpNeg8
2345 OpNeg16
2346 OpNeg32
2347 OpNeg64
2348 OpNeg32F
2349 OpNeg64F
2350 OpCom8
2351 OpCom16
2352 OpCom32
2353 OpCom64
2354 OpCtz8
2355 OpCtz16
2356 OpCtz32
2357 OpCtz64
2358 OpCtz8NonZero
2359 OpCtz16NonZero
2360 OpCtz32NonZero
2361 OpCtz64NonZero
2362 OpBitLen8
2363 OpBitLen16
2364 OpBitLen32
2365 OpBitLen64
2366 OpBswap32
2367 OpBswap64
2368 OpBitRev8
2369 OpBitRev16
2370 OpBitRev32
2371 OpBitRev64
2372 OpPopCount8
2373 OpPopCount16
2374 OpPopCount32
2375 OpPopCount64
2376 OpRotateLeft8
2377 OpRotateLeft16
2378 OpRotateLeft32
2379 OpRotateLeft64
2380 OpSqrt
2381 OpFloor
2382 OpCeil
2383 OpTrunc
2384 OpRound
2385 OpRoundToEven
2386 OpAbs
2387 OpCopysign
2388 OpPhi
2389 OpCopy
2390 OpConvert
2391 OpConstBool
2392 OpConstString
2393 OpConstNil
2394 OpConst8
2395 OpConst16
2396 OpConst32
2397 OpConst64
2398 OpConst32F
2399 OpConst64F
2400 OpConstInterface
2401 OpConstSlice
2402 OpInitMem
2403 OpArg
2404 OpAddr
2405 OpLocalAddr
2406 OpSP
2407 OpSB
2408 OpLoad
2409 OpStore
2410 OpMove
2411 OpZero
2412 OpStoreWB
2413 OpMoveWB
2414 OpZeroWB
2415 OpWB
2416 OpPanicBounds
2417 OpPanicExtend
2418 OpClosureCall
2419 OpStaticCall
2420 OpInterCall
2421 OpSignExt8to16
2422 OpSignExt8to32
2423 OpSignExt8to64
2424 OpSignExt16to32
2425 OpSignExt16to64
2426 OpSignExt32to64
2427 OpZeroExt8to16
2428 OpZeroExt8to32
2429 OpZeroExt8to64
2430 OpZeroExt16to32
2431 OpZeroExt16to64
2432 OpZeroExt32to64
2433 OpTrunc16to8
2434 OpTrunc32to8
2435 OpTrunc32to16
2436 OpTrunc64to8
2437 OpTrunc64to16
2438 OpTrunc64to32
2439 OpCvt32to32F
2440 OpCvt32to64F
2441 OpCvt64to32F
2442 OpCvt64to64F
2443 OpCvt32Fto32
2444 OpCvt32Fto64
2445 OpCvt64Fto32
2446 OpCvt64Fto64
2447 OpCvt32Fto64F
2448 OpCvt64Fto32F
2449 OpRound32F
2450 OpRound64F
2451 OpIsNonNil
2452 OpIsInBounds
2453 OpIsSliceInBounds
2454 OpNilCheck
2455 OpGetG
2456 OpGetClosurePtr
2457 OpGetCallerPC
2458 OpGetCallerSP
2459 OpPtrIndex
2460 OpOffPtr
2461 OpSliceMake
2462 OpSlicePtr
2463 OpSliceLen
2464 OpSliceCap
2465 OpComplexMake
2466 OpComplexReal
2467 OpComplexImag
2468 OpStringMake
2469 OpStringPtr
2470 OpStringLen
2471 OpIMake
2472 OpITab
2473 OpIData
2474 OpStructMake0
2475 OpStructMake1
2476 OpStructMake2
2477 OpStructMake3
2478 OpStructMake4
2479 OpStructSelect
2480 OpArrayMake0
2481 OpArrayMake1
2482 OpArraySelect
2483 OpStoreReg
2484 OpLoadReg
2485 OpFwdRef
2486 OpUnknown
2487 OpVarDef
2488 OpVarKill
2489 OpVarLive
2490 OpKeepAlive
2491 OpInlMark
2492 OpInt64Make
2493 OpInt64Hi
2494 OpInt64Lo
2495 OpAdd32carry
2496 OpAdd32withcarry
2497 OpSub32carry
2498 OpSub32withcarry
2499 OpAdd64carry
2500 OpSub64borrow
2501 OpSignmask
2502 OpZeromask
2503 OpSlicemask
2504 OpCvt32Uto32F
2505 OpCvt32Uto64F
2506 OpCvt32Fto32U
2507 OpCvt64Fto32U
2508 OpCvt64Uto32F
2509 OpCvt64Uto64F
2510 OpCvt32Fto64U
2511 OpCvt64Fto64U
2512 OpSelect0
2513 OpSelect1
2514 OpAtomicLoad8
2515 OpAtomicLoad32
2516 OpAtomicLoad64
2517 OpAtomicLoadPtr
2518 OpAtomicLoadAcq32
2519 OpAtomicStore32
2520 OpAtomicStore64
2521 OpAtomicStorePtrNoWB
2522 OpAtomicStoreRel32
2523 OpAtomicExchange32
2524 OpAtomicExchange64
2525 OpAtomicAdd32
2526 OpAtomicAdd64
2527 OpAtomicCompareAndSwap32
2528 OpAtomicCompareAndSwap64
2529 OpAtomicCompareAndSwapRel32
2530 OpAtomicAnd8
2531 OpAtomicOr8
2532 OpAtomicAdd32Variant
2533 OpAtomicAdd64Variant
2534 OpClobber
2535 )
2536
2537 var opcodeTable = [...]opInfo{
2538 {name: "OpInvalid"},
2539
2540 {
2541 name: "ADDSS",
2542 argLen: 2,
2543 commutative: true,
2544 resultInArg0: true,
2545 usesScratch: true,
2546 asm: x86.AADDSS,
2547 reg: regInfo{
2548 inputs: []inputInfo{
2549 {0, 65280},
2550 {1, 65280},
2551 },
2552 outputs: []outputInfo{
2553 {0, 65280},
2554 },
2555 },
2556 },
2557 {
2558 name: "ADDSD",
2559 argLen: 2,
2560 commutative: true,
2561 resultInArg0: true,
2562 asm: x86.AADDSD,
2563 reg: regInfo{
2564 inputs: []inputInfo{
2565 {0, 65280},
2566 {1, 65280},
2567 },
2568 outputs: []outputInfo{
2569 {0, 65280},
2570 },
2571 },
2572 },
2573 {
2574 name: "SUBSS",
2575 argLen: 2,
2576 resultInArg0: true,
2577 usesScratch: true,
2578 asm: x86.ASUBSS,
2579 reg: regInfo{
2580 inputs: []inputInfo{
2581 {0, 65280},
2582 {1, 65280},
2583 },
2584 outputs: []outputInfo{
2585 {0, 65280},
2586 },
2587 },
2588 },
2589 {
2590 name: "SUBSD",
2591 argLen: 2,
2592 resultInArg0: true,
2593 asm: x86.ASUBSD,
2594 reg: regInfo{
2595 inputs: []inputInfo{
2596 {0, 65280},
2597 {1, 65280},
2598 },
2599 outputs: []outputInfo{
2600 {0, 65280},
2601 },
2602 },
2603 },
2604 {
2605 name: "MULSS",
2606 argLen: 2,
2607 commutative: true,
2608 resultInArg0: true,
2609 usesScratch: true,
2610 asm: x86.AMULSS,
2611 reg: regInfo{
2612 inputs: []inputInfo{
2613 {0, 65280},
2614 {1, 65280},
2615 },
2616 outputs: []outputInfo{
2617 {0, 65280},
2618 },
2619 },
2620 },
2621 {
2622 name: "MULSD",
2623 argLen: 2,
2624 commutative: true,
2625 resultInArg0: true,
2626 asm: x86.AMULSD,
2627 reg: regInfo{
2628 inputs: []inputInfo{
2629 {0, 65280},
2630 {1, 65280},
2631 },
2632 outputs: []outputInfo{
2633 {0, 65280},
2634 },
2635 },
2636 },
2637 {
2638 name: "DIVSS",
2639 argLen: 2,
2640 resultInArg0: true,
2641 usesScratch: true,
2642 asm: x86.ADIVSS,
2643 reg: regInfo{
2644 inputs: []inputInfo{
2645 {0, 65280},
2646 {1, 65280},
2647 },
2648 outputs: []outputInfo{
2649 {0, 65280},
2650 },
2651 },
2652 },
2653 {
2654 name: "DIVSD",
2655 argLen: 2,
2656 resultInArg0: true,
2657 asm: x86.ADIVSD,
2658 reg: regInfo{
2659 inputs: []inputInfo{
2660 {0, 65280},
2661 {1, 65280},
2662 },
2663 outputs: []outputInfo{
2664 {0, 65280},
2665 },
2666 },
2667 },
2668 {
2669 name: "MOVSSload",
2670 auxType: auxSymOff,
2671 argLen: 2,
2672 faultOnNilArg0: true,
2673 symEffect: SymRead,
2674 asm: x86.AMOVSS,
2675 reg: regInfo{
2676 inputs: []inputInfo{
2677 {0, 65791},
2678 },
2679 outputs: []outputInfo{
2680 {0, 65280},
2681 },
2682 },
2683 },
2684 {
2685 name: "MOVSDload",
2686 auxType: auxSymOff,
2687 argLen: 2,
2688 faultOnNilArg0: true,
2689 symEffect: SymRead,
2690 asm: x86.AMOVSD,
2691 reg: regInfo{
2692 inputs: []inputInfo{
2693 {0, 65791},
2694 },
2695 outputs: []outputInfo{
2696 {0, 65280},
2697 },
2698 },
2699 },
2700 {
2701 name: "MOVSSconst",
2702 auxType: auxFloat32,
2703 argLen: 0,
2704 rematerializeable: true,
2705 asm: x86.AMOVSS,
2706 reg: regInfo{
2707 outputs: []outputInfo{
2708 {0, 65280},
2709 },
2710 },
2711 },
2712 {
2713 name: "MOVSDconst",
2714 auxType: auxFloat64,
2715 argLen: 0,
2716 rematerializeable: true,
2717 asm: x86.AMOVSD,
2718 reg: regInfo{
2719 outputs: []outputInfo{
2720 {0, 65280},
2721 },
2722 },
2723 },
2724 {
2725 name: "MOVSSloadidx1",
2726 auxType: auxSymOff,
2727 argLen: 3,
2728 symEffect: SymRead,
2729 asm: x86.AMOVSS,
2730 reg: regInfo{
2731 inputs: []inputInfo{
2732 {1, 255},
2733 {0, 65791},
2734 },
2735 outputs: []outputInfo{
2736 {0, 65280},
2737 },
2738 },
2739 },
2740 {
2741 name: "MOVSSloadidx4",
2742 auxType: auxSymOff,
2743 argLen: 3,
2744 symEffect: SymRead,
2745 asm: x86.AMOVSS,
2746 reg: regInfo{
2747 inputs: []inputInfo{
2748 {1, 255},
2749 {0, 65791},
2750 },
2751 outputs: []outputInfo{
2752 {0, 65280},
2753 },
2754 },
2755 },
2756 {
2757 name: "MOVSDloadidx1",
2758 auxType: auxSymOff,
2759 argLen: 3,
2760 symEffect: SymRead,
2761 asm: x86.AMOVSD,
2762 reg: regInfo{
2763 inputs: []inputInfo{
2764 {1, 255},
2765 {0, 65791},
2766 },
2767 outputs: []outputInfo{
2768 {0, 65280},
2769 },
2770 },
2771 },
2772 {
2773 name: "MOVSDloadidx8",
2774 auxType: auxSymOff,
2775 argLen: 3,
2776 symEffect: SymRead,
2777 asm: x86.AMOVSD,
2778 reg: regInfo{
2779 inputs: []inputInfo{
2780 {1, 255},
2781 {0, 65791},
2782 },
2783 outputs: []outputInfo{
2784 {0, 65280},
2785 },
2786 },
2787 },
2788 {
2789 name: "MOVSSstore",
2790 auxType: auxSymOff,
2791 argLen: 3,
2792 faultOnNilArg0: true,
2793 symEffect: SymWrite,
2794 asm: x86.AMOVSS,
2795 reg: regInfo{
2796 inputs: []inputInfo{
2797 {1, 65280},
2798 {0, 65791},
2799 },
2800 },
2801 },
2802 {
2803 name: "MOVSDstore",
2804 auxType: auxSymOff,
2805 argLen: 3,
2806 faultOnNilArg0: true,
2807 symEffect: SymWrite,
2808 asm: x86.AMOVSD,
2809 reg: regInfo{
2810 inputs: []inputInfo{
2811 {1, 65280},
2812 {0, 65791},
2813 },
2814 },
2815 },
2816 {
2817 name: "MOVSSstoreidx1",
2818 auxType: auxSymOff,
2819 argLen: 4,
2820 symEffect: SymWrite,
2821 asm: x86.AMOVSS,
2822 reg: regInfo{
2823 inputs: []inputInfo{
2824 {1, 255},
2825 {2, 65280},
2826 {0, 65791},
2827 },
2828 },
2829 },
2830 {
2831 name: "MOVSSstoreidx4",
2832 auxType: auxSymOff,
2833 argLen: 4,
2834 symEffect: SymWrite,
2835 asm: x86.AMOVSS,
2836 reg: regInfo{
2837 inputs: []inputInfo{
2838 {1, 255},
2839 {2, 65280},
2840 {0, 65791},
2841 },
2842 },
2843 },
2844 {
2845 name: "MOVSDstoreidx1",
2846 auxType: auxSymOff,
2847 argLen: 4,
2848 symEffect: SymWrite,
2849 asm: x86.AMOVSD,
2850 reg: regInfo{
2851 inputs: []inputInfo{
2852 {1, 255},
2853 {2, 65280},
2854 {0, 65791},
2855 },
2856 },
2857 },
2858 {
2859 name: "MOVSDstoreidx8",
2860 auxType: auxSymOff,
2861 argLen: 4,
2862 symEffect: SymWrite,
2863 asm: x86.AMOVSD,
2864 reg: regInfo{
2865 inputs: []inputInfo{
2866 {1, 255},
2867 {2, 65280},
2868 {0, 65791},
2869 },
2870 },
2871 },
2872 {
2873 name: "ADDSSload",
2874 auxType: auxSymOff,
2875 argLen: 3,
2876 resultInArg0: true,
2877 faultOnNilArg1: true,
2878 symEffect: SymRead,
2879 asm: x86.AADDSS,
2880 reg: regInfo{
2881 inputs: []inputInfo{
2882 {0, 65280},
2883 {1, 65791},
2884 },
2885 outputs: []outputInfo{
2886 {0, 65280},
2887 },
2888 },
2889 },
2890 {
2891 name: "ADDSDload",
2892 auxType: auxSymOff,
2893 argLen: 3,
2894 resultInArg0: true,
2895 faultOnNilArg1: true,
2896 symEffect: SymRead,
2897 asm: x86.AADDSD,
2898 reg: regInfo{
2899 inputs: []inputInfo{
2900 {0, 65280},
2901 {1, 65791},
2902 },
2903 outputs: []outputInfo{
2904 {0, 65280},
2905 },
2906 },
2907 },
2908 {
2909 name: "SUBSSload",
2910 auxType: auxSymOff,
2911 argLen: 3,
2912 resultInArg0: true,
2913 faultOnNilArg1: true,
2914 symEffect: SymRead,
2915 asm: x86.ASUBSS,
2916 reg: regInfo{
2917 inputs: []inputInfo{
2918 {0, 65280},
2919 {1, 65791},
2920 },
2921 outputs: []outputInfo{
2922 {0, 65280},
2923 },
2924 },
2925 },
2926 {
2927 name: "SUBSDload",
2928 auxType: auxSymOff,
2929 argLen: 3,
2930 resultInArg0: true,
2931 faultOnNilArg1: true,
2932 symEffect: SymRead,
2933 asm: x86.ASUBSD,
2934 reg: regInfo{
2935 inputs: []inputInfo{
2936 {0, 65280},
2937 {1, 65791},
2938 },
2939 outputs: []outputInfo{
2940 {0, 65280},
2941 },
2942 },
2943 },
2944 {
2945 name: "MULSSload",
2946 auxType: auxSymOff,
2947 argLen: 3,
2948 resultInArg0: true,
2949 faultOnNilArg1: true,
2950 symEffect: SymRead,
2951 asm: x86.AMULSS,
2952 reg: regInfo{
2953 inputs: []inputInfo{
2954 {0, 65280},
2955 {1, 65791},
2956 },
2957 outputs: []outputInfo{
2958 {0, 65280},
2959 },
2960 },
2961 },
2962 {
2963 name: "MULSDload",
2964 auxType: auxSymOff,
2965 argLen: 3,
2966 resultInArg0: true,
2967 faultOnNilArg1: true,
2968 symEffect: SymRead,
2969 asm: x86.AMULSD,
2970 reg: regInfo{
2971 inputs: []inputInfo{
2972 {0, 65280},
2973 {1, 65791},
2974 },
2975 outputs: []outputInfo{
2976 {0, 65280},
2977 },
2978 },
2979 },
2980 {
2981 name: "DIVSSload",
2982 auxType: auxSymOff,
2983 argLen: 3,
2984 resultInArg0: true,
2985 faultOnNilArg1: true,
2986 symEffect: SymRead,
2987 asm: x86.ADIVSS,
2988 reg: regInfo{
2989 inputs: []inputInfo{
2990 {0, 65280},
2991 {1, 65791},
2992 },
2993 outputs: []outputInfo{
2994 {0, 65280},
2995 },
2996 },
2997 },
2998 {
2999 name: "DIVSDload",
3000 auxType: auxSymOff,
3001 argLen: 3,
3002 resultInArg0: true,
3003 faultOnNilArg1: true,
3004 symEffect: SymRead,
3005 asm: x86.ADIVSD,
3006 reg: regInfo{
3007 inputs: []inputInfo{
3008 {0, 65280},
3009 {1, 65791},
3010 },
3011 outputs: []outputInfo{
3012 {0, 65280},
3013 },
3014 },
3015 },
3016 {
3017 name: "ADDL",
3018 argLen: 2,
3019 commutative: true,
3020 clobberFlags: true,
3021 asm: x86.AADDL,
3022 reg: regInfo{
3023 inputs: []inputInfo{
3024 {1, 239},
3025 {0, 255},
3026 },
3027 outputs: []outputInfo{
3028 {0, 239},
3029 },
3030 },
3031 },
3032 {
3033 name: "ADDLconst",
3034 auxType: auxInt32,
3035 argLen: 1,
3036 clobberFlags: true,
3037 asm: x86.AADDL,
3038 reg: regInfo{
3039 inputs: []inputInfo{
3040 {0, 255},
3041 },
3042 outputs: []outputInfo{
3043 {0, 239},
3044 },
3045 },
3046 },
3047 {
3048 name: "ADDLcarry",
3049 argLen: 2,
3050 commutative: true,
3051 resultInArg0: true,
3052 asm: x86.AADDL,
3053 reg: regInfo{
3054 inputs: []inputInfo{
3055 {0, 239},
3056 {1, 239},
3057 },
3058 outputs: []outputInfo{
3059 {1, 0},
3060 {0, 239},
3061 },
3062 },
3063 },
3064 {
3065 name: "ADDLconstcarry",
3066 auxType: auxInt32,
3067 argLen: 1,
3068 resultInArg0: true,
3069 asm: x86.AADDL,
3070 reg: regInfo{
3071 inputs: []inputInfo{
3072 {0, 239},
3073 },
3074 outputs: []outputInfo{
3075 {1, 0},
3076 {0, 239},
3077 },
3078 },
3079 },
3080 {
3081 name: "ADCL",
3082 argLen: 3,
3083 commutative: true,
3084 resultInArg0: true,
3085 clobberFlags: true,
3086 asm: x86.AADCL,
3087 reg: regInfo{
3088 inputs: []inputInfo{
3089 {0, 239},
3090 {1, 239},
3091 },
3092 outputs: []outputInfo{
3093 {0, 239},
3094 },
3095 },
3096 },
3097 {
3098 name: "ADCLconst",
3099 auxType: auxInt32,
3100 argLen: 2,
3101 resultInArg0: true,
3102 clobberFlags: true,
3103 asm: x86.AADCL,
3104 reg: regInfo{
3105 inputs: []inputInfo{
3106 {0, 239},
3107 },
3108 outputs: []outputInfo{
3109 {0, 239},
3110 },
3111 },
3112 },
3113 {
3114 name: "SUBL",
3115 argLen: 2,
3116 resultInArg0: true,
3117 clobberFlags: true,
3118 asm: x86.ASUBL,
3119 reg: regInfo{
3120 inputs: []inputInfo{
3121 {0, 239},
3122 {1, 239},
3123 },
3124 outputs: []outputInfo{
3125 {0, 239},
3126 },
3127 },
3128 },
3129 {
3130 name: "SUBLconst",
3131 auxType: auxInt32,
3132 argLen: 1,
3133 resultInArg0: true,
3134 clobberFlags: true,
3135 asm: x86.ASUBL,
3136 reg: regInfo{
3137 inputs: []inputInfo{
3138 {0, 239},
3139 },
3140 outputs: []outputInfo{
3141 {0, 239},
3142 },
3143 },
3144 },
3145 {
3146 name: "SUBLcarry",
3147 argLen: 2,
3148 resultInArg0: true,
3149 asm: x86.ASUBL,
3150 reg: regInfo{
3151 inputs: []inputInfo{
3152 {0, 239},
3153 {1, 239},
3154 },
3155 outputs: []outputInfo{
3156 {1, 0},
3157 {0, 239},
3158 },
3159 },
3160 },
3161 {
3162 name: "SUBLconstcarry",
3163 auxType: auxInt32,
3164 argLen: 1,
3165 resultInArg0: true,
3166 asm: x86.ASUBL,
3167 reg: regInfo{
3168 inputs: []inputInfo{
3169 {0, 239},
3170 },
3171 outputs: []outputInfo{
3172 {1, 0},
3173 {0, 239},
3174 },
3175 },
3176 },
3177 {
3178 name: "SBBL",
3179 argLen: 3,
3180 resultInArg0: true,
3181 clobberFlags: true,
3182 asm: x86.ASBBL,
3183 reg: regInfo{
3184 inputs: []inputInfo{
3185 {0, 239},
3186 {1, 239},
3187 },
3188 outputs: []outputInfo{
3189 {0, 239},
3190 },
3191 },
3192 },
3193 {
3194 name: "SBBLconst",
3195 auxType: auxInt32,
3196 argLen: 2,
3197 resultInArg0: true,
3198 clobberFlags: true,
3199 asm: x86.ASBBL,
3200 reg: regInfo{
3201 inputs: []inputInfo{
3202 {0, 239},
3203 },
3204 outputs: []outputInfo{
3205 {0, 239},
3206 },
3207 },
3208 },
3209 {
3210 name: "MULL",
3211 argLen: 2,
3212 commutative: true,
3213 resultInArg0: true,
3214 clobberFlags: true,
3215 asm: x86.AIMULL,
3216 reg: regInfo{
3217 inputs: []inputInfo{
3218 {0, 239},
3219 {1, 239},
3220 },
3221 outputs: []outputInfo{
3222 {0, 239},
3223 },
3224 },
3225 },
3226 {
3227 name: "MULLconst",
3228 auxType: auxInt32,
3229 argLen: 1,
3230 clobberFlags: true,
3231 asm: x86.AIMUL3L,
3232 reg: regInfo{
3233 inputs: []inputInfo{
3234 {0, 239},
3235 },
3236 outputs: []outputInfo{
3237 {0, 239},
3238 },
3239 },
3240 },
3241 {
3242 name: "MULLU",
3243 argLen: 2,
3244 commutative: true,
3245 clobberFlags: true,
3246 asm: x86.AMULL,
3247 reg: regInfo{
3248 inputs: []inputInfo{
3249 {0, 1},
3250 {1, 255},
3251 },
3252 clobbers: 4,
3253 outputs: []outputInfo{
3254 {1, 0},
3255 {0, 1},
3256 },
3257 },
3258 },
3259 {
3260 name: "HMULL",
3261 argLen: 2,
3262 commutative: true,
3263 clobberFlags: true,
3264 asm: x86.AIMULL,
3265 reg: regInfo{
3266 inputs: []inputInfo{
3267 {0, 1},
3268 {1, 255},
3269 },
3270 clobbers: 1,
3271 outputs: []outputInfo{
3272 {0, 4},
3273 },
3274 },
3275 },
3276 {
3277 name: "HMULLU",
3278 argLen: 2,
3279 commutative: true,
3280 clobberFlags: true,
3281 asm: x86.AMULL,
3282 reg: regInfo{
3283 inputs: []inputInfo{
3284 {0, 1},
3285 {1, 255},
3286 },
3287 clobbers: 1,
3288 outputs: []outputInfo{
3289 {0, 4},
3290 },
3291 },
3292 },
3293 {
3294 name: "MULLQU",
3295 argLen: 2,
3296 commutative: true,
3297 clobberFlags: true,
3298 asm: x86.AMULL,
3299 reg: regInfo{
3300 inputs: []inputInfo{
3301 {0, 1},
3302 {1, 255},
3303 },
3304 outputs: []outputInfo{
3305 {0, 4},
3306 {1, 1},
3307 },
3308 },
3309 },
3310 {
3311 name: "AVGLU",
3312 argLen: 2,
3313 commutative: true,
3314 resultInArg0: true,
3315 clobberFlags: true,
3316 reg: regInfo{
3317 inputs: []inputInfo{
3318 {0, 239},
3319 {1, 239},
3320 },
3321 outputs: []outputInfo{
3322 {0, 239},
3323 },
3324 },
3325 },
3326 {
3327 name: "DIVL",
3328 auxType: auxBool,
3329 argLen: 2,
3330 clobberFlags: true,
3331 asm: x86.AIDIVL,
3332 reg: regInfo{
3333 inputs: []inputInfo{
3334 {0, 1},
3335 {1, 251},
3336 },
3337 clobbers: 4,
3338 outputs: []outputInfo{
3339 {0, 1},
3340 },
3341 },
3342 },
3343 {
3344 name: "DIVW",
3345 auxType: auxBool,
3346 argLen: 2,
3347 clobberFlags: true,
3348 asm: x86.AIDIVW,
3349 reg: regInfo{
3350 inputs: []inputInfo{
3351 {0, 1},
3352 {1, 251},
3353 },
3354 clobbers: 4,
3355 outputs: []outputInfo{
3356 {0, 1},
3357 },
3358 },
3359 },
3360 {
3361 name: "DIVLU",
3362 argLen: 2,
3363 clobberFlags: true,
3364 asm: x86.ADIVL,
3365 reg: regInfo{
3366 inputs: []inputInfo{
3367 {0, 1},
3368 {1, 251},
3369 },
3370 clobbers: 4,
3371 outputs: []outputInfo{
3372 {0, 1},
3373 },
3374 },
3375 },
3376 {
3377 name: "DIVWU",
3378 argLen: 2,
3379 clobberFlags: true,
3380 asm: x86.ADIVW,
3381 reg: regInfo{
3382 inputs: []inputInfo{
3383 {0, 1},
3384 {1, 251},
3385 },
3386 clobbers: 4,
3387 outputs: []outputInfo{
3388 {0, 1},
3389 },
3390 },
3391 },
3392 {
3393 name: "MODL",
3394 auxType: auxBool,
3395 argLen: 2,
3396 clobberFlags: true,
3397 asm: x86.AIDIVL,
3398 reg: regInfo{
3399 inputs: []inputInfo{
3400 {0, 1},
3401 {1, 251},
3402 },
3403 clobbers: 1,
3404 outputs: []outputInfo{
3405 {0, 4},
3406 },
3407 },
3408 },
3409 {
3410 name: "MODW",
3411 auxType: auxBool,
3412 argLen: 2,
3413 clobberFlags: true,
3414 asm: x86.AIDIVW,
3415 reg: regInfo{
3416 inputs: []inputInfo{
3417 {0, 1},
3418 {1, 251},
3419 },
3420 clobbers: 1,
3421 outputs: []outputInfo{
3422 {0, 4},
3423 },
3424 },
3425 },
3426 {
3427 name: "MODLU",
3428 argLen: 2,
3429 clobberFlags: true,
3430 asm: x86.ADIVL,
3431 reg: regInfo{
3432 inputs: []inputInfo{
3433 {0, 1},
3434 {1, 251},
3435 },
3436 clobbers: 1,
3437 outputs: []outputInfo{
3438 {0, 4},
3439 },
3440 },
3441 },
3442 {
3443 name: "MODWU",
3444 argLen: 2,
3445 clobberFlags: true,
3446 asm: x86.ADIVW,
3447 reg: regInfo{
3448 inputs: []inputInfo{
3449 {0, 1},
3450 {1, 251},
3451 },
3452 clobbers: 1,
3453 outputs: []outputInfo{
3454 {0, 4},
3455 },
3456 },
3457 },
3458 {
3459 name: "ANDL",
3460 argLen: 2,
3461 commutative: true,
3462 resultInArg0: true,
3463 clobberFlags: true,
3464 asm: x86.AANDL,
3465 reg: regInfo{
3466 inputs: []inputInfo{
3467 {0, 239},
3468 {1, 239},
3469 },
3470 outputs: []outputInfo{
3471 {0, 239},
3472 },
3473 },
3474 },
3475 {
3476 name: "ANDLconst",
3477 auxType: auxInt32,
3478 argLen: 1,
3479 resultInArg0: true,
3480 clobberFlags: true,
3481 asm: x86.AANDL,
3482 reg: regInfo{
3483 inputs: []inputInfo{
3484 {0, 239},
3485 },
3486 outputs: []outputInfo{
3487 {0, 239},
3488 },
3489 },
3490 },
3491 {
3492 name: "ORL",
3493 argLen: 2,
3494 commutative: true,
3495 resultInArg0: true,
3496 clobberFlags: true,
3497 asm: x86.AORL,
3498 reg: regInfo{
3499 inputs: []inputInfo{
3500 {0, 239},
3501 {1, 239},
3502 },
3503 outputs: []outputInfo{
3504 {0, 239},
3505 },
3506 },
3507 },
3508 {
3509 name: "ORLconst",
3510 auxType: auxInt32,
3511 argLen: 1,
3512 resultInArg0: true,
3513 clobberFlags: true,
3514 asm: x86.AORL,
3515 reg: regInfo{
3516 inputs: []inputInfo{
3517 {0, 239},
3518 },
3519 outputs: []outputInfo{
3520 {0, 239},
3521 },
3522 },
3523 },
3524 {
3525 name: "XORL",
3526 argLen: 2,
3527 commutative: true,
3528 resultInArg0: true,
3529 clobberFlags: true,
3530 asm: x86.AXORL,
3531 reg: regInfo{
3532 inputs: []inputInfo{
3533 {0, 239},
3534 {1, 239},
3535 },
3536 outputs: []outputInfo{
3537 {0, 239},
3538 },
3539 },
3540 },
3541 {
3542 name: "XORLconst",
3543 auxType: auxInt32,
3544 argLen: 1,
3545 resultInArg0: true,
3546 clobberFlags: true,
3547 asm: x86.AXORL,
3548 reg: regInfo{
3549 inputs: []inputInfo{
3550 {0, 239},
3551 },
3552 outputs: []outputInfo{
3553 {0, 239},
3554 },
3555 },
3556 },
3557 {
3558 name: "CMPL",
3559 argLen: 2,
3560 asm: x86.ACMPL,
3561 reg: regInfo{
3562 inputs: []inputInfo{
3563 {0, 255},
3564 {1, 255},
3565 },
3566 },
3567 },
3568 {
3569 name: "CMPW",
3570 argLen: 2,
3571 asm: x86.ACMPW,
3572 reg: regInfo{
3573 inputs: []inputInfo{
3574 {0, 255},
3575 {1, 255},
3576 },
3577 },
3578 },
3579 {
3580 name: "CMPB",
3581 argLen: 2,
3582 asm: x86.ACMPB,
3583 reg: regInfo{
3584 inputs: []inputInfo{
3585 {0, 255},
3586 {1, 255},
3587 },
3588 },
3589 },
3590 {
3591 name: "CMPLconst",
3592 auxType: auxInt32,
3593 argLen: 1,
3594 asm: x86.ACMPL,
3595 reg: regInfo{
3596 inputs: []inputInfo{
3597 {0, 255},
3598 },
3599 },
3600 },
3601 {
3602 name: "CMPWconst",
3603 auxType: auxInt16,
3604 argLen: 1,
3605 asm: x86.ACMPW,
3606 reg: regInfo{
3607 inputs: []inputInfo{
3608 {0, 255},
3609 },
3610 },
3611 },
3612 {
3613 name: "CMPBconst",
3614 auxType: auxInt8,
3615 argLen: 1,
3616 asm: x86.ACMPB,
3617 reg: regInfo{
3618 inputs: []inputInfo{
3619 {0, 255},
3620 },
3621 },
3622 },
3623 {
3624 name: "CMPLload",
3625 auxType: auxSymOff,
3626 argLen: 3,
3627 faultOnNilArg0: true,
3628 symEffect: SymRead,
3629 asm: x86.ACMPL,
3630 reg: regInfo{
3631 inputs: []inputInfo{
3632 {1, 255},
3633 {0, 65791},
3634 },
3635 },
3636 },
3637 {
3638 name: "CMPWload",
3639 auxType: auxSymOff,
3640 argLen: 3,
3641 faultOnNilArg0: true,
3642 symEffect: SymRead,
3643 asm: x86.ACMPW,
3644 reg: regInfo{
3645 inputs: []inputInfo{
3646 {1, 255},
3647 {0, 65791},
3648 },
3649 },
3650 },
3651 {
3652 name: "CMPBload",
3653 auxType: auxSymOff,
3654 argLen: 3,
3655 faultOnNilArg0: true,
3656 symEffect: SymRead,
3657 asm: x86.ACMPB,
3658 reg: regInfo{
3659 inputs: []inputInfo{
3660 {1, 255},
3661 {0, 65791},
3662 },
3663 },
3664 },
3665 {
3666 name: "CMPLconstload",
3667 auxType: auxSymValAndOff,
3668 argLen: 2,
3669 faultOnNilArg0: true,
3670 symEffect: SymRead,
3671 asm: x86.ACMPL,
3672 reg: regInfo{
3673 inputs: []inputInfo{
3674 {0, 65791},
3675 },
3676 },
3677 },
3678 {
3679 name: "CMPWconstload",
3680 auxType: auxSymValAndOff,
3681 argLen: 2,
3682 faultOnNilArg0: true,
3683 symEffect: SymRead,
3684 asm: x86.ACMPW,
3685 reg: regInfo{
3686 inputs: []inputInfo{
3687 {0, 65791},
3688 },
3689 },
3690 },
3691 {
3692 name: "CMPBconstload",
3693 auxType: auxSymValAndOff,
3694 argLen: 2,
3695 faultOnNilArg0: true,
3696 symEffect: SymRead,
3697 asm: x86.ACMPB,
3698 reg: regInfo{
3699 inputs: []inputInfo{
3700 {0, 65791},
3701 },
3702 },
3703 },
3704 {
3705 name: "UCOMISS",
3706 argLen: 2,
3707 usesScratch: true,
3708 asm: x86.AUCOMISS,
3709 reg: regInfo{
3710 inputs: []inputInfo{
3711 {0, 65280},
3712 {1, 65280},
3713 },
3714 },
3715 },
3716 {
3717 name: "UCOMISD",
3718 argLen: 2,
3719 usesScratch: true,
3720 asm: x86.AUCOMISD,
3721 reg: regInfo{
3722 inputs: []inputInfo{
3723 {0, 65280},
3724 {1, 65280},
3725 },
3726 },
3727 },
3728 {
3729 name: "TESTL",
3730 argLen: 2,
3731 commutative: true,
3732 asm: x86.ATESTL,
3733 reg: regInfo{
3734 inputs: []inputInfo{
3735 {0, 255},
3736 {1, 255},
3737 },
3738 },
3739 },
3740 {
3741 name: "TESTW",
3742 argLen: 2,
3743 commutative: true,
3744 asm: x86.ATESTW,
3745 reg: regInfo{
3746 inputs: []inputInfo{
3747 {0, 255},
3748 {1, 255},
3749 },
3750 },
3751 },
3752 {
3753 name: "TESTB",
3754 argLen: 2,
3755 commutative: true,
3756 asm: x86.ATESTB,
3757 reg: regInfo{
3758 inputs: []inputInfo{
3759 {0, 255},
3760 {1, 255},
3761 },
3762 },
3763 },
3764 {
3765 name: "TESTLconst",
3766 auxType: auxInt32,
3767 argLen: 1,
3768 asm: x86.ATESTL,
3769 reg: regInfo{
3770 inputs: []inputInfo{
3771 {0, 255},
3772 },
3773 },
3774 },
3775 {
3776 name: "TESTWconst",
3777 auxType: auxInt16,
3778 argLen: 1,
3779 asm: x86.ATESTW,
3780 reg: regInfo{
3781 inputs: []inputInfo{
3782 {0, 255},
3783 },
3784 },
3785 },
3786 {
3787 name: "TESTBconst",
3788 auxType: auxInt8,
3789 argLen: 1,
3790 asm: x86.ATESTB,
3791 reg: regInfo{
3792 inputs: []inputInfo{
3793 {0, 255},
3794 },
3795 },
3796 },
3797 {
3798 name: "SHLL",
3799 argLen: 2,
3800 resultInArg0: true,
3801 clobberFlags: true,
3802 asm: x86.ASHLL,
3803 reg: regInfo{
3804 inputs: []inputInfo{
3805 {1, 2},
3806 {0, 239},
3807 },
3808 outputs: []outputInfo{
3809 {0, 239},
3810 },
3811 },
3812 },
3813 {
3814 name: "SHLLconst",
3815 auxType: auxInt32,
3816 argLen: 1,
3817 resultInArg0: true,
3818 clobberFlags: true,
3819 asm: x86.ASHLL,
3820 reg: regInfo{
3821 inputs: []inputInfo{
3822 {0, 239},
3823 },
3824 outputs: []outputInfo{
3825 {0, 239},
3826 },
3827 },
3828 },
3829 {
3830 name: "SHRL",
3831 argLen: 2,
3832 resultInArg0: true,
3833 clobberFlags: true,
3834 asm: x86.ASHRL,
3835 reg: regInfo{
3836 inputs: []inputInfo{
3837 {1, 2},
3838 {0, 239},
3839 },
3840 outputs: []outputInfo{
3841 {0, 239},
3842 },
3843 },
3844 },
3845 {
3846 name: "SHRW",
3847 argLen: 2,
3848 resultInArg0: true,
3849 clobberFlags: true,
3850 asm: x86.ASHRW,
3851 reg: regInfo{
3852 inputs: []inputInfo{
3853 {1, 2},
3854 {0, 239},
3855 },
3856 outputs: []outputInfo{
3857 {0, 239},
3858 },
3859 },
3860 },
3861 {
3862 name: "SHRB",
3863 argLen: 2,
3864 resultInArg0: true,
3865 clobberFlags: true,
3866 asm: x86.ASHRB,
3867 reg: regInfo{
3868 inputs: []inputInfo{
3869 {1, 2},
3870 {0, 239},
3871 },
3872 outputs: []outputInfo{
3873 {0, 239},
3874 },
3875 },
3876 },
3877 {
3878 name: "SHRLconst",
3879 auxType: auxInt32,
3880 argLen: 1,
3881 resultInArg0: true,
3882 clobberFlags: true,
3883 asm: x86.ASHRL,
3884 reg: regInfo{
3885 inputs: []inputInfo{
3886 {0, 239},
3887 },
3888 outputs: []outputInfo{
3889 {0, 239},
3890 },
3891 },
3892 },
3893 {
3894 name: "SHRWconst",
3895 auxType: auxInt16,
3896 argLen: 1,
3897 resultInArg0: true,
3898 clobberFlags: true,
3899 asm: x86.ASHRW,
3900 reg: regInfo{
3901 inputs: []inputInfo{
3902 {0, 239},
3903 },
3904 outputs: []outputInfo{
3905 {0, 239},
3906 },
3907 },
3908 },
3909 {
3910 name: "SHRBconst",
3911 auxType: auxInt8,
3912 argLen: 1,
3913 resultInArg0: true,
3914 clobberFlags: true,
3915 asm: x86.ASHRB,
3916 reg: regInfo{
3917 inputs: []inputInfo{
3918 {0, 239},
3919 },
3920 outputs: []outputInfo{
3921 {0, 239},
3922 },
3923 },
3924 },
3925 {
3926 name: "SARL",
3927 argLen: 2,
3928 resultInArg0: true,
3929 clobberFlags: true,
3930 asm: x86.ASARL,
3931 reg: regInfo{
3932 inputs: []inputInfo{
3933 {1, 2},
3934 {0, 239},
3935 },
3936 outputs: []outputInfo{
3937 {0, 239},
3938 },
3939 },
3940 },
3941 {
3942 name: "SARW",
3943 argLen: 2,
3944 resultInArg0: true,
3945 clobberFlags: true,
3946 asm: x86.ASARW,
3947 reg: regInfo{
3948 inputs: []inputInfo{
3949 {1, 2},
3950 {0, 239},
3951 },
3952 outputs: []outputInfo{
3953 {0, 239},
3954 },
3955 },
3956 },
3957 {
3958 name: "SARB",
3959 argLen: 2,
3960 resultInArg0: true,
3961 clobberFlags: true,
3962 asm: x86.ASARB,
3963 reg: regInfo{
3964 inputs: []inputInfo{
3965 {1, 2},
3966 {0, 239},
3967 },
3968 outputs: []outputInfo{
3969 {0, 239},
3970 },
3971 },
3972 },
3973 {
3974 name: "SARLconst",
3975 auxType: auxInt32,
3976 argLen: 1,
3977 resultInArg0: true,
3978 clobberFlags: true,
3979 asm: x86.ASARL,
3980 reg: regInfo{
3981 inputs: []inputInfo{
3982 {0, 239},
3983 },
3984 outputs: []outputInfo{
3985 {0, 239},
3986 },
3987 },
3988 },
3989 {
3990 name: "SARWconst",
3991 auxType: auxInt16,
3992 argLen: 1,
3993 resultInArg0: true,
3994 clobberFlags: true,
3995 asm: x86.ASARW,
3996 reg: regInfo{
3997 inputs: []inputInfo{
3998 {0, 239},
3999 },
4000 outputs: []outputInfo{
4001 {0, 239},
4002 },
4003 },
4004 },
4005 {
4006 name: "SARBconst",
4007 auxType: auxInt8,
4008 argLen: 1,
4009 resultInArg0: true,
4010 clobberFlags: true,
4011 asm: x86.ASARB,
4012 reg: regInfo{
4013 inputs: []inputInfo{
4014 {0, 239},
4015 },
4016 outputs: []outputInfo{
4017 {0, 239},
4018 },
4019 },
4020 },
4021 {
4022 name: "ROLLconst",
4023 auxType: auxInt32,
4024 argLen: 1,
4025 resultInArg0: true,
4026 clobberFlags: true,
4027 asm: x86.AROLL,
4028 reg: regInfo{
4029 inputs: []inputInfo{
4030 {0, 239},
4031 },
4032 outputs: []outputInfo{
4033 {0, 239},
4034 },
4035 },
4036 },
4037 {
4038 name: "ROLWconst",
4039 auxType: auxInt16,
4040 argLen: 1,
4041 resultInArg0: true,
4042 clobberFlags: true,
4043 asm: x86.AROLW,
4044 reg: regInfo{
4045 inputs: []inputInfo{
4046 {0, 239},
4047 },
4048 outputs: []outputInfo{
4049 {0, 239},
4050 },
4051 },
4052 },
4053 {
4054 name: "ROLBconst",
4055 auxType: auxInt8,
4056 argLen: 1,
4057 resultInArg0: true,
4058 clobberFlags: true,
4059 asm: x86.AROLB,
4060 reg: regInfo{
4061 inputs: []inputInfo{
4062 {0, 239},
4063 },
4064 outputs: []outputInfo{
4065 {0, 239},
4066 },
4067 },
4068 },
4069 {
4070 name: "ADDLload",
4071 auxType: auxSymOff,
4072 argLen: 3,
4073 resultInArg0: true,
4074 clobberFlags: true,
4075 faultOnNilArg1: true,
4076 symEffect: SymRead,
4077 asm: x86.AADDL,
4078 reg: regInfo{
4079 inputs: []inputInfo{
4080 {0, 239},
4081 {1, 65791},
4082 },
4083 outputs: []outputInfo{
4084 {0, 239},
4085 },
4086 },
4087 },
4088 {
4089 name: "SUBLload",
4090 auxType: auxSymOff,
4091 argLen: 3,
4092 resultInArg0: true,
4093 clobberFlags: true,
4094 faultOnNilArg1: true,
4095 symEffect: SymRead,
4096 asm: x86.ASUBL,
4097 reg: regInfo{
4098 inputs: []inputInfo{
4099 {0, 239},
4100 {1, 65791},
4101 },
4102 outputs: []outputInfo{
4103 {0, 239},
4104 },
4105 },
4106 },
4107 {
4108 name: "MULLload",
4109 auxType: auxSymOff,
4110 argLen: 3,
4111 resultInArg0: true,
4112 clobberFlags: true,
4113 faultOnNilArg1: true,
4114 symEffect: SymRead,
4115 asm: x86.AIMULL,
4116 reg: regInfo{
4117 inputs: []inputInfo{
4118 {0, 239},
4119 {1, 65791},
4120 },
4121 outputs: []outputInfo{
4122 {0, 239},
4123 },
4124 },
4125 },
4126 {
4127 name: "ANDLload",
4128 auxType: auxSymOff,
4129 argLen: 3,
4130 resultInArg0: true,
4131 clobberFlags: true,
4132 faultOnNilArg1: true,
4133 symEffect: SymRead,
4134 asm: x86.AANDL,
4135 reg: regInfo{
4136 inputs: []inputInfo{
4137 {0, 239},
4138 {1, 65791},
4139 },
4140 outputs: []outputInfo{
4141 {0, 239},
4142 },
4143 },
4144 },
4145 {
4146 name: "ORLload",
4147 auxType: auxSymOff,
4148 argLen: 3,
4149 resultInArg0: true,
4150 clobberFlags: true,
4151 faultOnNilArg1: true,
4152 symEffect: SymRead,
4153 asm: x86.AORL,
4154 reg: regInfo{
4155 inputs: []inputInfo{
4156 {0, 239},
4157 {1, 65791},
4158 },
4159 outputs: []outputInfo{
4160 {0, 239},
4161 },
4162 },
4163 },
4164 {
4165 name: "XORLload",
4166 auxType: auxSymOff,
4167 argLen: 3,
4168 resultInArg0: true,
4169 clobberFlags: true,
4170 faultOnNilArg1: true,
4171 symEffect: SymRead,
4172 asm: x86.AXORL,
4173 reg: regInfo{
4174 inputs: []inputInfo{
4175 {0, 239},
4176 {1, 65791},
4177 },
4178 outputs: []outputInfo{
4179 {0, 239},
4180 },
4181 },
4182 },
4183 {
4184 name: "ADDLloadidx4",
4185 auxType: auxSymOff,
4186 argLen: 4,
4187 resultInArg0: true,
4188 clobberFlags: true,
4189 faultOnNilArg1: true,
4190 symEffect: SymRead,
4191 asm: x86.AADDL,
4192 reg: regInfo{
4193 inputs: []inputInfo{
4194 {0, 239},
4195 {2, 255},
4196 {1, 65791},
4197 },
4198 outputs: []outputInfo{
4199 {0, 239},
4200 },
4201 },
4202 },
4203 {
4204 name: "SUBLloadidx4",
4205 auxType: auxSymOff,
4206 argLen: 4,
4207 resultInArg0: true,
4208 clobberFlags: true,
4209 faultOnNilArg1: true,
4210 symEffect: SymRead,
4211 asm: x86.ASUBL,
4212 reg: regInfo{
4213 inputs: []inputInfo{
4214 {0, 239},
4215 {2, 255},
4216 {1, 65791},
4217 },
4218 outputs: []outputInfo{
4219 {0, 239},
4220 },
4221 },
4222 },
4223 {
4224 name: "MULLloadidx4",
4225 auxType: auxSymOff,
4226 argLen: 4,
4227 resultInArg0: true,
4228 clobberFlags: true,
4229 faultOnNilArg1: true,
4230 symEffect: SymRead,
4231 asm: x86.AIMULL,
4232 reg: regInfo{
4233 inputs: []inputInfo{
4234 {0, 239},
4235 {2, 255},
4236 {1, 65791},
4237 },
4238 outputs: []outputInfo{
4239 {0, 239},
4240 },
4241 },
4242 },
4243 {
4244 name: "ANDLloadidx4",
4245 auxType: auxSymOff,
4246 argLen: 4,
4247 resultInArg0: true,
4248 clobberFlags: true,
4249 faultOnNilArg1: true,
4250 symEffect: SymRead,
4251 asm: x86.AANDL,
4252 reg: regInfo{
4253 inputs: []inputInfo{
4254 {0, 239},
4255 {2, 255},
4256 {1, 65791},
4257 },
4258 outputs: []outputInfo{
4259 {0, 239},
4260 },
4261 },
4262 },
4263 {
4264 name: "ORLloadidx4",
4265 auxType: auxSymOff,
4266 argLen: 4,
4267 resultInArg0: true,
4268 clobberFlags: true,
4269 faultOnNilArg1: true,
4270 symEffect: SymRead,
4271 asm: x86.AORL,
4272 reg: regInfo{
4273 inputs: []inputInfo{
4274 {0, 239},
4275 {2, 255},
4276 {1, 65791},
4277 },
4278 outputs: []outputInfo{
4279 {0, 239},
4280 },
4281 },
4282 },
4283 {
4284 name: "XORLloadidx4",
4285 auxType: auxSymOff,
4286 argLen: 4,
4287 resultInArg0: true,
4288 clobberFlags: true,
4289 faultOnNilArg1: true,
4290 symEffect: SymRead,
4291 asm: x86.AXORL,
4292 reg: regInfo{
4293 inputs: []inputInfo{
4294 {0, 239},
4295 {2, 255},
4296 {1, 65791},
4297 },
4298 outputs: []outputInfo{
4299 {0, 239},
4300 },
4301 },
4302 },
4303 {
4304 name: "NEGL",
4305 argLen: 1,
4306 resultInArg0: true,
4307 clobberFlags: true,
4308 asm: x86.ANEGL,
4309 reg: regInfo{
4310 inputs: []inputInfo{
4311 {0, 239},
4312 },
4313 outputs: []outputInfo{
4314 {0, 239},
4315 },
4316 },
4317 },
4318 {
4319 name: "NOTL",
4320 argLen: 1,
4321 resultInArg0: true,
4322 clobberFlags: true,
4323 asm: x86.ANOTL,
4324 reg: regInfo{
4325 inputs: []inputInfo{
4326 {0, 239},
4327 },
4328 outputs: []outputInfo{
4329 {0, 239},
4330 },
4331 },
4332 },
4333 {
4334 name: "BSFL",
4335 argLen: 1,
4336 clobberFlags: true,
4337 asm: x86.ABSFL,
4338 reg: regInfo{
4339 inputs: []inputInfo{
4340 {0, 239},
4341 },
4342 outputs: []outputInfo{
4343 {0, 239},
4344 },
4345 },
4346 },
4347 {
4348 name: "BSFW",
4349 argLen: 1,
4350 clobberFlags: true,
4351 asm: x86.ABSFW,
4352 reg: regInfo{
4353 inputs: []inputInfo{
4354 {0, 239},
4355 },
4356 outputs: []outputInfo{
4357 {0, 239},
4358 },
4359 },
4360 },
4361 {
4362 name: "BSRL",
4363 argLen: 1,
4364 clobberFlags: true,
4365 asm: x86.ABSRL,
4366 reg: regInfo{
4367 inputs: []inputInfo{
4368 {0, 239},
4369 },
4370 outputs: []outputInfo{
4371 {0, 239},
4372 },
4373 },
4374 },
4375 {
4376 name: "BSRW",
4377 argLen: 1,
4378 clobberFlags: true,
4379 asm: x86.ABSRW,
4380 reg: regInfo{
4381 inputs: []inputInfo{
4382 {0, 239},
4383 },
4384 outputs: []outputInfo{
4385 {0, 239},
4386 },
4387 },
4388 },
4389 {
4390 name: "BSWAPL",
4391 argLen: 1,
4392 resultInArg0: true,
4393 clobberFlags: true,
4394 asm: x86.ABSWAPL,
4395 reg: regInfo{
4396 inputs: []inputInfo{
4397 {0, 239},
4398 },
4399 outputs: []outputInfo{
4400 {0, 239},
4401 },
4402 },
4403 },
4404 {
4405 name: "SQRTSD",
4406 argLen: 1,
4407 asm: x86.ASQRTSD,
4408 reg: regInfo{
4409 inputs: []inputInfo{
4410 {0, 65280},
4411 },
4412 outputs: []outputInfo{
4413 {0, 65280},
4414 },
4415 },
4416 },
4417 {
4418 name: "SBBLcarrymask",
4419 argLen: 1,
4420 asm: x86.ASBBL,
4421 reg: regInfo{
4422 outputs: []outputInfo{
4423 {0, 239},
4424 },
4425 },
4426 },
4427 {
4428 name: "SETEQ",
4429 argLen: 1,
4430 asm: x86.ASETEQ,
4431 reg: regInfo{
4432 outputs: []outputInfo{
4433 {0, 239},
4434 },
4435 },
4436 },
4437 {
4438 name: "SETNE",
4439 argLen: 1,
4440 asm: x86.ASETNE,
4441 reg: regInfo{
4442 outputs: []outputInfo{
4443 {0, 239},
4444 },
4445 },
4446 },
4447 {
4448 name: "SETL",
4449 argLen: 1,
4450 asm: x86.ASETLT,
4451 reg: regInfo{
4452 outputs: []outputInfo{
4453 {0, 239},
4454 },
4455 },
4456 },
4457 {
4458 name: "SETLE",
4459 argLen: 1,
4460 asm: x86.ASETLE,
4461 reg: regInfo{
4462 outputs: []outputInfo{
4463 {0, 239},
4464 },
4465 },
4466 },
4467 {
4468 name: "SETG",
4469 argLen: 1,
4470 asm: x86.ASETGT,
4471 reg: regInfo{
4472 outputs: []outputInfo{
4473 {0, 239},
4474 },
4475 },
4476 },
4477 {
4478 name: "SETGE",
4479 argLen: 1,
4480 asm: x86.ASETGE,
4481 reg: regInfo{
4482 outputs: []outputInfo{
4483 {0, 239},
4484 },
4485 },
4486 },
4487 {
4488 name: "SETB",
4489 argLen: 1,
4490 asm: x86.ASETCS,
4491 reg: regInfo{
4492 outputs: []outputInfo{
4493 {0, 239},
4494 },
4495 },
4496 },
4497 {
4498 name: "SETBE",
4499 argLen: 1,
4500 asm: x86.ASETLS,
4501 reg: regInfo{
4502 outputs: []outputInfo{
4503 {0, 239},
4504 },
4505 },
4506 },
4507 {
4508 name: "SETA",
4509 argLen: 1,
4510 asm: x86.ASETHI,
4511 reg: regInfo{
4512 outputs: []outputInfo{
4513 {0, 239},
4514 },
4515 },
4516 },
4517 {
4518 name: "SETAE",
4519 argLen: 1,
4520 asm: x86.ASETCC,
4521 reg: regInfo{
4522 outputs: []outputInfo{
4523 {0, 239},
4524 },
4525 },
4526 },
4527 {
4528 name: "SETO",
4529 argLen: 1,
4530 asm: x86.ASETOS,
4531 reg: regInfo{
4532 outputs: []outputInfo{
4533 {0, 239},
4534 },
4535 },
4536 },
4537 {
4538 name: "SETEQF",
4539 argLen: 1,
4540 clobberFlags: true,
4541 asm: x86.ASETEQ,
4542 reg: regInfo{
4543 clobbers: 1,
4544 outputs: []outputInfo{
4545 {0, 238},
4546 },
4547 },
4548 },
4549 {
4550 name: "SETNEF",
4551 argLen: 1,
4552 clobberFlags: true,
4553 asm: x86.ASETNE,
4554 reg: regInfo{
4555 clobbers: 1,
4556 outputs: []outputInfo{
4557 {0, 238},
4558 },
4559 },
4560 },
4561 {
4562 name: "SETORD",
4563 argLen: 1,
4564 asm: x86.ASETPC,
4565 reg: regInfo{
4566 outputs: []outputInfo{
4567 {0, 239},
4568 },
4569 },
4570 },
4571 {
4572 name: "SETNAN",
4573 argLen: 1,
4574 asm: x86.ASETPS,
4575 reg: regInfo{
4576 outputs: []outputInfo{
4577 {0, 239},
4578 },
4579 },
4580 },
4581 {
4582 name: "SETGF",
4583 argLen: 1,
4584 asm: x86.ASETHI,
4585 reg: regInfo{
4586 outputs: []outputInfo{
4587 {0, 239},
4588 },
4589 },
4590 },
4591 {
4592 name: "SETGEF",
4593 argLen: 1,
4594 asm: x86.ASETCC,
4595 reg: regInfo{
4596 outputs: []outputInfo{
4597 {0, 239},
4598 },
4599 },
4600 },
4601 {
4602 name: "MOVBLSX",
4603 argLen: 1,
4604 asm: x86.AMOVBLSX,
4605 reg: regInfo{
4606 inputs: []inputInfo{
4607 {0, 239},
4608 },
4609 outputs: []outputInfo{
4610 {0, 239},
4611 },
4612 },
4613 },
4614 {
4615 name: "MOVBLZX",
4616 argLen: 1,
4617 asm: x86.AMOVBLZX,
4618 reg: regInfo{
4619 inputs: []inputInfo{
4620 {0, 239},
4621 },
4622 outputs: []outputInfo{
4623 {0, 239},
4624 },
4625 },
4626 },
4627 {
4628 name: "MOVWLSX",
4629 argLen: 1,
4630 asm: x86.AMOVWLSX,
4631 reg: regInfo{
4632 inputs: []inputInfo{
4633 {0, 239},
4634 },
4635 outputs: []outputInfo{
4636 {0, 239},
4637 },
4638 },
4639 },
4640 {
4641 name: "MOVWLZX",
4642 argLen: 1,
4643 asm: x86.AMOVWLZX,
4644 reg: regInfo{
4645 inputs: []inputInfo{
4646 {0, 239},
4647 },
4648 outputs: []outputInfo{
4649 {0, 239},
4650 },
4651 },
4652 },
4653 {
4654 name: "MOVLconst",
4655 auxType: auxInt32,
4656 argLen: 0,
4657 rematerializeable: true,
4658 asm: x86.AMOVL,
4659 reg: regInfo{
4660 outputs: []outputInfo{
4661 {0, 239},
4662 },
4663 },
4664 },
4665 {
4666 name: "CVTTSD2SL",
4667 argLen: 1,
4668 usesScratch: true,
4669 asm: x86.ACVTTSD2SL,
4670 reg: regInfo{
4671 inputs: []inputInfo{
4672 {0, 65280},
4673 },
4674 outputs: []outputInfo{
4675 {0, 239},
4676 },
4677 },
4678 },
4679 {
4680 name: "CVTTSS2SL",
4681 argLen: 1,
4682 usesScratch: true,
4683 asm: x86.ACVTTSS2SL,
4684 reg: regInfo{
4685 inputs: []inputInfo{
4686 {0, 65280},
4687 },
4688 outputs: []outputInfo{
4689 {0, 239},
4690 },
4691 },
4692 },
4693 {
4694 name: "CVTSL2SS",
4695 argLen: 1,
4696 usesScratch: true,
4697 asm: x86.ACVTSL2SS,
4698 reg: regInfo{
4699 inputs: []inputInfo{
4700 {0, 239},
4701 },
4702 outputs: []outputInfo{
4703 {0, 65280},
4704 },
4705 },
4706 },
4707 {
4708 name: "CVTSL2SD",
4709 argLen: 1,
4710 usesScratch: true,
4711 asm: x86.ACVTSL2SD,
4712 reg: regInfo{
4713 inputs: []inputInfo{
4714 {0, 239},
4715 },
4716 outputs: []outputInfo{
4717 {0, 65280},
4718 },
4719 },
4720 },
4721 {
4722 name: "CVTSD2SS",
4723 argLen: 1,
4724 usesScratch: true,
4725 asm: x86.ACVTSD2SS,
4726 reg: regInfo{
4727 inputs: []inputInfo{
4728 {0, 65280},
4729 },
4730 outputs: []outputInfo{
4731 {0, 65280},
4732 },
4733 },
4734 },
4735 {
4736 name: "CVTSS2SD",
4737 argLen: 1,
4738 asm: x86.ACVTSS2SD,
4739 reg: regInfo{
4740 inputs: []inputInfo{
4741 {0, 65280},
4742 },
4743 outputs: []outputInfo{
4744 {0, 65280},
4745 },
4746 },
4747 },
4748 {
4749 name: "PXOR",
4750 argLen: 2,
4751 commutative: true,
4752 resultInArg0: true,
4753 asm: x86.APXOR,
4754 reg: regInfo{
4755 inputs: []inputInfo{
4756 {0, 65280},
4757 {1, 65280},
4758 },
4759 outputs: []outputInfo{
4760 {0, 65280},
4761 },
4762 },
4763 },
4764 {
4765 name: "LEAL",
4766 auxType: auxSymOff,
4767 argLen: 1,
4768 rematerializeable: true,
4769 symEffect: SymAddr,
4770 reg: regInfo{
4771 inputs: []inputInfo{
4772 {0, 65791},
4773 },
4774 outputs: []outputInfo{
4775 {0, 239},
4776 },
4777 },
4778 },
4779 {
4780 name: "LEAL1",
4781 auxType: auxSymOff,
4782 argLen: 2,
4783 commutative: true,
4784 symEffect: SymAddr,
4785 reg: regInfo{
4786 inputs: []inputInfo{
4787 {1, 255},
4788 {0, 65791},
4789 },
4790 outputs: []outputInfo{
4791 {0, 239},
4792 },
4793 },
4794 },
4795 {
4796 name: "LEAL2",
4797 auxType: auxSymOff,
4798 argLen: 2,
4799 symEffect: SymAddr,
4800 reg: regInfo{
4801 inputs: []inputInfo{
4802 {1, 255},
4803 {0, 65791},
4804 },
4805 outputs: []outputInfo{
4806 {0, 239},
4807 },
4808 },
4809 },
4810 {
4811 name: "LEAL4",
4812 auxType: auxSymOff,
4813 argLen: 2,
4814 symEffect: SymAddr,
4815 reg: regInfo{
4816 inputs: []inputInfo{
4817 {1, 255},
4818 {0, 65791},
4819 },
4820 outputs: []outputInfo{
4821 {0, 239},
4822 },
4823 },
4824 },
4825 {
4826 name: "LEAL8",
4827 auxType: auxSymOff,
4828 argLen: 2,
4829 symEffect: SymAddr,
4830 reg: regInfo{
4831 inputs: []inputInfo{
4832 {1, 255},
4833 {0, 65791},
4834 },
4835 outputs: []outputInfo{
4836 {0, 239},
4837 },
4838 },
4839 },
4840 {
4841 name: "MOVBload",
4842 auxType: auxSymOff,
4843 argLen: 2,
4844 faultOnNilArg0: true,
4845 symEffect: SymRead,
4846 asm: x86.AMOVBLZX,
4847 reg: regInfo{
4848 inputs: []inputInfo{
4849 {0, 65791},
4850 },
4851 outputs: []outputInfo{
4852 {0, 239},
4853 },
4854 },
4855 },
4856 {
4857 name: "MOVBLSXload",
4858 auxType: auxSymOff,
4859 argLen: 2,
4860 faultOnNilArg0: true,
4861 symEffect: SymRead,
4862 asm: x86.AMOVBLSX,
4863 reg: regInfo{
4864 inputs: []inputInfo{
4865 {0, 65791},
4866 },
4867 outputs: []outputInfo{
4868 {0, 239},
4869 },
4870 },
4871 },
4872 {
4873 name: "MOVWload",
4874 auxType: auxSymOff,
4875 argLen: 2,
4876 faultOnNilArg0: true,
4877 symEffect: SymRead,
4878 asm: x86.AMOVWLZX,
4879 reg: regInfo{
4880 inputs: []inputInfo{
4881 {0, 65791},
4882 },
4883 outputs: []outputInfo{
4884 {0, 239},
4885 },
4886 },
4887 },
4888 {
4889 name: "MOVWLSXload",
4890 auxType: auxSymOff,
4891 argLen: 2,
4892 faultOnNilArg0: true,
4893 symEffect: SymRead,
4894 asm: x86.AMOVWLSX,
4895 reg: regInfo{
4896 inputs: []inputInfo{
4897 {0, 65791},
4898 },
4899 outputs: []outputInfo{
4900 {0, 239},
4901 },
4902 },
4903 },
4904 {
4905 name: "MOVLload",
4906 auxType: auxSymOff,
4907 argLen: 2,
4908 faultOnNilArg0: true,
4909 symEffect: SymRead,
4910 asm: x86.AMOVL,
4911 reg: regInfo{
4912 inputs: []inputInfo{
4913 {0, 65791},
4914 },
4915 outputs: []outputInfo{
4916 {0, 239},
4917 },
4918 },
4919 },
4920 {
4921 name: "MOVBstore",
4922 auxType: auxSymOff,
4923 argLen: 3,
4924 faultOnNilArg0: true,
4925 symEffect: SymWrite,
4926 asm: x86.AMOVB,
4927 reg: regInfo{
4928 inputs: []inputInfo{
4929 {1, 255},
4930 {0, 65791},
4931 },
4932 },
4933 },
4934 {
4935 name: "MOVWstore",
4936 auxType: auxSymOff,
4937 argLen: 3,
4938 faultOnNilArg0: true,
4939 symEffect: SymWrite,
4940 asm: x86.AMOVW,
4941 reg: regInfo{
4942 inputs: []inputInfo{
4943 {1, 255},
4944 {0, 65791},
4945 },
4946 },
4947 },
4948 {
4949 name: "MOVLstore",
4950 auxType: auxSymOff,
4951 argLen: 3,
4952 faultOnNilArg0: true,
4953 symEffect: SymWrite,
4954 asm: x86.AMOVL,
4955 reg: regInfo{
4956 inputs: []inputInfo{
4957 {1, 255},
4958 {0, 65791},
4959 },
4960 },
4961 },
4962 {
4963 name: "ADDLmodify",
4964 auxType: auxSymOff,
4965 argLen: 3,
4966 clobberFlags: true,
4967 faultOnNilArg0: true,
4968 symEffect: SymRead | SymWrite,
4969 asm: x86.AADDL,
4970 reg: regInfo{
4971 inputs: []inputInfo{
4972 {1, 255},
4973 {0, 65791},
4974 },
4975 },
4976 },
4977 {
4978 name: "SUBLmodify",
4979 auxType: auxSymOff,
4980 argLen: 3,
4981 clobberFlags: true,
4982 faultOnNilArg0: true,
4983 symEffect: SymRead | SymWrite,
4984 asm: x86.ASUBL,
4985 reg: regInfo{
4986 inputs: []inputInfo{
4987 {1, 255},
4988 {0, 65791},
4989 },
4990 },
4991 },
4992 {
4993 name: "ANDLmodify",
4994 auxType: auxSymOff,
4995 argLen: 3,
4996 clobberFlags: true,
4997 faultOnNilArg0: true,
4998 symEffect: SymRead | SymWrite,
4999 asm: x86.AANDL,
5000 reg: regInfo{
5001 inputs: []inputInfo{
5002 {1, 255},
5003 {0, 65791},
5004 },
5005 },
5006 },
5007 {
5008 name: "ORLmodify",
5009 auxType: auxSymOff,
5010 argLen: 3,
5011 clobberFlags: true,
5012 faultOnNilArg0: true,
5013 symEffect: SymRead | SymWrite,
5014 asm: x86.AORL,
5015 reg: regInfo{
5016 inputs: []inputInfo{
5017 {1, 255},
5018 {0, 65791},
5019 },
5020 },
5021 },
5022 {
5023 name: "XORLmodify",
5024 auxType: auxSymOff,
5025 argLen: 3,
5026 clobberFlags: true,
5027 faultOnNilArg0: true,
5028 symEffect: SymRead | SymWrite,
5029 asm: x86.AXORL,
5030 reg: regInfo{
5031 inputs: []inputInfo{
5032 {1, 255},
5033 {0, 65791},
5034 },
5035 },
5036 },
5037 {
5038 name: "ADDLmodifyidx4",
5039 auxType: auxSymOff,
5040 argLen: 4,
5041 clobberFlags: true,
5042 faultOnNilArg0: true,
5043 symEffect: SymRead | SymWrite,
5044 asm: x86.AADDL,
5045 reg: regInfo{
5046 inputs: []inputInfo{
5047 {1, 255},
5048 {2, 255},
5049 {0, 65791},
5050 },
5051 },
5052 },
5053 {
5054 name: "SUBLmodifyidx4",
5055 auxType: auxSymOff,
5056 argLen: 4,
5057 clobberFlags: true,
5058 faultOnNilArg0: true,
5059 symEffect: SymRead | SymWrite,
5060 asm: x86.ASUBL,
5061 reg: regInfo{
5062 inputs: []inputInfo{
5063 {1, 255},
5064 {2, 255},
5065 {0, 65791},
5066 },
5067 },
5068 },
5069 {
5070 name: "ANDLmodifyidx4",
5071 auxType: auxSymOff,
5072 argLen: 4,
5073 clobberFlags: true,
5074 faultOnNilArg0: true,
5075 symEffect: SymRead | SymWrite,
5076 asm: x86.AANDL,
5077 reg: regInfo{
5078 inputs: []inputInfo{
5079 {1, 255},
5080 {2, 255},
5081 {0, 65791},
5082 },
5083 },
5084 },
5085 {
5086 name: "ORLmodifyidx4",
5087 auxType: auxSymOff,
5088 argLen: 4,
5089 clobberFlags: true,
5090 faultOnNilArg0: true,
5091 symEffect: SymRead | SymWrite,
5092 asm: x86.AORL,
5093 reg: regInfo{
5094 inputs: []inputInfo{
5095 {1, 255},
5096 {2, 255},
5097 {0, 65791},
5098 },
5099 },
5100 },
5101 {
5102 name: "XORLmodifyidx4",
5103 auxType: auxSymOff,
5104 argLen: 4,
5105 clobberFlags: true,
5106 faultOnNilArg0: true,
5107 symEffect: SymRead | SymWrite,
5108 asm: x86.AXORL,
5109 reg: regInfo{
5110 inputs: []inputInfo{
5111 {1, 255},
5112 {2, 255},
5113 {0, 65791},
5114 },
5115 },
5116 },
5117 {
5118 name: "ADDLconstmodify",
5119 auxType: auxSymValAndOff,
5120 argLen: 2,
5121 clobberFlags: true,
5122 faultOnNilArg0: true,
5123 symEffect: SymRead | SymWrite,
5124 asm: x86.AADDL,
5125 reg: regInfo{
5126 inputs: []inputInfo{
5127 {0, 65791},
5128 },
5129 },
5130 },
5131 {
5132 name: "ANDLconstmodify",
5133 auxType: auxSymValAndOff,
5134 argLen: 2,
5135 clobberFlags: true,
5136 faultOnNilArg0: true,
5137 symEffect: SymRead | SymWrite,
5138 asm: x86.AANDL,
5139 reg: regInfo{
5140 inputs: []inputInfo{
5141 {0, 65791},
5142 },
5143 },
5144 },
5145 {
5146 name: "ORLconstmodify",
5147 auxType: auxSymValAndOff,
5148 argLen: 2,
5149 clobberFlags: true,
5150 faultOnNilArg0: true,
5151 symEffect: SymRead | SymWrite,
5152 asm: x86.AORL,
5153 reg: regInfo{
5154 inputs: []inputInfo{
5155 {0, 65791},
5156 },
5157 },
5158 },
5159 {
5160 name: "XORLconstmodify",
5161 auxType: auxSymValAndOff,
5162 argLen: 2,
5163 clobberFlags: true,
5164 faultOnNilArg0: true,
5165 symEffect: SymRead | SymWrite,
5166 asm: x86.AXORL,
5167 reg: regInfo{
5168 inputs: []inputInfo{
5169 {0, 65791},
5170 },
5171 },
5172 },
5173 {
5174 name: "ADDLconstmodifyidx4",
5175 auxType: auxSymValAndOff,
5176 argLen: 3,
5177 clobberFlags: true,
5178 faultOnNilArg0: true,
5179 symEffect: SymRead | SymWrite,
5180 asm: x86.AADDL,
5181 reg: regInfo{
5182 inputs: []inputInfo{
5183 {1, 255},
5184 {0, 65791},
5185 },
5186 },
5187 },
5188 {
5189 name: "ANDLconstmodifyidx4",
5190 auxType: auxSymValAndOff,
5191 argLen: 3,
5192 clobberFlags: true,
5193 faultOnNilArg0: true,
5194 symEffect: SymRead | SymWrite,
5195 asm: x86.AANDL,
5196 reg: regInfo{
5197 inputs: []inputInfo{
5198 {1, 255},
5199 {0, 65791},
5200 },
5201 },
5202 },
5203 {
5204 name: "ORLconstmodifyidx4",
5205 auxType: auxSymValAndOff,
5206 argLen: 3,
5207 clobberFlags: true,
5208 faultOnNilArg0: true,
5209 symEffect: SymRead | SymWrite,
5210 asm: x86.AORL,
5211 reg: regInfo{
5212 inputs: []inputInfo{
5213 {1, 255},
5214 {0, 65791},
5215 },
5216 },
5217 },
5218 {
5219 name: "XORLconstmodifyidx4",
5220 auxType: auxSymValAndOff,
5221 argLen: 3,
5222 clobberFlags: true,
5223 faultOnNilArg0: true,
5224 symEffect: SymRead | SymWrite,
5225 asm: x86.AXORL,
5226 reg: regInfo{
5227 inputs: []inputInfo{
5228 {1, 255},
5229 {0, 65791},
5230 },
5231 },
5232 },
5233 {
5234 name: "MOVBloadidx1",
5235 auxType: auxSymOff,
5236 argLen: 3,
5237 commutative: true,
5238 symEffect: SymRead,
5239 asm: x86.AMOVBLZX,
5240 reg: regInfo{
5241 inputs: []inputInfo{
5242 {1, 255},
5243 {0, 65791},
5244 },
5245 outputs: []outputInfo{
5246 {0, 239},
5247 },
5248 },
5249 },
5250 {
5251 name: "MOVWloadidx1",
5252 auxType: auxSymOff,
5253 argLen: 3,
5254 commutative: true,
5255 symEffect: SymRead,
5256 asm: x86.AMOVWLZX,
5257 reg: regInfo{
5258 inputs: []inputInfo{
5259 {1, 255},
5260 {0, 65791},
5261 },
5262 outputs: []outputInfo{
5263 {0, 239},
5264 },
5265 },
5266 },
5267 {
5268 name: "MOVWloadidx2",
5269 auxType: auxSymOff,
5270 argLen: 3,
5271 symEffect: SymRead,
5272 asm: x86.AMOVWLZX,
5273 reg: regInfo{
5274 inputs: []inputInfo{
5275 {1, 255},
5276 {0, 65791},
5277 },
5278 outputs: []outputInfo{
5279 {0, 239},
5280 },
5281 },
5282 },
5283 {
5284 name: "MOVLloadidx1",
5285 auxType: auxSymOff,
5286 argLen: 3,
5287 commutative: true,
5288 symEffect: SymRead,
5289 asm: x86.AMOVL,
5290 reg: regInfo{
5291 inputs: []inputInfo{
5292 {1, 255},
5293 {0, 65791},
5294 },
5295 outputs: []outputInfo{
5296 {0, 239},
5297 },
5298 },
5299 },
5300 {
5301 name: "MOVLloadidx4",
5302 auxType: auxSymOff,
5303 argLen: 3,
5304 symEffect: SymRead,
5305 asm: x86.AMOVL,
5306 reg: regInfo{
5307 inputs: []inputInfo{
5308 {1, 255},
5309 {0, 65791},
5310 },
5311 outputs: []outputInfo{
5312 {0, 239},
5313 },
5314 },
5315 },
5316 {
5317 name: "MOVBstoreidx1",
5318 auxType: auxSymOff,
5319 argLen: 4,
5320 commutative: true,
5321 symEffect: SymWrite,
5322 asm: x86.AMOVB,
5323 reg: regInfo{
5324 inputs: []inputInfo{
5325 {1, 255},
5326 {2, 255},
5327 {0, 65791},
5328 },
5329 },
5330 },
5331 {
5332 name: "MOVWstoreidx1",
5333 auxType: auxSymOff,
5334 argLen: 4,
5335 commutative: true,
5336 symEffect: SymWrite,
5337 asm: x86.AMOVW,
5338 reg: regInfo{
5339 inputs: []inputInfo{
5340 {1, 255},
5341 {2, 255},
5342 {0, 65791},
5343 },
5344 },
5345 },
5346 {
5347 name: "MOVWstoreidx2",
5348 auxType: auxSymOff,
5349 argLen: 4,
5350 symEffect: SymWrite,
5351 asm: x86.AMOVW,
5352 reg: regInfo{
5353 inputs: []inputInfo{
5354 {1, 255},
5355 {2, 255},
5356 {0, 65791},
5357 },
5358 },
5359 },
5360 {
5361 name: "MOVLstoreidx1",
5362 auxType: auxSymOff,
5363 argLen: 4,
5364 commutative: true,
5365 symEffect: SymWrite,
5366 asm: x86.AMOVL,
5367 reg: regInfo{
5368 inputs: []inputInfo{
5369 {1, 255},
5370 {2, 255},
5371 {0, 65791},
5372 },
5373 },
5374 },
5375 {
5376 name: "MOVLstoreidx4",
5377 auxType: auxSymOff,
5378 argLen: 4,
5379 symEffect: SymWrite,
5380 asm: x86.AMOVL,
5381 reg: regInfo{
5382 inputs: []inputInfo{
5383 {1, 255},
5384 {2, 255},
5385 {0, 65791},
5386 },
5387 },
5388 },
5389 {
5390 name: "MOVBstoreconst",
5391 auxType: auxSymValAndOff,
5392 argLen: 2,
5393 faultOnNilArg0: true,
5394 symEffect: SymWrite,
5395 asm: x86.AMOVB,
5396 reg: regInfo{
5397 inputs: []inputInfo{
5398 {0, 65791},
5399 },
5400 },
5401 },
5402 {
5403 name: "MOVWstoreconst",
5404 auxType: auxSymValAndOff,
5405 argLen: 2,
5406 faultOnNilArg0: true,
5407 symEffect: SymWrite,
5408 asm: x86.AMOVW,
5409 reg: regInfo{
5410 inputs: []inputInfo{
5411 {0, 65791},
5412 },
5413 },
5414 },
5415 {
5416 name: "MOVLstoreconst",
5417 auxType: auxSymValAndOff,
5418 argLen: 2,
5419 faultOnNilArg0: true,
5420 symEffect: SymWrite,
5421 asm: x86.AMOVL,
5422 reg: regInfo{
5423 inputs: []inputInfo{
5424 {0, 65791},
5425 },
5426 },
5427 },
5428 {
5429 name: "MOVBstoreconstidx1",
5430 auxType: auxSymValAndOff,
5431 argLen: 3,
5432 symEffect: SymWrite,
5433 asm: x86.AMOVB,
5434 reg: regInfo{
5435 inputs: []inputInfo{
5436 {1, 255},
5437 {0, 65791},
5438 },
5439 },
5440 },
5441 {
5442 name: "MOVWstoreconstidx1",
5443 auxType: auxSymValAndOff,
5444 argLen: 3,
5445 symEffect: SymWrite,
5446 asm: x86.AMOVW,
5447 reg: regInfo{
5448 inputs: []inputInfo{
5449 {1, 255},
5450 {0, 65791},
5451 },
5452 },
5453 },
5454 {
5455 name: "MOVWstoreconstidx2",
5456 auxType: auxSymValAndOff,
5457 argLen: 3,
5458 symEffect: SymWrite,
5459 asm: x86.AMOVW,
5460 reg: regInfo{
5461 inputs: []inputInfo{
5462 {1, 255},
5463 {0, 65791},
5464 },
5465 },
5466 },
5467 {
5468 name: "MOVLstoreconstidx1",
5469 auxType: auxSymValAndOff,
5470 argLen: 3,
5471 symEffect: SymWrite,
5472 asm: x86.AMOVL,
5473 reg: regInfo{
5474 inputs: []inputInfo{
5475 {1, 255},
5476 {0, 65791},
5477 },
5478 },
5479 },
5480 {
5481 name: "MOVLstoreconstidx4",
5482 auxType: auxSymValAndOff,
5483 argLen: 3,
5484 symEffect: SymWrite,
5485 asm: x86.AMOVL,
5486 reg: regInfo{
5487 inputs: []inputInfo{
5488 {1, 255},
5489 {0, 65791},
5490 },
5491 },
5492 },
5493 {
5494 name: "DUFFZERO",
5495 auxType: auxInt64,
5496 argLen: 3,
5497 faultOnNilArg0: true,
5498 reg: regInfo{
5499 inputs: []inputInfo{
5500 {0, 128},
5501 {1, 1},
5502 },
5503 clobbers: 130,
5504 },
5505 },
5506 {
5507 name: "REPSTOSL",
5508 argLen: 4,
5509 faultOnNilArg0: true,
5510 reg: regInfo{
5511 inputs: []inputInfo{
5512 {0, 128},
5513 {1, 2},
5514 {2, 1},
5515 },
5516 clobbers: 130,
5517 },
5518 },
5519 {
5520 name: "CALLstatic",
5521 auxType: auxSymOff,
5522 argLen: 1,
5523 clobberFlags: true,
5524 call: true,
5525 symEffect: SymNone,
5526 reg: regInfo{
5527 clobbers: 65519,
5528 },
5529 },
5530 {
5531 name: "CALLclosure",
5532 auxType: auxInt64,
5533 argLen: 3,
5534 clobberFlags: true,
5535 call: true,
5536 reg: regInfo{
5537 inputs: []inputInfo{
5538 {1, 4},
5539 {0, 255},
5540 },
5541 clobbers: 65519,
5542 },
5543 },
5544 {
5545 name: "CALLinter",
5546 auxType: auxInt64,
5547 argLen: 2,
5548 clobberFlags: true,
5549 call: true,
5550 reg: regInfo{
5551 inputs: []inputInfo{
5552 {0, 239},
5553 },
5554 clobbers: 65519,
5555 },
5556 },
5557 {
5558 name: "DUFFCOPY",
5559 auxType: auxInt64,
5560 argLen: 3,
5561 clobberFlags: true,
5562 faultOnNilArg0: true,
5563 faultOnNilArg1: true,
5564 reg: regInfo{
5565 inputs: []inputInfo{
5566 {0, 128},
5567 {1, 64},
5568 },
5569 clobbers: 194,
5570 },
5571 },
5572 {
5573 name: "REPMOVSL",
5574 argLen: 4,
5575 faultOnNilArg0: true,
5576 faultOnNilArg1: true,
5577 reg: regInfo{
5578 inputs: []inputInfo{
5579 {0, 128},
5580 {1, 64},
5581 {2, 2},
5582 },
5583 clobbers: 194,
5584 },
5585 },
5586 {
5587 name: "InvertFlags",
5588 argLen: 1,
5589 reg: regInfo{},
5590 },
5591 {
5592 name: "LoweredGetG",
5593 argLen: 1,
5594 reg: regInfo{
5595 outputs: []outputInfo{
5596 {0, 239},
5597 },
5598 },
5599 },
5600 {
5601 name: "LoweredGetClosurePtr",
5602 argLen: 0,
5603 zeroWidth: true,
5604 reg: regInfo{
5605 outputs: []outputInfo{
5606 {0, 4},
5607 },
5608 },
5609 },
5610 {
5611 name: "LoweredGetCallerPC",
5612 argLen: 0,
5613 rematerializeable: true,
5614 reg: regInfo{
5615 outputs: []outputInfo{
5616 {0, 239},
5617 },
5618 },
5619 },
5620 {
5621 name: "LoweredGetCallerSP",
5622 argLen: 0,
5623 rematerializeable: true,
5624 reg: regInfo{
5625 outputs: []outputInfo{
5626 {0, 239},
5627 },
5628 },
5629 },
5630 {
5631 name: "LoweredNilCheck",
5632 argLen: 2,
5633 clobberFlags: true,
5634 nilCheck: true,
5635 faultOnNilArg0: true,
5636 reg: regInfo{
5637 inputs: []inputInfo{
5638 {0, 255},
5639 },
5640 },
5641 },
5642 {
5643 name: "LoweredWB",
5644 auxType: auxSym,
5645 argLen: 3,
5646 clobberFlags: true,
5647 symEffect: SymNone,
5648 reg: regInfo{
5649 inputs: []inputInfo{
5650 {0, 128},
5651 {1, 1},
5652 },
5653 clobbers: 65280,
5654 },
5655 },
5656 {
5657 name: "LoweredPanicBoundsA",
5658 auxType: auxInt64,
5659 argLen: 3,
5660 reg: regInfo{
5661 inputs: []inputInfo{
5662 {0, 4},
5663 {1, 8},
5664 },
5665 },
5666 },
5667 {
5668 name: "LoweredPanicBoundsB",
5669 auxType: auxInt64,
5670 argLen: 3,
5671 reg: regInfo{
5672 inputs: []inputInfo{
5673 {0, 2},
5674 {1, 4},
5675 },
5676 },
5677 },
5678 {
5679 name: "LoweredPanicBoundsC",
5680 auxType: auxInt64,
5681 argLen: 3,
5682 reg: regInfo{
5683 inputs: []inputInfo{
5684 {0, 1},
5685 {1, 2},
5686 },
5687 },
5688 },
5689 {
5690 name: "LoweredPanicExtendA",
5691 auxType: auxInt64,
5692 argLen: 4,
5693 reg: regInfo{
5694 inputs: []inputInfo{
5695 {0, 64},
5696 {1, 4},
5697 {2, 8},
5698 },
5699 },
5700 },
5701 {
5702 name: "LoweredPanicExtendB",
5703 auxType: auxInt64,
5704 argLen: 4,
5705 reg: regInfo{
5706 inputs: []inputInfo{
5707 {0, 64},
5708 {1, 2},
5709 {2, 4},
5710 },
5711 },
5712 },
5713 {
5714 name: "LoweredPanicExtendC",
5715 auxType: auxInt64,
5716 argLen: 4,
5717 reg: regInfo{
5718 inputs: []inputInfo{
5719 {0, 64},
5720 {1, 1},
5721 {2, 2},
5722 },
5723 },
5724 },
5725 {
5726 name: "FlagEQ",
5727 argLen: 0,
5728 reg: regInfo{},
5729 },
5730 {
5731 name: "FlagLT_ULT",
5732 argLen: 0,
5733 reg: regInfo{},
5734 },
5735 {
5736 name: "FlagLT_UGT",
5737 argLen: 0,
5738 reg: regInfo{},
5739 },
5740 {
5741 name: "FlagGT_UGT",
5742 argLen: 0,
5743 reg: regInfo{},
5744 },
5745 {
5746 name: "FlagGT_ULT",
5747 argLen: 0,
5748 reg: regInfo{},
5749 },
5750 {
5751 name: "FCHS",
5752 argLen: 1,
5753 reg: regInfo{
5754 inputs: []inputInfo{
5755 {0, 65280},
5756 },
5757 outputs: []outputInfo{
5758 {0, 65280},
5759 },
5760 },
5761 },
5762 {
5763 name: "MOVSSconst1",
5764 auxType: auxFloat32,
5765 argLen: 0,
5766 reg: regInfo{
5767 outputs: []outputInfo{
5768 {0, 239},
5769 },
5770 },
5771 },
5772 {
5773 name: "MOVSDconst1",
5774 auxType: auxFloat64,
5775 argLen: 0,
5776 reg: regInfo{
5777 outputs: []outputInfo{
5778 {0, 239},
5779 },
5780 },
5781 },
5782 {
5783 name: "MOVSSconst2",
5784 argLen: 1,
5785 asm: x86.AMOVSS,
5786 reg: regInfo{
5787 inputs: []inputInfo{
5788 {0, 239},
5789 },
5790 outputs: []outputInfo{
5791 {0, 65280},
5792 },
5793 },
5794 },
5795 {
5796 name: "MOVSDconst2",
5797 argLen: 1,
5798 asm: x86.AMOVSD,
5799 reg: regInfo{
5800 inputs: []inputInfo{
5801 {0, 239},
5802 },
5803 outputs: []outputInfo{
5804 {0, 65280},
5805 },
5806 },
5807 },
5808
5809 {
5810 name: "ADDSS",
5811 argLen: 2,
5812 commutative: true,
5813 resultInArg0: true,
5814 asm: x86.AADDSS,
5815 reg: regInfo{
5816 inputs: []inputInfo{
5817 {0, 4294901760},
5818 {1, 4294901760},
5819 },
5820 outputs: []outputInfo{
5821 {0, 4294901760},
5822 },
5823 },
5824 },
5825 {
5826 name: "ADDSD",
5827 argLen: 2,
5828 commutative: true,
5829 resultInArg0: true,
5830 asm: x86.AADDSD,
5831 reg: regInfo{
5832 inputs: []inputInfo{
5833 {0, 4294901760},
5834 {1, 4294901760},
5835 },
5836 outputs: []outputInfo{
5837 {0, 4294901760},
5838 },
5839 },
5840 },
5841 {
5842 name: "SUBSS",
5843 argLen: 2,
5844 resultInArg0: true,
5845 asm: x86.ASUBSS,
5846 reg: regInfo{
5847 inputs: []inputInfo{
5848 {0, 4294901760},
5849 {1, 4294901760},
5850 },
5851 outputs: []outputInfo{
5852 {0, 4294901760},
5853 },
5854 },
5855 },
5856 {
5857 name: "SUBSD",
5858 argLen: 2,
5859 resultInArg0: true,
5860 asm: x86.ASUBSD,
5861 reg: regInfo{
5862 inputs: []inputInfo{
5863 {0, 4294901760},
5864 {1, 4294901760},
5865 },
5866 outputs: []outputInfo{
5867 {0, 4294901760},
5868 },
5869 },
5870 },
5871 {
5872 name: "MULSS",
5873 argLen: 2,
5874 commutative: true,
5875 resultInArg0: true,
5876 asm: x86.AMULSS,
5877 reg: regInfo{
5878 inputs: []inputInfo{
5879 {0, 4294901760},
5880 {1, 4294901760},
5881 },
5882 outputs: []outputInfo{
5883 {0, 4294901760},
5884 },
5885 },
5886 },
5887 {
5888 name: "MULSD",
5889 argLen: 2,
5890 commutative: true,
5891 resultInArg0: true,
5892 asm: x86.AMULSD,
5893 reg: regInfo{
5894 inputs: []inputInfo{
5895 {0, 4294901760},
5896 {1, 4294901760},
5897 },
5898 outputs: []outputInfo{
5899 {0, 4294901760},
5900 },
5901 },
5902 },
5903 {
5904 name: "DIVSS",
5905 argLen: 2,
5906 resultInArg0: true,
5907 asm: x86.ADIVSS,
5908 reg: regInfo{
5909 inputs: []inputInfo{
5910 {0, 4294901760},
5911 {1, 4294901760},
5912 },
5913 outputs: []outputInfo{
5914 {0, 4294901760},
5915 },
5916 },
5917 },
5918 {
5919 name: "DIVSD",
5920 argLen: 2,
5921 resultInArg0: true,
5922 asm: x86.ADIVSD,
5923 reg: regInfo{
5924 inputs: []inputInfo{
5925 {0, 4294901760},
5926 {1, 4294901760},
5927 },
5928 outputs: []outputInfo{
5929 {0, 4294901760},
5930 },
5931 },
5932 },
5933 {
5934 name: "MOVSSload",
5935 auxType: auxSymOff,
5936 argLen: 2,
5937 faultOnNilArg0: true,
5938 symEffect: SymRead,
5939 asm: x86.AMOVSS,
5940 reg: regInfo{
5941 inputs: []inputInfo{
5942 {0, 4295032831},
5943 },
5944 outputs: []outputInfo{
5945 {0, 4294901760},
5946 },
5947 },
5948 },
5949 {
5950 name: "MOVSDload",
5951 auxType: auxSymOff,
5952 argLen: 2,
5953 faultOnNilArg0: true,
5954 symEffect: SymRead,
5955 asm: x86.AMOVSD,
5956 reg: regInfo{
5957 inputs: []inputInfo{
5958 {0, 4295032831},
5959 },
5960 outputs: []outputInfo{
5961 {0, 4294901760},
5962 },
5963 },
5964 },
5965 {
5966 name: "MOVSSconst",
5967 auxType: auxFloat32,
5968 argLen: 0,
5969 rematerializeable: true,
5970 asm: x86.AMOVSS,
5971 reg: regInfo{
5972 outputs: []outputInfo{
5973 {0, 4294901760},
5974 },
5975 },
5976 },
5977 {
5978 name: "MOVSDconst",
5979 auxType: auxFloat64,
5980 argLen: 0,
5981 rematerializeable: true,
5982 asm: x86.AMOVSD,
5983 reg: regInfo{
5984 outputs: []outputInfo{
5985 {0, 4294901760},
5986 },
5987 },
5988 },
5989 {
5990 name: "MOVSSloadidx1",
5991 auxType: auxSymOff,
5992 argLen: 3,
5993 symEffect: SymRead,
5994 asm: x86.AMOVSS,
5995 scale: 1,
5996 reg: regInfo{
5997 inputs: []inputInfo{
5998 {1, 65535},
5999 {0, 4295032831},
6000 },
6001 outputs: []outputInfo{
6002 {0, 4294901760},
6003 },
6004 },
6005 },
6006 {
6007 name: "MOVSSloadidx4",
6008 auxType: auxSymOff,
6009 argLen: 3,
6010 symEffect: SymRead,
6011 asm: x86.AMOVSS,
6012 scale: 4,
6013 reg: regInfo{
6014 inputs: []inputInfo{
6015 {1, 65535},
6016 {0, 4295032831},
6017 },
6018 outputs: []outputInfo{
6019 {0, 4294901760},
6020 },
6021 },
6022 },
6023 {
6024 name: "MOVSDloadidx1",
6025 auxType: auxSymOff,
6026 argLen: 3,
6027 symEffect: SymRead,
6028 asm: x86.AMOVSD,
6029 scale: 1,
6030 reg: regInfo{
6031 inputs: []inputInfo{
6032 {1, 65535},
6033 {0, 4295032831},
6034 },
6035 outputs: []outputInfo{
6036 {0, 4294901760},
6037 },
6038 },
6039 },
6040 {
6041 name: "MOVSDloadidx8",
6042 auxType: auxSymOff,
6043 argLen: 3,
6044 symEffect: SymRead,
6045 asm: x86.AMOVSD,
6046 scale: 8,
6047 reg: regInfo{
6048 inputs: []inputInfo{
6049 {1, 65535},
6050 {0, 4295032831},
6051 },
6052 outputs: []outputInfo{
6053 {0, 4294901760},
6054 },
6055 },
6056 },
6057 {
6058 name: "MOVSSstore",
6059 auxType: auxSymOff,
6060 argLen: 3,
6061 faultOnNilArg0: true,
6062 symEffect: SymWrite,
6063 asm: x86.AMOVSS,
6064 reg: regInfo{
6065 inputs: []inputInfo{
6066 {1, 4294901760},
6067 {0, 4295032831},
6068 },
6069 },
6070 },
6071 {
6072 name: "MOVSDstore",
6073 auxType: auxSymOff,
6074 argLen: 3,
6075 faultOnNilArg0: true,
6076 symEffect: SymWrite,
6077 asm: x86.AMOVSD,
6078 reg: regInfo{
6079 inputs: []inputInfo{
6080 {1, 4294901760},
6081 {0, 4295032831},
6082 },
6083 },
6084 },
6085 {
6086 name: "MOVSSstoreidx1",
6087 auxType: auxSymOff,
6088 argLen: 4,
6089 symEffect: SymWrite,
6090 asm: x86.AMOVSS,
6091 scale: 1,
6092 reg: regInfo{
6093 inputs: []inputInfo{
6094 {1, 65535},
6095 {2, 4294901760},
6096 {0, 4295032831},
6097 },
6098 },
6099 },
6100 {
6101 name: "MOVSSstoreidx4",
6102 auxType: auxSymOff,
6103 argLen: 4,
6104 symEffect: SymWrite,
6105 asm: x86.AMOVSS,
6106 scale: 4,
6107 reg: regInfo{
6108 inputs: []inputInfo{
6109 {1, 65535},
6110 {2, 4294901760},
6111 {0, 4295032831},
6112 },
6113 },
6114 },
6115 {
6116 name: "MOVSDstoreidx1",
6117 auxType: auxSymOff,
6118 argLen: 4,
6119 symEffect: SymWrite,
6120 asm: x86.AMOVSD,
6121 scale: 1,
6122 reg: regInfo{
6123 inputs: []inputInfo{
6124 {1, 65535},
6125 {2, 4294901760},
6126 {0, 4295032831},
6127 },
6128 },
6129 },
6130 {
6131 name: "MOVSDstoreidx8",
6132 auxType: auxSymOff,
6133 argLen: 4,
6134 symEffect: SymWrite,
6135 asm: x86.AMOVSD,
6136 scale: 8,
6137 reg: regInfo{
6138 inputs: []inputInfo{
6139 {1, 65535},
6140 {2, 4294901760},
6141 {0, 4295032831},
6142 },
6143 },
6144 },
6145 {
6146 name: "ADDSSload",
6147 auxType: auxSymOff,
6148 argLen: 3,
6149 resultInArg0: true,
6150 faultOnNilArg1: true,
6151 symEffect: SymRead,
6152 asm: x86.AADDSS,
6153 reg: regInfo{
6154 inputs: []inputInfo{
6155 {0, 4294901760},
6156 {1, 4295032831},
6157 },
6158 outputs: []outputInfo{
6159 {0, 4294901760},
6160 },
6161 },
6162 },
6163 {
6164 name: "ADDSDload",
6165 auxType: auxSymOff,
6166 argLen: 3,
6167 resultInArg0: true,
6168 faultOnNilArg1: true,
6169 symEffect: SymRead,
6170 asm: x86.AADDSD,
6171 reg: regInfo{
6172 inputs: []inputInfo{
6173 {0, 4294901760},
6174 {1, 4295032831},
6175 },
6176 outputs: []outputInfo{
6177 {0, 4294901760},
6178 },
6179 },
6180 },
6181 {
6182 name: "SUBSSload",
6183 auxType: auxSymOff,
6184 argLen: 3,
6185 resultInArg0: true,
6186 faultOnNilArg1: true,
6187 symEffect: SymRead,
6188 asm: x86.ASUBSS,
6189 reg: regInfo{
6190 inputs: []inputInfo{
6191 {0, 4294901760},
6192 {1, 4295032831},
6193 },
6194 outputs: []outputInfo{
6195 {0, 4294901760},
6196 },
6197 },
6198 },
6199 {
6200 name: "SUBSDload",
6201 auxType: auxSymOff,
6202 argLen: 3,
6203 resultInArg0: true,
6204 faultOnNilArg1: true,
6205 symEffect: SymRead,
6206 asm: x86.ASUBSD,
6207 reg: regInfo{
6208 inputs: []inputInfo{
6209 {0, 4294901760},
6210 {1, 4295032831},
6211 },
6212 outputs: []outputInfo{
6213 {0, 4294901760},
6214 },
6215 },
6216 },
6217 {
6218 name: "MULSSload",
6219 auxType: auxSymOff,
6220 argLen: 3,
6221 resultInArg0: true,
6222 faultOnNilArg1: true,
6223 symEffect: SymRead,
6224 asm: x86.AMULSS,
6225 reg: regInfo{
6226 inputs: []inputInfo{
6227 {0, 4294901760},
6228 {1, 4295032831},
6229 },
6230 outputs: []outputInfo{
6231 {0, 4294901760},
6232 },
6233 },
6234 },
6235 {
6236 name: "MULSDload",
6237 auxType: auxSymOff,
6238 argLen: 3,
6239 resultInArg0: true,
6240 faultOnNilArg1: true,
6241 symEffect: SymRead,
6242 asm: x86.AMULSD,
6243 reg: regInfo{
6244 inputs: []inputInfo{
6245 {0, 4294901760},
6246 {1, 4295032831},
6247 },
6248 outputs: []outputInfo{
6249 {0, 4294901760},
6250 },
6251 },
6252 },
6253 {
6254 name: "DIVSSload",
6255 auxType: auxSymOff,
6256 argLen: 3,
6257 resultInArg0: true,
6258 faultOnNilArg1: true,
6259 symEffect: SymRead,
6260 asm: x86.ADIVSS,
6261 reg: regInfo{
6262 inputs: []inputInfo{
6263 {0, 4294901760},
6264 {1, 4295032831},
6265 },
6266 outputs: []outputInfo{
6267 {0, 4294901760},
6268 },
6269 },
6270 },
6271 {
6272 name: "DIVSDload",
6273 auxType: auxSymOff,
6274 argLen: 3,
6275 resultInArg0: true,
6276 faultOnNilArg1: true,
6277 symEffect: SymRead,
6278 asm: x86.ADIVSD,
6279 reg: regInfo{
6280 inputs: []inputInfo{
6281 {0, 4294901760},
6282 {1, 4295032831},
6283 },
6284 outputs: []outputInfo{
6285 {0, 4294901760},
6286 },
6287 },
6288 },
6289 {
6290 name: "ADDQ",
6291 argLen: 2,
6292 commutative: true,
6293 clobberFlags: true,
6294 asm: x86.AADDQ,
6295 reg: regInfo{
6296 inputs: []inputInfo{
6297 {1, 65519},
6298 {0, 65535},
6299 },
6300 outputs: []outputInfo{
6301 {0, 65519},
6302 },
6303 },
6304 },
6305 {
6306 name: "ADDL",
6307 argLen: 2,
6308 commutative: true,
6309 clobberFlags: true,
6310 asm: x86.AADDL,
6311 reg: regInfo{
6312 inputs: []inputInfo{
6313 {1, 65519},
6314 {0, 65535},
6315 },
6316 outputs: []outputInfo{
6317 {0, 65519},
6318 },
6319 },
6320 },
6321 {
6322 name: "ADDQconst",
6323 auxType: auxInt32,
6324 argLen: 1,
6325 clobberFlags: true,
6326 asm: x86.AADDQ,
6327 reg: regInfo{
6328 inputs: []inputInfo{
6329 {0, 65535},
6330 },
6331 outputs: []outputInfo{
6332 {0, 65519},
6333 },
6334 },
6335 },
6336 {
6337 name: "ADDLconst",
6338 auxType: auxInt32,
6339 argLen: 1,
6340 clobberFlags: true,
6341 asm: x86.AADDL,
6342 reg: regInfo{
6343 inputs: []inputInfo{
6344 {0, 65535},
6345 },
6346 outputs: []outputInfo{
6347 {0, 65519},
6348 },
6349 },
6350 },
6351 {
6352 name: "ADDQconstmodify",
6353 auxType: auxSymValAndOff,
6354 argLen: 2,
6355 clobberFlags: true,
6356 faultOnNilArg0: true,
6357 symEffect: SymRead | SymWrite,
6358 asm: x86.AADDQ,
6359 reg: regInfo{
6360 inputs: []inputInfo{
6361 {0, 4295032831},
6362 },
6363 },
6364 },
6365 {
6366 name: "ADDLconstmodify",
6367 auxType: auxSymValAndOff,
6368 argLen: 2,
6369 clobberFlags: true,
6370 faultOnNilArg0: true,
6371 symEffect: SymRead | SymWrite,
6372 asm: x86.AADDL,
6373 reg: regInfo{
6374 inputs: []inputInfo{
6375 {0, 4295032831},
6376 },
6377 },
6378 },
6379 {
6380 name: "SUBQ",
6381 argLen: 2,
6382 resultInArg0: true,
6383 clobberFlags: true,
6384 asm: x86.ASUBQ,
6385 reg: regInfo{
6386 inputs: []inputInfo{
6387 {0, 65519},
6388 {1, 65519},
6389 },
6390 outputs: []outputInfo{
6391 {0, 65519},
6392 },
6393 },
6394 },
6395 {
6396 name: "SUBL",
6397 argLen: 2,
6398 resultInArg0: true,
6399 clobberFlags: true,
6400 asm: x86.ASUBL,
6401 reg: regInfo{
6402 inputs: []inputInfo{
6403 {0, 65519},
6404 {1, 65519},
6405 },
6406 outputs: []outputInfo{
6407 {0, 65519},
6408 },
6409 },
6410 },
6411 {
6412 name: "SUBQconst",
6413 auxType: auxInt32,
6414 argLen: 1,
6415 resultInArg0: true,
6416 clobberFlags: true,
6417 asm: x86.ASUBQ,
6418 reg: regInfo{
6419 inputs: []inputInfo{
6420 {0, 65519},
6421 },
6422 outputs: []outputInfo{
6423 {0, 65519},
6424 },
6425 },
6426 },
6427 {
6428 name: "SUBLconst",
6429 auxType: auxInt32,
6430 argLen: 1,
6431 resultInArg0: true,
6432 clobberFlags: true,
6433 asm: x86.ASUBL,
6434 reg: regInfo{
6435 inputs: []inputInfo{
6436 {0, 65519},
6437 },
6438 outputs: []outputInfo{
6439 {0, 65519},
6440 },
6441 },
6442 },
6443 {
6444 name: "MULQ",
6445 argLen: 2,
6446 commutative: true,
6447 resultInArg0: true,
6448 clobberFlags: true,
6449 asm: x86.AIMULQ,
6450 reg: regInfo{
6451 inputs: []inputInfo{
6452 {0, 65519},
6453 {1, 65519},
6454 },
6455 outputs: []outputInfo{
6456 {0, 65519},
6457 },
6458 },
6459 },
6460 {
6461 name: "MULL",
6462 argLen: 2,
6463 commutative: true,
6464 resultInArg0: true,
6465 clobberFlags: true,
6466 asm: x86.AIMULL,
6467 reg: regInfo{
6468 inputs: []inputInfo{
6469 {0, 65519},
6470 {1, 65519},
6471 },
6472 outputs: []outputInfo{
6473 {0, 65519},
6474 },
6475 },
6476 },
6477 {
6478 name: "MULQconst",
6479 auxType: auxInt32,
6480 argLen: 1,
6481 clobberFlags: true,
6482 asm: x86.AIMUL3Q,
6483 reg: regInfo{
6484 inputs: []inputInfo{
6485 {0, 65519},
6486 },
6487 outputs: []outputInfo{
6488 {0, 65519},
6489 },
6490 },
6491 },
6492 {
6493 name: "MULLconst",
6494 auxType: auxInt32,
6495 argLen: 1,
6496 clobberFlags: true,
6497 asm: x86.AIMUL3L,
6498 reg: regInfo{
6499 inputs: []inputInfo{
6500 {0, 65519},
6501 },
6502 outputs: []outputInfo{
6503 {0, 65519},
6504 },
6505 },
6506 },
6507 {
6508 name: "MULLU",
6509 argLen: 2,
6510 commutative: true,
6511 clobberFlags: true,
6512 asm: x86.AMULL,
6513 reg: regInfo{
6514 inputs: []inputInfo{
6515 {0, 1},
6516 {1, 65535},
6517 },
6518 clobbers: 4,
6519 outputs: []outputInfo{
6520 {1, 0},
6521 {0, 1},
6522 },
6523 },
6524 },
6525 {
6526 name: "MULQU",
6527 argLen: 2,
6528 commutative: true,
6529 clobberFlags: true,
6530 asm: x86.AMULQ,
6531 reg: regInfo{
6532 inputs: []inputInfo{
6533 {0, 1},
6534 {1, 65535},
6535 },
6536 clobbers: 4,
6537 outputs: []outputInfo{
6538 {1, 0},
6539 {0, 1},
6540 },
6541 },
6542 },
6543 {
6544 name: "HMULQ",
6545 argLen: 2,
6546 commutative: true,
6547 clobberFlags: true,
6548 asm: x86.AIMULQ,
6549 reg: regInfo{
6550 inputs: []inputInfo{
6551 {0, 1},
6552 {1, 65535},
6553 },
6554 clobbers: 1,
6555 outputs: []outputInfo{
6556 {0, 4},
6557 },
6558 },
6559 },
6560 {
6561 name: "HMULL",
6562 argLen: 2,
6563 commutative: true,
6564 clobberFlags: true,
6565 asm: x86.AIMULL,
6566 reg: regInfo{
6567 inputs: []inputInfo{
6568 {0, 1},
6569 {1, 65535},
6570 },
6571 clobbers: 1,
6572 outputs: []outputInfo{
6573 {0, 4},
6574 },
6575 },
6576 },
6577 {
6578 name: "HMULQU",
6579 argLen: 2,
6580 commutative: true,
6581 clobberFlags: true,
6582 asm: x86.AMULQ,
6583 reg: regInfo{
6584 inputs: []inputInfo{
6585 {0, 1},
6586 {1, 65535},
6587 },
6588 clobbers: 1,
6589 outputs: []outputInfo{
6590 {0, 4},
6591 },
6592 },
6593 },
6594 {
6595 name: "HMULLU",
6596 argLen: 2,
6597 commutative: true,
6598 clobberFlags: true,
6599 asm: x86.AMULL,
6600 reg: regInfo{
6601 inputs: []inputInfo{
6602 {0, 1},
6603 {1, 65535},
6604 },
6605 clobbers: 1,
6606 outputs: []outputInfo{
6607 {0, 4},
6608 },
6609 },
6610 },
6611 {
6612 name: "AVGQU",
6613 argLen: 2,
6614 commutative: true,
6615 resultInArg0: true,
6616 clobberFlags: true,
6617 reg: regInfo{
6618 inputs: []inputInfo{
6619 {0, 65519},
6620 {1, 65519},
6621 },
6622 outputs: []outputInfo{
6623 {0, 65519},
6624 },
6625 },
6626 },
6627 {
6628 name: "DIVQ",
6629 auxType: auxBool,
6630 argLen: 2,
6631 clobberFlags: true,
6632 asm: x86.AIDIVQ,
6633 reg: regInfo{
6634 inputs: []inputInfo{
6635 {0, 1},
6636 {1, 65531},
6637 },
6638 outputs: []outputInfo{
6639 {0, 1},
6640 {1, 4},
6641 },
6642 },
6643 },
6644 {
6645 name: "DIVL",
6646 auxType: auxBool,
6647 argLen: 2,
6648 clobberFlags: true,
6649 asm: x86.AIDIVL,
6650 reg: regInfo{
6651 inputs: []inputInfo{
6652 {0, 1},
6653 {1, 65531},
6654 },
6655 outputs: []outputInfo{
6656 {0, 1},
6657 {1, 4},
6658 },
6659 },
6660 },
6661 {
6662 name: "DIVW",
6663 auxType: auxBool,
6664 argLen: 2,
6665 clobberFlags: true,
6666 asm: x86.AIDIVW,
6667 reg: regInfo{
6668 inputs: []inputInfo{
6669 {0, 1},
6670 {1, 65531},
6671 },
6672 outputs: []outputInfo{
6673 {0, 1},
6674 {1, 4},
6675 },
6676 },
6677 },
6678 {
6679 name: "DIVQU",
6680 argLen: 2,
6681 clobberFlags: true,
6682 asm: x86.ADIVQ,
6683 reg: regInfo{
6684 inputs: []inputInfo{
6685 {0, 1},
6686 {1, 65531},
6687 },
6688 outputs: []outputInfo{
6689 {0, 1},
6690 {1, 4},
6691 },
6692 },
6693 },
6694 {
6695 name: "DIVLU",
6696 argLen: 2,
6697 clobberFlags: true,
6698 asm: x86.ADIVL,
6699 reg: regInfo{
6700 inputs: []inputInfo{
6701 {0, 1},
6702 {1, 65531},
6703 },
6704 outputs: []outputInfo{
6705 {0, 1},
6706 {1, 4},
6707 },
6708 },
6709 },
6710 {
6711 name: "DIVWU",
6712 argLen: 2,
6713 clobberFlags: true,
6714 asm: x86.ADIVW,
6715 reg: regInfo{
6716 inputs: []inputInfo{
6717 {0, 1},
6718 {1, 65531},
6719 },
6720 outputs: []outputInfo{
6721 {0, 1},
6722 {1, 4},
6723 },
6724 },
6725 },
6726 {
6727 name: "NEGLflags",
6728 argLen: 1,
6729 resultInArg0: true,
6730 asm: x86.ANEGL,
6731 reg: regInfo{
6732 inputs: []inputInfo{
6733 {0, 65519},
6734 },
6735 outputs: []outputInfo{
6736 {1, 0},
6737 {0, 65519},
6738 },
6739 },
6740 },
6741 {
6742 name: "ADDQcarry",
6743 argLen: 2,
6744 commutative: true,
6745 resultInArg0: true,
6746 asm: x86.AADDQ,
6747 reg: regInfo{
6748 inputs: []inputInfo{
6749 {0, 65519},
6750 {1, 65519},
6751 },
6752 outputs: []outputInfo{
6753 {1, 0},
6754 {0, 65519},
6755 },
6756 },
6757 },
6758 {
6759 name: "ADCQ",
6760 argLen: 3,
6761 commutative: true,
6762 resultInArg0: true,
6763 asm: x86.AADCQ,
6764 reg: regInfo{
6765 inputs: []inputInfo{
6766 {0, 65519},
6767 {1, 65519},
6768 },
6769 outputs: []outputInfo{
6770 {1, 0},
6771 {0, 65519},
6772 },
6773 },
6774 },
6775 {
6776 name: "ADDQconstcarry",
6777 auxType: auxInt32,
6778 argLen: 1,
6779 resultInArg0: true,
6780 asm: x86.AADDQ,
6781 reg: regInfo{
6782 inputs: []inputInfo{
6783 {0, 65519},
6784 },
6785 outputs: []outputInfo{
6786 {1, 0},
6787 {0, 65519},
6788 },
6789 },
6790 },
6791 {
6792 name: "ADCQconst",
6793 auxType: auxInt32,
6794 argLen: 2,
6795 resultInArg0: true,
6796 asm: x86.AADCQ,
6797 reg: regInfo{
6798 inputs: []inputInfo{
6799 {0, 65519},
6800 },
6801 outputs: []outputInfo{
6802 {1, 0},
6803 {0, 65519},
6804 },
6805 },
6806 },
6807 {
6808 name: "SUBQborrow",
6809 argLen: 2,
6810 resultInArg0: true,
6811 asm: x86.ASUBQ,
6812 reg: regInfo{
6813 inputs: []inputInfo{
6814 {0, 65519},
6815 {1, 65519},
6816 },
6817 outputs: []outputInfo{
6818 {1, 0},
6819 {0, 65519},
6820 },
6821 },
6822 },
6823 {
6824 name: "SBBQ",
6825 argLen: 3,
6826 resultInArg0: true,
6827 asm: x86.ASBBQ,
6828 reg: regInfo{
6829 inputs: []inputInfo{
6830 {0, 65519},
6831 {1, 65519},
6832 },
6833 outputs: []outputInfo{
6834 {1, 0},
6835 {0, 65519},
6836 },
6837 },
6838 },
6839 {
6840 name: "SUBQconstborrow",
6841 auxType: auxInt32,
6842 argLen: 1,
6843 resultInArg0: true,
6844 asm: x86.ASUBQ,
6845 reg: regInfo{
6846 inputs: []inputInfo{
6847 {0, 65519},
6848 },
6849 outputs: []outputInfo{
6850 {1, 0},
6851 {0, 65519},
6852 },
6853 },
6854 },
6855 {
6856 name: "SBBQconst",
6857 auxType: auxInt32,
6858 argLen: 2,
6859 resultInArg0: true,
6860 asm: x86.ASBBQ,
6861 reg: regInfo{
6862 inputs: []inputInfo{
6863 {0, 65519},
6864 },
6865 outputs: []outputInfo{
6866 {1, 0},
6867 {0, 65519},
6868 },
6869 },
6870 },
6871 {
6872 name: "MULQU2",
6873 argLen: 2,
6874 commutative: true,
6875 clobberFlags: true,
6876 asm: x86.AMULQ,
6877 reg: regInfo{
6878 inputs: []inputInfo{
6879 {0, 1},
6880 {1, 65535},
6881 },
6882 outputs: []outputInfo{
6883 {0, 4},
6884 {1, 1},
6885 },
6886 },
6887 },
6888 {
6889 name: "DIVQU2",
6890 argLen: 3,
6891 clobberFlags: true,
6892 asm: x86.ADIVQ,
6893 reg: regInfo{
6894 inputs: []inputInfo{
6895 {0, 4},
6896 {1, 1},
6897 {2, 65535},
6898 },
6899 outputs: []outputInfo{
6900 {0, 1},
6901 {1, 4},
6902 },
6903 },
6904 },
6905 {
6906 name: "ANDQ",
6907 argLen: 2,
6908 commutative: true,
6909 resultInArg0: true,
6910 clobberFlags: true,
6911 asm: x86.AANDQ,
6912 reg: regInfo{
6913 inputs: []inputInfo{
6914 {0, 65519},
6915 {1, 65519},
6916 },
6917 outputs: []outputInfo{
6918 {0, 65519},
6919 },
6920 },
6921 },
6922 {
6923 name: "ANDL",
6924 argLen: 2,
6925 commutative: true,
6926 resultInArg0: true,
6927 clobberFlags: true,
6928 asm: x86.AANDL,
6929 reg: regInfo{
6930 inputs: []inputInfo{
6931 {0, 65519},
6932 {1, 65519},
6933 },
6934 outputs: []outputInfo{
6935 {0, 65519},
6936 },
6937 },
6938 },
6939 {
6940 name: "ANDQconst",
6941 auxType: auxInt32,
6942 argLen: 1,
6943 resultInArg0: true,
6944 clobberFlags: true,
6945 asm: x86.AANDQ,
6946 reg: regInfo{
6947 inputs: []inputInfo{
6948 {0, 65519},
6949 },
6950 outputs: []outputInfo{
6951 {0, 65519},
6952 },
6953 },
6954 },
6955 {
6956 name: "ANDLconst",
6957 auxType: auxInt32,
6958 argLen: 1,
6959 resultInArg0: true,
6960 clobberFlags: true,
6961 asm: x86.AANDL,
6962 reg: regInfo{
6963 inputs: []inputInfo{
6964 {0, 65519},
6965 },
6966 outputs: []outputInfo{
6967 {0, 65519},
6968 },
6969 },
6970 },
6971 {
6972 name: "ANDQconstmodify",
6973 auxType: auxSymValAndOff,
6974 argLen: 2,
6975 clobberFlags: true,
6976 faultOnNilArg0: true,
6977 symEffect: SymRead | SymWrite,
6978 asm: x86.AANDQ,
6979 reg: regInfo{
6980 inputs: []inputInfo{
6981 {0, 4295032831},
6982 },
6983 },
6984 },
6985 {
6986 name: "ANDLconstmodify",
6987 auxType: auxSymValAndOff,
6988 argLen: 2,
6989 clobberFlags: true,
6990 faultOnNilArg0: true,
6991 symEffect: SymRead | SymWrite,
6992 asm: x86.AANDL,
6993 reg: regInfo{
6994 inputs: []inputInfo{
6995 {0, 4295032831},
6996 },
6997 },
6998 },
6999 {
7000 name: "ORQ",
7001 argLen: 2,
7002 commutative: true,
7003 resultInArg0: true,
7004 clobberFlags: true,
7005 asm: x86.AORQ,
7006 reg: regInfo{
7007 inputs: []inputInfo{
7008 {0, 65519},
7009 {1, 65519},
7010 },
7011 outputs: []outputInfo{
7012 {0, 65519},
7013 },
7014 },
7015 },
7016 {
7017 name: "ORL",
7018 argLen: 2,
7019 commutative: true,
7020 resultInArg0: true,
7021 clobberFlags: true,
7022 asm: x86.AORL,
7023 reg: regInfo{
7024 inputs: []inputInfo{
7025 {0, 65519},
7026 {1, 65519},
7027 },
7028 outputs: []outputInfo{
7029 {0, 65519},
7030 },
7031 },
7032 },
7033 {
7034 name: "ORQconst",
7035 auxType: auxInt32,
7036 argLen: 1,
7037 resultInArg0: true,
7038 clobberFlags: true,
7039 asm: x86.AORQ,
7040 reg: regInfo{
7041 inputs: []inputInfo{
7042 {0, 65519},
7043 },
7044 outputs: []outputInfo{
7045 {0, 65519},
7046 },
7047 },
7048 },
7049 {
7050 name: "ORLconst",
7051 auxType: auxInt32,
7052 argLen: 1,
7053 resultInArg0: true,
7054 clobberFlags: true,
7055 asm: x86.AORL,
7056 reg: regInfo{
7057 inputs: []inputInfo{
7058 {0, 65519},
7059 },
7060 outputs: []outputInfo{
7061 {0, 65519},
7062 },
7063 },
7064 },
7065 {
7066 name: "ORQconstmodify",
7067 auxType: auxSymValAndOff,
7068 argLen: 2,
7069 clobberFlags: true,
7070 faultOnNilArg0: true,
7071 symEffect: SymRead | SymWrite,
7072 asm: x86.AORQ,
7073 reg: regInfo{
7074 inputs: []inputInfo{
7075 {0, 4295032831},
7076 },
7077 },
7078 },
7079 {
7080 name: "ORLconstmodify",
7081 auxType: auxSymValAndOff,
7082 argLen: 2,
7083 clobberFlags: true,
7084 faultOnNilArg0: true,
7085 symEffect: SymRead | SymWrite,
7086 asm: x86.AORL,
7087 reg: regInfo{
7088 inputs: []inputInfo{
7089 {0, 4295032831},
7090 },
7091 },
7092 },
7093 {
7094 name: "XORQ",
7095 argLen: 2,
7096 commutative: true,
7097 resultInArg0: true,
7098 clobberFlags: true,
7099 asm: x86.AXORQ,
7100 reg: regInfo{
7101 inputs: []inputInfo{
7102 {0, 65519},
7103 {1, 65519},
7104 },
7105 outputs: []outputInfo{
7106 {0, 65519},
7107 },
7108 },
7109 },
7110 {
7111 name: "XORL",
7112 argLen: 2,
7113 commutative: true,
7114 resultInArg0: true,
7115 clobberFlags: true,
7116 asm: x86.AXORL,
7117 reg: regInfo{
7118 inputs: []inputInfo{
7119 {0, 65519},
7120 {1, 65519},
7121 },
7122 outputs: []outputInfo{
7123 {0, 65519},
7124 },
7125 },
7126 },
7127 {
7128 name: "XORQconst",
7129 auxType: auxInt32,
7130 argLen: 1,
7131 resultInArg0: true,
7132 clobberFlags: true,
7133 asm: x86.AXORQ,
7134 reg: regInfo{
7135 inputs: []inputInfo{
7136 {0, 65519},
7137 },
7138 outputs: []outputInfo{
7139 {0, 65519},
7140 },
7141 },
7142 },
7143 {
7144 name: "XORLconst",
7145 auxType: auxInt32,
7146 argLen: 1,
7147 resultInArg0: true,
7148 clobberFlags: true,
7149 asm: x86.AXORL,
7150 reg: regInfo{
7151 inputs: []inputInfo{
7152 {0, 65519},
7153 },
7154 outputs: []outputInfo{
7155 {0, 65519},
7156 },
7157 },
7158 },
7159 {
7160 name: "XORQconstmodify",
7161 auxType: auxSymValAndOff,
7162 argLen: 2,
7163 clobberFlags: true,
7164 faultOnNilArg0: true,
7165 symEffect: SymRead | SymWrite,
7166 asm: x86.AXORQ,
7167 reg: regInfo{
7168 inputs: []inputInfo{
7169 {0, 4295032831},
7170 },
7171 },
7172 },
7173 {
7174 name: "XORLconstmodify",
7175 auxType: auxSymValAndOff,
7176 argLen: 2,
7177 clobberFlags: true,
7178 faultOnNilArg0: true,
7179 symEffect: SymRead | SymWrite,
7180 asm: x86.AXORL,
7181 reg: regInfo{
7182 inputs: []inputInfo{
7183 {0, 4295032831},
7184 },
7185 },
7186 },
7187 {
7188 name: "CMPQ",
7189 argLen: 2,
7190 asm: x86.ACMPQ,
7191 reg: regInfo{
7192 inputs: []inputInfo{
7193 {0, 65535},
7194 {1, 65535},
7195 },
7196 },
7197 },
7198 {
7199 name: "CMPL",
7200 argLen: 2,
7201 asm: x86.ACMPL,
7202 reg: regInfo{
7203 inputs: []inputInfo{
7204 {0, 65535},
7205 {1, 65535},
7206 },
7207 },
7208 },
7209 {
7210 name: "CMPW",
7211 argLen: 2,
7212 asm: x86.ACMPW,
7213 reg: regInfo{
7214 inputs: []inputInfo{
7215 {0, 65535},
7216 {1, 65535},
7217 },
7218 },
7219 },
7220 {
7221 name: "CMPB",
7222 argLen: 2,
7223 asm: x86.ACMPB,
7224 reg: regInfo{
7225 inputs: []inputInfo{
7226 {0, 65535},
7227 {1, 65535},
7228 },
7229 },
7230 },
7231 {
7232 name: "CMPQconst",
7233 auxType: auxInt32,
7234 argLen: 1,
7235 asm: x86.ACMPQ,
7236 reg: regInfo{
7237 inputs: []inputInfo{
7238 {0, 65535},
7239 },
7240 },
7241 },
7242 {
7243 name: "CMPLconst",
7244 auxType: auxInt32,
7245 argLen: 1,
7246 asm: x86.ACMPL,
7247 reg: regInfo{
7248 inputs: []inputInfo{
7249 {0, 65535},
7250 },
7251 },
7252 },
7253 {
7254 name: "CMPWconst",
7255 auxType: auxInt16,
7256 argLen: 1,
7257 asm: x86.ACMPW,
7258 reg: regInfo{
7259 inputs: []inputInfo{
7260 {0, 65535},
7261 },
7262 },
7263 },
7264 {
7265 name: "CMPBconst",
7266 auxType: auxInt8,
7267 argLen: 1,
7268 asm: x86.ACMPB,
7269 reg: regInfo{
7270 inputs: []inputInfo{
7271 {0, 65535},
7272 },
7273 },
7274 },
7275 {
7276 name: "CMPQload",
7277 auxType: auxSymOff,
7278 argLen: 3,
7279 faultOnNilArg0: true,
7280 symEffect: SymRead,
7281 asm: x86.ACMPQ,
7282 reg: regInfo{
7283 inputs: []inputInfo{
7284 {1, 65535},
7285 {0, 4295032831},
7286 },
7287 },
7288 },
7289 {
7290 name: "CMPLload",
7291 auxType: auxSymOff,
7292 argLen: 3,
7293 faultOnNilArg0: true,
7294 symEffect: SymRead,
7295 asm: x86.ACMPL,
7296 reg: regInfo{
7297 inputs: []inputInfo{
7298 {1, 65535},
7299 {0, 4295032831},
7300 },
7301 },
7302 },
7303 {
7304 name: "CMPWload",
7305 auxType: auxSymOff,
7306 argLen: 3,
7307 faultOnNilArg0: true,
7308 symEffect: SymRead,
7309 asm: x86.ACMPW,
7310 reg: regInfo{
7311 inputs: []inputInfo{
7312 {1, 65535},
7313 {0, 4295032831},
7314 },
7315 },
7316 },
7317 {
7318 name: "CMPBload",
7319 auxType: auxSymOff,
7320 argLen: 3,
7321 faultOnNilArg0: true,
7322 symEffect: SymRead,
7323 asm: x86.ACMPB,
7324 reg: regInfo{
7325 inputs: []inputInfo{
7326 {1, 65535},
7327 {0, 4295032831},
7328 },
7329 },
7330 },
7331 {
7332 name: "CMPQconstload",
7333 auxType: auxSymValAndOff,
7334 argLen: 2,
7335 faultOnNilArg0: true,
7336 symEffect: SymRead,
7337 asm: x86.ACMPQ,
7338 reg: regInfo{
7339 inputs: []inputInfo{
7340 {0, 4295032831},
7341 },
7342 },
7343 },
7344 {
7345 name: "CMPLconstload",
7346 auxType: auxSymValAndOff,
7347 argLen: 2,
7348 faultOnNilArg0: true,
7349 symEffect: SymRead,
7350 asm: x86.ACMPL,
7351 reg: regInfo{
7352 inputs: []inputInfo{
7353 {0, 4295032831},
7354 },
7355 },
7356 },
7357 {
7358 name: "CMPWconstload",
7359 auxType: auxSymValAndOff,
7360 argLen: 2,
7361 faultOnNilArg0: true,
7362 symEffect: SymRead,
7363 asm: x86.ACMPW,
7364 reg: regInfo{
7365 inputs: []inputInfo{
7366 {0, 4295032831},
7367 },
7368 },
7369 },
7370 {
7371 name: "CMPBconstload",
7372 auxType: auxSymValAndOff,
7373 argLen: 2,
7374 faultOnNilArg0: true,
7375 symEffect: SymRead,
7376 asm: x86.ACMPB,
7377 reg: regInfo{
7378 inputs: []inputInfo{
7379 {0, 4295032831},
7380 },
7381 },
7382 },
7383 {
7384 name: "UCOMISS",
7385 argLen: 2,
7386 asm: x86.AUCOMISS,
7387 reg: regInfo{
7388 inputs: []inputInfo{
7389 {0, 4294901760},
7390 {1, 4294901760},
7391 },
7392 },
7393 },
7394 {
7395 name: "UCOMISD",
7396 argLen: 2,
7397 asm: x86.AUCOMISD,
7398 reg: regInfo{
7399 inputs: []inputInfo{
7400 {0, 4294901760},
7401 {1, 4294901760},
7402 },
7403 },
7404 },
7405 {
7406 name: "BTL",
7407 argLen: 2,
7408 asm: x86.ABTL,
7409 reg: regInfo{
7410 inputs: []inputInfo{
7411 {0, 65535},
7412 {1, 65535},
7413 },
7414 },
7415 },
7416 {
7417 name: "BTQ",
7418 argLen: 2,
7419 asm: x86.ABTQ,
7420 reg: regInfo{
7421 inputs: []inputInfo{
7422 {0, 65535},
7423 {1, 65535},
7424 },
7425 },
7426 },
7427 {
7428 name: "BTCL",
7429 argLen: 2,
7430 resultInArg0: true,
7431 clobberFlags: true,
7432 asm: x86.ABTCL,
7433 reg: regInfo{
7434 inputs: []inputInfo{
7435 {0, 65519},
7436 {1, 65519},
7437 },
7438 outputs: []outputInfo{
7439 {0, 65519},
7440 },
7441 },
7442 },
7443 {
7444 name: "BTCQ",
7445 argLen: 2,
7446 resultInArg0: true,
7447 clobberFlags: true,
7448 asm: x86.ABTCQ,
7449 reg: regInfo{
7450 inputs: []inputInfo{
7451 {0, 65519},
7452 {1, 65519},
7453 },
7454 outputs: []outputInfo{
7455 {0, 65519},
7456 },
7457 },
7458 },
7459 {
7460 name: "BTRL",
7461 argLen: 2,
7462 resultInArg0: true,
7463 clobberFlags: true,
7464 asm: x86.ABTRL,
7465 reg: regInfo{
7466 inputs: []inputInfo{
7467 {0, 65519},
7468 {1, 65519},
7469 },
7470 outputs: []outputInfo{
7471 {0, 65519},
7472 },
7473 },
7474 },
7475 {
7476 name: "BTRQ",
7477 argLen: 2,
7478 resultInArg0: true,
7479 clobberFlags: true,
7480 asm: x86.ABTRQ,
7481 reg: regInfo{
7482 inputs: []inputInfo{
7483 {0, 65519},
7484 {1, 65519},
7485 },
7486 outputs: []outputInfo{
7487 {0, 65519},
7488 },
7489 },
7490 },
7491 {
7492 name: "BTSL",
7493 argLen: 2,
7494 resultInArg0: true,
7495 clobberFlags: true,
7496 asm: x86.ABTSL,
7497 reg: regInfo{
7498 inputs: []inputInfo{
7499 {0, 65519},
7500 {1, 65519},
7501 },
7502 outputs: []outputInfo{
7503 {0, 65519},
7504 },
7505 },
7506 },
7507 {
7508 name: "BTSQ",
7509 argLen: 2,
7510 resultInArg0: true,
7511 clobberFlags: true,
7512 asm: x86.ABTSQ,
7513 reg: regInfo{
7514 inputs: []inputInfo{
7515 {0, 65519},
7516 {1, 65519},
7517 },
7518 outputs: []outputInfo{
7519 {0, 65519},
7520 },
7521 },
7522 },
7523 {
7524 name: "BTLconst",
7525 auxType: auxInt8,
7526 argLen: 1,
7527 asm: x86.ABTL,
7528 reg: regInfo{
7529 inputs: []inputInfo{
7530 {0, 65535},
7531 },
7532 },
7533 },
7534 {
7535 name: "BTQconst",
7536 auxType: auxInt8,
7537 argLen: 1,
7538 asm: x86.ABTQ,
7539 reg: regInfo{
7540 inputs: []inputInfo{
7541 {0, 65535},
7542 },
7543 },
7544 },
7545 {
7546 name: "BTCLconst",
7547 auxType: auxInt8,
7548 argLen: 1,
7549 resultInArg0: true,
7550 clobberFlags: true,
7551 asm: x86.ABTCL,
7552 reg: regInfo{
7553 inputs: []inputInfo{
7554 {0, 65519},
7555 },
7556 outputs: []outputInfo{
7557 {0, 65519},
7558 },
7559 },
7560 },
7561 {
7562 name: "BTCQconst",
7563 auxType: auxInt8,
7564 argLen: 1,
7565 resultInArg0: true,
7566 clobberFlags: true,
7567 asm: x86.ABTCQ,
7568 reg: regInfo{
7569 inputs: []inputInfo{
7570 {0, 65519},
7571 },
7572 outputs: []outputInfo{
7573 {0, 65519},
7574 },
7575 },
7576 },
7577 {
7578 name: "BTRLconst",
7579 auxType: auxInt8,
7580 argLen: 1,
7581 resultInArg0: true,
7582 clobberFlags: true,
7583 asm: x86.ABTRL,
7584 reg: regInfo{
7585 inputs: []inputInfo{
7586 {0, 65519},
7587 },
7588 outputs: []outputInfo{
7589 {0, 65519},
7590 },
7591 },
7592 },
7593 {
7594 name: "BTRQconst",
7595 auxType: auxInt8,
7596 argLen: 1,
7597 resultInArg0: true,
7598 clobberFlags: true,
7599 asm: x86.ABTRQ,
7600 reg: regInfo{
7601 inputs: []inputInfo{
7602 {0, 65519},
7603 },
7604 outputs: []outputInfo{
7605 {0, 65519},
7606 },
7607 },
7608 },
7609 {
7610 name: "BTSLconst",
7611 auxType: auxInt8,
7612 argLen: 1,
7613 resultInArg0: true,
7614 clobberFlags: true,
7615 asm: x86.ABTSL,
7616 reg: regInfo{
7617 inputs: []inputInfo{
7618 {0, 65519},
7619 },
7620 outputs: []outputInfo{
7621 {0, 65519},
7622 },
7623 },
7624 },
7625 {
7626 name: "BTSQconst",
7627 auxType: auxInt8,
7628 argLen: 1,
7629 resultInArg0: true,
7630 clobberFlags: true,
7631 asm: x86.ABTSQ,
7632 reg: regInfo{
7633 inputs: []inputInfo{
7634 {0, 65519},
7635 },
7636 outputs: []outputInfo{
7637 {0, 65519},
7638 },
7639 },
7640 },
7641 {
7642 name: "BTCQmodify",
7643 auxType: auxSymOff,
7644 argLen: 3,
7645 clobberFlags: true,
7646 faultOnNilArg0: true,
7647 symEffect: SymRead | SymWrite,
7648 asm: x86.ABTCQ,
7649 reg: regInfo{
7650 inputs: []inputInfo{
7651 {1, 65535},
7652 {0, 4295032831},
7653 },
7654 },
7655 },
7656 {
7657 name: "BTCLmodify",
7658 auxType: auxSymOff,
7659 argLen: 3,
7660 clobberFlags: true,
7661 faultOnNilArg0: true,
7662 symEffect: SymRead | SymWrite,
7663 asm: x86.ABTCL,
7664 reg: regInfo{
7665 inputs: []inputInfo{
7666 {1, 65535},
7667 {0, 4295032831},
7668 },
7669 },
7670 },
7671 {
7672 name: "BTSQmodify",
7673 auxType: auxSymOff,
7674 argLen: 3,
7675 clobberFlags: true,
7676 faultOnNilArg0: true,
7677 symEffect: SymRead | SymWrite,
7678 asm: x86.ABTSQ,
7679 reg: regInfo{
7680 inputs: []inputInfo{
7681 {1, 65535},
7682 {0, 4295032831},
7683 },
7684 },
7685 },
7686 {
7687 name: "BTSLmodify",
7688 auxType: auxSymOff,
7689 argLen: 3,
7690 clobberFlags: true,
7691 faultOnNilArg0: true,
7692 symEffect: SymRead | SymWrite,
7693 asm: x86.ABTSL,
7694 reg: regInfo{
7695 inputs: []inputInfo{
7696 {1, 65535},
7697 {0, 4295032831},
7698 },
7699 },
7700 },
7701 {
7702 name: "BTRQmodify",
7703 auxType: auxSymOff,
7704 argLen: 3,
7705 clobberFlags: true,
7706 faultOnNilArg0: true,
7707 symEffect: SymRead | SymWrite,
7708 asm: x86.ABTRQ,
7709 reg: regInfo{
7710 inputs: []inputInfo{
7711 {1, 65535},
7712 {0, 4295032831},
7713 },
7714 },
7715 },
7716 {
7717 name: "BTRLmodify",
7718 auxType: auxSymOff,
7719 argLen: 3,
7720 clobberFlags: true,
7721 faultOnNilArg0: true,
7722 symEffect: SymRead | SymWrite,
7723 asm: x86.ABTRL,
7724 reg: regInfo{
7725 inputs: []inputInfo{
7726 {1, 65535},
7727 {0, 4295032831},
7728 },
7729 },
7730 },
7731 {
7732 name: "BTCQconstmodify",
7733 auxType: auxSymValAndOff,
7734 argLen: 2,
7735 clobberFlags: true,
7736 faultOnNilArg0: true,
7737 symEffect: SymRead | SymWrite,
7738 asm: x86.ABTCQ,
7739 reg: regInfo{
7740 inputs: []inputInfo{
7741 {0, 4295032831},
7742 },
7743 },
7744 },
7745 {
7746 name: "BTCLconstmodify",
7747 auxType: auxSymValAndOff,
7748 argLen: 2,
7749 clobberFlags: true,
7750 faultOnNilArg0: true,
7751 symEffect: SymRead | SymWrite,
7752 asm: x86.ABTCL,
7753 reg: regInfo{
7754 inputs: []inputInfo{
7755 {0, 4295032831},
7756 },
7757 },
7758 },
7759 {
7760 name: "BTSQconstmodify",
7761 auxType: auxSymValAndOff,
7762 argLen: 2,
7763 clobberFlags: true,
7764 faultOnNilArg0: true,
7765 symEffect: SymRead | SymWrite,
7766 asm: x86.ABTSQ,
7767 reg: regInfo{
7768 inputs: []inputInfo{
7769 {0, 4295032831},
7770 },
7771 },
7772 },
7773 {
7774 name: "BTSLconstmodify",
7775 auxType: auxSymValAndOff,
7776 argLen: 2,
7777 clobberFlags: true,
7778 faultOnNilArg0: true,
7779 symEffect: SymRead | SymWrite,
7780 asm: x86.ABTSL,
7781 reg: regInfo{
7782 inputs: []inputInfo{
7783 {0, 4295032831},
7784 },
7785 },
7786 },
7787 {
7788 name: "BTRQconstmodify",
7789 auxType: auxSymValAndOff,
7790 argLen: 2,
7791 clobberFlags: true,
7792 faultOnNilArg0: true,
7793 symEffect: SymRead | SymWrite,
7794 asm: x86.ABTRQ,
7795 reg: regInfo{
7796 inputs: []inputInfo{
7797 {0, 4295032831},
7798 },
7799 },
7800 },
7801 {
7802 name: "BTRLconstmodify",
7803 auxType: auxSymValAndOff,
7804 argLen: 2,
7805 clobberFlags: true,
7806 faultOnNilArg0: true,
7807 symEffect: SymRead | SymWrite,
7808 asm: x86.ABTRL,
7809 reg: regInfo{
7810 inputs: []inputInfo{
7811 {0, 4295032831},
7812 },
7813 },
7814 },
7815 {
7816 name: "TESTQ",
7817 argLen: 2,
7818 commutative: true,
7819 asm: x86.ATESTQ,
7820 reg: regInfo{
7821 inputs: []inputInfo{
7822 {0, 65535},
7823 {1, 65535},
7824 },
7825 },
7826 },
7827 {
7828 name: "TESTL",
7829 argLen: 2,
7830 commutative: true,
7831 asm: x86.ATESTL,
7832 reg: regInfo{
7833 inputs: []inputInfo{
7834 {0, 65535},
7835 {1, 65535},
7836 },
7837 },
7838 },
7839 {
7840 name: "TESTW",
7841 argLen: 2,
7842 commutative: true,
7843 asm: x86.ATESTW,
7844 reg: regInfo{
7845 inputs: []inputInfo{
7846 {0, 65535},
7847 {1, 65535},
7848 },
7849 },
7850 },
7851 {
7852 name: "TESTB",
7853 argLen: 2,
7854 commutative: true,
7855 asm: x86.ATESTB,
7856 reg: regInfo{
7857 inputs: []inputInfo{
7858 {0, 65535},
7859 {1, 65535},
7860 },
7861 },
7862 },
7863 {
7864 name: "TESTQconst",
7865 auxType: auxInt32,
7866 argLen: 1,
7867 asm: x86.ATESTQ,
7868 reg: regInfo{
7869 inputs: []inputInfo{
7870 {0, 65535},
7871 },
7872 },
7873 },
7874 {
7875 name: "TESTLconst",
7876 auxType: auxInt32,
7877 argLen: 1,
7878 asm: x86.ATESTL,
7879 reg: regInfo{
7880 inputs: []inputInfo{
7881 {0, 65535},
7882 },
7883 },
7884 },
7885 {
7886 name: "TESTWconst",
7887 auxType: auxInt16,
7888 argLen: 1,
7889 asm: x86.ATESTW,
7890 reg: regInfo{
7891 inputs: []inputInfo{
7892 {0, 65535},
7893 },
7894 },
7895 },
7896 {
7897 name: "TESTBconst",
7898 auxType: auxInt8,
7899 argLen: 1,
7900 asm: x86.ATESTB,
7901 reg: regInfo{
7902 inputs: []inputInfo{
7903 {0, 65535},
7904 },
7905 },
7906 },
7907 {
7908 name: "SHLQ",
7909 argLen: 2,
7910 resultInArg0: true,
7911 clobberFlags: true,
7912 asm: x86.ASHLQ,
7913 reg: regInfo{
7914 inputs: []inputInfo{
7915 {1, 2},
7916 {0, 65519},
7917 },
7918 outputs: []outputInfo{
7919 {0, 65519},
7920 },
7921 },
7922 },
7923 {
7924 name: "SHLL",
7925 argLen: 2,
7926 resultInArg0: true,
7927 clobberFlags: true,
7928 asm: x86.ASHLL,
7929 reg: regInfo{
7930 inputs: []inputInfo{
7931 {1, 2},
7932 {0, 65519},
7933 },
7934 outputs: []outputInfo{
7935 {0, 65519},
7936 },
7937 },
7938 },
7939 {
7940 name: "SHLQconst",
7941 auxType: auxInt8,
7942 argLen: 1,
7943 resultInArg0: true,
7944 clobberFlags: true,
7945 asm: x86.ASHLQ,
7946 reg: regInfo{
7947 inputs: []inputInfo{
7948 {0, 65519},
7949 },
7950 outputs: []outputInfo{
7951 {0, 65519},
7952 },
7953 },
7954 },
7955 {
7956 name: "SHLLconst",
7957 auxType: auxInt8,
7958 argLen: 1,
7959 resultInArg0: true,
7960 clobberFlags: true,
7961 asm: x86.ASHLL,
7962 reg: regInfo{
7963 inputs: []inputInfo{
7964 {0, 65519},
7965 },
7966 outputs: []outputInfo{
7967 {0, 65519},
7968 },
7969 },
7970 },
7971 {
7972 name: "SHRQ",
7973 argLen: 2,
7974 resultInArg0: true,
7975 clobberFlags: true,
7976 asm: x86.ASHRQ,
7977 reg: regInfo{
7978 inputs: []inputInfo{
7979 {1, 2},
7980 {0, 65519},
7981 },
7982 outputs: []outputInfo{
7983 {0, 65519},
7984 },
7985 },
7986 },
7987 {
7988 name: "SHRL",
7989 argLen: 2,
7990 resultInArg0: true,
7991 clobberFlags: true,
7992 asm: x86.ASHRL,
7993 reg: regInfo{
7994 inputs: []inputInfo{
7995 {1, 2},
7996 {0, 65519},
7997 },
7998 outputs: []outputInfo{
7999 {0, 65519},
8000 },
8001 },
8002 },
8003 {
8004 name: "SHRW",
8005 argLen: 2,
8006 resultInArg0: true,
8007 clobberFlags: true,
8008 asm: x86.ASHRW,
8009 reg: regInfo{
8010 inputs: []inputInfo{
8011 {1, 2},
8012 {0, 65519},
8013 },
8014 outputs: []outputInfo{
8015 {0, 65519},
8016 },
8017 },
8018 },
8019 {
8020 name: "SHRB",
8021 argLen: 2,
8022 resultInArg0: true,
8023 clobberFlags: true,
8024 asm: x86.ASHRB,
8025 reg: regInfo{
8026 inputs: []inputInfo{
8027 {1, 2},
8028 {0, 65519},
8029 },
8030 outputs: []outputInfo{
8031 {0, 65519},
8032 },
8033 },
8034 },
8035 {
8036 name: "SHRQconst",
8037 auxType: auxInt8,
8038 argLen: 1,
8039 resultInArg0: true,
8040 clobberFlags: true,
8041 asm: x86.ASHRQ,
8042 reg: regInfo{
8043 inputs: []inputInfo{
8044 {0, 65519},
8045 },
8046 outputs: []outputInfo{
8047 {0, 65519},
8048 },
8049 },
8050 },
8051 {
8052 name: "SHRLconst",
8053 auxType: auxInt8,
8054 argLen: 1,
8055 resultInArg0: true,
8056 clobberFlags: true,
8057 asm: x86.ASHRL,
8058 reg: regInfo{
8059 inputs: []inputInfo{
8060 {0, 65519},
8061 },
8062 outputs: []outputInfo{
8063 {0, 65519},
8064 },
8065 },
8066 },
8067 {
8068 name: "SHRWconst",
8069 auxType: auxInt8,
8070 argLen: 1,
8071 resultInArg0: true,
8072 clobberFlags: true,
8073 asm: x86.ASHRW,
8074 reg: regInfo{
8075 inputs: []inputInfo{
8076 {0, 65519},
8077 },
8078 outputs: []outputInfo{
8079 {0, 65519},
8080 },
8081 },
8082 },
8083 {
8084 name: "SHRBconst",
8085 auxType: auxInt8,
8086 argLen: 1,
8087 resultInArg0: true,
8088 clobberFlags: true,
8089 asm: x86.ASHRB,
8090 reg: regInfo{
8091 inputs: []inputInfo{
8092 {0, 65519},
8093 },
8094 outputs: []outputInfo{
8095 {0, 65519},
8096 },
8097 },
8098 },
8099 {
8100 name: "SARQ",
8101 argLen: 2,
8102 resultInArg0: true,
8103 clobberFlags: true,
8104 asm: x86.ASARQ,
8105 reg: regInfo{
8106 inputs: []inputInfo{
8107 {1, 2},
8108 {0, 65519},
8109 },
8110 outputs: []outputInfo{
8111 {0, 65519},
8112 },
8113 },
8114 },
8115 {
8116 name: "SARL",
8117 argLen: 2,
8118 resultInArg0: true,
8119 clobberFlags: true,
8120 asm: x86.ASARL,
8121 reg: regInfo{
8122 inputs: []inputInfo{
8123 {1, 2},
8124 {0, 65519},
8125 },
8126 outputs: []outputInfo{
8127 {0, 65519},
8128 },
8129 },
8130 },
8131 {
8132 name: "SARW",
8133 argLen: 2,
8134 resultInArg0: true,
8135 clobberFlags: true,
8136 asm: x86.ASARW,
8137 reg: regInfo{
8138 inputs: []inputInfo{
8139 {1, 2},
8140 {0, 65519},
8141 },
8142 outputs: []outputInfo{
8143 {0, 65519},
8144 },
8145 },
8146 },
8147 {
8148 name: "SARB",
8149 argLen: 2,
8150 resultInArg0: true,
8151 clobberFlags: true,
8152 asm: x86.ASARB,
8153 reg: regInfo{
8154 inputs: []inputInfo{
8155 {1, 2},
8156 {0, 65519},
8157 },
8158 outputs: []outputInfo{
8159 {0, 65519},
8160 },
8161 },
8162 },
8163 {
8164 name: "SARQconst",
8165 auxType: auxInt8,
8166 argLen: 1,
8167 resultInArg0: true,
8168 clobberFlags: true,
8169 asm: x86.ASARQ,
8170 reg: regInfo{
8171 inputs: []inputInfo{
8172 {0, 65519},
8173 },
8174 outputs: []outputInfo{
8175 {0, 65519},
8176 },
8177 },
8178 },
8179 {
8180 name: "SARLconst",
8181 auxType: auxInt8,
8182 argLen: 1,
8183 resultInArg0: true,
8184 clobberFlags: true,
8185 asm: x86.ASARL,
8186 reg: regInfo{
8187 inputs: []inputInfo{
8188 {0, 65519},
8189 },
8190 outputs: []outputInfo{
8191 {0, 65519},
8192 },
8193 },
8194 },
8195 {
8196 name: "SARWconst",
8197 auxType: auxInt8,
8198 argLen: 1,
8199 resultInArg0: true,
8200 clobberFlags: true,
8201 asm: x86.ASARW,
8202 reg: regInfo{
8203 inputs: []inputInfo{
8204 {0, 65519},
8205 },
8206 outputs: []outputInfo{
8207 {0, 65519},
8208 },
8209 },
8210 },
8211 {
8212 name: "SARBconst",
8213 auxType: auxInt8,
8214 argLen: 1,
8215 resultInArg0: true,
8216 clobberFlags: true,
8217 asm: x86.ASARB,
8218 reg: regInfo{
8219 inputs: []inputInfo{
8220 {0, 65519},
8221 },
8222 outputs: []outputInfo{
8223 {0, 65519},
8224 },
8225 },
8226 },
8227 {
8228 name: "ROLQ",
8229 argLen: 2,
8230 resultInArg0: true,
8231 clobberFlags: true,
8232 asm: x86.AROLQ,
8233 reg: regInfo{
8234 inputs: []inputInfo{
8235 {1, 2},
8236 {0, 65519},
8237 },
8238 outputs: []outputInfo{
8239 {0, 65519},
8240 },
8241 },
8242 },
8243 {
8244 name: "ROLL",
8245 argLen: 2,
8246 resultInArg0: true,
8247 clobberFlags: true,
8248 asm: x86.AROLL,
8249 reg: regInfo{
8250 inputs: []inputInfo{
8251 {1, 2},
8252 {0, 65519},
8253 },
8254 outputs: []outputInfo{
8255 {0, 65519},
8256 },
8257 },
8258 },
8259 {
8260 name: "ROLW",
8261 argLen: 2,
8262 resultInArg0: true,
8263 clobberFlags: true,
8264 asm: x86.AROLW,
8265 reg: regInfo{
8266 inputs: []inputInfo{
8267 {1, 2},
8268 {0, 65519},
8269 },
8270 outputs: []outputInfo{
8271 {0, 65519},
8272 },
8273 },
8274 },
8275 {
8276 name: "ROLB",
8277 argLen: 2,
8278 resultInArg0: true,
8279 clobberFlags: true,
8280 asm: x86.AROLB,
8281 reg: regInfo{
8282 inputs: []inputInfo{
8283 {1, 2},
8284 {0, 65519},
8285 },
8286 outputs: []outputInfo{
8287 {0, 65519},
8288 },
8289 },
8290 },
8291 {
8292 name: "RORQ",
8293 argLen: 2,
8294 resultInArg0: true,
8295 clobberFlags: true,
8296 asm: x86.ARORQ,
8297 reg: regInfo{
8298 inputs: []inputInfo{
8299 {1, 2},
8300 {0, 65519},
8301 },
8302 outputs: []outputInfo{
8303 {0, 65519},
8304 },
8305 },
8306 },
8307 {
8308 name: "RORL",
8309 argLen: 2,
8310 resultInArg0: true,
8311 clobberFlags: true,
8312 asm: x86.ARORL,
8313 reg: regInfo{
8314 inputs: []inputInfo{
8315 {1, 2},
8316 {0, 65519},
8317 },
8318 outputs: []outputInfo{
8319 {0, 65519},
8320 },
8321 },
8322 },
8323 {
8324 name: "RORW",
8325 argLen: 2,
8326 resultInArg0: true,
8327 clobberFlags: true,
8328 asm: x86.ARORW,
8329 reg: regInfo{
8330 inputs: []inputInfo{
8331 {1, 2},
8332 {0, 65519},
8333 },
8334 outputs: []outputInfo{
8335 {0, 65519},
8336 },
8337 },
8338 },
8339 {
8340 name: "RORB",
8341 argLen: 2,
8342 resultInArg0: true,
8343 clobberFlags: true,
8344 asm: x86.ARORB,
8345 reg: regInfo{
8346 inputs: []inputInfo{
8347 {1, 2},
8348 {0, 65519},
8349 },
8350 outputs: []outputInfo{
8351 {0, 65519},
8352 },
8353 },
8354 },
8355 {
8356 name: "ROLQconst",
8357 auxType: auxInt8,
8358 argLen: 1,
8359 resultInArg0: true,
8360 clobberFlags: true,
8361 asm: x86.AROLQ,
8362 reg: regInfo{
8363 inputs: []inputInfo{
8364 {0, 65519},
8365 },
8366 outputs: []outputInfo{
8367 {0, 65519},
8368 },
8369 },
8370 },
8371 {
8372 name: "ROLLconst",
8373 auxType: auxInt8,
8374 argLen: 1,
8375 resultInArg0: true,
8376 clobberFlags: true,
8377 asm: x86.AROLL,
8378 reg: regInfo{
8379 inputs: []inputInfo{
8380 {0, 65519},
8381 },
8382 outputs: []outputInfo{
8383 {0, 65519},
8384 },
8385 },
8386 },
8387 {
8388 name: "ROLWconst",
8389 auxType: auxInt8,
8390 argLen: 1,
8391 resultInArg0: true,
8392 clobberFlags: true,
8393 asm: x86.AROLW,
8394 reg: regInfo{
8395 inputs: []inputInfo{
8396 {0, 65519},
8397 },
8398 outputs: []outputInfo{
8399 {0, 65519},
8400 },
8401 },
8402 },
8403 {
8404 name: "ROLBconst",
8405 auxType: auxInt8,
8406 argLen: 1,
8407 resultInArg0: true,
8408 clobberFlags: true,
8409 asm: x86.AROLB,
8410 reg: regInfo{
8411 inputs: []inputInfo{
8412 {0, 65519},
8413 },
8414 outputs: []outputInfo{
8415 {0, 65519},
8416 },
8417 },
8418 },
8419 {
8420 name: "ADDLload",
8421 auxType: auxSymOff,
8422 argLen: 3,
8423 resultInArg0: true,
8424 clobberFlags: true,
8425 faultOnNilArg1: true,
8426 symEffect: SymRead,
8427 asm: x86.AADDL,
8428 reg: regInfo{
8429 inputs: []inputInfo{
8430 {0, 65519},
8431 {1, 4295032831},
8432 },
8433 outputs: []outputInfo{
8434 {0, 65519},
8435 },
8436 },
8437 },
8438 {
8439 name: "ADDQload",
8440 auxType: auxSymOff,
8441 argLen: 3,
8442 resultInArg0: true,
8443 clobberFlags: true,
8444 faultOnNilArg1: true,
8445 symEffect: SymRead,
8446 asm: x86.AADDQ,
8447 reg: regInfo{
8448 inputs: []inputInfo{
8449 {0, 65519},
8450 {1, 4295032831},
8451 },
8452 outputs: []outputInfo{
8453 {0, 65519},
8454 },
8455 },
8456 },
8457 {
8458 name: "SUBQload",
8459 auxType: auxSymOff,
8460 argLen: 3,
8461 resultInArg0: true,
8462 clobberFlags: true,
8463 faultOnNilArg1: true,
8464 symEffect: SymRead,
8465 asm: x86.ASUBQ,
8466 reg: regInfo{
8467 inputs: []inputInfo{
8468 {0, 65519},
8469 {1, 4295032831},
8470 },
8471 outputs: []outputInfo{
8472 {0, 65519},
8473 },
8474 },
8475 },
8476 {
8477 name: "SUBLload",
8478 auxType: auxSymOff,
8479 argLen: 3,
8480 resultInArg0: true,
8481 clobberFlags: true,
8482 faultOnNilArg1: true,
8483 symEffect: SymRead,
8484 asm: x86.ASUBL,
8485 reg: regInfo{
8486 inputs: []inputInfo{
8487 {0, 65519},
8488 {1, 4295032831},
8489 },
8490 outputs: []outputInfo{
8491 {0, 65519},
8492 },
8493 },
8494 },
8495 {
8496 name: "ANDLload",
8497 auxType: auxSymOff,
8498 argLen: 3,
8499 resultInArg0: true,
8500 clobberFlags: true,
8501 faultOnNilArg1: true,
8502 symEffect: SymRead,
8503 asm: x86.AANDL,
8504 reg: regInfo{
8505 inputs: []inputInfo{
8506 {0, 65519},
8507 {1, 4295032831},
8508 },
8509 outputs: []outputInfo{
8510 {0, 65519},
8511 },
8512 },
8513 },
8514 {
8515 name: "ANDQload",
8516 auxType: auxSymOff,
8517 argLen: 3,
8518 resultInArg0: true,
8519 clobberFlags: true,
8520 faultOnNilArg1: true,
8521 symEffect: SymRead,
8522 asm: x86.AANDQ,
8523 reg: regInfo{
8524 inputs: []inputInfo{
8525 {0, 65519},
8526 {1, 4295032831},
8527 },
8528 outputs: []outputInfo{
8529 {0, 65519},
8530 },
8531 },
8532 },
8533 {
8534 name: "ORQload",
8535 auxType: auxSymOff,
8536 argLen: 3,
8537 resultInArg0: true,
8538 clobberFlags: true,
8539 faultOnNilArg1: true,
8540 symEffect: SymRead,
8541 asm: x86.AORQ,
8542 reg: regInfo{
8543 inputs: []inputInfo{
8544 {0, 65519},
8545 {1, 4295032831},
8546 },
8547 outputs: []outputInfo{
8548 {0, 65519},
8549 },
8550 },
8551 },
8552 {
8553 name: "ORLload",
8554 auxType: auxSymOff,
8555 argLen: 3,
8556 resultInArg0: true,
8557 clobberFlags: true,
8558 faultOnNilArg1: true,
8559 symEffect: SymRead,
8560 asm: x86.AORL,
8561 reg: regInfo{
8562 inputs: []inputInfo{
8563 {0, 65519},
8564 {1, 4295032831},
8565 },
8566 outputs: []outputInfo{
8567 {0, 65519},
8568 },
8569 },
8570 },
8571 {
8572 name: "XORQload",
8573 auxType: auxSymOff,
8574 argLen: 3,
8575 resultInArg0: true,
8576 clobberFlags: true,
8577 faultOnNilArg1: true,
8578 symEffect: SymRead,
8579 asm: x86.AXORQ,
8580 reg: regInfo{
8581 inputs: []inputInfo{
8582 {0, 65519},
8583 {1, 4295032831},
8584 },
8585 outputs: []outputInfo{
8586 {0, 65519},
8587 },
8588 },
8589 },
8590 {
8591 name: "XORLload",
8592 auxType: auxSymOff,
8593 argLen: 3,
8594 resultInArg0: true,
8595 clobberFlags: true,
8596 faultOnNilArg1: true,
8597 symEffect: SymRead,
8598 asm: x86.AXORL,
8599 reg: regInfo{
8600 inputs: []inputInfo{
8601 {0, 65519},
8602 {1, 4295032831},
8603 },
8604 outputs: []outputInfo{
8605 {0, 65519},
8606 },
8607 },
8608 },
8609 {
8610 name: "ADDQmodify",
8611 auxType: auxSymOff,
8612 argLen: 3,
8613 clobberFlags: true,
8614 faultOnNilArg0: true,
8615 symEffect: SymRead | SymWrite,
8616 asm: x86.AADDQ,
8617 reg: regInfo{
8618 inputs: []inputInfo{
8619 {1, 65535},
8620 {0, 4295032831},
8621 },
8622 },
8623 },
8624 {
8625 name: "SUBQmodify",
8626 auxType: auxSymOff,
8627 argLen: 3,
8628 clobberFlags: true,
8629 faultOnNilArg0: true,
8630 symEffect: SymRead | SymWrite,
8631 asm: x86.ASUBQ,
8632 reg: regInfo{
8633 inputs: []inputInfo{
8634 {1, 65535},
8635 {0, 4295032831},
8636 },
8637 },
8638 },
8639 {
8640 name: "ANDQmodify",
8641 auxType: auxSymOff,
8642 argLen: 3,
8643 clobberFlags: true,
8644 faultOnNilArg0: true,
8645 symEffect: SymRead | SymWrite,
8646 asm: x86.AANDQ,
8647 reg: regInfo{
8648 inputs: []inputInfo{
8649 {1, 65535},
8650 {0, 4295032831},
8651 },
8652 },
8653 },
8654 {
8655 name: "ORQmodify",
8656 auxType: auxSymOff,
8657 argLen: 3,
8658 clobberFlags: true,
8659 faultOnNilArg0: true,
8660 symEffect: SymRead | SymWrite,
8661 asm: x86.AORQ,
8662 reg: regInfo{
8663 inputs: []inputInfo{
8664 {1, 65535},
8665 {0, 4295032831},
8666 },
8667 },
8668 },
8669 {
8670 name: "XORQmodify",
8671 auxType: auxSymOff,
8672 argLen: 3,
8673 clobberFlags: true,
8674 faultOnNilArg0: true,
8675 symEffect: SymRead | SymWrite,
8676 asm: x86.AXORQ,
8677 reg: regInfo{
8678 inputs: []inputInfo{
8679 {1, 65535},
8680 {0, 4295032831},
8681 },
8682 },
8683 },
8684 {
8685 name: "ADDLmodify",
8686 auxType: auxSymOff,
8687 argLen: 3,
8688 clobberFlags: true,
8689 faultOnNilArg0: true,
8690 symEffect: SymRead | SymWrite,
8691 asm: x86.AADDL,
8692 reg: regInfo{
8693 inputs: []inputInfo{
8694 {1, 65535},
8695 {0, 4295032831},
8696 },
8697 },
8698 },
8699 {
8700 name: "SUBLmodify",
8701 auxType: auxSymOff,
8702 argLen: 3,
8703 clobberFlags: true,
8704 faultOnNilArg0: true,
8705 symEffect: SymRead | SymWrite,
8706 asm: x86.ASUBL,
8707 reg: regInfo{
8708 inputs: []inputInfo{
8709 {1, 65535},
8710 {0, 4295032831},
8711 },
8712 },
8713 },
8714 {
8715 name: "ANDLmodify",
8716 auxType: auxSymOff,
8717 argLen: 3,
8718 clobberFlags: true,
8719 faultOnNilArg0: true,
8720 symEffect: SymRead | SymWrite,
8721 asm: x86.AANDL,
8722 reg: regInfo{
8723 inputs: []inputInfo{
8724 {1, 65535},
8725 {0, 4295032831},
8726 },
8727 },
8728 },
8729 {
8730 name: "ORLmodify",
8731 auxType: auxSymOff,
8732 argLen: 3,
8733 clobberFlags: true,
8734 faultOnNilArg0: true,
8735 symEffect: SymRead | SymWrite,
8736 asm: x86.AORL,
8737 reg: regInfo{
8738 inputs: []inputInfo{
8739 {1, 65535},
8740 {0, 4295032831},
8741 },
8742 },
8743 },
8744 {
8745 name: "XORLmodify",
8746 auxType: auxSymOff,
8747 argLen: 3,
8748 clobberFlags: true,
8749 faultOnNilArg0: true,
8750 symEffect: SymRead | SymWrite,
8751 asm: x86.AXORL,
8752 reg: regInfo{
8753 inputs: []inputInfo{
8754 {1, 65535},
8755 {0, 4295032831},
8756 },
8757 },
8758 },
8759 {
8760 name: "NEGQ",
8761 argLen: 1,
8762 resultInArg0: true,
8763 clobberFlags: true,
8764 asm: x86.ANEGQ,
8765 reg: regInfo{
8766 inputs: []inputInfo{
8767 {0, 65519},
8768 },
8769 outputs: []outputInfo{
8770 {0, 65519},
8771 },
8772 },
8773 },
8774 {
8775 name: "NEGL",
8776 argLen: 1,
8777 resultInArg0: true,
8778 clobberFlags: true,
8779 asm: x86.ANEGL,
8780 reg: regInfo{
8781 inputs: []inputInfo{
8782 {0, 65519},
8783 },
8784 outputs: []outputInfo{
8785 {0, 65519},
8786 },
8787 },
8788 },
8789 {
8790 name: "NOTQ",
8791 argLen: 1,
8792 resultInArg0: true,
8793 clobberFlags: true,
8794 asm: x86.ANOTQ,
8795 reg: regInfo{
8796 inputs: []inputInfo{
8797 {0, 65519},
8798 },
8799 outputs: []outputInfo{
8800 {0, 65519},
8801 },
8802 },
8803 },
8804 {
8805 name: "NOTL",
8806 argLen: 1,
8807 resultInArg0: true,
8808 clobberFlags: true,
8809 asm: x86.ANOTL,
8810 reg: regInfo{
8811 inputs: []inputInfo{
8812 {0, 65519},
8813 },
8814 outputs: []outputInfo{
8815 {0, 65519},
8816 },
8817 },
8818 },
8819 {
8820 name: "BSFQ",
8821 argLen: 1,
8822 asm: x86.ABSFQ,
8823 reg: regInfo{
8824 inputs: []inputInfo{
8825 {0, 65519},
8826 },
8827 outputs: []outputInfo{
8828 {1, 0},
8829 {0, 65519},
8830 },
8831 },
8832 },
8833 {
8834 name: "BSFL",
8835 argLen: 1,
8836 clobberFlags: true,
8837 asm: x86.ABSFL,
8838 reg: regInfo{
8839 inputs: []inputInfo{
8840 {0, 65519},
8841 },
8842 outputs: []outputInfo{
8843 {0, 65519},
8844 },
8845 },
8846 },
8847 {
8848 name: "BSRQ",
8849 argLen: 1,
8850 asm: x86.ABSRQ,
8851 reg: regInfo{
8852 inputs: []inputInfo{
8853 {0, 65519},
8854 },
8855 outputs: []outputInfo{
8856 {1, 0},
8857 {0, 65519},
8858 },
8859 },
8860 },
8861 {
8862 name: "BSRL",
8863 argLen: 1,
8864 clobberFlags: true,
8865 asm: x86.ABSRL,
8866 reg: regInfo{
8867 inputs: []inputInfo{
8868 {0, 65519},
8869 },
8870 outputs: []outputInfo{
8871 {0, 65519},
8872 },
8873 },
8874 },
8875 {
8876 name: "CMOVQEQ",
8877 argLen: 3,
8878 resultInArg0: true,
8879 asm: x86.ACMOVQEQ,
8880 reg: regInfo{
8881 inputs: []inputInfo{
8882 {0, 65519},
8883 {1, 65519},
8884 },
8885 outputs: []outputInfo{
8886 {0, 65519},
8887 },
8888 },
8889 },
8890 {
8891 name: "CMOVQNE",
8892 argLen: 3,
8893 resultInArg0: true,
8894 asm: x86.ACMOVQNE,
8895 reg: regInfo{
8896 inputs: []inputInfo{
8897 {0, 65519},
8898 {1, 65519},
8899 },
8900 outputs: []outputInfo{
8901 {0, 65519},
8902 },
8903 },
8904 },
8905 {
8906 name: "CMOVQLT",
8907 argLen: 3,
8908 resultInArg0: true,
8909 asm: x86.ACMOVQLT,
8910 reg: regInfo{
8911 inputs: []inputInfo{
8912 {0, 65519},
8913 {1, 65519},
8914 },
8915 outputs: []outputInfo{
8916 {0, 65519},
8917 },
8918 },
8919 },
8920 {
8921 name: "CMOVQGT",
8922 argLen: 3,
8923 resultInArg0: true,
8924 asm: x86.ACMOVQGT,
8925 reg: regInfo{
8926 inputs: []inputInfo{
8927 {0, 65519},
8928 {1, 65519},
8929 },
8930 outputs: []outputInfo{
8931 {0, 65519},
8932 },
8933 },
8934 },
8935 {
8936 name: "CMOVQLE",
8937 argLen: 3,
8938 resultInArg0: true,
8939 asm: x86.ACMOVQLE,
8940 reg: regInfo{
8941 inputs: []inputInfo{
8942 {0, 65519},
8943 {1, 65519},
8944 },
8945 outputs: []outputInfo{
8946 {0, 65519},
8947 },
8948 },
8949 },
8950 {
8951 name: "CMOVQGE",
8952 argLen: 3,
8953 resultInArg0: true,
8954 asm: x86.ACMOVQGE,
8955 reg: regInfo{
8956 inputs: []inputInfo{
8957 {0, 65519},
8958 {1, 65519},
8959 },
8960 outputs: []outputInfo{
8961 {0, 65519},
8962 },
8963 },
8964 },
8965 {
8966 name: "CMOVQLS",
8967 argLen: 3,
8968 resultInArg0: true,
8969 asm: x86.ACMOVQLS,
8970 reg: regInfo{
8971 inputs: []inputInfo{
8972 {0, 65519},
8973 {1, 65519},
8974 },
8975 outputs: []outputInfo{
8976 {0, 65519},
8977 },
8978 },
8979 },
8980 {
8981 name: "CMOVQHI",
8982 argLen: 3,
8983 resultInArg0: true,
8984 asm: x86.ACMOVQHI,
8985 reg: regInfo{
8986 inputs: []inputInfo{
8987 {0, 65519},
8988 {1, 65519},
8989 },
8990 outputs: []outputInfo{
8991 {0, 65519},
8992 },
8993 },
8994 },
8995 {
8996 name: "CMOVQCC",
8997 argLen: 3,
8998 resultInArg0: true,
8999 asm: x86.ACMOVQCC,
9000 reg: regInfo{
9001 inputs: []inputInfo{
9002 {0, 65519},
9003 {1, 65519},
9004 },
9005 outputs: []outputInfo{
9006 {0, 65519},
9007 },
9008 },
9009 },
9010 {
9011 name: "CMOVQCS",
9012 argLen: 3,
9013 resultInArg0: true,
9014 asm: x86.ACMOVQCS,
9015 reg: regInfo{
9016 inputs: []inputInfo{
9017 {0, 65519},
9018 {1, 65519},
9019 },
9020 outputs: []outputInfo{
9021 {0, 65519},
9022 },
9023 },
9024 },
9025 {
9026 name: "CMOVLEQ",
9027 argLen: 3,
9028 resultInArg0: true,
9029 asm: x86.ACMOVLEQ,
9030 reg: regInfo{
9031 inputs: []inputInfo{
9032 {0, 65519},
9033 {1, 65519},
9034 },
9035 outputs: []outputInfo{
9036 {0, 65519},
9037 },
9038 },
9039 },
9040 {
9041 name: "CMOVLNE",
9042 argLen: 3,
9043 resultInArg0: true,
9044 asm: x86.ACMOVLNE,
9045 reg: regInfo{
9046 inputs: []inputInfo{
9047 {0, 65519},
9048 {1, 65519},
9049 },
9050 outputs: []outputInfo{
9051 {0, 65519},
9052 },
9053 },
9054 },
9055 {
9056 name: "CMOVLLT",
9057 argLen: 3,
9058 resultInArg0: true,
9059 asm: x86.ACMOVLLT,
9060 reg: regInfo{
9061 inputs: []inputInfo{
9062 {0, 65519},
9063 {1, 65519},
9064 },
9065 outputs: []outputInfo{
9066 {0, 65519},
9067 },
9068 },
9069 },
9070 {
9071 name: "CMOVLGT",
9072 argLen: 3,
9073 resultInArg0: true,
9074 asm: x86.ACMOVLGT,
9075 reg: regInfo{
9076 inputs: []inputInfo{
9077 {0, 65519},
9078 {1, 65519},
9079 },
9080 outputs: []outputInfo{
9081 {0, 65519},
9082 },
9083 },
9084 },
9085 {
9086 name: "CMOVLLE",
9087 argLen: 3,
9088 resultInArg0: true,
9089 asm: x86.ACMOVLLE,
9090 reg: regInfo{
9091 inputs: []inputInfo{
9092 {0, 65519},
9093 {1, 65519},
9094 },
9095 outputs: []outputInfo{
9096 {0, 65519},
9097 },
9098 },
9099 },
9100 {
9101 name: "CMOVLGE",
9102 argLen: 3,
9103 resultInArg0: true,
9104 asm: x86.ACMOVLGE,
9105 reg: regInfo{
9106 inputs: []inputInfo{
9107 {0, 65519},
9108 {1, 65519},
9109 },
9110 outputs: []outputInfo{
9111 {0, 65519},
9112 },
9113 },
9114 },
9115 {
9116 name: "CMOVLLS",
9117 argLen: 3,
9118 resultInArg0: true,
9119 asm: x86.ACMOVLLS,
9120 reg: regInfo{
9121 inputs: []inputInfo{
9122 {0, 65519},
9123 {1, 65519},
9124 },
9125 outputs: []outputInfo{
9126 {0, 65519},
9127 },
9128 },
9129 },
9130 {
9131 name: "CMOVLHI",
9132 argLen: 3,
9133 resultInArg0: true,
9134 asm: x86.ACMOVLHI,
9135 reg: regInfo{
9136 inputs: []inputInfo{
9137 {0, 65519},
9138 {1, 65519},
9139 },
9140 outputs: []outputInfo{
9141 {0, 65519},
9142 },
9143 },
9144 },
9145 {
9146 name: "CMOVLCC",
9147 argLen: 3,
9148 resultInArg0: true,
9149 asm: x86.ACMOVLCC,
9150 reg: regInfo{
9151 inputs: []inputInfo{
9152 {0, 65519},
9153 {1, 65519},
9154 },
9155 outputs: []outputInfo{
9156 {0, 65519},
9157 },
9158 },
9159 },
9160 {
9161 name: "CMOVLCS",
9162 argLen: 3,
9163 resultInArg0: true,
9164 asm: x86.ACMOVLCS,
9165 reg: regInfo{
9166 inputs: []inputInfo{
9167 {0, 65519},
9168 {1, 65519},
9169 },
9170 outputs: []outputInfo{
9171 {0, 65519},
9172 },
9173 },
9174 },
9175 {
9176 name: "CMOVWEQ",
9177 argLen: 3,
9178 resultInArg0: true,
9179 asm: x86.ACMOVWEQ,
9180 reg: regInfo{
9181 inputs: []inputInfo{
9182 {0, 65519},
9183 {1, 65519},
9184 },
9185 outputs: []outputInfo{
9186 {0, 65519},
9187 },
9188 },
9189 },
9190 {
9191 name: "CMOVWNE",
9192 argLen: 3,
9193 resultInArg0: true,
9194 asm: x86.ACMOVWNE,
9195 reg: regInfo{
9196 inputs: []inputInfo{
9197 {0, 65519},
9198 {1, 65519},
9199 },
9200 outputs: []outputInfo{
9201 {0, 65519},
9202 },
9203 },
9204 },
9205 {
9206 name: "CMOVWLT",
9207 argLen: 3,
9208 resultInArg0: true,
9209 asm: x86.ACMOVWLT,
9210 reg: regInfo{
9211 inputs: []inputInfo{
9212 {0, 65519},
9213 {1, 65519},
9214 },
9215 outputs: []outputInfo{
9216 {0, 65519},
9217 },
9218 },
9219 },
9220 {
9221 name: "CMOVWGT",
9222 argLen: 3,
9223 resultInArg0: true,
9224 asm: x86.ACMOVWGT,
9225 reg: regInfo{
9226 inputs: []inputInfo{
9227 {0, 65519},
9228 {1, 65519},
9229 },
9230 outputs: []outputInfo{
9231 {0, 65519},
9232 },
9233 },
9234 },
9235 {
9236 name: "CMOVWLE",
9237 argLen: 3,
9238 resultInArg0: true,
9239 asm: x86.ACMOVWLE,
9240 reg: regInfo{
9241 inputs: []inputInfo{
9242 {0, 65519},
9243 {1, 65519},
9244 },
9245 outputs: []outputInfo{
9246 {0, 65519},
9247 },
9248 },
9249 },
9250 {
9251 name: "CMOVWGE",
9252 argLen: 3,
9253 resultInArg0: true,
9254 asm: x86.ACMOVWGE,
9255 reg: regInfo{
9256 inputs: []inputInfo{
9257 {0, 65519},
9258 {1, 65519},
9259 },
9260 outputs: []outputInfo{
9261 {0, 65519},
9262 },
9263 },
9264 },
9265 {
9266 name: "CMOVWLS",
9267 argLen: 3,
9268 resultInArg0: true,
9269 asm: x86.ACMOVWLS,
9270 reg: regInfo{
9271 inputs: []inputInfo{
9272 {0, 65519},
9273 {1, 65519},
9274 },
9275 outputs: []outputInfo{
9276 {0, 65519},
9277 },
9278 },
9279 },
9280 {
9281 name: "CMOVWHI",
9282 argLen: 3,
9283 resultInArg0: true,
9284 asm: x86.ACMOVWHI,
9285 reg: regInfo{
9286 inputs: []inputInfo{
9287 {0, 65519},
9288 {1, 65519},
9289 },
9290 outputs: []outputInfo{
9291 {0, 65519},
9292 },
9293 },
9294 },
9295 {
9296 name: "CMOVWCC",
9297 argLen: 3,
9298 resultInArg0: true,
9299 asm: x86.ACMOVWCC,
9300 reg: regInfo{
9301 inputs: []inputInfo{
9302 {0, 65519},
9303 {1, 65519},
9304 },
9305 outputs: []outputInfo{
9306 {0, 65519},
9307 },
9308 },
9309 },
9310 {
9311 name: "CMOVWCS",
9312 argLen: 3,
9313 resultInArg0: true,
9314 asm: x86.ACMOVWCS,
9315 reg: regInfo{
9316 inputs: []inputInfo{
9317 {0, 65519},
9318 {1, 65519},
9319 },
9320 outputs: []outputInfo{
9321 {0, 65519},
9322 },
9323 },
9324 },
9325 {
9326 name: "CMOVQEQF",
9327 argLen: 3,
9328 resultInArg0: true,
9329 asm: x86.ACMOVQNE,
9330 reg: regInfo{
9331 inputs: []inputInfo{
9332 {0, 65518},
9333 {1, 65519},
9334 },
9335 clobbers: 1,
9336 outputs: []outputInfo{
9337 {0, 65518},
9338 },
9339 },
9340 },
9341 {
9342 name: "CMOVQNEF",
9343 argLen: 3,
9344 resultInArg0: true,
9345 asm: x86.ACMOVQNE,
9346 reg: regInfo{
9347 inputs: []inputInfo{
9348 {0, 65519},
9349 {1, 65519},
9350 },
9351 outputs: []outputInfo{
9352 {0, 65519},
9353 },
9354 },
9355 },
9356 {
9357 name: "CMOVQGTF",
9358 argLen: 3,
9359 resultInArg0: true,
9360 asm: x86.ACMOVQHI,
9361 reg: regInfo{
9362 inputs: []inputInfo{
9363 {0, 65519},
9364 {1, 65519},
9365 },
9366 outputs: []outputInfo{
9367 {0, 65519},
9368 },
9369 },
9370 },
9371 {
9372 name: "CMOVQGEF",
9373 argLen: 3,
9374 resultInArg0: true,
9375 asm: x86.ACMOVQCC,
9376 reg: regInfo{
9377 inputs: []inputInfo{
9378 {0, 65519},
9379 {1, 65519},
9380 },
9381 outputs: []outputInfo{
9382 {0, 65519},
9383 },
9384 },
9385 },
9386 {
9387 name: "CMOVLEQF",
9388 argLen: 3,
9389 resultInArg0: true,
9390 asm: x86.ACMOVLNE,
9391 reg: regInfo{
9392 inputs: []inputInfo{
9393 {0, 65518},
9394 {1, 65519},
9395 },
9396 clobbers: 1,
9397 outputs: []outputInfo{
9398 {0, 65518},
9399 },
9400 },
9401 },
9402 {
9403 name: "CMOVLNEF",
9404 argLen: 3,
9405 resultInArg0: true,
9406 asm: x86.ACMOVLNE,
9407 reg: regInfo{
9408 inputs: []inputInfo{
9409 {0, 65519},
9410 {1, 65519},
9411 },
9412 outputs: []outputInfo{
9413 {0, 65519},
9414 },
9415 },
9416 },
9417 {
9418 name: "CMOVLGTF",
9419 argLen: 3,
9420 resultInArg0: true,
9421 asm: x86.ACMOVLHI,
9422 reg: regInfo{
9423 inputs: []inputInfo{
9424 {0, 65519},
9425 {1, 65519},
9426 },
9427 outputs: []outputInfo{
9428 {0, 65519},
9429 },
9430 },
9431 },
9432 {
9433 name: "CMOVLGEF",
9434 argLen: 3,
9435 resultInArg0: true,
9436 asm: x86.ACMOVLCC,
9437 reg: regInfo{
9438 inputs: []inputInfo{
9439 {0, 65519},
9440 {1, 65519},
9441 },
9442 outputs: []outputInfo{
9443 {0, 65519},
9444 },
9445 },
9446 },
9447 {
9448 name: "CMOVWEQF",
9449 argLen: 3,
9450 resultInArg0: true,
9451 asm: x86.ACMOVWNE,
9452 reg: regInfo{
9453 inputs: []inputInfo{
9454 {0, 65518},
9455 {1, 65519},
9456 },
9457 clobbers: 1,
9458 outputs: []outputInfo{
9459 {0, 65518},
9460 },
9461 },
9462 },
9463 {
9464 name: "CMOVWNEF",
9465 argLen: 3,
9466 resultInArg0: true,
9467 asm: x86.ACMOVWNE,
9468 reg: regInfo{
9469 inputs: []inputInfo{
9470 {0, 65519},
9471 {1, 65519},
9472 },
9473 outputs: []outputInfo{
9474 {0, 65519},
9475 },
9476 },
9477 },
9478 {
9479 name: "CMOVWGTF",
9480 argLen: 3,
9481 resultInArg0: true,
9482 asm: x86.ACMOVWHI,
9483 reg: regInfo{
9484 inputs: []inputInfo{
9485 {0, 65519},
9486 {1, 65519},
9487 },
9488 outputs: []outputInfo{
9489 {0, 65519},
9490 },
9491 },
9492 },
9493 {
9494 name: "CMOVWGEF",
9495 argLen: 3,
9496 resultInArg0: true,
9497 asm: x86.ACMOVWCC,
9498 reg: regInfo{
9499 inputs: []inputInfo{
9500 {0, 65519},
9501 {1, 65519},
9502 },
9503 outputs: []outputInfo{
9504 {0, 65519},
9505 },
9506 },
9507 },
9508 {
9509 name: "BSWAPQ",
9510 argLen: 1,
9511 resultInArg0: true,
9512 clobberFlags: true,
9513 asm: x86.ABSWAPQ,
9514 reg: regInfo{
9515 inputs: []inputInfo{
9516 {0, 65519},
9517 },
9518 outputs: []outputInfo{
9519 {0, 65519},
9520 },
9521 },
9522 },
9523 {
9524 name: "BSWAPL",
9525 argLen: 1,
9526 resultInArg0: true,
9527 clobberFlags: true,
9528 asm: x86.ABSWAPL,
9529 reg: regInfo{
9530 inputs: []inputInfo{
9531 {0, 65519},
9532 },
9533 outputs: []outputInfo{
9534 {0, 65519},
9535 },
9536 },
9537 },
9538 {
9539 name: "POPCNTQ",
9540 argLen: 1,
9541 clobberFlags: true,
9542 asm: x86.APOPCNTQ,
9543 reg: regInfo{
9544 inputs: []inputInfo{
9545 {0, 65519},
9546 },
9547 outputs: []outputInfo{
9548 {0, 65519},
9549 },
9550 },
9551 },
9552 {
9553 name: "POPCNTL",
9554 argLen: 1,
9555 clobberFlags: true,
9556 asm: x86.APOPCNTL,
9557 reg: regInfo{
9558 inputs: []inputInfo{
9559 {0, 65519},
9560 },
9561 outputs: []outputInfo{
9562 {0, 65519},
9563 },
9564 },
9565 },
9566 {
9567 name: "SQRTSD",
9568 argLen: 1,
9569 asm: x86.ASQRTSD,
9570 reg: regInfo{
9571 inputs: []inputInfo{
9572 {0, 4294901760},
9573 },
9574 outputs: []outputInfo{
9575 {0, 4294901760},
9576 },
9577 },
9578 },
9579 {
9580 name: "ROUNDSD",
9581 auxType: auxInt8,
9582 argLen: 1,
9583 asm: x86.AROUNDSD,
9584 reg: regInfo{
9585 inputs: []inputInfo{
9586 {0, 4294901760},
9587 },
9588 outputs: []outputInfo{
9589 {0, 4294901760},
9590 },
9591 },
9592 },
9593 {
9594 name: "SBBQcarrymask",
9595 argLen: 1,
9596 asm: x86.ASBBQ,
9597 reg: regInfo{
9598 outputs: []outputInfo{
9599 {0, 65519},
9600 },
9601 },
9602 },
9603 {
9604 name: "SBBLcarrymask",
9605 argLen: 1,
9606 asm: x86.ASBBL,
9607 reg: regInfo{
9608 outputs: []outputInfo{
9609 {0, 65519},
9610 },
9611 },
9612 },
9613 {
9614 name: "SETEQ",
9615 argLen: 1,
9616 asm: x86.ASETEQ,
9617 reg: regInfo{
9618 outputs: []outputInfo{
9619 {0, 65519},
9620 },
9621 },
9622 },
9623 {
9624 name: "SETNE",
9625 argLen: 1,
9626 asm: x86.ASETNE,
9627 reg: regInfo{
9628 outputs: []outputInfo{
9629 {0, 65519},
9630 },
9631 },
9632 },
9633 {
9634 name: "SETL",
9635 argLen: 1,
9636 asm: x86.ASETLT,
9637 reg: regInfo{
9638 outputs: []outputInfo{
9639 {0, 65519},
9640 },
9641 },
9642 },
9643 {
9644 name: "SETLE",
9645 argLen: 1,
9646 asm: x86.ASETLE,
9647 reg: regInfo{
9648 outputs: []outputInfo{
9649 {0, 65519},
9650 },
9651 },
9652 },
9653 {
9654 name: "SETG",
9655 argLen: 1,
9656 asm: x86.ASETGT,
9657 reg: regInfo{
9658 outputs: []outputInfo{
9659 {0, 65519},
9660 },
9661 },
9662 },
9663 {
9664 name: "SETGE",
9665 argLen: 1,
9666 asm: x86.ASETGE,
9667 reg: regInfo{
9668 outputs: []outputInfo{
9669 {0, 65519},
9670 },
9671 },
9672 },
9673 {
9674 name: "SETB",
9675 argLen: 1,
9676 asm: x86.ASETCS,
9677 reg: regInfo{
9678 outputs: []outputInfo{
9679 {0, 65519},
9680 },
9681 },
9682 },
9683 {
9684 name: "SETBE",
9685 argLen: 1,
9686 asm: x86.ASETLS,
9687 reg: regInfo{
9688 outputs: []outputInfo{
9689 {0, 65519},
9690 },
9691 },
9692 },
9693 {
9694 name: "SETA",
9695 argLen: 1,
9696 asm: x86.ASETHI,
9697 reg: regInfo{
9698 outputs: []outputInfo{
9699 {0, 65519},
9700 },
9701 },
9702 },
9703 {
9704 name: "SETAE",
9705 argLen: 1,
9706 asm: x86.ASETCC,
9707 reg: regInfo{
9708 outputs: []outputInfo{
9709 {0, 65519},
9710 },
9711 },
9712 },
9713 {
9714 name: "SETO",
9715 argLen: 1,
9716 asm: x86.ASETOS,
9717 reg: regInfo{
9718 outputs: []outputInfo{
9719 {0, 65519},
9720 },
9721 },
9722 },
9723 {
9724 name: "SETEQstore",
9725 auxType: auxSymOff,
9726 argLen: 3,
9727 faultOnNilArg0: true,
9728 symEffect: SymWrite,
9729 asm: x86.ASETEQ,
9730 reg: regInfo{
9731 inputs: []inputInfo{
9732 {0, 4295032831},
9733 },
9734 },
9735 },
9736 {
9737 name: "SETNEstore",
9738 auxType: auxSymOff,
9739 argLen: 3,
9740 faultOnNilArg0: true,
9741 symEffect: SymWrite,
9742 asm: x86.ASETNE,
9743 reg: regInfo{
9744 inputs: []inputInfo{
9745 {0, 4295032831},
9746 },
9747 },
9748 },
9749 {
9750 name: "SETLstore",
9751 auxType: auxSymOff,
9752 argLen: 3,
9753 faultOnNilArg0: true,
9754 symEffect: SymWrite,
9755 asm: x86.ASETLT,
9756 reg: regInfo{
9757 inputs: []inputInfo{
9758 {0, 4295032831},
9759 },
9760 },
9761 },
9762 {
9763 name: "SETLEstore",
9764 auxType: auxSymOff,
9765 argLen: 3,
9766 faultOnNilArg0: true,
9767 symEffect: SymWrite,
9768 asm: x86.ASETLE,
9769 reg: regInfo{
9770 inputs: []inputInfo{
9771 {0, 4295032831},
9772 },
9773 },
9774 },
9775 {
9776 name: "SETGstore",
9777 auxType: auxSymOff,
9778 argLen: 3,
9779 faultOnNilArg0: true,
9780 symEffect: SymWrite,
9781 asm: x86.ASETGT,
9782 reg: regInfo{
9783 inputs: []inputInfo{
9784 {0, 4295032831},
9785 },
9786 },
9787 },
9788 {
9789 name: "SETGEstore",
9790 auxType: auxSymOff,
9791 argLen: 3,
9792 faultOnNilArg0: true,
9793 symEffect: SymWrite,
9794 asm: x86.ASETGE,
9795 reg: regInfo{
9796 inputs: []inputInfo{
9797 {0, 4295032831},
9798 },
9799 },
9800 },
9801 {
9802 name: "SETBstore",
9803 auxType: auxSymOff,
9804 argLen: 3,
9805 faultOnNilArg0: true,
9806 symEffect: SymWrite,
9807 asm: x86.ASETCS,
9808 reg: regInfo{
9809 inputs: []inputInfo{
9810 {0, 4295032831},
9811 },
9812 },
9813 },
9814 {
9815 name: "SETBEstore",
9816 auxType: auxSymOff,
9817 argLen: 3,
9818 faultOnNilArg0: true,
9819 symEffect: SymWrite,
9820 asm: x86.ASETLS,
9821 reg: regInfo{
9822 inputs: []inputInfo{
9823 {0, 4295032831},
9824 },
9825 },
9826 },
9827 {
9828 name: "SETAstore",
9829 auxType: auxSymOff,
9830 argLen: 3,
9831 faultOnNilArg0: true,
9832 symEffect: SymWrite,
9833 asm: x86.ASETHI,
9834 reg: regInfo{
9835 inputs: []inputInfo{
9836 {0, 4295032831},
9837 },
9838 },
9839 },
9840 {
9841 name: "SETAEstore",
9842 auxType: auxSymOff,
9843 argLen: 3,
9844 faultOnNilArg0: true,
9845 symEffect: SymWrite,
9846 asm: x86.ASETCC,
9847 reg: regInfo{
9848 inputs: []inputInfo{
9849 {0, 4295032831},
9850 },
9851 },
9852 },
9853 {
9854 name: "SETEQF",
9855 argLen: 1,
9856 clobberFlags: true,
9857 asm: x86.ASETEQ,
9858 reg: regInfo{
9859 clobbers: 1,
9860 outputs: []outputInfo{
9861 {0, 65518},
9862 },
9863 },
9864 },
9865 {
9866 name: "SETNEF",
9867 argLen: 1,
9868 clobberFlags: true,
9869 asm: x86.ASETNE,
9870 reg: regInfo{
9871 clobbers: 1,
9872 outputs: []outputInfo{
9873 {0, 65518},
9874 },
9875 },
9876 },
9877 {
9878 name: "SETORD",
9879 argLen: 1,
9880 asm: x86.ASETPC,
9881 reg: regInfo{
9882 outputs: []outputInfo{
9883 {0, 65519},
9884 },
9885 },
9886 },
9887 {
9888 name: "SETNAN",
9889 argLen: 1,
9890 asm: x86.ASETPS,
9891 reg: regInfo{
9892 outputs: []outputInfo{
9893 {0, 65519},
9894 },
9895 },
9896 },
9897 {
9898 name: "SETGF",
9899 argLen: 1,
9900 asm: x86.ASETHI,
9901 reg: regInfo{
9902 outputs: []outputInfo{
9903 {0, 65519},
9904 },
9905 },
9906 },
9907 {
9908 name: "SETGEF",
9909 argLen: 1,
9910 asm: x86.ASETCC,
9911 reg: regInfo{
9912 outputs: []outputInfo{
9913 {0, 65519},
9914 },
9915 },
9916 },
9917 {
9918 name: "MOVBQSX",
9919 argLen: 1,
9920 asm: x86.AMOVBQSX,
9921 reg: regInfo{
9922 inputs: []inputInfo{
9923 {0, 65519},
9924 },
9925 outputs: []outputInfo{
9926 {0, 65519},
9927 },
9928 },
9929 },
9930 {
9931 name: "MOVBQZX",
9932 argLen: 1,
9933 asm: x86.AMOVBLZX,
9934 reg: regInfo{
9935 inputs: []inputInfo{
9936 {0, 65519},
9937 },
9938 outputs: []outputInfo{
9939 {0, 65519},
9940 },
9941 },
9942 },
9943 {
9944 name: "MOVWQSX",
9945 argLen: 1,
9946 asm: x86.AMOVWQSX,
9947 reg: regInfo{
9948 inputs: []inputInfo{
9949 {0, 65519},
9950 },
9951 outputs: []outputInfo{
9952 {0, 65519},
9953 },
9954 },
9955 },
9956 {
9957 name: "MOVWQZX",
9958 argLen: 1,
9959 asm: x86.AMOVWLZX,
9960 reg: regInfo{
9961 inputs: []inputInfo{
9962 {0, 65519},
9963 },
9964 outputs: []outputInfo{
9965 {0, 65519},
9966 },
9967 },
9968 },
9969 {
9970 name: "MOVLQSX",
9971 argLen: 1,
9972 asm: x86.AMOVLQSX,
9973 reg: regInfo{
9974 inputs: []inputInfo{
9975 {0, 65519},
9976 },
9977 outputs: []outputInfo{
9978 {0, 65519},
9979 },
9980 },
9981 },
9982 {
9983 name: "MOVLQZX",
9984 argLen: 1,
9985 asm: x86.AMOVL,
9986 reg: regInfo{
9987 inputs: []inputInfo{
9988 {0, 65519},
9989 },
9990 outputs: []outputInfo{
9991 {0, 65519},
9992 },
9993 },
9994 },
9995 {
9996 name: "MOVLconst",
9997 auxType: auxInt32,
9998 argLen: 0,
9999 rematerializeable: true,
10000 asm: x86.AMOVL,
10001 reg: regInfo{
10002 outputs: []outputInfo{
10003 {0, 65519},
10004 },
10005 },
10006 },
10007 {
10008 name: "MOVQconst",
10009 auxType: auxInt64,
10010 argLen: 0,
10011 rematerializeable: true,
10012 asm: x86.AMOVQ,
10013 reg: regInfo{
10014 outputs: []outputInfo{
10015 {0, 65519},
10016 },
10017 },
10018 },
10019 {
10020 name: "CVTTSD2SL",
10021 argLen: 1,
10022 asm: x86.ACVTTSD2SL,
10023 reg: regInfo{
10024 inputs: []inputInfo{
10025 {0, 4294901760},
10026 },
10027 outputs: []outputInfo{
10028 {0, 65519},
10029 },
10030 },
10031 },
10032 {
10033 name: "CVTTSD2SQ",
10034 argLen: 1,
10035 asm: x86.ACVTTSD2SQ,
10036 reg: regInfo{
10037 inputs: []inputInfo{
10038 {0, 4294901760},
10039 },
10040 outputs: []outputInfo{
10041 {0, 65519},
10042 },
10043 },
10044 },
10045 {
10046 name: "CVTTSS2SL",
10047 argLen: 1,
10048 asm: x86.ACVTTSS2SL,
10049 reg: regInfo{
10050 inputs: []inputInfo{
10051 {0, 4294901760},
10052 },
10053 outputs: []outputInfo{
10054 {0, 65519},
10055 },
10056 },
10057 },
10058 {
10059 name: "CVTTSS2SQ",
10060 argLen: 1,
10061 asm: x86.ACVTTSS2SQ,
10062 reg: regInfo{
10063 inputs: []inputInfo{
10064 {0, 4294901760},
10065 },
10066 outputs: []outputInfo{
10067 {0, 65519},
10068 },
10069 },
10070 },
10071 {
10072 name: "CVTSL2SS",
10073 argLen: 1,
10074 asm: x86.ACVTSL2SS,
10075 reg: regInfo{
10076 inputs: []inputInfo{
10077 {0, 65519},
10078 },
10079 outputs: []outputInfo{
10080 {0, 4294901760},
10081 },
10082 },
10083 },
10084 {
10085 name: "CVTSL2SD",
10086 argLen: 1,
10087 asm: x86.ACVTSL2SD,
10088 reg: regInfo{
10089 inputs: []inputInfo{
10090 {0, 65519},
10091 },
10092 outputs: []outputInfo{
10093 {0, 4294901760},
10094 },
10095 },
10096 },
10097 {
10098 name: "CVTSQ2SS",
10099 argLen: 1,
10100 asm: x86.ACVTSQ2SS,
10101 reg: regInfo{
10102 inputs: []inputInfo{
10103 {0, 65519},
10104 },
10105 outputs: []outputInfo{
10106 {0, 4294901760},
10107 },
10108 },
10109 },
10110 {
10111 name: "CVTSQ2SD",
10112 argLen: 1,
10113 asm: x86.ACVTSQ2SD,
10114 reg: regInfo{
10115 inputs: []inputInfo{
10116 {0, 65519},
10117 },
10118 outputs: []outputInfo{
10119 {0, 4294901760},
10120 },
10121 },
10122 },
10123 {
10124 name: "CVTSD2SS",
10125 argLen: 1,
10126 asm: x86.ACVTSD2SS,
10127 reg: regInfo{
10128 inputs: []inputInfo{
10129 {0, 4294901760},
10130 },
10131 outputs: []outputInfo{
10132 {0, 4294901760},
10133 },
10134 },
10135 },
10136 {
10137 name: "CVTSS2SD",
10138 argLen: 1,
10139 asm: x86.ACVTSS2SD,
10140 reg: regInfo{
10141 inputs: []inputInfo{
10142 {0, 4294901760},
10143 },
10144 outputs: []outputInfo{
10145 {0, 4294901760},
10146 },
10147 },
10148 },
10149 {
10150 name: "MOVQi2f",
10151 argLen: 1,
10152 reg: regInfo{
10153 inputs: []inputInfo{
10154 {0, 65519},
10155 },
10156 outputs: []outputInfo{
10157 {0, 4294901760},
10158 },
10159 },
10160 },
10161 {
10162 name: "MOVQf2i",
10163 argLen: 1,
10164 reg: regInfo{
10165 inputs: []inputInfo{
10166 {0, 4294901760},
10167 },
10168 outputs: []outputInfo{
10169 {0, 65519},
10170 },
10171 },
10172 },
10173 {
10174 name: "MOVLi2f",
10175 argLen: 1,
10176 reg: regInfo{
10177 inputs: []inputInfo{
10178 {0, 65519},
10179 },
10180 outputs: []outputInfo{
10181 {0, 4294901760},
10182 },
10183 },
10184 },
10185 {
10186 name: "MOVLf2i",
10187 argLen: 1,
10188 reg: regInfo{
10189 inputs: []inputInfo{
10190 {0, 4294901760},
10191 },
10192 outputs: []outputInfo{
10193 {0, 65519},
10194 },
10195 },
10196 },
10197 {
10198 name: "PXOR",
10199 argLen: 2,
10200 commutative: true,
10201 resultInArg0: true,
10202 asm: x86.APXOR,
10203 reg: regInfo{
10204 inputs: []inputInfo{
10205 {0, 4294901760},
10206 {1, 4294901760},
10207 },
10208 outputs: []outputInfo{
10209 {0, 4294901760},
10210 },
10211 },
10212 },
10213 {
10214 name: "LEAQ",
10215 auxType: auxSymOff,
10216 argLen: 1,
10217 rematerializeable: true,
10218 symEffect: SymAddr,
10219 asm: x86.ALEAQ,
10220 reg: regInfo{
10221 inputs: []inputInfo{
10222 {0, 4295032831},
10223 },
10224 outputs: []outputInfo{
10225 {0, 65519},
10226 },
10227 },
10228 },
10229 {
10230 name: "LEAL",
10231 auxType: auxSymOff,
10232 argLen: 1,
10233 rematerializeable: true,
10234 symEffect: SymAddr,
10235 asm: x86.ALEAL,
10236 reg: regInfo{
10237 inputs: []inputInfo{
10238 {0, 4295032831},
10239 },
10240 outputs: []outputInfo{
10241 {0, 65519},
10242 },
10243 },
10244 },
10245 {
10246 name: "LEAW",
10247 auxType: auxSymOff,
10248 argLen: 1,
10249 rematerializeable: true,
10250 symEffect: SymAddr,
10251 asm: x86.ALEAW,
10252 reg: regInfo{
10253 inputs: []inputInfo{
10254 {0, 4295032831},
10255 },
10256 outputs: []outputInfo{
10257 {0, 65519},
10258 },
10259 },
10260 },
10261 {
10262 name: "LEAQ1",
10263 auxType: auxSymOff,
10264 argLen: 2,
10265 commutative: true,
10266 symEffect: SymAddr,
10267 asm: x86.ALEAQ,
10268 scale: 1,
10269 reg: regInfo{
10270 inputs: []inputInfo{
10271 {1, 65535},
10272 {0, 4295032831},
10273 },
10274 outputs: []outputInfo{
10275 {0, 65519},
10276 },
10277 },
10278 },
10279 {
10280 name: "LEAL1",
10281 auxType: auxSymOff,
10282 argLen: 2,
10283 commutative: true,
10284 symEffect: SymAddr,
10285 asm: x86.ALEAL,
10286 scale: 1,
10287 reg: regInfo{
10288 inputs: []inputInfo{
10289 {1, 65535},
10290 {0, 4295032831},
10291 },
10292 outputs: []outputInfo{
10293 {0, 65519},
10294 },
10295 },
10296 },
10297 {
10298 name: "LEAW1",
10299 auxType: auxSymOff,
10300 argLen: 2,
10301 commutative: true,
10302 symEffect: SymAddr,
10303 asm: x86.ALEAW,
10304 scale: 1,
10305 reg: regInfo{
10306 inputs: []inputInfo{
10307 {1, 65535},
10308 {0, 4295032831},
10309 },
10310 outputs: []outputInfo{
10311 {0, 65519},
10312 },
10313 },
10314 },
10315 {
10316 name: "LEAQ2",
10317 auxType: auxSymOff,
10318 argLen: 2,
10319 symEffect: SymAddr,
10320 asm: x86.ALEAQ,
10321 scale: 2,
10322 reg: regInfo{
10323 inputs: []inputInfo{
10324 {1, 65535},
10325 {0, 4295032831},
10326 },
10327 outputs: []outputInfo{
10328 {0, 65519},
10329 },
10330 },
10331 },
10332 {
10333 name: "LEAL2",
10334 auxType: auxSymOff,
10335 argLen: 2,
10336 symEffect: SymAddr,
10337 asm: x86.ALEAL,
10338 scale: 2,
10339 reg: regInfo{
10340 inputs: []inputInfo{
10341 {1, 65535},
10342 {0, 4295032831},
10343 },
10344 outputs: []outputInfo{
10345 {0, 65519},
10346 },
10347 },
10348 },
10349 {
10350 name: "LEAW2",
10351 auxType: auxSymOff,
10352 argLen: 2,
10353 symEffect: SymAddr,
10354 asm: x86.ALEAW,
10355 scale: 2,
10356 reg: regInfo{
10357 inputs: []inputInfo{
10358 {1, 65535},
10359 {0, 4295032831},
10360 },
10361 outputs: []outputInfo{
10362 {0, 65519},
10363 },
10364 },
10365 },
10366 {
10367 name: "LEAQ4",
10368 auxType: auxSymOff,
10369 argLen: 2,
10370 symEffect: SymAddr,
10371 asm: x86.ALEAQ,
10372 scale: 4,
10373 reg: regInfo{
10374 inputs: []inputInfo{
10375 {1, 65535},
10376 {0, 4295032831},
10377 },
10378 outputs: []outputInfo{
10379 {0, 65519},
10380 },
10381 },
10382 },
10383 {
10384 name: "LEAL4",
10385 auxType: auxSymOff,
10386 argLen: 2,
10387 symEffect: SymAddr,
10388 asm: x86.ALEAL,
10389 scale: 4,
10390 reg: regInfo{
10391 inputs: []inputInfo{
10392 {1, 65535},
10393 {0, 4295032831},
10394 },
10395 outputs: []outputInfo{
10396 {0, 65519},
10397 },
10398 },
10399 },
10400 {
10401 name: "LEAW4",
10402 auxType: auxSymOff,
10403 argLen: 2,
10404 symEffect: SymAddr,
10405 asm: x86.ALEAW,
10406 scale: 4,
10407 reg: regInfo{
10408 inputs: []inputInfo{
10409 {1, 65535},
10410 {0, 4295032831},
10411 },
10412 outputs: []outputInfo{
10413 {0, 65519},
10414 },
10415 },
10416 },
10417 {
10418 name: "LEAQ8",
10419 auxType: auxSymOff,
10420 argLen: 2,
10421 symEffect: SymAddr,
10422 asm: x86.ALEAQ,
10423 scale: 8,
10424 reg: regInfo{
10425 inputs: []inputInfo{
10426 {1, 65535},
10427 {0, 4295032831},
10428 },
10429 outputs: []outputInfo{
10430 {0, 65519},
10431 },
10432 },
10433 },
10434 {
10435 name: "LEAL8",
10436 auxType: auxSymOff,
10437 argLen: 2,
10438 symEffect: SymAddr,
10439 asm: x86.ALEAL,
10440 scale: 8,
10441 reg: regInfo{
10442 inputs: []inputInfo{
10443 {1, 65535},
10444 {0, 4295032831},
10445 },
10446 outputs: []outputInfo{
10447 {0, 65519},
10448 },
10449 },
10450 },
10451 {
10452 name: "LEAW8",
10453 auxType: auxSymOff,
10454 argLen: 2,
10455 symEffect: SymAddr,
10456 asm: x86.ALEAW,
10457 scale: 8,
10458 reg: regInfo{
10459 inputs: []inputInfo{
10460 {1, 65535},
10461 {0, 4295032831},
10462 },
10463 outputs: []outputInfo{
10464 {0, 65519},
10465 },
10466 },
10467 },
10468 {
10469 name: "MOVBload",
10470 auxType: auxSymOff,
10471 argLen: 2,
10472 faultOnNilArg0: true,
10473 symEffect: SymRead,
10474 asm: x86.AMOVBLZX,
10475 reg: regInfo{
10476 inputs: []inputInfo{
10477 {0, 4295032831},
10478 },
10479 outputs: []outputInfo{
10480 {0, 65519},
10481 },
10482 },
10483 },
10484 {
10485 name: "MOVBQSXload",
10486 auxType: auxSymOff,
10487 argLen: 2,
10488 faultOnNilArg0: true,
10489 symEffect: SymRead,
10490 asm: x86.AMOVBQSX,
10491 reg: regInfo{
10492 inputs: []inputInfo{
10493 {0, 4295032831},
10494 },
10495 outputs: []outputInfo{
10496 {0, 65519},
10497 },
10498 },
10499 },
10500 {
10501 name: "MOVWload",
10502 auxType: auxSymOff,
10503 argLen: 2,
10504 faultOnNilArg0: true,
10505 symEffect: SymRead,
10506 asm: x86.AMOVWLZX,
10507 reg: regInfo{
10508 inputs: []inputInfo{
10509 {0, 4295032831},
10510 },
10511 outputs: []outputInfo{
10512 {0, 65519},
10513 },
10514 },
10515 },
10516 {
10517 name: "MOVWQSXload",
10518 auxType: auxSymOff,
10519 argLen: 2,
10520 faultOnNilArg0: true,
10521 symEffect: SymRead,
10522 asm: x86.AMOVWQSX,
10523 reg: regInfo{
10524 inputs: []inputInfo{
10525 {0, 4295032831},
10526 },
10527 outputs: []outputInfo{
10528 {0, 65519},
10529 },
10530 },
10531 },
10532 {
10533 name: "MOVLload",
10534 auxType: auxSymOff,
10535 argLen: 2,
10536 faultOnNilArg0: true,
10537 symEffect: SymRead,
10538 asm: x86.AMOVL,
10539 reg: regInfo{
10540 inputs: []inputInfo{
10541 {0, 4295032831},
10542 },
10543 outputs: []outputInfo{
10544 {0, 65519},
10545 },
10546 },
10547 },
10548 {
10549 name: "MOVLQSXload",
10550 auxType: auxSymOff,
10551 argLen: 2,
10552 faultOnNilArg0: true,
10553 symEffect: SymRead,
10554 asm: x86.AMOVLQSX,
10555 reg: regInfo{
10556 inputs: []inputInfo{
10557 {0, 4295032831},
10558 },
10559 outputs: []outputInfo{
10560 {0, 65519},
10561 },
10562 },
10563 },
10564 {
10565 name: "MOVQload",
10566 auxType: auxSymOff,
10567 argLen: 2,
10568 faultOnNilArg0: true,
10569 symEffect: SymRead,
10570 asm: x86.AMOVQ,
10571 reg: regInfo{
10572 inputs: []inputInfo{
10573 {0, 4295032831},
10574 },
10575 outputs: []outputInfo{
10576 {0, 65519},
10577 },
10578 },
10579 },
10580 {
10581 name: "MOVBstore",
10582 auxType: auxSymOff,
10583 argLen: 3,
10584 faultOnNilArg0: true,
10585 symEffect: SymWrite,
10586 asm: x86.AMOVB,
10587 reg: regInfo{
10588 inputs: []inputInfo{
10589 {1, 65535},
10590 {0, 4295032831},
10591 },
10592 },
10593 },
10594 {
10595 name: "MOVWstore",
10596 auxType: auxSymOff,
10597 argLen: 3,
10598 faultOnNilArg0: true,
10599 symEffect: SymWrite,
10600 asm: x86.AMOVW,
10601 reg: regInfo{
10602 inputs: []inputInfo{
10603 {1, 65535},
10604 {0, 4295032831},
10605 },
10606 },
10607 },
10608 {
10609 name: "MOVLstore",
10610 auxType: auxSymOff,
10611 argLen: 3,
10612 faultOnNilArg0: true,
10613 symEffect: SymWrite,
10614 asm: x86.AMOVL,
10615 reg: regInfo{
10616 inputs: []inputInfo{
10617 {1, 65535},
10618 {0, 4295032831},
10619 },
10620 },
10621 },
10622 {
10623 name: "MOVQstore",
10624 auxType: auxSymOff,
10625 argLen: 3,
10626 faultOnNilArg0: true,
10627 symEffect: SymWrite,
10628 asm: x86.AMOVQ,
10629 reg: regInfo{
10630 inputs: []inputInfo{
10631 {1, 65535},
10632 {0, 4295032831},
10633 },
10634 },
10635 },
10636 {
10637 name: "MOVOload",
10638 auxType: auxSymOff,
10639 argLen: 2,
10640 faultOnNilArg0: true,
10641 symEffect: SymRead,
10642 asm: x86.AMOVUPS,
10643 reg: regInfo{
10644 inputs: []inputInfo{
10645 {0, 4295032831},
10646 },
10647 outputs: []outputInfo{
10648 {0, 4294901760},
10649 },
10650 },
10651 },
10652 {
10653 name: "MOVOstore",
10654 auxType: auxSymOff,
10655 argLen: 3,
10656 faultOnNilArg0: true,
10657 symEffect: SymWrite,
10658 asm: x86.AMOVUPS,
10659 reg: regInfo{
10660 inputs: []inputInfo{
10661 {1, 4294901760},
10662 {0, 4295032831},
10663 },
10664 },
10665 },
10666 {
10667 name: "MOVBloadidx1",
10668 auxType: auxSymOff,
10669 argLen: 3,
10670 commutative: true,
10671 symEffect: SymRead,
10672 asm: x86.AMOVBLZX,
10673 scale: 1,
10674 reg: regInfo{
10675 inputs: []inputInfo{
10676 {1, 65535},
10677 {0, 4295032831},
10678 },
10679 outputs: []outputInfo{
10680 {0, 65519},
10681 },
10682 },
10683 },
10684 {
10685 name: "MOVWloadidx1",
10686 auxType: auxSymOff,
10687 argLen: 3,
10688 commutative: true,
10689 symEffect: SymRead,
10690 asm: x86.AMOVWLZX,
10691 scale: 1,
10692 reg: regInfo{
10693 inputs: []inputInfo{
10694 {1, 65535},
10695 {0, 4295032831},
10696 },
10697 outputs: []outputInfo{
10698 {0, 65519},
10699 },
10700 },
10701 },
10702 {
10703 name: "MOVWloadidx2",
10704 auxType: auxSymOff,
10705 argLen: 3,
10706 symEffect: SymRead,
10707 asm: x86.AMOVWLZX,
10708 scale: 2,
10709 reg: regInfo{
10710 inputs: []inputInfo{
10711 {1, 65535},
10712 {0, 4295032831},
10713 },
10714 outputs: []outputInfo{
10715 {0, 65519},
10716 },
10717 },
10718 },
10719 {
10720 name: "MOVLloadidx1",
10721 auxType: auxSymOff,
10722 argLen: 3,
10723 commutative: true,
10724 symEffect: SymRead,
10725 asm: x86.AMOVL,
10726 scale: 1,
10727 reg: regInfo{
10728 inputs: []inputInfo{
10729 {1, 65535},
10730 {0, 4295032831},
10731 },
10732 outputs: []outputInfo{
10733 {0, 65519},
10734 },
10735 },
10736 },
10737 {
10738 name: "MOVLloadidx4",
10739 auxType: auxSymOff,
10740 argLen: 3,
10741 symEffect: SymRead,
10742 asm: x86.AMOVL,
10743 scale: 4,
10744 reg: regInfo{
10745 inputs: []inputInfo{
10746 {1, 65535},
10747 {0, 4295032831},
10748 },
10749 outputs: []outputInfo{
10750 {0, 65519},
10751 },
10752 },
10753 },
10754 {
10755 name: "MOVLloadidx8",
10756 auxType: auxSymOff,
10757 argLen: 3,
10758 symEffect: SymRead,
10759 asm: x86.AMOVL,
10760 scale: 8,
10761 reg: regInfo{
10762 inputs: []inputInfo{
10763 {1, 65535},
10764 {0, 4295032831},
10765 },
10766 outputs: []outputInfo{
10767 {0, 65519},
10768 },
10769 },
10770 },
10771 {
10772 name: "MOVQloadidx1",
10773 auxType: auxSymOff,
10774 argLen: 3,
10775 commutative: true,
10776 symEffect: SymRead,
10777 asm: x86.AMOVQ,
10778 scale: 1,
10779 reg: regInfo{
10780 inputs: []inputInfo{
10781 {1, 65535},
10782 {0, 4295032831},
10783 },
10784 outputs: []outputInfo{
10785 {0, 65519},
10786 },
10787 },
10788 },
10789 {
10790 name: "MOVQloadidx8",
10791 auxType: auxSymOff,
10792 argLen: 3,
10793 symEffect: SymRead,
10794 asm: x86.AMOVQ,
10795 scale: 8,
10796 reg: regInfo{
10797 inputs: []inputInfo{
10798 {1, 65535},
10799 {0, 4295032831},
10800 },
10801 outputs: []outputInfo{
10802 {0, 65519},
10803 },
10804 },
10805 },
10806 {
10807 name: "MOVBstoreidx1",
10808 auxType: auxSymOff,
10809 argLen: 4,
10810 symEffect: SymWrite,
10811 asm: x86.AMOVB,
10812 scale: 1,
10813 reg: regInfo{
10814 inputs: []inputInfo{
10815 {1, 65535},
10816 {2, 65535},
10817 {0, 4295032831},
10818 },
10819 },
10820 },
10821 {
10822 name: "MOVWstoreidx1",
10823 auxType: auxSymOff,
10824 argLen: 4,
10825 symEffect: SymWrite,
10826 asm: x86.AMOVW,
10827 scale: 1,
10828 reg: regInfo{
10829 inputs: []inputInfo{
10830 {1, 65535},
10831 {2, 65535},
10832 {0, 4295032831},
10833 },
10834 },
10835 },
10836 {
10837 name: "MOVWstoreidx2",
10838 auxType: auxSymOff,
10839 argLen: 4,
10840 symEffect: SymWrite,
10841 asm: x86.AMOVW,
10842 scale: 2,
10843 reg: regInfo{
10844 inputs: []inputInfo{
10845 {1, 65535},
10846 {2, 65535},
10847 {0, 4295032831},
10848 },
10849 },
10850 },
10851 {
10852 name: "MOVLstoreidx1",
10853 auxType: auxSymOff,
10854 argLen: 4,
10855 symEffect: SymWrite,
10856 asm: x86.AMOVL,
10857 scale: 1,
10858 reg: regInfo{
10859 inputs: []inputInfo{
10860 {1, 65535},
10861 {2, 65535},
10862 {0, 4295032831},
10863 },
10864 },
10865 },
10866 {
10867 name: "MOVLstoreidx4",
10868 auxType: auxSymOff,
10869 argLen: 4,
10870 symEffect: SymWrite,
10871 asm: x86.AMOVL,
10872 scale: 4,
10873 reg: regInfo{
10874 inputs: []inputInfo{
10875 {1, 65535},
10876 {2, 65535},
10877 {0, 4295032831},
10878 },
10879 },
10880 },
10881 {
10882 name: "MOVLstoreidx8",
10883 auxType: auxSymOff,
10884 argLen: 4,
10885 symEffect: SymWrite,
10886 asm: x86.AMOVL,
10887 scale: 8,
10888 reg: regInfo{
10889 inputs: []inputInfo{
10890 {1, 65535},
10891 {2, 65535},
10892 {0, 4295032831},
10893 },
10894 },
10895 },
10896 {
10897 name: "MOVQstoreidx1",
10898 auxType: auxSymOff,
10899 argLen: 4,
10900 symEffect: SymWrite,
10901 asm: x86.AMOVQ,
10902 scale: 1,
10903 reg: regInfo{
10904 inputs: []inputInfo{
10905 {1, 65535},
10906 {2, 65535},
10907 {0, 4295032831},
10908 },
10909 },
10910 },
10911 {
10912 name: "MOVQstoreidx8",
10913 auxType: auxSymOff,
10914 argLen: 4,
10915 symEffect: SymWrite,
10916 asm: x86.AMOVQ,
10917 scale: 8,
10918 reg: regInfo{
10919 inputs: []inputInfo{
10920 {1, 65535},
10921 {2, 65535},
10922 {0, 4295032831},
10923 },
10924 },
10925 },
10926 {
10927 name: "MOVBstoreconst",
10928 auxType: auxSymValAndOff,
10929 argLen: 2,
10930 faultOnNilArg0: true,
10931 symEffect: SymWrite,
10932 asm: x86.AMOVB,
10933 reg: regInfo{
10934 inputs: []inputInfo{
10935 {0, 4295032831},
10936 },
10937 },
10938 },
10939 {
10940 name: "MOVWstoreconst",
10941 auxType: auxSymValAndOff,
10942 argLen: 2,
10943 faultOnNilArg0: true,
10944 symEffect: SymWrite,
10945 asm: x86.AMOVW,
10946 reg: regInfo{
10947 inputs: []inputInfo{
10948 {0, 4295032831},
10949 },
10950 },
10951 },
10952 {
10953 name: "MOVLstoreconst",
10954 auxType: auxSymValAndOff,
10955 argLen: 2,
10956 faultOnNilArg0: true,
10957 symEffect: SymWrite,
10958 asm: x86.AMOVL,
10959 reg: regInfo{
10960 inputs: []inputInfo{
10961 {0, 4295032831},
10962 },
10963 },
10964 },
10965 {
10966 name: "MOVQstoreconst",
10967 auxType: auxSymValAndOff,
10968 argLen: 2,
10969 faultOnNilArg0: true,
10970 symEffect: SymWrite,
10971 asm: x86.AMOVQ,
10972 reg: regInfo{
10973 inputs: []inputInfo{
10974 {0, 4295032831},
10975 },
10976 },
10977 },
10978 {
10979 name: "MOVBstoreconstidx1",
10980 auxType: auxSymValAndOff,
10981 argLen: 3,
10982 symEffect: SymWrite,
10983 asm: x86.AMOVB,
10984 scale: 1,
10985 reg: regInfo{
10986 inputs: []inputInfo{
10987 {1, 65535},
10988 {0, 4295032831},
10989 },
10990 },
10991 },
10992 {
10993 name: "MOVWstoreconstidx1",
10994 auxType: auxSymValAndOff,
10995 argLen: 3,
10996 symEffect: SymWrite,
10997 asm: x86.AMOVW,
10998 scale: 1,
10999 reg: regInfo{
11000 inputs: []inputInfo{
11001 {1, 65535},
11002 {0, 4295032831},
11003 },
11004 },
11005 },
11006 {
11007 name: "MOVWstoreconstidx2",
11008 auxType: auxSymValAndOff,
11009 argLen: 3,
11010 symEffect: SymWrite,
11011 asm: x86.AMOVW,
11012 scale: 2,
11013 reg: regInfo{
11014 inputs: []inputInfo{
11015 {1, 65535},
11016 {0, 4295032831},
11017 },
11018 },
11019 },
11020 {
11021 name: "MOVLstoreconstidx1",
11022 auxType: auxSymValAndOff,
11023 argLen: 3,
11024 symEffect: SymWrite,
11025 asm: x86.AMOVL,
11026 scale: 1,
11027 reg: regInfo{
11028 inputs: []inputInfo{
11029 {1, 65535},
11030 {0, 4295032831},
11031 },
11032 },
11033 },
11034 {
11035 name: "MOVLstoreconstidx4",
11036 auxType: auxSymValAndOff,
11037 argLen: 3,
11038 symEffect: SymWrite,
11039 asm: x86.AMOVL,
11040 scale: 4,
11041 reg: regInfo{
11042 inputs: []inputInfo{
11043 {1, 65535},
11044 {0, 4295032831},
11045 },
11046 },
11047 },
11048 {
11049 name: "MOVQstoreconstidx1",
11050 auxType: auxSymValAndOff,
11051 argLen: 3,
11052 symEffect: SymWrite,
11053 asm: x86.AMOVQ,
11054 scale: 1,
11055 reg: regInfo{
11056 inputs: []inputInfo{
11057 {1, 65535},
11058 {0, 4295032831},
11059 },
11060 },
11061 },
11062 {
11063 name: "MOVQstoreconstidx8",
11064 auxType: auxSymValAndOff,
11065 argLen: 3,
11066 symEffect: SymWrite,
11067 asm: x86.AMOVQ,
11068 scale: 8,
11069 reg: regInfo{
11070 inputs: []inputInfo{
11071 {1, 65535},
11072 {0, 4295032831},
11073 },
11074 },
11075 },
11076 {
11077 name: "DUFFZERO",
11078 auxType: auxInt64,
11079 argLen: 3,
11080 faultOnNilArg0: true,
11081 reg: regInfo{
11082 inputs: []inputInfo{
11083 {0, 128},
11084 {1, 65536},
11085 },
11086 clobbers: 128,
11087 },
11088 },
11089 {
11090 name: "MOVOconst",
11091 auxType: auxInt128,
11092 argLen: 0,
11093 rematerializeable: true,
11094 reg: regInfo{
11095 outputs: []outputInfo{
11096 {0, 4294901760},
11097 },
11098 },
11099 },
11100 {
11101 name: "REPSTOSQ",
11102 argLen: 4,
11103 faultOnNilArg0: true,
11104 reg: regInfo{
11105 inputs: []inputInfo{
11106 {0, 128},
11107 {1, 2},
11108 {2, 1},
11109 },
11110 clobbers: 130,
11111 },
11112 },
11113 {
11114 name: "CALLstatic",
11115 auxType: auxSymOff,
11116 argLen: 1,
11117 clobberFlags: true,
11118 call: true,
11119 symEffect: SymNone,
11120 reg: regInfo{
11121 clobbers: 4294967279,
11122 },
11123 },
11124 {
11125 name: "CALLclosure",
11126 auxType: auxInt64,
11127 argLen: 3,
11128 clobberFlags: true,
11129 call: true,
11130 reg: regInfo{
11131 inputs: []inputInfo{
11132 {1, 4},
11133 {0, 65535},
11134 },
11135 clobbers: 4294967279,
11136 },
11137 },
11138 {
11139 name: "CALLinter",
11140 auxType: auxInt64,
11141 argLen: 2,
11142 clobberFlags: true,
11143 call: true,
11144 reg: regInfo{
11145 inputs: []inputInfo{
11146 {0, 65519},
11147 },
11148 clobbers: 4294967279,
11149 },
11150 },
11151 {
11152 name: "DUFFCOPY",
11153 auxType: auxInt64,
11154 argLen: 3,
11155 clobberFlags: true,
11156 faultOnNilArg0: true,
11157 faultOnNilArg1: true,
11158 reg: regInfo{
11159 inputs: []inputInfo{
11160 {0, 128},
11161 {1, 64},
11162 },
11163 clobbers: 65728,
11164 },
11165 },
11166 {
11167 name: "REPMOVSQ",
11168 argLen: 4,
11169 faultOnNilArg0: true,
11170 faultOnNilArg1: true,
11171 reg: regInfo{
11172 inputs: []inputInfo{
11173 {0, 128},
11174 {1, 64},
11175 {2, 2},
11176 },
11177 clobbers: 194,
11178 },
11179 },
11180 {
11181 name: "InvertFlags",
11182 argLen: 1,
11183 reg: regInfo{},
11184 },
11185 {
11186 name: "LoweredGetG",
11187 argLen: 1,
11188 reg: regInfo{
11189 outputs: []outputInfo{
11190 {0, 65519},
11191 },
11192 },
11193 },
11194 {
11195 name: "LoweredGetClosurePtr",
11196 argLen: 0,
11197 zeroWidth: true,
11198 reg: regInfo{
11199 outputs: []outputInfo{
11200 {0, 4},
11201 },
11202 },
11203 },
11204 {
11205 name: "LoweredGetCallerPC",
11206 argLen: 0,
11207 rematerializeable: true,
11208 reg: regInfo{
11209 outputs: []outputInfo{
11210 {0, 65519},
11211 },
11212 },
11213 },
11214 {
11215 name: "LoweredGetCallerSP",
11216 argLen: 0,
11217 rematerializeable: true,
11218 reg: regInfo{
11219 outputs: []outputInfo{
11220 {0, 65519},
11221 },
11222 },
11223 },
11224 {
11225 name: "LoweredNilCheck",
11226 argLen: 2,
11227 clobberFlags: true,
11228 nilCheck: true,
11229 faultOnNilArg0: true,
11230 reg: regInfo{
11231 inputs: []inputInfo{
11232 {0, 65535},
11233 },
11234 },
11235 },
11236 {
11237 name: "LoweredWB",
11238 auxType: auxSym,
11239 argLen: 3,
11240 clobberFlags: true,
11241 symEffect: SymNone,
11242 reg: regInfo{
11243 inputs: []inputInfo{
11244 {0, 128},
11245 {1, 1},
11246 },
11247 clobbers: 4294901760,
11248 },
11249 },
11250 {
11251 name: "LoweredPanicBoundsA",
11252 auxType: auxInt64,
11253 argLen: 3,
11254 reg: regInfo{
11255 inputs: []inputInfo{
11256 {0, 4},
11257 {1, 8},
11258 },
11259 },
11260 },
11261 {
11262 name: "LoweredPanicBoundsB",
11263 auxType: auxInt64,
11264 argLen: 3,
11265 reg: regInfo{
11266 inputs: []inputInfo{
11267 {0, 2},
11268 {1, 4},
11269 },
11270 },
11271 },
11272 {
11273 name: "LoweredPanicBoundsC",
11274 auxType: auxInt64,
11275 argLen: 3,
11276 reg: regInfo{
11277 inputs: []inputInfo{
11278 {0, 1},
11279 {1, 2},
11280 },
11281 },
11282 },
11283 {
11284 name: "LoweredPanicExtendA",
11285 auxType: auxInt64,
11286 argLen: 4,
11287 reg: regInfo{
11288 inputs: []inputInfo{
11289 {0, 64},
11290 {1, 4},
11291 {2, 8},
11292 },
11293 },
11294 },
11295 {
11296 name: "LoweredPanicExtendB",
11297 auxType: auxInt64,
11298 argLen: 4,
11299 reg: regInfo{
11300 inputs: []inputInfo{
11301 {0, 64},
11302 {1, 2},
11303 {2, 4},
11304 },
11305 },
11306 },
11307 {
11308 name: "LoweredPanicExtendC",
11309 auxType: auxInt64,
11310 argLen: 4,
11311 reg: regInfo{
11312 inputs: []inputInfo{
11313 {0, 64},
11314 {1, 1},
11315 {2, 2},
11316 },
11317 },
11318 },
11319 {
11320 name: "FlagEQ",
11321 argLen: 0,
11322 reg: regInfo{},
11323 },
11324 {
11325 name: "FlagLT_ULT",
11326 argLen: 0,
11327 reg: regInfo{},
11328 },
11329 {
11330 name: "FlagLT_UGT",
11331 argLen: 0,
11332 reg: regInfo{},
11333 },
11334 {
11335 name: "FlagGT_UGT",
11336 argLen: 0,
11337 reg: regInfo{},
11338 },
11339 {
11340 name: "FlagGT_ULT",
11341 argLen: 0,
11342 reg: regInfo{},
11343 },
11344 {
11345 name: "MOVBatomicload",
11346 auxType: auxSymOff,
11347 argLen: 2,
11348 faultOnNilArg0: true,
11349 symEffect: SymRead,
11350 asm: x86.AMOVB,
11351 reg: regInfo{
11352 inputs: []inputInfo{
11353 {0, 4295032831},
11354 },
11355 outputs: []outputInfo{
11356 {0, 65519},
11357 },
11358 },
11359 },
11360 {
11361 name: "MOVLatomicload",
11362 auxType: auxSymOff,
11363 argLen: 2,
11364 faultOnNilArg0: true,
11365 symEffect: SymRead,
11366 asm: x86.AMOVL,
11367 reg: regInfo{
11368 inputs: []inputInfo{
11369 {0, 4295032831},
11370 },
11371 outputs: []outputInfo{
11372 {0, 65519},
11373 },
11374 },
11375 },
11376 {
11377 name: "MOVQatomicload",
11378 auxType: auxSymOff,
11379 argLen: 2,
11380 faultOnNilArg0: true,
11381 symEffect: SymRead,
11382 asm: x86.AMOVQ,
11383 reg: regInfo{
11384 inputs: []inputInfo{
11385 {0, 4295032831},
11386 },
11387 outputs: []outputInfo{
11388 {0, 65519},
11389 },
11390 },
11391 },
11392 {
11393 name: "XCHGL",
11394 auxType: auxSymOff,
11395 argLen: 3,
11396 resultInArg0: true,
11397 faultOnNilArg1: true,
11398 hasSideEffects: true,
11399 symEffect: SymRdWr,
11400 asm: x86.AXCHGL,
11401 reg: regInfo{
11402 inputs: []inputInfo{
11403 {0, 65519},
11404 {1, 4295032831},
11405 },
11406 outputs: []outputInfo{
11407 {0, 65519},
11408 },
11409 },
11410 },
11411 {
11412 name: "XCHGQ",
11413 auxType: auxSymOff,
11414 argLen: 3,
11415 resultInArg0: true,
11416 faultOnNilArg1: true,
11417 hasSideEffects: true,
11418 symEffect: SymRdWr,
11419 asm: x86.AXCHGQ,
11420 reg: regInfo{
11421 inputs: []inputInfo{
11422 {0, 65519},
11423 {1, 4295032831},
11424 },
11425 outputs: []outputInfo{
11426 {0, 65519},
11427 },
11428 },
11429 },
11430 {
11431 name: "XADDLlock",
11432 auxType: auxSymOff,
11433 argLen: 3,
11434 resultInArg0: true,
11435 clobberFlags: true,
11436 faultOnNilArg1: true,
11437 hasSideEffects: true,
11438 symEffect: SymRdWr,
11439 asm: x86.AXADDL,
11440 reg: regInfo{
11441 inputs: []inputInfo{
11442 {0, 65519},
11443 {1, 4295032831},
11444 },
11445 outputs: []outputInfo{
11446 {0, 65519},
11447 },
11448 },
11449 },
11450 {
11451 name: "XADDQlock",
11452 auxType: auxSymOff,
11453 argLen: 3,
11454 resultInArg0: true,
11455 clobberFlags: true,
11456 faultOnNilArg1: true,
11457 hasSideEffects: true,
11458 symEffect: SymRdWr,
11459 asm: x86.AXADDQ,
11460 reg: regInfo{
11461 inputs: []inputInfo{
11462 {0, 65519},
11463 {1, 4295032831},
11464 },
11465 outputs: []outputInfo{
11466 {0, 65519},
11467 },
11468 },
11469 },
11470 {
11471 name: "AddTupleFirst32",
11472 argLen: 2,
11473 reg: regInfo{},
11474 },
11475 {
11476 name: "AddTupleFirst64",
11477 argLen: 2,
11478 reg: regInfo{},
11479 },
11480 {
11481 name: "CMPXCHGLlock",
11482 auxType: auxSymOff,
11483 argLen: 4,
11484 clobberFlags: true,
11485 faultOnNilArg0: true,
11486 hasSideEffects: true,
11487 symEffect: SymRdWr,
11488 asm: x86.ACMPXCHGL,
11489 reg: regInfo{
11490 inputs: []inputInfo{
11491 {1, 1},
11492 {0, 65519},
11493 {2, 65519},
11494 },
11495 clobbers: 1,
11496 outputs: []outputInfo{
11497 {1, 0},
11498 {0, 65519},
11499 },
11500 },
11501 },
11502 {
11503 name: "CMPXCHGQlock",
11504 auxType: auxSymOff,
11505 argLen: 4,
11506 clobberFlags: true,
11507 faultOnNilArg0: true,
11508 hasSideEffects: true,
11509 symEffect: SymRdWr,
11510 asm: x86.ACMPXCHGQ,
11511 reg: regInfo{
11512 inputs: []inputInfo{
11513 {1, 1},
11514 {0, 65519},
11515 {2, 65519},
11516 },
11517 clobbers: 1,
11518 outputs: []outputInfo{
11519 {1, 0},
11520 {0, 65519},
11521 },
11522 },
11523 },
11524 {
11525 name: "ANDBlock",
11526 auxType: auxSymOff,
11527 argLen: 3,
11528 clobberFlags: true,
11529 faultOnNilArg0: true,
11530 hasSideEffects: true,
11531 symEffect: SymRdWr,
11532 asm: x86.AANDB,
11533 reg: regInfo{
11534 inputs: []inputInfo{
11535 {1, 65535},
11536 {0, 4295032831},
11537 },
11538 },
11539 },
11540 {
11541 name: "ORBlock",
11542 auxType: auxSymOff,
11543 argLen: 3,
11544 clobberFlags: true,
11545 faultOnNilArg0: true,
11546 hasSideEffects: true,
11547 symEffect: SymRdWr,
11548 asm: x86.AORB,
11549 reg: regInfo{
11550 inputs: []inputInfo{
11551 {1, 65535},
11552 {0, 4295032831},
11553 },
11554 },
11555 },
11556
11557 {
11558 name: "ADD",
11559 argLen: 2,
11560 commutative: true,
11561 asm: arm.AADD,
11562 reg: regInfo{
11563 inputs: []inputInfo{
11564 {0, 22527},
11565 {1, 22527},
11566 },
11567 outputs: []outputInfo{
11568 {0, 21503},
11569 },
11570 },
11571 },
11572 {
11573 name: "ADDconst",
11574 auxType: auxInt32,
11575 argLen: 1,
11576 asm: arm.AADD,
11577 reg: regInfo{
11578 inputs: []inputInfo{
11579 {0, 30719},
11580 },
11581 outputs: []outputInfo{
11582 {0, 21503},
11583 },
11584 },
11585 },
11586 {
11587 name: "SUB",
11588 argLen: 2,
11589 asm: arm.ASUB,
11590 reg: regInfo{
11591 inputs: []inputInfo{
11592 {0, 22527},
11593 {1, 22527},
11594 },
11595 outputs: []outputInfo{
11596 {0, 21503},
11597 },
11598 },
11599 },
11600 {
11601 name: "SUBconst",
11602 auxType: auxInt32,
11603 argLen: 1,
11604 asm: arm.ASUB,
11605 reg: regInfo{
11606 inputs: []inputInfo{
11607 {0, 22527},
11608 },
11609 outputs: []outputInfo{
11610 {0, 21503},
11611 },
11612 },
11613 },
11614 {
11615 name: "RSB",
11616 argLen: 2,
11617 asm: arm.ARSB,
11618 reg: regInfo{
11619 inputs: []inputInfo{
11620 {0, 22527},
11621 {1, 22527},
11622 },
11623 outputs: []outputInfo{
11624 {0, 21503},
11625 },
11626 },
11627 },
11628 {
11629 name: "RSBconst",
11630 auxType: auxInt32,
11631 argLen: 1,
11632 asm: arm.ARSB,
11633 reg: regInfo{
11634 inputs: []inputInfo{
11635 {0, 22527},
11636 },
11637 outputs: []outputInfo{
11638 {0, 21503},
11639 },
11640 },
11641 },
11642 {
11643 name: "MUL",
11644 argLen: 2,
11645 commutative: true,
11646 asm: arm.AMUL,
11647 reg: regInfo{
11648 inputs: []inputInfo{
11649 {0, 22527},
11650 {1, 22527},
11651 },
11652 outputs: []outputInfo{
11653 {0, 21503},
11654 },
11655 },
11656 },
11657 {
11658 name: "HMUL",
11659 argLen: 2,
11660 commutative: true,
11661 asm: arm.AMULL,
11662 reg: regInfo{
11663 inputs: []inputInfo{
11664 {0, 22527},
11665 {1, 22527},
11666 },
11667 outputs: []outputInfo{
11668 {0, 21503},
11669 },
11670 },
11671 },
11672 {
11673 name: "HMULU",
11674 argLen: 2,
11675 commutative: true,
11676 asm: arm.AMULLU,
11677 reg: regInfo{
11678 inputs: []inputInfo{
11679 {0, 22527},
11680 {1, 22527},
11681 },
11682 outputs: []outputInfo{
11683 {0, 21503},
11684 },
11685 },
11686 },
11687 {
11688 name: "CALLudiv",
11689 argLen: 2,
11690 clobberFlags: true,
11691 reg: regInfo{
11692 inputs: []inputInfo{
11693 {0, 2},
11694 {1, 1},
11695 },
11696 clobbers: 16396,
11697 outputs: []outputInfo{
11698 {0, 1},
11699 {1, 2},
11700 },
11701 },
11702 },
11703 {
11704 name: "ADDS",
11705 argLen: 2,
11706 commutative: true,
11707 asm: arm.AADD,
11708 reg: regInfo{
11709 inputs: []inputInfo{
11710 {0, 22527},
11711 {1, 22527},
11712 },
11713 outputs: []outputInfo{
11714 {1, 0},
11715 {0, 21503},
11716 },
11717 },
11718 },
11719 {
11720 name: "ADDSconst",
11721 auxType: auxInt32,
11722 argLen: 1,
11723 asm: arm.AADD,
11724 reg: regInfo{
11725 inputs: []inputInfo{
11726 {0, 22527},
11727 },
11728 outputs: []outputInfo{
11729 {1, 0},
11730 {0, 21503},
11731 },
11732 },
11733 },
11734 {
11735 name: "ADC",
11736 argLen: 3,
11737 commutative: true,
11738 asm: arm.AADC,
11739 reg: regInfo{
11740 inputs: []inputInfo{
11741 {0, 21503},
11742 {1, 21503},
11743 },
11744 outputs: []outputInfo{
11745 {0, 21503},
11746 },
11747 },
11748 },
11749 {
11750 name: "ADCconst",
11751 auxType: auxInt32,
11752 argLen: 2,
11753 asm: arm.AADC,
11754 reg: regInfo{
11755 inputs: []inputInfo{
11756 {0, 21503},
11757 },
11758 outputs: []outputInfo{
11759 {0, 21503},
11760 },
11761 },
11762 },
11763 {
11764 name: "SUBS",
11765 argLen: 2,
11766 asm: arm.ASUB,
11767 reg: regInfo{
11768 inputs: []inputInfo{
11769 {0, 22527},
11770 {1, 22527},
11771 },
11772 outputs: []outputInfo{
11773 {1, 0},
11774 {0, 21503},
11775 },
11776 },
11777 },
11778 {
11779 name: "SUBSconst",
11780 auxType: auxInt32,
11781 argLen: 1,
11782 asm: arm.ASUB,
11783 reg: regInfo{
11784 inputs: []inputInfo{
11785 {0, 22527},
11786 },
11787 outputs: []outputInfo{
11788 {1, 0},
11789 {0, 21503},
11790 },
11791 },
11792 },
11793 {
11794 name: "RSBSconst",
11795 auxType: auxInt32,
11796 argLen: 1,
11797 asm: arm.ARSB,
11798 reg: regInfo{
11799 inputs: []inputInfo{
11800 {0, 22527},
11801 },
11802 outputs: []outputInfo{
11803 {1, 0},
11804 {0, 21503},
11805 },
11806 },
11807 },
11808 {
11809 name: "SBC",
11810 argLen: 3,
11811 asm: arm.ASBC,
11812 reg: regInfo{
11813 inputs: []inputInfo{
11814 {0, 21503},
11815 {1, 21503},
11816 },
11817 outputs: []outputInfo{
11818 {0, 21503},
11819 },
11820 },
11821 },
11822 {
11823 name: "SBCconst",
11824 auxType: auxInt32,
11825 argLen: 2,
11826 asm: arm.ASBC,
11827 reg: regInfo{
11828 inputs: []inputInfo{
11829 {0, 21503},
11830 },
11831 outputs: []outputInfo{
11832 {0, 21503},
11833 },
11834 },
11835 },
11836 {
11837 name: "RSCconst",
11838 auxType: auxInt32,
11839 argLen: 2,
11840 asm: arm.ARSC,
11841 reg: regInfo{
11842 inputs: []inputInfo{
11843 {0, 21503},
11844 },
11845 outputs: []outputInfo{
11846 {0, 21503},
11847 },
11848 },
11849 },
11850 {
11851 name: "MULLU",
11852 argLen: 2,
11853 commutative: true,
11854 asm: arm.AMULLU,
11855 reg: regInfo{
11856 inputs: []inputInfo{
11857 {0, 22527},
11858 {1, 22527},
11859 },
11860 outputs: []outputInfo{
11861 {0, 21503},
11862 {1, 21503},
11863 },
11864 },
11865 },
11866 {
11867 name: "MULA",
11868 argLen: 3,
11869 asm: arm.AMULA,
11870 reg: regInfo{
11871 inputs: []inputInfo{
11872 {0, 21503},
11873 {1, 21503},
11874 {2, 21503},
11875 },
11876 outputs: []outputInfo{
11877 {0, 21503},
11878 },
11879 },
11880 },
11881 {
11882 name: "MULS",
11883 argLen: 3,
11884 asm: arm.AMULS,
11885 reg: regInfo{
11886 inputs: []inputInfo{
11887 {0, 21503},
11888 {1, 21503},
11889 {2, 21503},
11890 },
11891 outputs: []outputInfo{
11892 {0, 21503},
11893 },
11894 },
11895 },
11896 {
11897 name: "ADDF",
11898 argLen: 2,
11899 commutative: true,
11900 asm: arm.AADDF,
11901 reg: regInfo{
11902 inputs: []inputInfo{
11903 {0, 4294901760},
11904 {1, 4294901760},
11905 },
11906 outputs: []outputInfo{
11907 {0, 4294901760},
11908 },
11909 },
11910 },
11911 {
11912 name: "ADDD",
11913 argLen: 2,
11914 commutative: true,
11915 asm: arm.AADDD,
11916 reg: regInfo{
11917 inputs: []inputInfo{
11918 {0, 4294901760},
11919 {1, 4294901760},
11920 },
11921 outputs: []outputInfo{
11922 {0, 4294901760},
11923 },
11924 },
11925 },
11926 {
11927 name: "SUBF",
11928 argLen: 2,
11929 asm: arm.ASUBF,
11930 reg: regInfo{
11931 inputs: []inputInfo{
11932 {0, 4294901760},
11933 {1, 4294901760},
11934 },
11935 outputs: []outputInfo{
11936 {0, 4294901760},
11937 },
11938 },
11939 },
11940 {
11941 name: "SUBD",
11942 argLen: 2,
11943 asm: arm.ASUBD,
11944 reg: regInfo{
11945 inputs: []inputInfo{
11946 {0, 4294901760},
11947 {1, 4294901760},
11948 },
11949 outputs: []outputInfo{
11950 {0, 4294901760},
11951 },
11952 },
11953 },
11954 {
11955 name: "MULF",
11956 argLen: 2,
11957 commutative: true,
11958 asm: arm.AMULF,
11959 reg: regInfo{
11960 inputs: []inputInfo{
11961 {0, 4294901760},
11962 {1, 4294901760},
11963 },
11964 outputs: []outputInfo{
11965 {0, 4294901760},
11966 },
11967 },
11968 },
11969 {
11970 name: "MULD",
11971 argLen: 2,
11972 commutative: true,
11973 asm: arm.AMULD,
11974 reg: regInfo{
11975 inputs: []inputInfo{
11976 {0, 4294901760},
11977 {1, 4294901760},
11978 },
11979 outputs: []outputInfo{
11980 {0, 4294901760},
11981 },
11982 },
11983 },
11984 {
11985 name: "NMULF",
11986 argLen: 2,
11987 commutative: true,
11988 asm: arm.ANMULF,
11989 reg: regInfo{
11990 inputs: []inputInfo{
11991 {0, 4294901760},
11992 {1, 4294901760},
11993 },
11994 outputs: []outputInfo{
11995 {0, 4294901760},
11996 },
11997 },
11998 },
11999 {
12000 name: "NMULD",
12001 argLen: 2,
12002 commutative: true,
12003 asm: arm.ANMULD,
12004 reg: regInfo{
12005 inputs: []inputInfo{
12006 {0, 4294901760},
12007 {1, 4294901760},
12008 },
12009 outputs: []outputInfo{
12010 {0, 4294901760},
12011 },
12012 },
12013 },
12014 {
12015 name: "DIVF",
12016 argLen: 2,
12017 asm: arm.ADIVF,
12018 reg: regInfo{
12019 inputs: []inputInfo{
12020 {0, 4294901760},
12021 {1, 4294901760},
12022 },
12023 outputs: []outputInfo{
12024 {0, 4294901760},
12025 },
12026 },
12027 },
12028 {
12029 name: "DIVD",
12030 argLen: 2,
12031 asm: arm.ADIVD,
12032 reg: regInfo{
12033 inputs: []inputInfo{
12034 {0, 4294901760},
12035 {1, 4294901760},
12036 },
12037 outputs: []outputInfo{
12038 {0, 4294901760},
12039 },
12040 },
12041 },
12042 {
12043 name: "MULAF",
12044 argLen: 3,
12045 resultInArg0: true,
12046 asm: arm.AMULAF,
12047 reg: regInfo{
12048 inputs: []inputInfo{
12049 {0, 4294901760},
12050 {1, 4294901760},
12051 {2, 4294901760},
12052 },
12053 outputs: []outputInfo{
12054 {0, 4294901760},
12055 },
12056 },
12057 },
12058 {
12059 name: "MULAD",
12060 argLen: 3,
12061 resultInArg0: true,
12062 asm: arm.AMULAD,
12063 reg: regInfo{
12064 inputs: []inputInfo{
12065 {0, 4294901760},
12066 {1, 4294901760},
12067 {2, 4294901760},
12068 },
12069 outputs: []outputInfo{
12070 {0, 4294901760},
12071 },
12072 },
12073 },
12074 {
12075 name: "MULSF",
12076 argLen: 3,
12077 resultInArg0: true,
12078 asm: arm.AMULSF,
12079 reg: regInfo{
12080 inputs: []inputInfo{
12081 {0, 4294901760},
12082 {1, 4294901760},
12083 {2, 4294901760},
12084 },
12085 outputs: []outputInfo{
12086 {0, 4294901760},
12087 },
12088 },
12089 },
12090 {
12091 name: "MULSD",
12092 argLen: 3,
12093 resultInArg0: true,
12094 asm: arm.AMULSD,
12095 reg: regInfo{
12096 inputs: []inputInfo{
12097 {0, 4294901760},
12098 {1, 4294901760},
12099 {2, 4294901760},
12100 },
12101 outputs: []outputInfo{
12102 {0, 4294901760},
12103 },
12104 },
12105 },
12106 {
12107 name: "AND",
12108 argLen: 2,
12109 commutative: true,
12110 asm: arm.AAND,
12111 reg: regInfo{
12112 inputs: []inputInfo{
12113 {0, 22527},
12114 {1, 22527},
12115 },
12116 outputs: []outputInfo{
12117 {0, 21503},
12118 },
12119 },
12120 },
12121 {
12122 name: "ANDconst",
12123 auxType: auxInt32,
12124 argLen: 1,
12125 asm: arm.AAND,
12126 reg: regInfo{
12127 inputs: []inputInfo{
12128 {0, 22527},
12129 },
12130 outputs: []outputInfo{
12131 {0, 21503},
12132 },
12133 },
12134 },
12135 {
12136 name: "OR",
12137 argLen: 2,
12138 commutative: true,
12139 asm: arm.AORR,
12140 reg: regInfo{
12141 inputs: []inputInfo{
12142 {0, 22527},
12143 {1, 22527},
12144 },
12145 outputs: []outputInfo{
12146 {0, 21503},
12147 },
12148 },
12149 },
12150 {
12151 name: "ORconst",
12152 auxType: auxInt32,
12153 argLen: 1,
12154 asm: arm.AORR,
12155 reg: regInfo{
12156 inputs: []inputInfo{
12157 {0, 22527},
12158 },
12159 outputs: []outputInfo{
12160 {0, 21503},
12161 },
12162 },
12163 },
12164 {
12165 name: "XOR",
12166 argLen: 2,
12167 commutative: true,
12168 asm: arm.AEOR,
12169 reg: regInfo{
12170 inputs: []inputInfo{
12171 {0, 22527},
12172 {1, 22527},
12173 },
12174 outputs: []outputInfo{
12175 {0, 21503},
12176 },
12177 },
12178 },
12179 {
12180 name: "XORconst",
12181 auxType: auxInt32,
12182 argLen: 1,
12183 asm: arm.AEOR,
12184 reg: regInfo{
12185 inputs: []inputInfo{
12186 {0, 22527},
12187 },
12188 outputs: []outputInfo{
12189 {0, 21503},
12190 },
12191 },
12192 },
12193 {
12194 name: "BIC",
12195 argLen: 2,
12196 asm: arm.ABIC,
12197 reg: regInfo{
12198 inputs: []inputInfo{
12199 {0, 22527},
12200 {1, 22527},
12201 },
12202 outputs: []outputInfo{
12203 {0, 21503},
12204 },
12205 },
12206 },
12207 {
12208 name: "BICconst",
12209 auxType: auxInt32,
12210 argLen: 1,
12211 asm: arm.ABIC,
12212 reg: regInfo{
12213 inputs: []inputInfo{
12214 {0, 22527},
12215 },
12216 outputs: []outputInfo{
12217 {0, 21503},
12218 },
12219 },
12220 },
12221 {
12222 name: "BFX",
12223 auxType: auxInt32,
12224 argLen: 1,
12225 asm: arm.ABFX,
12226 reg: regInfo{
12227 inputs: []inputInfo{
12228 {0, 22527},
12229 },
12230 outputs: []outputInfo{
12231 {0, 21503},
12232 },
12233 },
12234 },
12235 {
12236 name: "BFXU",
12237 auxType: auxInt32,
12238 argLen: 1,
12239 asm: arm.ABFXU,
12240 reg: regInfo{
12241 inputs: []inputInfo{
12242 {0, 22527},
12243 },
12244 outputs: []outputInfo{
12245 {0, 21503},
12246 },
12247 },
12248 },
12249 {
12250 name: "MVN",
12251 argLen: 1,
12252 asm: arm.AMVN,
12253 reg: regInfo{
12254 inputs: []inputInfo{
12255 {0, 22527},
12256 },
12257 outputs: []outputInfo{
12258 {0, 21503},
12259 },
12260 },
12261 },
12262 {
12263 name: "NEGF",
12264 argLen: 1,
12265 asm: arm.ANEGF,
12266 reg: regInfo{
12267 inputs: []inputInfo{
12268 {0, 4294901760},
12269 },
12270 outputs: []outputInfo{
12271 {0, 4294901760},
12272 },
12273 },
12274 },
12275 {
12276 name: "NEGD",
12277 argLen: 1,
12278 asm: arm.ANEGD,
12279 reg: regInfo{
12280 inputs: []inputInfo{
12281 {0, 4294901760},
12282 },
12283 outputs: []outputInfo{
12284 {0, 4294901760},
12285 },
12286 },
12287 },
12288 {
12289 name: "SQRTD",
12290 argLen: 1,
12291 asm: arm.ASQRTD,
12292 reg: regInfo{
12293 inputs: []inputInfo{
12294 {0, 4294901760},
12295 },
12296 outputs: []outputInfo{
12297 {0, 4294901760},
12298 },
12299 },
12300 },
12301 {
12302 name: "CLZ",
12303 argLen: 1,
12304 asm: arm.ACLZ,
12305 reg: regInfo{
12306 inputs: []inputInfo{
12307 {0, 22527},
12308 },
12309 outputs: []outputInfo{
12310 {0, 21503},
12311 },
12312 },
12313 },
12314 {
12315 name: "REV",
12316 argLen: 1,
12317 asm: arm.AREV,
12318 reg: regInfo{
12319 inputs: []inputInfo{
12320 {0, 22527},
12321 },
12322 outputs: []outputInfo{
12323 {0, 21503},
12324 },
12325 },
12326 },
12327 {
12328 name: "REV16",
12329 argLen: 1,
12330 asm: arm.AREV16,
12331 reg: regInfo{
12332 inputs: []inputInfo{
12333 {0, 22527},
12334 },
12335 outputs: []outputInfo{
12336 {0, 21503},
12337 },
12338 },
12339 },
12340 {
12341 name: "RBIT",
12342 argLen: 1,
12343 asm: arm.ARBIT,
12344 reg: regInfo{
12345 inputs: []inputInfo{
12346 {0, 22527},
12347 },
12348 outputs: []outputInfo{
12349 {0, 21503},
12350 },
12351 },
12352 },
12353 {
12354 name: "SLL",
12355 argLen: 2,
12356 asm: arm.ASLL,
12357 reg: regInfo{
12358 inputs: []inputInfo{
12359 {0, 22527},
12360 {1, 22527},
12361 },
12362 outputs: []outputInfo{
12363 {0, 21503},
12364 },
12365 },
12366 },
12367 {
12368 name: "SLLconst",
12369 auxType: auxInt32,
12370 argLen: 1,
12371 asm: arm.ASLL,
12372 reg: regInfo{
12373 inputs: []inputInfo{
12374 {0, 22527},
12375 },
12376 outputs: []outputInfo{
12377 {0, 21503},
12378 },
12379 },
12380 },
12381 {
12382 name: "SRL",
12383 argLen: 2,
12384 asm: arm.ASRL,
12385 reg: regInfo{
12386 inputs: []inputInfo{
12387 {0, 22527},
12388 {1, 22527},
12389 },
12390 outputs: []outputInfo{
12391 {0, 21503},
12392 },
12393 },
12394 },
12395 {
12396 name: "SRLconst",
12397 auxType: auxInt32,
12398 argLen: 1,
12399 asm: arm.ASRL,
12400 reg: regInfo{
12401 inputs: []inputInfo{
12402 {0, 22527},
12403 },
12404 outputs: []outputInfo{
12405 {0, 21503},
12406 },
12407 },
12408 },
12409 {
12410 name: "SRA",
12411 argLen: 2,
12412 asm: arm.ASRA,
12413 reg: regInfo{
12414 inputs: []inputInfo{
12415 {0, 22527},
12416 {1, 22527},
12417 },
12418 outputs: []outputInfo{
12419 {0, 21503},
12420 },
12421 },
12422 },
12423 {
12424 name: "SRAconst",
12425 auxType: auxInt32,
12426 argLen: 1,
12427 asm: arm.ASRA,
12428 reg: regInfo{
12429 inputs: []inputInfo{
12430 {0, 22527},
12431 },
12432 outputs: []outputInfo{
12433 {0, 21503},
12434 },
12435 },
12436 },
12437 {
12438 name: "SRRconst",
12439 auxType: auxInt32,
12440 argLen: 1,
12441 reg: regInfo{
12442 inputs: []inputInfo{
12443 {0, 22527},
12444 },
12445 outputs: []outputInfo{
12446 {0, 21503},
12447 },
12448 },
12449 },
12450 {
12451 name: "ADDshiftLL",
12452 auxType: auxInt32,
12453 argLen: 2,
12454 asm: arm.AADD,
12455 reg: regInfo{
12456 inputs: []inputInfo{
12457 {0, 22527},
12458 {1, 22527},
12459 },
12460 outputs: []outputInfo{
12461 {0, 21503},
12462 },
12463 },
12464 },
12465 {
12466 name: "ADDshiftRL",
12467 auxType: auxInt32,
12468 argLen: 2,
12469 asm: arm.AADD,
12470 reg: regInfo{
12471 inputs: []inputInfo{
12472 {0, 22527},
12473 {1, 22527},
12474 },
12475 outputs: []outputInfo{
12476 {0, 21503},
12477 },
12478 },
12479 },
12480 {
12481 name: "ADDshiftRA",
12482 auxType: auxInt32,
12483 argLen: 2,
12484 asm: arm.AADD,
12485 reg: regInfo{
12486 inputs: []inputInfo{
12487 {0, 22527},
12488 {1, 22527},
12489 },
12490 outputs: []outputInfo{
12491 {0, 21503},
12492 },
12493 },
12494 },
12495 {
12496 name: "SUBshiftLL",
12497 auxType: auxInt32,
12498 argLen: 2,
12499 asm: arm.ASUB,
12500 reg: regInfo{
12501 inputs: []inputInfo{
12502 {0, 22527},
12503 {1, 22527},
12504 },
12505 outputs: []outputInfo{
12506 {0, 21503},
12507 },
12508 },
12509 },
12510 {
12511 name: "SUBshiftRL",
12512 auxType: auxInt32,
12513 argLen: 2,
12514 asm: arm.ASUB,
12515 reg: regInfo{
12516 inputs: []inputInfo{
12517 {0, 22527},
12518 {1, 22527},
12519 },
12520 outputs: []outputInfo{
12521 {0, 21503},
12522 },
12523 },
12524 },
12525 {
12526 name: "SUBshiftRA",
12527 auxType: auxInt32,
12528 argLen: 2,
12529 asm: arm.ASUB,
12530 reg: regInfo{
12531 inputs: []inputInfo{
12532 {0, 22527},
12533 {1, 22527},
12534 },
12535 outputs: []outputInfo{
12536 {0, 21503},
12537 },
12538 },
12539 },
12540 {
12541 name: "RSBshiftLL",
12542 auxType: auxInt32,
12543 argLen: 2,
12544 asm: arm.ARSB,
12545 reg: regInfo{
12546 inputs: []inputInfo{
12547 {0, 22527},
12548 {1, 22527},
12549 },
12550 outputs: []outputInfo{
12551 {0, 21503},
12552 },
12553 },
12554 },
12555 {
12556 name: "RSBshiftRL",
12557 auxType: auxInt32,
12558 argLen: 2,
12559 asm: arm.ARSB,
12560 reg: regInfo{
12561 inputs: []inputInfo{
12562 {0, 22527},
12563 {1, 22527},
12564 },
12565 outputs: []outputInfo{
12566 {0, 21503},
12567 },
12568 },
12569 },
12570 {
12571 name: "RSBshiftRA",
12572 auxType: auxInt32,
12573 argLen: 2,
12574 asm: arm.ARSB,
12575 reg: regInfo{
12576 inputs: []inputInfo{
12577 {0, 22527},
12578 {1, 22527},
12579 },
12580 outputs: []outputInfo{
12581 {0, 21503},
12582 },
12583 },
12584 },
12585 {
12586 name: "ANDshiftLL",
12587 auxType: auxInt32,
12588 argLen: 2,
12589 asm: arm.AAND,
12590 reg: regInfo{
12591 inputs: []inputInfo{
12592 {0, 22527},
12593 {1, 22527},
12594 },
12595 outputs: []outputInfo{
12596 {0, 21503},
12597 },
12598 },
12599 },
12600 {
12601 name: "ANDshiftRL",
12602 auxType: auxInt32,
12603 argLen: 2,
12604 asm: arm.AAND,
12605 reg: regInfo{
12606 inputs: []inputInfo{
12607 {0, 22527},
12608 {1, 22527},
12609 },
12610 outputs: []outputInfo{
12611 {0, 21503},
12612 },
12613 },
12614 },
12615 {
12616 name: "ANDshiftRA",
12617 auxType: auxInt32,
12618 argLen: 2,
12619 asm: arm.AAND,
12620 reg: regInfo{
12621 inputs: []inputInfo{
12622 {0, 22527},
12623 {1, 22527},
12624 },
12625 outputs: []outputInfo{
12626 {0, 21503},
12627 },
12628 },
12629 },
12630 {
12631 name: "ORshiftLL",
12632 auxType: auxInt32,
12633 argLen: 2,
12634 asm: arm.AORR,
12635 reg: regInfo{
12636 inputs: []inputInfo{
12637 {0, 22527},
12638 {1, 22527},
12639 },
12640 outputs: []outputInfo{
12641 {0, 21503},
12642 },
12643 },
12644 },
12645 {
12646 name: "ORshiftRL",
12647 auxType: auxInt32,
12648 argLen: 2,
12649 asm: arm.AORR,
12650 reg: regInfo{
12651 inputs: []inputInfo{
12652 {0, 22527},
12653 {1, 22527},
12654 },
12655 outputs: []outputInfo{
12656 {0, 21503},
12657 },
12658 },
12659 },
12660 {
12661 name: "ORshiftRA",
12662 auxType: auxInt32,
12663 argLen: 2,
12664 asm: arm.AORR,
12665 reg: regInfo{
12666 inputs: []inputInfo{
12667 {0, 22527},
12668 {1, 22527},
12669 },
12670 outputs: []outputInfo{
12671 {0, 21503},
12672 },
12673 },
12674 },
12675 {
12676 name: "XORshiftLL",
12677 auxType: auxInt32,
12678 argLen: 2,
12679 asm: arm.AEOR,
12680 reg: regInfo{
12681 inputs: []inputInfo{
12682 {0, 22527},
12683 {1, 22527},
12684 },
12685 outputs: []outputInfo{
12686 {0, 21503},
12687 },
12688 },
12689 },
12690 {
12691 name: "XORshiftRL",
12692 auxType: auxInt32,
12693 argLen: 2,
12694 asm: arm.AEOR,
12695 reg: regInfo{
12696 inputs: []inputInfo{
12697 {0, 22527},
12698 {1, 22527},
12699 },
12700 outputs: []outputInfo{
12701 {0, 21503},
12702 },
12703 },
12704 },
12705 {
12706 name: "XORshiftRA",
12707 auxType: auxInt32,
12708 argLen: 2,
12709 asm: arm.AEOR,
12710 reg: regInfo{
12711 inputs: []inputInfo{
12712 {0, 22527},
12713 {1, 22527},
12714 },
12715 outputs: []outputInfo{
12716 {0, 21503},
12717 },
12718 },
12719 },
12720 {
12721 name: "XORshiftRR",
12722 auxType: auxInt32,
12723 argLen: 2,
12724 asm: arm.AEOR,
12725 reg: regInfo{
12726 inputs: []inputInfo{
12727 {0, 22527},
12728 {1, 22527},
12729 },
12730 outputs: []outputInfo{
12731 {0, 21503},
12732 },
12733 },
12734 },
12735 {
12736 name: "BICshiftLL",
12737 auxType: auxInt32,
12738 argLen: 2,
12739 asm: arm.ABIC,
12740 reg: regInfo{
12741 inputs: []inputInfo{
12742 {0, 22527},
12743 {1, 22527},
12744 },
12745 outputs: []outputInfo{
12746 {0, 21503},
12747 },
12748 },
12749 },
12750 {
12751 name: "BICshiftRL",
12752 auxType: auxInt32,
12753 argLen: 2,
12754 asm: arm.ABIC,
12755 reg: regInfo{
12756 inputs: []inputInfo{
12757 {0, 22527},
12758 {1, 22527},
12759 },
12760 outputs: []outputInfo{
12761 {0, 21503},
12762 },
12763 },
12764 },
12765 {
12766 name: "BICshiftRA",
12767 auxType: auxInt32,
12768 argLen: 2,
12769 asm: arm.ABIC,
12770 reg: regInfo{
12771 inputs: []inputInfo{
12772 {0, 22527},
12773 {1, 22527},
12774 },
12775 outputs: []outputInfo{
12776 {0, 21503},
12777 },
12778 },
12779 },
12780 {
12781 name: "MVNshiftLL",
12782 auxType: auxInt32,
12783 argLen: 1,
12784 asm: arm.AMVN,
12785 reg: regInfo{
12786 inputs: []inputInfo{
12787 {0, 22527},
12788 },
12789 outputs: []outputInfo{
12790 {0, 21503},
12791 },
12792 },
12793 },
12794 {
12795 name: "MVNshiftRL",
12796 auxType: auxInt32,
12797 argLen: 1,
12798 asm: arm.AMVN,
12799 reg: regInfo{
12800 inputs: []inputInfo{
12801 {0, 22527},
12802 },
12803 outputs: []outputInfo{
12804 {0, 21503},
12805 },
12806 },
12807 },
12808 {
12809 name: "MVNshiftRA",
12810 auxType: auxInt32,
12811 argLen: 1,
12812 asm: arm.AMVN,
12813 reg: regInfo{
12814 inputs: []inputInfo{
12815 {0, 22527},
12816 },
12817 outputs: []outputInfo{
12818 {0, 21503},
12819 },
12820 },
12821 },
12822 {
12823 name: "ADCshiftLL",
12824 auxType: auxInt32,
12825 argLen: 3,
12826 asm: arm.AADC,
12827 reg: regInfo{
12828 inputs: []inputInfo{
12829 {0, 21503},
12830 {1, 21503},
12831 },
12832 outputs: []outputInfo{
12833 {0, 21503},
12834 },
12835 },
12836 },
12837 {
12838 name: "ADCshiftRL",
12839 auxType: auxInt32,
12840 argLen: 3,
12841 asm: arm.AADC,
12842 reg: regInfo{
12843 inputs: []inputInfo{
12844 {0, 21503},
12845 {1, 21503},
12846 },
12847 outputs: []outputInfo{
12848 {0, 21503},
12849 },
12850 },
12851 },
12852 {
12853 name: "ADCshiftRA",
12854 auxType: auxInt32,
12855 argLen: 3,
12856 asm: arm.AADC,
12857 reg: regInfo{
12858 inputs: []inputInfo{
12859 {0, 21503},
12860 {1, 21503},
12861 },
12862 outputs: []outputInfo{
12863 {0, 21503},
12864 },
12865 },
12866 },
12867 {
12868 name: "SBCshiftLL",
12869 auxType: auxInt32,
12870 argLen: 3,
12871 asm: arm.ASBC,
12872 reg: regInfo{
12873 inputs: []inputInfo{
12874 {0, 21503},
12875 {1, 21503},
12876 },
12877 outputs: []outputInfo{
12878 {0, 21503},
12879 },
12880 },
12881 },
12882 {
12883 name: "SBCshiftRL",
12884 auxType: auxInt32,
12885 argLen: 3,
12886 asm: arm.ASBC,
12887 reg: regInfo{
12888 inputs: []inputInfo{
12889 {0, 21503},
12890 {1, 21503},
12891 },
12892 outputs: []outputInfo{
12893 {0, 21503},
12894 },
12895 },
12896 },
12897 {
12898 name: "SBCshiftRA",
12899 auxType: auxInt32,
12900 argLen: 3,
12901 asm: arm.ASBC,
12902 reg: regInfo{
12903 inputs: []inputInfo{
12904 {0, 21503},
12905 {1, 21503},
12906 },
12907 outputs: []outputInfo{
12908 {0, 21503},
12909 },
12910 },
12911 },
12912 {
12913 name: "RSCshiftLL",
12914 auxType: auxInt32,
12915 argLen: 3,
12916 asm: arm.ARSC,
12917 reg: regInfo{
12918 inputs: []inputInfo{
12919 {0, 21503},
12920 {1, 21503},
12921 },
12922 outputs: []outputInfo{
12923 {0, 21503},
12924 },
12925 },
12926 },
12927 {
12928 name: "RSCshiftRL",
12929 auxType: auxInt32,
12930 argLen: 3,
12931 asm: arm.ARSC,
12932 reg: regInfo{
12933 inputs: []inputInfo{
12934 {0, 21503},
12935 {1, 21503},
12936 },
12937 outputs: []outputInfo{
12938 {0, 21503},
12939 },
12940 },
12941 },
12942 {
12943 name: "RSCshiftRA",
12944 auxType: auxInt32,
12945 argLen: 3,
12946 asm: arm.ARSC,
12947 reg: regInfo{
12948 inputs: []inputInfo{
12949 {0, 21503},
12950 {1, 21503},
12951 },
12952 outputs: []outputInfo{
12953 {0, 21503},
12954 },
12955 },
12956 },
12957 {
12958 name: "ADDSshiftLL",
12959 auxType: auxInt32,
12960 argLen: 2,
12961 asm: arm.AADD,
12962 reg: regInfo{
12963 inputs: []inputInfo{
12964 {0, 22527},
12965 {1, 22527},
12966 },
12967 outputs: []outputInfo{
12968 {1, 0},
12969 {0, 21503},
12970 },
12971 },
12972 },
12973 {
12974 name: "ADDSshiftRL",
12975 auxType: auxInt32,
12976 argLen: 2,
12977 asm: arm.AADD,
12978 reg: regInfo{
12979 inputs: []inputInfo{
12980 {0, 22527},
12981 {1, 22527},
12982 },
12983 outputs: []outputInfo{
12984 {1, 0},
12985 {0, 21503},
12986 },
12987 },
12988 },
12989 {
12990 name: "ADDSshiftRA",
12991 auxType: auxInt32,
12992 argLen: 2,
12993 asm: arm.AADD,
12994 reg: regInfo{
12995 inputs: []inputInfo{
12996 {0, 22527},
12997 {1, 22527},
12998 },
12999 outputs: []outputInfo{
13000 {1, 0},
13001 {0, 21503},
13002 },
13003 },
13004 },
13005 {
13006 name: "SUBSshiftLL",
13007 auxType: auxInt32,
13008 argLen: 2,
13009 asm: arm.ASUB,
13010 reg: regInfo{
13011 inputs: []inputInfo{
13012 {0, 22527},
13013 {1, 22527},
13014 },
13015 outputs: []outputInfo{
13016 {1, 0},
13017 {0, 21503},
13018 },
13019 },
13020 },
13021 {
13022 name: "SUBSshiftRL",
13023 auxType: auxInt32,
13024 argLen: 2,
13025 asm: arm.ASUB,
13026 reg: regInfo{
13027 inputs: []inputInfo{
13028 {0, 22527},
13029 {1, 22527},
13030 },
13031 outputs: []outputInfo{
13032 {1, 0},
13033 {0, 21503},
13034 },
13035 },
13036 },
13037 {
13038 name: "SUBSshiftRA",
13039 auxType: auxInt32,
13040 argLen: 2,
13041 asm: arm.ASUB,
13042 reg: regInfo{
13043 inputs: []inputInfo{
13044 {0, 22527},
13045 {1, 22527},
13046 },
13047 outputs: []outputInfo{
13048 {1, 0},
13049 {0, 21503},
13050 },
13051 },
13052 },
13053 {
13054 name: "RSBSshiftLL",
13055 auxType: auxInt32,
13056 argLen: 2,
13057 asm: arm.ARSB,
13058 reg: regInfo{
13059 inputs: []inputInfo{
13060 {0, 22527},
13061 {1, 22527},
13062 },
13063 outputs: []outputInfo{
13064 {1, 0},
13065 {0, 21503},
13066 },
13067 },
13068 },
13069 {
13070 name: "RSBSshiftRL",
13071 auxType: auxInt32,
13072 argLen: 2,
13073 asm: arm.ARSB,
13074 reg: regInfo{
13075 inputs: []inputInfo{
13076 {0, 22527},
13077 {1, 22527},
13078 },
13079 outputs: []outputInfo{
13080 {1, 0},
13081 {0, 21503},
13082 },
13083 },
13084 },
13085 {
13086 name: "RSBSshiftRA",
13087 auxType: auxInt32,
13088 argLen: 2,
13089 asm: arm.ARSB,
13090 reg: regInfo{
13091 inputs: []inputInfo{
13092 {0, 22527},
13093 {1, 22527},
13094 },
13095 outputs: []outputInfo{
13096 {1, 0},
13097 {0, 21503},
13098 },
13099 },
13100 },
13101 {
13102 name: "ADDshiftLLreg",
13103 argLen: 3,
13104 asm: arm.AADD,
13105 reg: regInfo{
13106 inputs: []inputInfo{
13107 {0, 21503},
13108 {1, 21503},
13109 {2, 21503},
13110 },
13111 outputs: []outputInfo{
13112 {0, 21503},
13113 },
13114 },
13115 },
13116 {
13117 name: "ADDshiftRLreg",
13118 argLen: 3,
13119 asm: arm.AADD,
13120 reg: regInfo{
13121 inputs: []inputInfo{
13122 {0, 21503},
13123 {1, 21503},
13124 {2, 21503},
13125 },
13126 outputs: []outputInfo{
13127 {0, 21503},
13128 },
13129 },
13130 },
13131 {
13132 name: "ADDshiftRAreg",
13133 argLen: 3,
13134 asm: arm.AADD,
13135 reg: regInfo{
13136 inputs: []inputInfo{
13137 {0, 21503},
13138 {1, 21503},
13139 {2, 21503},
13140 },
13141 outputs: []outputInfo{
13142 {0, 21503},
13143 },
13144 },
13145 },
13146 {
13147 name: "SUBshiftLLreg",
13148 argLen: 3,
13149 asm: arm.ASUB,
13150 reg: regInfo{
13151 inputs: []inputInfo{
13152 {0, 21503},
13153 {1, 21503},
13154 {2, 21503},
13155 },
13156 outputs: []outputInfo{
13157 {0, 21503},
13158 },
13159 },
13160 },
13161 {
13162 name: "SUBshiftRLreg",
13163 argLen: 3,
13164 asm: arm.ASUB,
13165 reg: regInfo{
13166 inputs: []inputInfo{
13167 {0, 21503},
13168 {1, 21503},
13169 {2, 21503},
13170 },
13171 outputs: []outputInfo{
13172 {0, 21503},
13173 },
13174 },
13175 },
13176 {
13177 name: "SUBshiftRAreg",
13178 argLen: 3,
13179 asm: arm.ASUB,
13180 reg: regInfo{
13181 inputs: []inputInfo{
13182 {0, 21503},
13183 {1, 21503},
13184 {2, 21503},
13185 },
13186 outputs: []outputInfo{
13187 {0, 21503},
13188 },
13189 },
13190 },
13191 {
13192 name: "RSBshiftLLreg",
13193 argLen: 3,
13194 asm: arm.ARSB,
13195 reg: regInfo{
13196 inputs: []inputInfo{
13197 {0, 21503},
13198 {1, 21503},
13199 {2, 21503},
13200 },
13201 outputs: []outputInfo{
13202 {0, 21503},
13203 },
13204 },
13205 },
13206 {
13207 name: "RSBshiftRLreg",
13208 argLen: 3,
13209 asm: arm.ARSB,
13210 reg: regInfo{
13211 inputs: []inputInfo{
13212 {0, 21503},
13213 {1, 21503},
13214 {2, 21503},
13215 },
13216 outputs: []outputInfo{
13217 {0, 21503},
13218 },
13219 },
13220 },
13221 {
13222 name: "RSBshiftRAreg",
13223 argLen: 3,
13224 asm: arm.ARSB,
13225 reg: regInfo{
13226 inputs: []inputInfo{
13227 {0, 21503},
13228 {1, 21503},
13229 {2, 21503},
13230 },
13231 outputs: []outputInfo{
13232 {0, 21503},
13233 },
13234 },
13235 },
13236 {
13237 name: "ANDshiftLLreg",
13238 argLen: 3,
13239 asm: arm.AAND,
13240 reg: regInfo{
13241 inputs: []inputInfo{
13242 {0, 21503},
13243 {1, 21503},
13244 {2, 21503},
13245 },
13246 outputs: []outputInfo{
13247 {0, 21503},
13248 },
13249 },
13250 },
13251 {
13252 name: "ANDshiftRLreg",
13253 argLen: 3,
13254 asm: arm.AAND,
13255 reg: regInfo{
13256 inputs: []inputInfo{
13257 {0, 21503},
13258 {1, 21503},
13259 {2, 21503},
13260 },
13261 outputs: []outputInfo{
13262 {0, 21503},
13263 },
13264 },
13265 },
13266 {
13267 name: "ANDshiftRAreg",
13268 argLen: 3,
13269 asm: arm.AAND,
13270 reg: regInfo{
13271 inputs: []inputInfo{
13272 {0, 21503},
13273 {1, 21503},
13274 {2, 21503},
13275 },
13276 outputs: []outputInfo{
13277 {0, 21503},
13278 },
13279 },
13280 },
13281 {
13282 name: "ORshiftLLreg",
13283 argLen: 3,
13284 asm: arm.AORR,
13285 reg: regInfo{
13286 inputs: []inputInfo{
13287 {0, 21503},
13288 {1, 21503},
13289 {2, 21503},
13290 },
13291 outputs: []outputInfo{
13292 {0, 21503},
13293 },
13294 },
13295 },
13296 {
13297 name: "ORshiftRLreg",
13298 argLen: 3,
13299 asm: arm.AORR,
13300 reg: regInfo{
13301 inputs: []inputInfo{
13302 {0, 21503},
13303 {1, 21503},
13304 {2, 21503},
13305 },
13306 outputs: []outputInfo{
13307 {0, 21503},
13308 },
13309 },
13310 },
13311 {
13312 name: "ORshiftRAreg",
13313 argLen: 3,
13314 asm: arm.AORR,
13315 reg: regInfo{
13316 inputs: []inputInfo{
13317 {0, 21503},
13318 {1, 21503},
13319 {2, 21503},
13320 },
13321 outputs: []outputInfo{
13322 {0, 21503},
13323 },
13324 },
13325 },
13326 {
13327 name: "XORshiftLLreg",
13328 argLen: 3,
13329 asm: arm.AEOR,
13330 reg: regInfo{
13331 inputs: []inputInfo{
13332 {0, 21503},
13333 {1, 21503},
13334 {2, 21503},
13335 },
13336 outputs: []outputInfo{
13337 {0, 21503},
13338 },
13339 },
13340 },
13341 {
13342 name: "XORshiftRLreg",
13343 argLen: 3,
13344 asm: arm.AEOR,
13345 reg: regInfo{
13346 inputs: []inputInfo{
13347 {0, 21503},
13348 {1, 21503},
13349 {2, 21503},
13350 },
13351 outputs: []outputInfo{
13352 {0, 21503},
13353 },
13354 },
13355 },
13356 {
13357 name: "XORshiftRAreg",
13358 argLen: 3,
13359 asm: arm.AEOR,
13360 reg: regInfo{
13361 inputs: []inputInfo{
13362 {0, 21503},
13363 {1, 21503},
13364 {2, 21503},
13365 },
13366 outputs: []outputInfo{
13367 {0, 21503},
13368 },
13369 },
13370 },
13371 {
13372 name: "BICshiftLLreg",
13373 argLen: 3,
13374 asm: arm.ABIC,
13375 reg: regInfo{
13376 inputs: []inputInfo{
13377 {0, 21503},
13378 {1, 21503},
13379 {2, 21503},
13380 },
13381 outputs: []outputInfo{
13382 {0, 21503},
13383 },
13384 },
13385 },
13386 {
13387 name: "BICshiftRLreg",
13388 argLen: 3,
13389 asm: arm.ABIC,
13390 reg: regInfo{
13391 inputs: []inputInfo{
13392 {0, 21503},
13393 {1, 21503},
13394 {2, 21503},
13395 },
13396 outputs: []outputInfo{
13397 {0, 21503},
13398 },
13399 },
13400 },
13401 {
13402 name: "BICshiftRAreg",
13403 argLen: 3,
13404 asm: arm.ABIC,
13405 reg: regInfo{
13406 inputs: []inputInfo{
13407 {0, 21503},
13408 {1, 21503},
13409 {2, 21503},
13410 },
13411 outputs: []outputInfo{
13412 {0, 21503},
13413 },
13414 },
13415 },
13416 {
13417 name: "MVNshiftLLreg",
13418 argLen: 2,
13419 asm: arm.AMVN,
13420 reg: regInfo{
13421 inputs: []inputInfo{
13422 {0, 22527},
13423 {1, 22527},
13424 },
13425 outputs: []outputInfo{
13426 {0, 21503},
13427 },
13428 },
13429 },
13430 {
13431 name: "MVNshiftRLreg",
13432 argLen: 2,
13433 asm: arm.AMVN,
13434 reg: regInfo{
13435 inputs: []inputInfo{
13436 {0, 22527},
13437 {1, 22527},
13438 },
13439 outputs: []outputInfo{
13440 {0, 21503},
13441 },
13442 },
13443 },
13444 {
13445 name: "MVNshiftRAreg",
13446 argLen: 2,
13447 asm: arm.AMVN,
13448 reg: regInfo{
13449 inputs: []inputInfo{
13450 {0, 22527},
13451 {1, 22527},
13452 },
13453 outputs: []outputInfo{
13454 {0, 21503},
13455 },
13456 },
13457 },
13458 {
13459 name: "ADCshiftLLreg",
13460 argLen: 4,
13461 asm: arm.AADC,
13462 reg: regInfo{
13463 inputs: []inputInfo{
13464 {0, 21503},
13465 {1, 21503},
13466 {2, 21503},
13467 },
13468 outputs: []outputInfo{
13469 {0, 21503},
13470 },
13471 },
13472 },
13473 {
13474 name: "ADCshiftRLreg",
13475 argLen: 4,
13476 asm: arm.AADC,
13477 reg: regInfo{
13478 inputs: []inputInfo{
13479 {0, 21503},
13480 {1, 21503},
13481 {2, 21503},
13482 },
13483 outputs: []outputInfo{
13484 {0, 21503},
13485 },
13486 },
13487 },
13488 {
13489 name: "ADCshiftRAreg",
13490 argLen: 4,
13491 asm: arm.AADC,
13492 reg: regInfo{
13493 inputs: []inputInfo{
13494 {0, 21503},
13495 {1, 21503},
13496 {2, 21503},
13497 },
13498 outputs: []outputInfo{
13499 {0, 21503},
13500 },
13501 },
13502 },
13503 {
13504 name: "SBCshiftLLreg",
13505 argLen: 4,
13506 asm: arm.ASBC,
13507 reg: regInfo{
13508 inputs: []inputInfo{
13509 {0, 21503},
13510 {1, 21503},
13511 {2, 21503},
13512 },
13513 outputs: []outputInfo{
13514 {0, 21503},
13515 },
13516 },
13517 },
13518 {
13519 name: "SBCshiftRLreg",
13520 argLen: 4,
13521 asm: arm.ASBC,
13522 reg: regInfo{
13523 inputs: []inputInfo{
13524 {0, 21503},
13525 {1, 21503},
13526 {2, 21503},
13527 },
13528 outputs: []outputInfo{
13529 {0, 21503},
13530 },
13531 },
13532 },
13533 {
13534 name: "SBCshiftRAreg",
13535 argLen: 4,
13536 asm: arm.ASBC,
13537 reg: regInfo{
13538 inputs: []inputInfo{
13539 {0, 21503},
13540 {1, 21503},
13541 {2, 21503},
13542 },
13543 outputs: []outputInfo{
13544 {0, 21503},
13545 },
13546 },
13547 },
13548 {
13549 name: "RSCshiftLLreg",
13550 argLen: 4,
13551 asm: arm.ARSC,
13552 reg: regInfo{
13553 inputs: []inputInfo{
13554 {0, 21503},
13555 {1, 21503},
13556 {2, 21503},
13557 },
13558 outputs: []outputInfo{
13559 {0, 21503},
13560 },
13561 },
13562 },
13563 {
13564 name: "RSCshiftRLreg",
13565 argLen: 4,
13566 asm: arm.ARSC,
13567 reg: regInfo{
13568 inputs: []inputInfo{
13569 {0, 21503},
13570 {1, 21503},
13571 {2, 21503},
13572 },
13573 outputs: []outputInfo{
13574 {0, 21503},
13575 },
13576 },
13577 },
13578 {
13579 name: "RSCshiftRAreg",
13580 argLen: 4,
13581 asm: arm.ARSC,
13582 reg: regInfo{
13583 inputs: []inputInfo{
13584 {0, 21503},
13585 {1, 21503},
13586 {2, 21503},
13587 },
13588 outputs: []outputInfo{
13589 {0, 21503},
13590 },
13591 },
13592 },
13593 {
13594 name: "ADDSshiftLLreg",
13595 argLen: 3,
13596 asm: arm.AADD,
13597 reg: regInfo{
13598 inputs: []inputInfo{
13599 {0, 21503},
13600 {1, 21503},
13601 {2, 21503},
13602 },
13603 outputs: []outputInfo{
13604 {1, 0},
13605 {0, 21503},
13606 },
13607 },
13608 },
13609 {
13610 name: "ADDSshiftRLreg",
13611 argLen: 3,
13612 asm: arm.AADD,
13613 reg: regInfo{
13614 inputs: []inputInfo{
13615 {0, 21503},
13616 {1, 21503},
13617 {2, 21503},
13618 },
13619 outputs: []outputInfo{
13620 {1, 0},
13621 {0, 21503},
13622 },
13623 },
13624 },
13625 {
13626 name: "ADDSshiftRAreg",
13627 argLen: 3,
13628 asm: arm.AADD,
13629 reg: regInfo{
13630 inputs: []inputInfo{
13631 {0, 21503},
13632 {1, 21503},
13633 {2, 21503},
13634 },
13635 outputs: []outputInfo{
13636 {1, 0},
13637 {0, 21503},
13638 },
13639 },
13640 },
13641 {
13642 name: "SUBSshiftLLreg",
13643 argLen: 3,
13644 asm: arm.ASUB,
13645 reg: regInfo{
13646 inputs: []inputInfo{
13647 {0, 21503},
13648 {1, 21503},
13649 {2, 21503},
13650 },
13651 outputs: []outputInfo{
13652 {1, 0},
13653 {0, 21503},
13654 },
13655 },
13656 },
13657 {
13658 name: "SUBSshiftRLreg",
13659 argLen: 3,
13660 asm: arm.ASUB,
13661 reg: regInfo{
13662 inputs: []inputInfo{
13663 {0, 21503},
13664 {1, 21503},
13665 {2, 21503},
13666 },
13667 outputs: []outputInfo{
13668 {1, 0},
13669 {0, 21503},
13670 },
13671 },
13672 },
13673 {
13674 name: "SUBSshiftRAreg",
13675 argLen: 3,
13676 asm: arm.ASUB,
13677 reg: regInfo{
13678 inputs: []inputInfo{
13679 {0, 21503},
13680 {1, 21503},
13681 {2, 21503},
13682 },
13683 outputs: []outputInfo{
13684 {1, 0},
13685 {0, 21503},
13686 },
13687 },
13688 },
13689 {
13690 name: "RSBSshiftLLreg",
13691 argLen: 3,
13692 asm: arm.ARSB,
13693 reg: regInfo{
13694 inputs: []inputInfo{
13695 {0, 21503},
13696 {1, 21503},
13697 {2, 21503},
13698 },
13699 outputs: []outputInfo{
13700 {1, 0},
13701 {0, 21503},
13702 },
13703 },
13704 },
13705 {
13706 name: "RSBSshiftRLreg",
13707 argLen: 3,
13708 asm: arm.ARSB,
13709 reg: regInfo{
13710 inputs: []inputInfo{
13711 {0, 21503},
13712 {1, 21503},
13713 {2, 21503},
13714 },
13715 outputs: []outputInfo{
13716 {1, 0},
13717 {0, 21503},
13718 },
13719 },
13720 },
13721 {
13722 name: "RSBSshiftRAreg",
13723 argLen: 3,
13724 asm: arm.ARSB,
13725 reg: regInfo{
13726 inputs: []inputInfo{
13727 {0, 21503},
13728 {1, 21503},
13729 {2, 21503},
13730 },
13731 outputs: []outputInfo{
13732 {1, 0},
13733 {0, 21503},
13734 },
13735 },
13736 },
13737 {
13738 name: "CMP",
13739 argLen: 2,
13740 asm: arm.ACMP,
13741 reg: regInfo{
13742 inputs: []inputInfo{
13743 {0, 22527},
13744 {1, 22527},
13745 },
13746 },
13747 },
13748 {
13749 name: "CMPconst",
13750 auxType: auxInt32,
13751 argLen: 1,
13752 asm: arm.ACMP,
13753 reg: regInfo{
13754 inputs: []inputInfo{
13755 {0, 22527},
13756 },
13757 },
13758 },
13759 {
13760 name: "CMN",
13761 argLen: 2,
13762 commutative: true,
13763 asm: arm.ACMN,
13764 reg: regInfo{
13765 inputs: []inputInfo{
13766 {0, 22527},
13767 {1, 22527},
13768 },
13769 },
13770 },
13771 {
13772 name: "CMNconst",
13773 auxType: auxInt32,
13774 argLen: 1,
13775 asm: arm.ACMN,
13776 reg: regInfo{
13777 inputs: []inputInfo{
13778 {0, 22527},
13779 },
13780 },
13781 },
13782 {
13783 name: "TST",
13784 argLen: 2,
13785 commutative: true,
13786 asm: arm.ATST,
13787 reg: regInfo{
13788 inputs: []inputInfo{
13789 {0, 22527},
13790 {1, 22527},
13791 },
13792 },
13793 },
13794 {
13795 name: "TSTconst",
13796 auxType: auxInt32,
13797 argLen: 1,
13798 asm: arm.ATST,
13799 reg: regInfo{
13800 inputs: []inputInfo{
13801 {0, 22527},
13802 },
13803 },
13804 },
13805 {
13806 name: "TEQ",
13807 argLen: 2,
13808 commutative: true,
13809 asm: arm.ATEQ,
13810 reg: regInfo{
13811 inputs: []inputInfo{
13812 {0, 22527},
13813 {1, 22527},
13814 },
13815 },
13816 },
13817 {
13818 name: "TEQconst",
13819 auxType: auxInt32,
13820 argLen: 1,
13821 asm: arm.ATEQ,
13822 reg: regInfo{
13823 inputs: []inputInfo{
13824 {0, 22527},
13825 },
13826 },
13827 },
13828 {
13829 name: "CMPF",
13830 argLen: 2,
13831 asm: arm.ACMPF,
13832 reg: regInfo{
13833 inputs: []inputInfo{
13834 {0, 4294901760},
13835 {1, 4294901760},
13836 },
13837 },
13838 },
13839 {
13840 name: "CMPD",
13841 argLen: 2,
13842 asm: arm.ACMPD,
13843 reg: regInfo{
13844 inputs: []inputInfo{
13845 {0, 4294901760},
13846 {1, 4294901760},
13847 },
13848 },
13849 },
13850 {
13851 name: "CMPshiftLL",
13852 auxType: auxInt32,
13853 argLen: 2,
13854 asm: arm.ACMP,
13855 reg: regInfo{
13856 inputs: []inputInfo{
13857 {0, 22527},
13858 {1, 22527},
13859 },
13860 },
13861 },
13862 {
13863 name: "CMPshiftRL",
13864 auxType: auxInt32,
13865 argLen: 2,
13866 asm: arm.ACMP,
13867 reg: regInfo{
13868 inputs: []inputInfo{
13869 {0, 22527},
13870 {1, 22527},
13871 },
13872 },
13873 },
13874 {
13875 name: "CMPshiftRA",
13876 auxType: auxInt32,
13877 argLen: 2,
13878 asm: arm.ACMP,
13879 reg: regInfo{
13880 inputs: []inputInfo{
13881 {0, 22527},
13882 {1, 22527},
13883 },
13884 },
13885 },
13886 {
13887 name: "CMNshiftLL",
13888 auxType: auxInt32,
13889 argLen: 2,
13890 asm: arm.ACMN,
13891 reg: regInfo{
13892 inputs: []inputInfo{
13893 {0, 22527},
13894 {1, 22527},
13895 },
13896 },
13897 },
13898 {
13899 name: "CMNshiftRL",
13900 auxType: auxInt32,
13901 argLen: 2,
13902 asm: arm.ACMN,
13903 reg: regInfo{
13904 inputs: []inputInfo{
13905 {0, 22527},
13906 {1, 22527},
13907 },
13908 },
13909 },
13910 {
13911 name: "CMNshiftRA",
13912 auxType: auxInt32,
13913 argLen: 2,
13914 asm: arm.ACMN,
13915 reg: regInfo{
13916 inputs: []inputInfo{
13917 {0, 22527},
13918 {1, 22527},
13919 },
13920 },
13921 },
13922 {
13923 name: "TSTshiftLL",
13924 auxType: auxInt32,
13925 argLen: 2,
13926 asm: arm.ATST,
13927 reg: regInfo{
13928 inputs: []inputInfo{
13929 {0, 22527},
13930 {1, 22527},
13931 },
13932 },
13933 },
13934 {
13935 name: "TSTshiftRL",
13936 auxType: auxInt32,
13937 argLen: 2,
13938 asm: arm.ATST,
13939 reg: regInfo{
13940 inputs: []inputInfo{
13941 {0, 22527},
13942 {1, 22527},
13943 },
13944 },
13945 },
13946 {
13947 name: "TSTshiftRA",
13948 auxType: auxInt32,
13949 argLen: 2,
13950 asm: arm.ATST,
13951 reg: regInfo{
13952 inputs: []inputInfo{
13953 {0, 22527},
13954 {1, 22527},
13955 },
13956 },
13957 },
13958 {
13959 name: "TEQshiftLL",
13960 auxType: auxInt32,
13961 argLen: 2,
13962 asm: arm.ATEQ,
13963 reg: regInfo{
13964 inputs: []inputInfo{
13965 {0, 22527},
13966 {1, 22527},
13967 },
13968 },
13969 },
13970 {
13971 name: "TEQshiftRL",
13972 auxType: auxInt32,
13973 argLen: 2,
13974 asm: arm.ATEQ,
13975 reg: regInfo{
13976 inputs: []inputInfo{
13977 {0, 22527},
13978 {1, 22527},
13979 },
13980 },
13981 },
13982 {
13983 name: "TEQshiftRA",
13984 auxType: auxInt32,
13985 argLen: 2,
13986 asm: arm.ATEQ,
13987 reg: regInfo{
13988 inputs: []inputInfo{
13989 {0, 22527},
13990 {1, 22527},
13991 },
13992 },
13993 },
13994 {
13995 name: "CMPshiftLLreg",
13996 argLen: 3,
13997 asm: arm.ACMP,
13998 reg: regInfo{
13999 inputs: []inputInfo{
14000 {0, 21503},
14001 {1, 21503},
14002 {2, 21503},
14003 },
14004 },
14005 },
14006 {
14007 name: "CMPshiftRLreg",
14008 argLen: 3,
14009 asm: arm.ACMP,
14010 reg: regInfo{
14011 inputs: []inputInfo{
14012 {0, 21503},
14013 {1, 21503},
14014 {2, 21503},
14015 },
14016 },
14017 },
14018 {
14019 name: "CMPshiftRAreg",
14020 argLen: 3,
14021 asm: arm.ACMP,
14022 reg: regInfo{
14023 inputs: []inputInfo{
14024 {0, 21503},
14025 {1, 21503},
14026 {2, 21503},
14027 },
14028 },
14029 },
14030 {
14031 name: "CMNshiftLLreg",
14032 argLen: 3,
14033 asm: arm.ACMN,
14034 reg: regInfo{
14035 inputs: []inputInfo{
14036 {0, 21503},
14037 {1, 21503},
14038 {2, 21503},
14039 },
14040 },
14041 },
14042 {
14043 name: "CMNshiftRLreg",
14044 argLen: 3,
14045 asm: arm.ACMN,
14046 reg: regInfo{
14047 inputs: []inputInfo{
14048 {0, 21503},
14049 {1, 21503},
14050 {2, 21503},
14051 },
14052 },
14053 },
14054 {
14055 name: "CMNshiftRAreg",
14056 argLen: 3,
14057 asm: arm.ACMN,
14058 reg: regInfo{
14059 inputs: []inputInfo{
14060 {0, 21503},
14061 {1, 21503},
14062 {2, 21503},
14063 },
14064 },
14065 },
14066 {
14067 name: "TSTshiftLLreg",
14068 argLen: 3,
14069 asm: arm.ATST,
14070 reg: regInfo{
14071 inputs: []inputInfo{
14072 {0, 21503},
14073 {1, 21503},
14074 {2, 21503},
14075 },
14076 },
14077 },
14078 {
14079 name: "TSTshiftRLreg",
14080 argLen: 3,
14081 asm: arm.ATST,
14082 reg: regInfo{
14083 inputs: []inputInfo{
14084 {0, 21503},
14085 {1, 21503},
14086 {2, 21503},
14087 },
14088 },
14089 },
14090 {
14091 name: "TSTshiftRAreg",
14092 argLen: 3,
14093 asm: arm.ATST,
14094 reg: regInfo{
14095 inputs: []inputInfo{
14096 {0, 21503},
14097 {1, 21503},
14098 {2, 21503},
14099 },
14100 },
14101 },
14102 {
14103 name: "TEQshiftLLreg",
14104 argLen: 3,
14105 asm: arm.ATEQ,
14106 reg: regInfo{
14107 inputs: []inputInfo{
14108 {0, 21503},
14109 {1, 21503},
14110 {2, 21503},
14111 },
14112 },
14113 },
14114 {
14115 name: "TEQshiftRLreg",
14116 argLen: 3,
14117 asm: arm.ATEQ,
14118 reg: regInfo{
14119 inputs: []inputInfo{
14120 {0, 21503},
14121 {1, 21503},
14122 {2, 21503},
14123 },
14124 },
14125 },
14126 {
14127 name: "TEQshiftRAreg",
14128 argLen: 3,
14129 asm: arm.ATEQ,
14130 reg: regInfo{
14131 inputs: []inputInfo{
14132 {0, 21503},
14133 {1, 21503},
14134 {2, 21503},
14135 },
14136 },
14137 },
14138 {
14139 name: "CMPF0",
14140 argLen: 1,
14141 asm: arm.ACMPF,
14142 reg: regInfo{
14143 inputs: []inputInfo{
14144 {0, 4294901760},
14145 },
14146 },
14147 },
14148 {
14149 name: "CMPD0",
14150 argLen: 1,
14151 asm: arm.ACMPD,
14152 reg: regInfo{
14153 inputs: []inputInfo{
14154 {0, 4294901760},
14155 },
14156 },
14157 },
14158 {
14159 name: "MOVWconst",
14160 auxType: auxInt32,
14161 argLen: 0,
14162 rematerializeable: true,
14163 asm: arm.AMOVW,
14164 reg: regInfo{
14165 outputs: []outputInfo{
14166 {0, 21503},
14167 },
14168 },
14169 },
14170 {
14171 name: "MOVFconst",
14172 auxType: auxFloat64,
14173 argLen: 0,
14174 rematerializeable: true,
14175 asm: arm.AMOVF,
14176 reg: regInfo{
14177 outputs: []outputInfo{
14178 {0, 4294901760},
14179 },
14180 },
14181 },
14182 {
14183 name: "MOVDconst",
14184 auxType: auxFloat64,
14185 argLen: 0,
14186 rematerializeable: true,
14187 asm: arm.AMOVD,
14188 reg: regInfo{
14189 outputs: []outputInfo{
14190 {0, 4294901760},
14191 },
14192 },
14193 },
14194 {
14195 name: "MOVWaddr",
14196 auxType: auxSymOff,
14197 argLen: 1,
14198 rematerializeable: true,
14199 symEffect: SymAddr,
14200 asm: arm.AMOVW,
14201 reg: regInfo{
14202 inputs: []inputInfo{
14203 {0, 4294975488},
14204 },
14205 outputs: []outputInfo{
14206 {0, 21503},
14207 },
14208 },
14209 },
14210 {
14211 name: "MOVBload",
14212 auxType: auxSymOff,
14213 argLen: 2,
14214 faultOnNilArg0: true,
14215 symEffect: SymRead,
14216 asm: arm.AMOVB,
14217 reg: regInfo{
14218 inputs: []inputInfo{
14219 {0, 4294998015},
14220 },
14221 outputs: []outputInfo{
14222 {0, 21503},
14223 },
14224 },
14225 },
14226 {
14227 name: "MOVBUload",
14228 auxType: auxSymOff,
14229 argLen: 2,
14230 faultOnNilArg0: true,
14231 symEffect: SymRead,
14232 asm: arm.AMOVBU,
14233 reg: regInfo{
14234 inputs: []inputInfo{
14235 {0, 4294998015},
14236 },
14237 outputs: []outputInfo{
14238 {0, 21503},
14239 },
14240 },
14241 },
14242 {
14243 name: "MOVHload",
14244 auxType: auxSymOff,
14245 argLen: 2,
14246 faultOnNilArg0: true,
14247 symEffect: SymRead,
14248 asm: arm.AMOVH,
14249 reg: regInfo{
14250 inputs: []inputInfo{
14251 {0, 4294998015},
14252 },
14253 outputs: []outputInfo{
14254 {0, 21503},
14255 },
14256 },
14257 },
14258 {
14259 name: "MOVHUload",
14260 auxType: auxSymOff,
14261 argLen: 2,
14262 faultOnNilArg0: true,
14263 symEffect: SymRead,
14264 asm: arm.AMOVHU,
14265 reg: regInfo{
14266 inputs: []inputInfo{
14267 {0, 4294998015},
14268 },
14269 outputs: []outputInfo{
14270 {0, 21503},
14271 },
14272 },
14273 },
14274 {
14275 name: "MOVWload",
14276 auxType: auxSymOff,
14277 argLen: 2,
14278 faultOnNilArg0: true,
14279 symEffect: SymRead,
14280 asm: arm.AMOVW,
14281 reg: regInfo{
14282 inputs: []inputInfo{
14283 {0, 4294998015},
14284 },
14285 outputs: []outputInfo{
14286 {0, 21503},
14287 },
14288 },
14289 },
14290 {
14291 name: "MOVFload",
14292 auxType: auxSymOff,
14293 argLen: 2,
14294 faultOnNilArg0: true,
14295 symEffect: SymRead,
14296 asm: arm.AMOVF,
14297 reg: regInfo{
14298 inputs: []inputInfo{
14299 {0, 4294998015},
14300 },
14301 outputs: []outputInfo{
14302 {0, 4294901760},
14303 },
14304 },
14305 },
14306 {
14307 name: "MOVDload",
14308 auxType: auxSymOff,
14309 argLen: 2,
14310 faultOnNilArg0: true,
14311 symEffect: SymRead,
14312 asm: arm.AMOVD,
14313 reg: regInfo{
14314 inputs: []inputInfo{
14315 {0, 4294998015},
14316 },
14317 outputs: []outputInfo{
14318 {0, 4294901760},
14319 },
14320 },
14321 },
14322 {
14323 name: "MOVBstore",
14324 auxType: auxSymOff,
14325 argLen: 3,
14326 faultOnNilArg0: true,
14327 symEffect: SymWrite,
14328 asm: arm.AMOVB,
14329 reg: regInfo{
14330 inputs: []inputInfo{
14331 {1, 22527},
14332 {0, 4294998015},
14333 },
14334 },
14335 },
14336 {
14337 name: "MOVHstore",
14338 auxType: auxSymOff,
14339 argLen: 3,
14340 faultOnNilArg0: true,
14341 symEffect: SymWrite,
14342 asm: arm.AMOVH,
14343 reg: regInfo{
14344 inputs: []inputInfo{
14345 {1, 22527},
14346 {0, 4294998015},
14347 },
14348 },
14349 },
14350 {
14351 name: "MOVWstore",
14352 auxType: auxSymOff,
14353 argLen: 3,
14354 faultOnNilArg0: true,
14355 symEffect: SymWrite,
14356 asm: arm.AMOVW,
14357 reg: regInfo{
14358 inputs: []inputInfo{
14359 {1, 22527},
14360 {0, 4294998015},
14361 },
14362 },
14363 },
14364 {
14365 name: "MOVFstore",
14366 auxType: auxSymOff,
14367 argLen: 3,
14368 faultOnNilArg0: true,
14369 symEffect: SymWrite,
14370 asm: arm.AMOVF,
14371 reg: regInfo{
14372 inputs: []inputInfo{
14373 {0, 4294998015},
14374 {1, 4294901760},
14375 },
14376 },
14377 },
14378 {
14379 name: "MOVDstore",
14380 auxType: auxSymOff,
14381 argLen: 3,
14382 faultOnNilArg0: true,
14383 symEffect: SymWrite,
14384 asm: arm.AMOVD,
14385 reg: regInfo{
14386 inputs: []inputInfo{
14387 {0, 4294998015},
14388 {1, 4294901760},
14389 },
14390 },
14391 },
14392 {
14393 name: "MOVWloadidx",
14394 argLen: 3,
14395 asm: arm.AMOVW,
14396 reg: regInfo{
14397 inputs: []inputInfo{
14398 {1, 22527},
14399 {0, 4294998015},
14400 },
14401 outputs: []outputInfo{
14402 {0, 21503},
14403 },
14404 },
14405 },
14406 {
14407 name: "MOVWloadshiftLL",
14408 auxType: auxInt32,
14409 argLen: 3,
14410 asm: arm.AMOVW,
14411 reg: regInfo{
14412 inputs: []inputInfo{
14413 {1, 22527},
14414 {0, 4294998015},
14415 },
14416 outputs: []outputInfo{
14417 {0, 21503},
14418 },
14419 },
14420 },
14421 {
14422 name: "MOVWloadshiftRL",
14423 auxType: auxInt32,
14424 argLen: 3,
14425 asm: arm.AMOVW,
14426 reg: regInfo{
14427 inputs: []inputInfo{
14428 {1, 22527},
14429 {0, 4294998015},
14430 },
14431 outputs: []outputInfo{
14432 {0, 21503},
14433 },
14434 },
14435 },
14436 {
14437 name: "MOVWloadshiftRA",
14438 auxType: auxInt32,
14439 argLen: 3,
14440 asm: arm.AMOVW,
14441 reg: regInfo{
14442 inputs: []inputInfo{
14443 {1, 22527},
14444 {0, 4294998015},
14445 },
14446 outputs: []outputInfo{
14447 {0, 21503},
14448 },
14449 },
14450 },
14451 {
14452 name: "MOVBUloadidx",
14453 argLen: 3,
14454 asm: arm.AMOVBU,
14455 reg: regInfo{
14456 inputs: []inputInfo{
14457 {1, 22527},
14458 {0, 4294998015},
14459 },
14460 outputs: []outputInfo{
14461 {0, 21503},
14462 },
14463 },
14464 },
14465 {
14466 name: "MOVBloadidx",
14467 argLen: 3,
14468 asm: arm.AMOVB,
14469 reg: regInfo{
14470 inputs: []inputInfo{
14471 {1, 22527},
14472 {0, 4294998015},
14473 },
14474 outputs: []outputInfo{
14475 {0, 21503},
14476 },
14477 },
14478 },
14479 {
14480 name: "MOVHUloadidx",
14481 argLen: 3,
14482 asm: arm.AMOVHU,
14483 reg: regInfo{
14484 inputs: []inputInfo{
14485 {1, 22527},
14486 {0, 4294998015},
14487 },
14488 outputs: []outputInfo{
14489 {0, 21503},
14490 },
14491 },
14492 },
14493 {
14494 name: "MOVHloadidx",
14495 argLen: 3,
14496 asm: arm.AMOVH,
14497 reg: regInfo{
14498 inputs: []inputInfo{
14499 {1, 22527},
14500 {0, 4294998015},
14501 },
14502 outputs: []outputInfo{
14503 {0, 21503},
14504 },
14505 },
14506 },
14507 {
14508 name: "MOVWstoreidx",
14509 argLen: 4,
14510 asm: arm.AMOVW,
14511 reg: regInfo{
14512 inputs: []inputInfo{
14513 {1, 22527},
14514 {2, 22527},
14515 {0, 4294998015},
14516 },
14517 },
14518 },
14519 {
14520 name: "MOVWstoreshiftLL",
14521 auxType: auxInt32,
14522 argLen: 4,
14523 asm: arm.AMOVW,
14524 reg: regInfo{
14525 inputs: []inputInfo{
14526 {1, 22527},
14527 {2, 22527},
14528 {0, 4294998015},
14529 },
14530 },
14531 },
14532 {
14533 name: "MOVWstoreshiftRL",
14534 auxType: auxInt32,
14535 argLen: 4,
14536 asm: arm.AMOVW,
14537 reg: regInfo{
14538 inputs: []inputInfo{
14539 {1, 22527},
14540 {2, 22527},
14541 {0, 4294998015},
14542 },
14543 },
14544 },
14545 {
14546 name: "MOVWstoreshiftRA",
14547 auxType: auxInt32,
14548 argLen: 4,
14549 asm: arm.AMOVW,
14550 reg: regInfo{
14551 inputs: []inputInfo{
14552 {1, 22527},
14553 {2, 22527},
14554 {0, 4294998015},
14555 },
14556 },
14557 },
14558 {
14559 name: "MOVBstoreidx",
14560 argLen: 4,
14561 asm: arm.AMOVB,
14562 reg: regInfo{
14563 inputs: []inputInfo{
14564 {1, 22527},
14565 {2, 22527},
14566 {0, 4294998015},
14567 },
14568 },
14569 },
14570 {
14571 name: "MOVHstoreidx",
14572 argLen: 4,
14573 asm: arm.AMOVH,
14574 reg: regInfo{
14575 inputs: []inputInfo{
14576 {1, 22527},
14577 {2, 22527},
14578 {0, 4294998015},
14579 },
14580 },
14581 },
14582 {
14583 name: "MOVBreg",
14584 argLen: 1,
14585 asm: arm.AMOVBS,
14586 reg: regInfo{
14587 inputs: []inputInfo{
14588 {0, 22527},
14589 },
14590 outputs: []outputInfo{
14591 {0, 21503},
14592 },
14593 },
14594 },
14595 {
14596 name: "MOVBUreg",
14597 argLen: 1,
14598 asm: arm.AMOVBU,
14599 reg: regInfo{
14600 inputs: []inputInfo{
14601 {0, 22527},
14602 },
14603 outputs: []outputInfo{
14604 {0, 21503},
14605 },
14606 },
14607 },
14608 {
14609 name: "MOVHreg",
14610 argLen: 1,
14611 asm: arm.AMOVHS,
14612 reg: regInfo{
14613 inputs: []inputInfo{
14614 {0, 22527},
14615 },
14616 outputs: []outputInfo{
14617 {0, 21503},
14618 },
14619 },
14620 },
14621 {
14622 name: "MOVHUreg",
14623 argLen: 1,
14624 asm: arm.AMOVHU,
14625 reg: regInfo{
14626 inputs: []inputInfo{
14627 {0, 22527},
14628 },
14629 outputs: []outputInfo{
14630 {0, 21503},
14631 },
14632 },
14633 },
14634 {
14635 name: "MOVWreg",
14636 argLen: 1,
14637 asm: arm.AMOVW,
14638 reg: regInfo{
14639 inputs: []inputInfo{
14640 {0, 22527},
14641 },
14642 outputs: []outputInfo{
14643 {0, 21503},
14644 },
14645 },
14646 },
14647 {
14648 name: "MOVWnop",
14649 argLen: 1,
14650 resultInArg0: true,
14651 reg: regInfo{
14652 inputs: []inputInfo{
14653 {0, 21503},
14654 },
14655 outputs: []outputInfo{
14656 {0, 21503},
14657 },
14658 },
14659 },
14660 {
14661 name: "MOVWF",
14662 argLen: 1,
14663 asm: arm.AMOVWF,
14664 reg: regInfo{
14665 inputs: []inputInfo{
14666 {0, 21503},
14667 },
14668 clobbers: 2147483648,
14669 outputs: []outputInfo{
14670 {0, 4294901760},
14671 },
14672 },
14673 },
14674 {
14675 name: "MOVWD",
14676 argLen: 1,
14677 asm: arm.AMOVWD,
14678 reg: regInfo{
14679 inputs: []inputInfo{
14680 {0, 21503},
14681 },
14682 clobbers: 2147483648,
14683 outputs: []outputInfo{
14684 {0, 4294901760},
14685 },
14686 },
14687 },
14688 {
14689 name: "MOVWUF",
14690 argLen: 1,
14691 asm: arm.AMOVWF,
14692 reg: regInfo{
14693 inputs: []inputInfo{
14694 {0, 21503},
14695 },
14696 clobbers: 2147483648,
14697 outputs: []outputInfo{
14698 {0, 4294901760},
14699 },
14700 },
14701 },
14702 {
14703 name: "MOVWUD",
14704 argLen: 1,
14705 asm: arm.AMOVWD,
14706 reg: regInfo{
14707 inputs: []inputInfo{
14708 {0, 21503},
14709 },
14710 clobbers: 2147483648,
14711 outputs: []outputInfo{
14712 {0, 4294901760},
14713 },
14714 },
14715 },
14716 {
14717 name: "MOVFW",
14718 argLen: 1,
14719 asm: arm.AMOVFW,
14720 reg: regInfo{
14721 inputs: []inputInfo{
14722 {0, 4294901760},
14723 },
14724 clobbers: 2147483648,
14725 outputs: []outputInfo{
14726 {0, 21503},
14727 },
14728 },
14729 },
14730 {
14731 name: "MOVDW",
14732 argLen: 1,
14733 asm: arm.AMOVDW,
14734 reg: regInfo{
14735 inputs: []inputInfo{
14736 {0, 4294901760},
14737 },
14738 clobbers: 2147483648,
14739 outputs: []outputInfo{
14740 {0, 21503},
14741 },
14742 },
14743 },
14744 {
14745 name: "MOVFWU",
14746 argLen: 1,
14747 asm: arm.AMOVFW,
14748 reg: regInfo{
14749 inputs: []inputInfo{
14750 {0, 4294901760},
14751 },
14752 clobbers: 2147483648,
14753 outputs: []outputInfo{
14754 {0, 21503},
14755 },
14756 },
14757 },
14758 {
14759 name: "MOVDWU",
14760 argLen: 1,
14761 asm: arm.AMOVDW,
14762 reg: regInfo{
14763 inputs: []inputInfo{
14764 {0, 4294901760},
14765 },
14766 clobbers: 2147483648,
14767 outputs: []outputInfo{
14768 {0, 21503},
14769 },
14770 },
14771 },
14772 {
14773 name: "MOVFD",
14774 argLen: 1,
14775 asm: arm.AMOVFD,
14776 reg: regInfo{
14777 inputs: []inputInfo{
14778 {0, 4294901760},
14779 },
14780 outputs: []outputInfo{
14781 {0, 4294901760},
14782 },
14783 },
14784 },
14785 {
14786 name: "MOVDF",
14787 argLen: 1,
14788 asm: arm.AMOVDF,
14789 reg: regInfo{
14790 inputs: []inputInfo{
14791 {0, 4294901760},
14792 },
14793 outputs: []outputInfo{
14794 {0, 4294901760},
14795 },
14796 },
14797 },
14798 {
14799 name: "CMOVWHSconst",
14800 auxType: auxInt32,
14801 argLen: 2,
14802 resultInArg0: true,
14803 asm: arm.AMOVW,
14804 reg: regInfo{
14805 inputs: []inputInfo{
14806 {0, 21503},
14807 },
14808 outputs: []outputInfo{
14809 {0, 21503},
14810 },
14811 },
14812 },
14813 {
14814 name: "CMOVWLSconst",
14815 auxType: auxInt32,
14816 argLen: 2,
14817 resultInArg0: true,
14818 asm: arm.AMOVW,
14819 reg: regInfo{
14820 inputs: []inputInfo{
14821 {0, 21503},
14822 },
14823 outputs: []outputInfo{
14824 {0, 21503},
14825 },
14826 },
14827 },
14828 {
14829 name: "SRAcond",
14830 argLen: 3,
14831 asm: arm.ASRA,
14832 reg: regInfo{
14833 inputs: []inputInfo{
14834 {0, 21503},
14835 {1, 21503},
14836 },
14837 outputs: []outputInfo{
14838 {0, 21503},
14839 },
14840 },
14841 },
14842 {
14843 name: "CALLstatic",
14844 auxType: auxSymOff,
14845 argLen: 1,
14846 clobberFlags: true,
14847 call: true,
14848 symEffect: SymNone,
14849 reg: regInfo{
14850 clobbers: 4294924287,
14851 },
14852 },
14853 {
14854 name: "CALLclosure",
14855 auxType: auxInt64,
14856 argLen: 3,
14857 clobberFlags: true,
14858 call: true,
14859 reg: regInfo{
14860 inputs: []inputInfo{
14861 {1, 128},
14862 {0, 29695},
14863 },
14864 clobbers: 4294924287,
14865 },
14866 },
14867 {
14868 name: "CALLinter",
14869 auxType: auxInt64,
14870 argLen: 2,
14871 clobberFlags: true,
14872 call: true,
14873 reg: regInfo{
14874 inputs: []inputInfo{
14875 {0, 21503},
14876 },
14877 clobbers: 4294924287,
14878 },
14879 },
14880 {
14881 name: "LoweredNilCheck",
14882 argLen: 2,
14883 nilCheck: true,
14884 faultOnNilArg0: true,
14885 reg: regInfo{
14886 inputs: []inputInfo{
14887 {0, 22527},
14888 },
14889 },
14890 },
14891 {
14892 name: "Equal",
14893 argLen: 1,
14894 reg: regInfo{
14895 outputs: []outputInfo{
14896 {0, 21503},
14897 },
14898 },
14899 },
14900 {
14901 name: "NotEqual",
14902 argLen: 1,
14903 reg: regInfo{
14904 outputs: []outputInfo{
14905 {0, 21503},
14906 },
14907 },
14908 },
14909 {
14910 name: "LessThan",
14911 argLen: 1,
14912 reg: regInfo{
14913 outputs: []outputInfo{
14914 {0, 21503},
14915 },
14916 },
14917 },
14918 {
14919 name: "LessEqual",
14920 argLen: 1,
14921 reg: regInfo{
14922 outputs: []outputInfo{
14923 {0, 21503},
14924 },
14925 },
14926 },
14927 {
14928 name: "GreaterThan",
14929 argLen: 1,
14930 reg: regInfo{
14931 outputs: []outputInfo{
14932 {0, 21503},
14933 },
14934 },
14935 },
14936 {
14937 name: "GreaterEqual",
14938 argLen: 1,
14939 reg: regInfo{
14940 outputs: []outputInfo{
14941 {0, 21503},
14942 },
14943 },
14944 },
14945 {
14946 name: "LessThanU",
14947 argLen: 1,
14948 reg: regInfo{
14949 outputs: []outputInfo{
14950 {0, 21503},
14951 },
14952 },
14953 },
14954 {
14955 name: "LessEqualU",
14956 argLen: 1,
14957 reg: regInfo{
14958 outputs: []outputInfo{
14959 {0, 21503},
14960 },
14961 },
14962 },
14963 {
14964 name: "GreaterThanU",
14965 argLen: 1,
14966 reg: regInfo{
14967 outputs: []outputInfo{
14968 {0, 21503},
14969 },
14970 },
14971 },
14972 {
14973 name: "GreaterEqualU",
14974 argLen: 1,
14975 reg: regInfo{
14976 outputs: []outputInfo{
14977 {0, 21503},
14978 },
14979 },
14980 },
14981 {
14982 name: "DUFFZERO",
14983 auxType: auxInt64,
14984 argLen: 3,
14985 faultOnNilArg0: true,
14986 reg: regInfo{
14987 inputs: []inputInfo{
14988 {0, 2},
14989 {1, 1},
14990 },
14991 clobbers: 16386,
14992 },
14993 },
14994 {
14995 name: "DUFFCOPY",
14996 auxType: auxInt64,
14997 argLen: 3,
14998 faultOnNilArg0: true,
14999 faultOnNilArg1: true,
15000 reg: regInfo{
15001 inputs: []inputInfo{
15002 {0, 4},
15003 {1, 2},
15004 },
15005 clobbers: 16391,
15006 },
15007 },
15008 {
15009 name: "LoweredZero",
15010 auxType: auxInt64,
15011 argLen: 4,
15012 clobberFlags: true,
15013 faultOnNilArg0: true,
15014 reg: regInfo{
15015 inputs: []inputInfo{
15016 {0, 2},
15017 {1, 21503},
15018 {2, 21503},
15019 },
15020 clobbers: 2,
15021 },
15022 },
15023 {
15024 name: "LoweredMove",
15025 auxType: auxInt64,
15026 argLen: 4,
15027 clobberFlags: true,
15028 faultOnNilArg0: true,
15029 faultOnNilArg1: true,
15030 reg: regInfo{
15031 inputs: []inputInfo{
15032 {0, 4},
15033 {1, 2},
15034 {2, 21503},
15035 },
15036 clobbers: 6,
15037 },
15038 },
15039 {
15040 name: "LoweredGetClosurePtr",
15041 argLen: 0,
15042 zeroWidth: true,
15043 reg: regInfo{
15044 outputs: []outputInfo{
15045 {0, 128},
15046 },
15047 },
15048 },
15049 {
15050 name: "LoweredGetCallerSP",
15051 argLen: 0,
15052 rematerializeable: true,
15053 reg: regInfo{
15054 outputs: []outputInfo{
15055 {0, 21503},
15056 },
15057 },
15058 },
15059 {
15060 name: "LoweredGetCallerPC",
15061 argLen: 0,
15062 rematerializeable: true,
15063 reg: regInfo{
15064 outputs: []outputInfo{
15065 {0, 21503},
15066 },
15067 },
15068 },
15069 {
15070 name: "LoweredPanicBoundsA",
15071 auxType: auxInt64,
15072 argLen: 3,
15073 reg: regInfo{
15074 inputs: []inputInfo{
15075 {0, 4},
15076 {1, 8},
15077 },
15078 },
15079 },
15080 {
15081 name: "LoweredPanicBoundsB",
15082 auxType: auxInt64,
15083 argLen: 3,
15084 reg: regInfo{
15085 inputs: []inputInfo{
15086 {0, 2},
15087 {1, 4},
15088 },
15089 },
15090 },
15091 {
15092 name: "LoweredPanicBoundsC",
15093 auxType: auxInt64,
15094 argLen: 3,
15095 reg: regInfo{
15096 inputs: []inputInfo{
15097 {0, 1},
15098 {1, 2},
15099 },
15100 },
15101 },
15102 {
15103 name: "LoweredPanicExtendA",
15104 auxType: auxInt64,
15105 argLen: 4,
15106 reg: regInfo{
15107 inputs: []inputInfo{
15108 {0, 16},
15109 {1, 4},
15110 {2, 8},
15111 },
15112 },
15113 },
15114 {
15115 name: "LoweredPanicExtendB",
15116 auxType: auxInt64,
15117 argLen: 4,
15118 reg: regInfo{
15119 inputs: []inputInfo{
15120 {0, 16},
15121 {1, 2},
15122 {2, 4},
15123 },
15124 },
15125 },
15126 {
15127 name: "LoweredPanicExtendC",
15128 auxType: auxInt64,
15129 argLen: 4,
15130 reg: regInfo{
15131 inputs: []inputInfo{
15132 {0, 16},
15133 {1, 1},
15134 {2, 2},
15135 },
15136 },
15137 },
15138 {
15139 name: "FlagEQ",
15140 argLen: 0,
15141 reg: regInfo{},
15142 },
15143 {
15144 name: "FlagLT_ULT",
15145 argLen: 0,
15146 reg: regInfo{},
15147 },
15148 {
15149 name: "FlagLT_UGT",
15150 argLen: 0,
15151 reg: regInfo{},
15152 },
15153 {
15154 name: "FlagGT_UGT",
15155 argLen: 0,
15156 reg: regInfo{},
15157 },
15158 {
15159 name: "FlagGT_ULT",
15160 argLen: 0,
15161 reg: regInfo{},
15162 },
15163 {
15164 name: "InvertFlags",
15165 argLen: 1,
15166 reg: regInfo{},
15167 },
15168 {
15169 name: "LoweredWB",
15170 auxType: auxSym,
15171 argLen: 3,
15172 clobberFlags: true,
15173 symEffect: SymNone,
15174 reg: regInfo{
15175 inputs: []inputInfo{
15176 {0, 4},
15177 {1, 8},
15178 },
15179 clobbers: 4294918144,
15180 },
15181 },
15182
15183 {
15184 name: "ADCSflags",
15185 argLen: 3,
15186 commutative: true,
15187 asm: arm64.AADCS,
15188 reg: regInfo{
15189 inputs: []inputInfo{
15190 {0, 670826495},
15191 {1, 670826495},
15192 },
15193 outputs: []outputInfo{
15194 {1, 0},
15195 {0, 670826495},
15196 },
15197 },
15198 },
15199 {
15200 name: "ADCzerocarry",
15201 argLen: 1,
15202 asm: arm64.AADC,
15203 reg: regInfo{
15204 outputs: []outputInfo{
15205 {0, 670826495},
15206 },
15207 },
15208 },
15209 {
15210 name: "ADD",
15211 argLen: 2,
15212 commutative: true,
15213 asm: arm64.AADD,
15214 reg: regInfo{
15215 inputs: []inputInfo{
15216 {0, 805044223},
15217 {1, 805044223},
15218 },
15219 outputs: []outputInfo{
15220 {0, 670826495},
15221 },
15222 },
15223 },
15224 {
15225 name: "ADDconst",
15226 auxType: auxInt64,
15227 argLen: 1,
15228 asm: arm64.AADD,
15229 reg: regInfo{
15230 inputs: []inputInfo{
15231 {0, 1878786047},
15232 },
15233 outputs: []outputInfo{
15234 {0, 670826495},
15235 },
15236 },
15237 },
15238 {
15239 name: "ADDSconstflags",
15240 auxType: auxInt64,
15241 argLen: 1,
15242 asm: arm64.AADDS,
15243 reg: regInfo{
15244 inputs: []inputInfo{
15245 {0, 805044223},
15246 },
15247 outputs: []outputInfo{
15248 {1, 0},
15249 {0, 670826495},
15250 },
15251 },
15252 },
15253 {
15254 name: "ADDSflags",
15255 argLen: 2,
15256 commutative: true,
15257 asm: arm64.AADDS,
15258 reg: regInfo{
15259 inputs: []inputInfo{
15260 {0, 670826495},
15261 {1, 670826495},
15262 },
15263 outputs: []outputInfo{
15264 {1, 0},
15265 {0, 670826495},
15266 },
15267 },
15268 },
15269 {
15270 name: "SUB",
15271 argLen: 2,
15272 asm: arm64.ASUB,
15273 reg: regInfo{
15274 inputs: []inputInfo{
15275 {0, 805044223},
15276 {1, 805044223},
15277 },
15278 outputs: []outputInfo{
15279 {0, 670826495},
15280 },
15281 },
15282 },
15283 {
15284 name: "SUBconst",
15285 auxType: auxInt64,
15286 argLen: 1,
15287 asm: arm64.ASUB,
15288 reg: regInfo{
15289 inputs: []inputInfo{
15290 {0, 805044223},
15291 },
15292 outputs: []outputInfo{
15293 {0, 670826495},
15294 },
15295 },
15296 },
15297 {
15298 name: "SBCSflags",
15299 argLen: 3,
15300 asm: arm64.ASBCS,
15301 reg: regInfo{
15302 inputs: []inputInfo{
15303 {0, 670826495},
15304 {1, 670826495},
15305 },
15306 outputs: []outputInfo{
15307 {1, 0},
15308 {0, 670826495},
15309 },
15310 },
15311 },
15312 {
15313 name: "SUBSflags",
15314 argLen: 2,
15315 asm: arm64.ASUBS,
15316 reg: regInfo{
15317 inputs: []inputInfo{
15318 {0, 670826495},
15319 {1, 670826495},
15320 },
15321 outputs: []outputInfo{
15322 {1, 0},
15323 {0, 670826495},
15324 },
15325 },
15326 },
15327 {
15328 name: "MUL",
15329 argLen: 2,
15330 commutative: true,
15331 asm: arm64.AMUL,
15332 reg: regInfo{
15333 inputs: []inputInfo{
15334 {0, 805044223},
15335 {1, 805044223},
15336 },
15337 outputs: []outputInfo{
15338 {0, 670826495},
15339 },
15340 },
15341 },
15342 {
15343 name: "MULW",
15344 argLen: 2,
15345 commutative: true,
15346 asm: arm64.AMULW,
15347 reg: regInfo{
15348 inputs: []inputInfo{
15349 {0, 805044223},
15350 {1, 805044223},
15351 },
15352 outputs: []outputInfo{
15353 {0, 670826495},
15354 },
15355 },
15356 },
15357 {
15358 name: "MNEG",
15359 argLen: 2,
15360 commutative: true,
15361 asm: arm64.AMNEG,
15362 reg: regInfo{
15363 inputs: []inputInfo{
15364 {0, 805044223},
15365 {1, 805044223},
15366 },
15367 outputs: []outputInfo{
15368 {0, 670826495},
15369 },
15370 },
15371 },
15372 {
15373 name: "MNEGW",
15374 argLen: 2,
15375 commutative: true,
15376 asm: arm64.AMNEGW,
15377 reg: regInfo{
15378 inputs: []inputInfo{
15379 {0, 805044223},
15380 {1, 805044223},
15381 },
15382 outputs: []outputInfo{
15383 {0, 670826495},
15384 },
15385 },
15386 },
15387 {
15388 name: "MULH",
15389 argLen: 2,
15390 commutative: true,
15391 asm: arm64.ASMULH,
15392 reg: regInfo{
15393 inputs: []inputInfo{
15394 {0, 805044223},
15395 {1, 805044223},
15396 },
15397 outputs: []outputInfo{
15398 {0, 670826495},
15399 },
15400 },
15401 },
15402 {
15403 name: "UMULH",
15404 argLen: 2,
15405 commutative: true,
15406 asm: arm64.AUMULH,
15407 reg: regInfo{
15408 inputs: []inputInfo{
15409 {0, 805044223},
15410 {1, 805044223},
15411 },
15412 outputs: []outputInfo{
15413 {0, 670826495},
15414 },
15415 },
15416 },
15417 {
15418 name: "MULL",
15419 argLen: 2,
15420 commutative: true,
15421 asm: arm64.ASMULL,
15422 reg: regInfo{
15423 inputs: []inputInfo{
15424 {0, 805044223},
15425 {1, 805044223},
15426 },
15427 outputs: []outputInfo{
15428 {0, 670826495},
15429 },
15430 },
15431 },
15432 {
15433 name: "UMULL",
15434 argLen: 2,
15435 commutative: true,
15436 asm: arm64.AUMULL,
15437 reg: regInfo{
15438 inputs: []inputInfo{
15439 {0, 805044223},
15440 {1, 805044223},
15441 },
15442 outputs: []outputInfo{
15443 {0, 670826495},
15444 },
15445 },
15446 },
15447 {
15448 name: "DIV",
15449 argLen: 2,
15450 asm: arm64.ASDIV,
15451 reg: regInfo{
15452 inputs: []inputInfo{
15453 {0, 805044223},
15454 {1, 805044223},
15455 },
15456 outputs: []outputInfo{
15457 {0, 670826495},
15458 },
15459 },
15460 },
15461 {
15462 name: "UDIV",
15463 argLen: 2,
15464 asm: arm64.AUDIV,
15465 reg: regInfo{
15466 inputs: []inputInfo{
15467 {0, 805044223},
15468 {1, 805044223},
15469 },
15470 outputs: []outputInfo{
15471 {0, 670826495},
15472 },
15473 },
15474 },
15475 {
15476 name: "DIVW",
15477 argLen: 2,
15478 asm: arm64.ASDIVW,
15479 reg: regInfo{
15480 inputs: []inputInfo{
15481 {0, 805044223},
15482 {1, 805044223},
15483 },
15484 outputs: []outputInfo{
15485 {0, 670826495},
15486 },
15487 },
15488 },
15489 {
15490 name: "UDIVW",
15491 argLen: 2,
15492 asm: arm64.AUDIVW,
15493 reg: regInfo{
15494 inputs: []inputInfo{
15495 {0, 805044223},
15496 {1, 805044223},
15497 },
15498 outputs: []outputInfo{
15499 {0, 670826495},
15500 },
15501 },
15502 },
15503 {
15504 name: "MOD",
15505 argLen: 2,
15506 asm: arm64.AREM,
15507 reg: regInfo{
15508 inputs: []inputInfo{
15509 {0, 805044223},
15510 {1, 805044223},
15511 },
15512 outputs: []outputInfo{
15513 {0, 670826495},
15514 },
15515 },
15516 },
15517 {
15518 name: "UMOD",
15519 argLen: 2,
15520 asm: arm64.AUREM,
15521 reg: regInfo{
15522 inputs: []inputInfo{
15523 {0, 805044223},
15524 {1, 805044223},
15525 },
15526 outputs: []outputInfo{
15527 {0, 670826495},
15528 },
15529 },
15530 },
15531 {
15532 name: "MODW",
15533 argLen: 2,
15534 asm: arm64.AREMW,
15535 reg: regInfo{
15536 inputs: []inputInfo{
15537 {0, 805044223},
15538 {1, 805044223},
15539 },
15540 outputs: []outputInfo{
15541 {0, 670826495},
15542 },
15543 },
15544 },
15545 {
15546 name: "UMODW",
15547 argLen: 2,
15548 asm: arm64.AUREMW,
15549 reg: regInfo{
15550 inputs: []inputInfo{
15551 {0, 805044223},
15552 {1, 805044223},
15553 },
15554 outputs: []outputInfo{
15555 {0, 670826495},
15556 },
15557 },
15558 },
15559 {
15560 name: "FADDS",
15561 argLen: 2,
15562 commutative: true,
15563 asm: arm64.AFADDS,
15564 reg: regInfo{
15565 inputs: []inputInfo{
15566 {0, 9223372034707292160},
15567 {1, 9223372034707292160},
15568 },
15569 outputs: []outputInfo{
15570 {0, 9223372034707292160},
15571 },
15572 },
15573 },
15574 {
15575 name: "FADDD",
15576 argLen: 2,
15577 commutative: true,
15578 asm: arm64.AFADDD,
15579 reg: regInfo{
15580 inputs: []inputInfo{
15581 {0, 9223372034707292160},
15582 {1, 9223372034707292160},
15583 },
15584 outputs: []outputInfo{
15585 {0, 9223372034707292160},
15586 },
15587 },
15588 },
15589 {
15590 name: "FSUBS",
15591 argLen: 2,
15592 asm: arm64.AFSUBS,
15593 reg: regInfo{
15594 inputs: []inputInfo{
15595 {0, 9223372034707292160},
15596 {1, 9223372034707292160},
15597 },
15598 outputs: []outputInfo{
15599 {0, 9223372034707292160},
15600 },
15601 },
15602 },
15603 {
15604 name: "FSUBD",
15605 argLen: 2,
15606 asm: arm64.AFSUBD,
15607 reg: regInfo{
15608 inputs: []inputInfo{
15609 {0, 9223372034707292160},
15610 {1, 9223372034707292160},
15611 },
15612 outputs: []outputInfo{
15613 {0, 9223372034707292160},
15614 },
15615 },
15616 },
15617 {
15618 name: "FMULS",
15619 argLen: 2,
15620 commutative: true,
15621 asm: arm64.AFMULS,
15622 reg: regInfo{
15623 inputs: []inputInfo{
15624 {0, 9223372034707292160},
15625 {1, 9223372034707292160},
15626 },
15627 outputs: []outputInfo{
15628 {0, 9223372034707292160},
15629 },
15630 },
15631 },
15632 {
15633 name: "FMULD",
15634 argLen: 2,
15635 commutative: true,
15636 asm: arm64.AFMULD,
15637 reg: regInfo{
15638 inputs: []inputInfo{
15639 {0, 9223372034707292160},
15640 {1, 9223372034707292160},
15641 },
15642 outputs: []outputInfo{
15643 {0, 9223372034707292160},
15644 },
15645 },
15646 },
15647 {
15648 name: "FNMULS",
15649 argLen: 2,
15650 commutative: true,
15651 asm: arm64.AFNMULS,
15652 reg: regInfo{
15653 inputs: []inputInfo{
15654 {0, 9223372034707292160},
15655 {1, 9223372034707292160},
15656 },
15657 outputs: []outputInfo{
15658 {0, 9223372034707292160},
15659 },
15660 },
15661 },
15662 {
15663 name: "FNMULD",
15664 argLen: 2,
15665 commutative: true,
15666 asm: arm64.AFNMULD,
15667 reg: regInfo{
15668 inputs: []inputInfo{
15669 {0, 9223372034707292160},
15670 {1, 9223372034707292160},
15671 },
15672 outputs: []outputInfo{
15673 {0, 9223372034707292160},
15674 },
15675 },
15676 },
15677 {
15678 name: "FDIVS",
15679 argLen: 2,
15680 asm: arm64.AFDIVS,
15681 reg: regInfo{
15682 inputs: []inputInfo{
15683 {0, 9223372034707292160},
15684 {1, 9223372034707292160},
15685 },
15686 outputs: []outputInfo{
15687 {0, 9223372034707292160},
15688 },
15689 },
15690 },
15691 {
15692 name: "FDIVD",
15693 argLen: 2,
15694 asm: arm64.AFDIVD,
15695 reg: regInfo{
15696 inputs: []inputInfo{
15697 {0, 9223372034707292160},
15698 {1, 9223372034707292160},
15699 },
15700 outputs: []outputInfo{
15701 {0, 9223372034707292160},
15702 },
15703 },
15704 },
15705 {
15706 name: "AND",
15707 argLen: 2,
15708 commutative: true,
15709 asm: arm64.AAND,
15710 reg: regInfo{
15711 inputs: []inputInfo{
15712 {0, 805044223},
15713 {1, 805044223},
15714 },
15715 outputs: []outputInfo{
15716 {0, 670826495},
15717 },
15718 },
15719 },
15720 {
15721 name: "ANDconst",
15722 auxType: auxInt64,
15723 argLen: 1,
15724 asm: arm64.AAND,
15725 reg: regInfo{
15726 inputs: []inputInfo{
15727 {0, 805044223},
15728 },
15729 outputs: []outputInfo{
15730 {0, 670826495},
15731 },
15732 },
15733 },
15734 {
15735 name: "OR",
15736 argLen: 2,
15737 commutative: true,
15738 asm: arm64.AORR,
15739 reg: regInfo{
15740 inputs: []inputInfo{
15741 {0, 805044223},
15742 {1, 805044223},
15743 },
15744 outputs: []outputInfo{
15745 {0, 670826495},
15746 },
15747 },
15748 },
15749 {
15750 name: "ORconst",
15751 auxType: auxInt64,
15752 argLen: 1,
15753 asm: arm64.AORR,
15754 reg: regInfo{
15755 inputs: []inputInfo{
15756 {0, 805044223},
15757 },
15758 outputs: []outputInfo{
15759 {0, 670826495},
15760 },
15761 },
15762 },
15763 {
15764 name: "XOR",
15765 argLen: 2,
15766 commutative: true,
15767 asm: arm64.AEOR,
15768 reg: regInfo{
15769 inputs: []inputInfo{
15770 {0, 805044223},
15771 {1, 805044223},
15772 },
15773 outputs: []outputInfo{
15774 {0, 670826495},
15775 },
15776 },
15777 },
15778 {
15779 name: "XORconst",
15780 auxType: auxInt64,
15781 argLen: 1,
15782 asm: arm64.AEOR,
15783 reg: regInfo{
15784 inputs: []inputInfo{
15785 {0, 805044223},
15786 },
15787 outputs: []outputInfo{
15788 {0, 670826495},
15789 },
15790 },
15791 },
15792 {
15793 name: "BIC",
15794 argLen: 2,
15795 asm: arm64.ABIC,
15796 reg: regInfo{
15797 inputs: []inputInfo{
15798 {0, 805044223},
15799 {1, 805044223},
15800 },
15801 outputs: []outputInfo{
15802 {0, 670826495},
15803 },
15804 },
15805 },
15806 {
15807 name: "EON",
15808 argLen: 2,
15809 asm: arm64.AEON,
15810 reg: regInfo{
15811 inputs: []inputInfo{
15812 {0, 805044223},
15813 {1, 805044223},
15814 },
15815 outputs: []outputInfo{
15816 {0, 670826495},
15817 },
15818 },
15819 },
15820 {
15821 name: "ORN",
15822 argLen: 2,
15823 asm: arm64.AORN,
15824 reg: regInfo{
15825 inputs: []inputInfo{
15826 {0, 805044223},
15827 {1, 805044223},
15828 },
15829 outputs: []outputInfo{
15830 {0, 670826495},
15831 },
15832 },
15833 },
15834 {
15835 name: "LoweredMuluhilo",
15836 argLen: 2,
15837 resultNotInArgs: true,
15838 reg: regInfo{
15839 inputs: []inputInfo{
15840 {0, 805044223},
15841 {1, 805044223},
15842 },
15843 outputs: []outputInfo{
15844 {0, 670826495},
15845 {1, 670826495},
15846 },
15847 },
15848 },
15849 {
15850 name: "MVN",
15851 argLen: 1,
15852 asm: arm64.AMVN,
15853 reg: regInfo{
15854 inputs: []inputInfo{
15855 {0, 805044223},
15856 },
15857 outputs: []outputInfo{
15858 {0, 670826495},
15859 },
15860 },
15861 },
15862 {
15863 name: "NEG",
15864 argLen: 1,
15865 asm: arm64.ANEG,
15866 reg: regInfo{
15867 inputs: []inputInfo{
15868 {0, 805044223},
15869 },
15870 outputs: []outputInfo{
15871 {0, 670826495},
15872 },
15873 },
15874 },
15875 {
15876 name: "NEGSflags",
15877 argLen: 1,
15878 asm: arm64.ANEGS,
15879 reg: regInfo{
15880 inputs: []inputInfo{
15881 {0, 805044223},
15882 },
15883 outputs: []outputInfo{
15884 {1, 0},
15885 {0, 670826495},
15886 },
15887 },
15888 },
15889 {
15890 name: "NGCzerocarry",
15891 argLen: 1,
15892 asm: arm64.ANGC,
15893 reg: regInfo{
15894 outputs: []outputInfo{
15895 {0, 670826495},
15896 },
15897 },
15898 },
15899 {
15900 name: "FABSD",
15901 argLen: 1,
15902 asm: arm64.AFABSD,
15903 reg: regInfo{
15904 inputs: []inputInfo{
15905 {0, 9223372034707292160},
15906 },
15907 outputs: []outputInfo{
15908 {0, 9223372034707292160},
15909 },
15910 },
15911 },
15912 {
15913 name: "FNEGS",
15914 argLen: 1,
15915 asm: arm64.AFNEGS,
15916 reg: regInfo{
15917 inputs: []inputInfo{
15918 {0, 9223372034707292160},
15919 },
15920 outputs: []outputInfo{
15921 {0, 9223372034707292160},
15922 },
15923 },
15924 },
15925 {
15926 name: "FNEGD",
15927 argLen: 1,
15928 asm: arm64.AFNEGD,
15929 reg: regInfo{
15930 inputs: []inputInfo{
15931 {0, 9223372034707292160},
15932 },
15933 outputs: []outputInfo{
15934 {0, 9223372034707292160},
15935 },
15936 },
15937 },
15938 {
15939 name: "FSQRTD",
15940 argLen: 1,
15941 asm: arm64.AFSQRTD,
15942 reg: regInfo{
15943 inputs: []inputInfo{
15944 {0, 9223372034707292160},
15945 },
15946 outputs: []outputInfo{
15947 {0, 9223372034707292160},
15948 },
15949 },
15950 },
15951 {
15952 name: "REV",
15953 argLen: 1,
15954 asm: arm64.AREV,
15955 reg: regInfo{
15956 inputs: []inputInfo{
15957 {0, 805044223},
15958 },
15959 outputs: []outputInfo{
15960 {0, 670826495},
15961 },
15962 },
15963 },
15964 {
15965 name: "REVW",
15966 argLen: 1,
15967 asm: arm64.AREVW,
15968 reg: regInfo{
15969 inputs: []inputInfo{
15970 {0, 805044223},
15971 },
15972 outputs: []outputInfo{
15973 {0, 670826495},
15974 },
15975 },
15976 },
15977 {
15978 name: "REV16W",
15979 argLen: 1,
15980 asm: arm64.AREV16W,
15981 reg: regInfo{
15982 inputs: []inputInfo{
15983 {0, 805044223},
15984 },
15985 outputs: []outputInfo{
15986 {0, 670826495},
15987 },
15988 },
15989 },
15990 {
15991 name: "RBIT",
15992 argLen: 1,
15993 asm: arm64.ARBIT,
15994 reg: regInfo{
15995 inputs: []inputInfo{
15996 {0, 805044223},
15997 },
15998 outputs: []outputInfo{
15999 {0, 670826495},
16000 },
16001 },
16002 },
16003 {
16004 name: "RBITW",
16005 argLen: 1,
16006 asm: arm64.ARBITW,
16007 reg: regInfo{
16008 inputs: []inputInfo{
16009 {0, 805044223},
16010 },
16011 outputs: []outputInfo{
16012 {0, 670826495},
16013 },
16014 },
16015 },
16016 {
16017 name: "CLZ",
16018 argLen: 1,
16019 asm: arm64.ACLZ,
16020 reg: regInfo{
16021 inputs: []inputInfo{
16022 {0, 805044223},
16023 },
16024 outputs: []outputInfo{
16025 {0, 670826495},
16026 },
16027 },
16028 },
16029 {
16030 name: "CLZW",
16031 argLen: 1,
16032 asm: arm64.ACLZW,
16033 reg: regInfo{
16034 inputs: []inputInfo{
16035 {0, 805044223},
16036 },
16037 outputs: []outputInfo{
16038 {0, 670826495},
16039 },
16040 },
16041 },
16042 {
16043 name: "VCNT",
16044 argLen: 1,
16045 asm: arm64.AVCNT,
16046 reg: regInfo{
16047 inputs: []inputInfo{
16048 {0, 9223372034707292160},
16049 },
16050 outputs: []outputInfo{
16051 {0, 9223372034707292160},
16052 },
16053 },
16054 },
16055 {
16056 name: "VUADDLV",
16057 argLen: 1,
16058 asm: arm64.AVUADDLV,
16059 reg: regInfo{
16060 inputs: []inputInfo{
16061 {0, 9223372034707292160},
16062 },
16063 outputs: []outputInfo{
16064 {0, 9223372034707292160},
16065 },
16066 },
16067 },
16068 {
16069 name: "LoweredRound32F",
16070 argLen: 1,
16071 resultInArg0: true,
16072 zeroWidth: true,
16073 reg: regInfo{
16074 inputs: []inputInfo{
16075 {0, 9223372034707292160},
16076 },
16077 outputs: []outputInfo{
16078 {0, 9223372034707292160},
16079 },
16080 },
16081 },
16082 {
16083 name: "LoweredRound64F",
16084 argLen: 1,
16085 resultInArg0: true,
16086 zeroWidth: true,
16087 reg: regInfo{
16088 inputs: []inputInfo{
16089 {0, 9223372034707292160},
16090 },
16091 outputs: []outputInfo{
16092 {0, 9223372034707292160},
16093 },
16094 },
16095 },
16096 {
16097 name: "FMADDS",
16098 argLen: 3,
16099 asm: arm64.AFMADDS,
16100 reg: regInfo{
16101 inputs: []inputInfo{
16102 {0, 9223372034707292160},
16103 {1, 9223372034707292160},
16104 {2, 9223372034707292160},
16105 },
16106 outputs: []outputInfo{
16107 {0, 9223372034707292160},
16108 },
16109 },
16110 },
16111 {
16112 name: "FMADDD",
16113 argLen: 3,
16114 asm: arm64.AFMADDD,
16115 reg: regInfo{
16116 inputs: []inputInfo{
16117 {0, 9223372034707292160},
16118 {1, 9223372034707292160},
16119 {2, 9223372034707292160},
16120 },
16121 outputs: []outputInfo{
16122 {0, 9223372034707292160},
16123 },
16124 },
16125 },
16126 {
16127 name: "FNMADDS",
16128 argLen: 3,
16129 asm: arm64.AFNMADDS,
16130 reg: regInfo{
16131 inputs: []inputInfo{
16132 {0, 9223372034707292160},
16133 {1, 9223372034707292160},
16134 {2, 9223372034707292160},
16135 },
16136 outputs: []outputInfo{
16137 {0, 9223372034707292160},
16138 },
16139 },
16140 },
16141 {
16142 name: "FNMADDD",
16143 argLen: 3,
16144 asm: arm64.AFNMADDD,
16145 reg: regInfo{
16146 inputs: []inputInfo{
16147 {0, 9223372034707292160},
16148 {1, 9223372034707292160},
16149 {2, 9223372034707292160},
16150 },
16151 outputs: []outputInfo{
16152 {0, 9223372034707292160},
16153 },
16154 },
16155 },
16156 {
16157 name: "FMSUBS",
16158 argLen: 3,
16159 asm: arm64.AFMSUBS,
16160 reg: regInfo{
16161 inputs: []inputInfo{
16162 {0, 9223372034707292160},
16163 {1, 9223372034707292160},
16164 {2, 9223372034707292160},
16165 },
16166 outputs: []outputInfo{
16167 {0, 9223372034707292160},
16168 },
16169 },
16170 },
16171 {
16172 name: "FMSUBD",
16173 argLen: 3,
16174 asm: arm64.AFMSUBD,
16175 reg: regInfo{
16176 inputs: []inputInfo{
16177 {0, 9223372034707292160},
16178 {1, 9223372034707292160},
16179 {2, 9223372034707292160},
16180 },
16181 outputs: []outputInfo{
16182 {0, 9223372034707292160},
16183 },
16184 },
16185 },
16186 {
16187 name: "FNMSUBS",
16188 argLen: 3,
16189 asm: arm64.AFNMSUBS,
16190 reg: regInfo{
16191 inputs: []inputInfo{
16192 {0, 9223372034707292160},
16193 {1, 9223372034707292160},
16194 {2, 9223372034707292160},
16195 },
16196 outputs: []outputInfo{
16197 {0, 9223372034707292160},
16198 },
16199 },
16200 },
16201 {
16202 name: "FNMSUBD",
16203 argLen: 3,
16204 asm: arm64.AFNMSUBD,
16205 reg: regInfo{
16206 inputs: []inputInfo{
16207 {0, 9223372034707292160},
16208 {1, 9223372034707292160},
16209 {2, 9223372034707292160},
16210 },
16211 outputs: []outputInfo{
16212 {0, 9223372034707292160},
16213 },
16214 },
16215 },
16216 {
16217 name: "MADD",
16218 argLen: 3,
16219 asm: arm64.AMADD,
16220 reg: regInfo{
16221 inputs: []inputInfo{
16222 {0, 805044223},
16223 {1, 805044223},
16224 {2, 805044223},
16225 },
16226 outputs: []outputInfo{
16227 {0, 670826495},
16228 },
16229 },
16230 },
16231 {
16232 name: "MADDW",
16233 argLen: 3,
16234 asm: arm64.AMADDW,
16235 reg: regInfo{
16236 inputs: []inputInfo{
16237 {0, 805044223},
16238 {1, 805044223},
16239 {2, 805044223},
16240 },
16241 outputs: []outputInfo{
16242 {0, 670826495},
16243 },
16244 },
16245 },
16246 {
16247 name: "MSUB",
16248 argLen: 3,
16249 asm: arm64.AMSUB,
16250 reg: regInfo{
16251 inputs: []inputInfo{
16252 {0, 805044223},
16253 {1, 805044223},
16254 {2, 805044223},
16255 },
16256 outputs: []outputInfo{
16257 {0, 670826495},
16258 },
16259 },
16260 },
16261 {
16262 name: "MSUBW",
16263 argLen: 3,
16264 asm: arm64.AMSUBW,
16265 reg: regInfo{
16266 inputs: []inputInfo{
16267 {0, 805044223},
16268 {1, 805044223},
16269 {2, 805044223},
16270 },
16271 outputs: []outputInfo{
16272 {0, 670826495},
16273 },
16274 },
16275 },
16276 {
16277 name: "SLL",
16278 argLen: 2,
16279 asm: arm64.ALSL,
16280 reg: regInfo{
16281 inputs: []inputInfo{
16282 {0, 805044223},
16283 {1, 805044223},
16284 },
16285 outputs: []outputInfo{
16286 {0, 670826495},
16287 },
16288 },
16289 },
16290 {
16291 name: "SLLconst",
16292 auxType: auxInt64,
16293 argLen: 1,
16294 asm: arm64.ALSL,
16295 reg: regInfo{
16296 inputs: []inputInfo{
16297 {0, 805044223},
16298 },
16299 outputs: []outputInfo{
16300 {0, 670826495},
16301 },
16302 },
16303 },
16304 {
16305 name: "SRL",
16306 argLen: 2,
16307 asm: arm64.ALSR,
16308 reg: regInfo{
16309 inputs: []inputInfo{
16310 {0, 805044223},
16311 {1, 805044223},
16312 },
16313 outputs: []outputInfo{
16314 {0, 670826495},
16315 },
16316 },
16317 },
16318 {
16319 name: "SRLconst",
16320 auxType: auxInt64,
16321 argLen: 1,
16322 asm: arm64.ALSR,
16323 reg: regInfo{
16324 inputs: []inputInfo{
16325 {0, 805044223},
16326 },
16327 outputs: []outputInfo{
16328 {0, 670826495},
16329 },
16330 },
16331 },
16332 {
16333 name: "SRA",
16334 argLen: 2,
16335 asm: arm64.AASR,
16336 reg: regInfo{
16337 inputs: []inputInfo{
16338 {0, 805044223},
16339 {1, 805044223},
16340 },
16341 outputs: []outputInfo{
16342 {0, 670826495},
16343 },
16344 },
16345 },
16346 {
16347 name: "SRAconst",
16348 auxType: auxInt64,
16349 argLen: 1,
16350 asm: arm64.AASR,
16351 reg: regInfo{
16352 inputs: []inputInfo{
16353 {0, 805044223},
16354 },
16355 outputs: []outputInfo{
16356 {0, 670826495},
16357 },
16358 },
16359 },
16360 {
16361 name: "ROR",
16362 argLen: 2,
16363 asm: arm64.AROR,
16364 reg: regInfo{
16365 inputs: []inputInfo{
16366 {0, 805044223},
16367 {1, 805044223},
16368 },
16369 outputs: []outputInfo{
16370 {0, 670826495},
16371 },
16372 },
16373 },
16374 {
16375 name: "RORW",
16376 argLen: 2,
16377 asm: arm64.ARORW,
16378 reg: regInfo{
16379 inputs: []inputInfo{
16380 {0, 805044223},
16381 {1, 805044223},
16382 },
16383 outputs: []outputInfo{
16384 {0, 670826495},
16385 },
16386 },
16387 },
16388 {
16389 name: "RORconst",
16390 auxType: auxInt64,
16391 argLen: 1,
16392 asm: arm64.AROR,
16393 reg: regInfo{
16394 inputs: []inputInfo{
16395 {0, 805044223},
16396 },
16397 outputs: []outputInfo{
16398 {0, 670826495},
16399 },
16400 },
16401 },
16402 {
16403 name: "RORWconst",
16404 auxType: auxInt64,
16405 argLen: 1,
16406 asm: arm64.ARORW,
16407 reg: regInfo{
16408 inputs: []inputInfo{
16409 {0, 805044223},
16410 },
16411 outputs: []outputInfo{
16412 {0, 670826495},
16413 },
16414 },
16415 },
16416 {
16417 name: "EXTRconst",
16418 auxType: auxInt64,
16419 argLen: 2,
16420 asm: arm64.AEXTR,
16421 reg: regInfo{
16422 inputs: []inputInfo{
16423 {0, 805044223},
16424 {1, 805044223},
16425 },
16426 outputs: []outputInfo{
16427 {0, 670826495},
16428 },
16429 },
16430 },
16431 {
16432 name: "EXTRWconst",
16433 auxType: auxInt64,
16434 argLen: 2,
16435 asm: arm64.AEXTRW,
16436 reg: regInfo{
16437 inputs: []inputInfo{
16438 {0, 805044223},
16439 {1, 805044223},
16440 },
16441 outputs: []outputInfo{
16442 {0, 670826495},
16443 },
16444 },
16445 },
16446 {
16447 name: "CMP",
16448 argLen: 2,
16449 asm: arm64.ACMP,
16450 reg: regInfo{
16451 inputs: []inputInfo{
16452 {0, 805044223},
16453 {1, 805044223},
16454 },
16455 },
16456 },
16457 {
16458 name: "CMPconst",
16459 auxType: auxInt64,
16460 argLen: 1,
16461 asm: arm64.ACMP,
16462 reg: regInfo{
16463 inputs: []inputInfo{
16464 {0, 805044223},
16465 },
16466 },
16467 },
16468 {
16469 name: "CMPW",
16470 argLen: 2,
16471 asm: arm64.ACMPW,
16472 reg: regInfo{
16473 inputs: []inputInfo{
16474 {0, 805044223},
16475 {1, 805044223},
16476 },
16477 },
16478 },
16479 {
16480 name: "CMPWconst",
16481 auxType: auxInt32,
16482 argLen: 1,
16483 asm: arm64.ACMPW,
16484 reg: regInfo{
16485 inputs: []inputInfo{
16486 {0, 805044223},
16487 },
16488 },
16489 },
16490 {
16491 name: "CMN",
16492 argLen: 2,
16493 commutative: true,
16494 asm: arm64.ACMN,
16495 reg: regInfo{
16496 inputs: []inputInfo{
16497 {0, 805044223},
16498 {1, 805044223},
16499 },
16500 },
16501 },
16502 {
16503 name: "CMNconst",
16504 auxType: auxInt64,
16505 argLen: 1,
16506 asm: arm64.ACMN,
16507 reg: regInfo{
16508 inputs: []inputInfo{
16509 {0, 805044223},
16510 },
16511 },
16512 },
16513 {
16514 name: "CMNW",
16515 argLen: 2,
16516 commutative: true,
16517 asm: arm64.ACMNW,
16518 reg: regInfo{
16519 inputs: []inputInfo{
16520 {0, 805044223},
16521 {1, 805044223},
16522 },
16523 },
16524 },
16525 {
16526 name: "CMNWconst",
16527 auxType: auxInt32,
16528 argLen: 1,
16529 asm: arm64.ACMNW,
16530 reg: regInfo{
16531 inputs: []inputInfo{
16532 {0, 805044223},
16533 },
16534 },
16535 },
16536 {
16537 name: "TST",
16538 argLen: 2,
16539 commutative: true,
16540 asm: arm64.ATST,
16541 reg: regInfo{
16542 inputs: []inputInfo{
16543 {0, 805044223},
16544 {1, 805044223},
16545 },
16546 },
16547 },
16548 {
16549 name: "TSTconst",
16550 auxType: auxInt64,
16551 argLen: 1,
16552 asm: arm64.ATST,
16553 reg: regInfo{
16554 inputs: []inputInfo{
16555 {0, 805044223},
16556 },
16557 },
16558 },
16559 {
16560 name: "TSTW",
16561 argLen: 2,
16562 commutative: true,
16563 asm: arm64.ATSTW,
16564 reg: regInfo{
16565 inputs: []inputInfo{
16566 {0, 805044223},
16567 {1, 805044223},
16568 },
16569 },
16570 },
16571 {
16572 name: "TSTWconst",
16573 auxType: auxInt32,
16574 argLen: 1,
16575 asm: arm64.ATSTW,
16576 reg: regInfo{
16577 inputs: []inputInfo{
16578 {0, 805044223},
16579 },
16580 },
16581 },
16582 {
16583 name: "FCMPS",
16584 argLen: 2,
16585 asm: arm64.AFCMPS,
16586 reg: regInfo{
16587 inputs: []inputInfo{
16588 {0, 9223372034707292160},
16589 {1, 9223372034707292160},
16590 },
16591 },
16592 },
16593 {
16594 name: "FCMPD",
16595 argLen: 2,
16596 asm: arm64.AFCMPD,
16597 reg: regInfo{
16598 inputs: []inputInfo{
16599 {0, 9223372034707292160},
16600 {1, 9223372034707292160},
16601 },
16602 },
16603 },
16604 {
16605 name: "FCMPS0",
16606 argLen: 1,
16607 asm: arm64.AFCMPS,
16608 reg: regInfo{
16609 inputs: []inputInfo{
16610 {0, 9223372034707292160},
16611 },
16612 },
16613 },
16614 {
16615 name: "FCMPD0",
16616 argLen: 1,
16617 asm: arm64.AFCMPD,
16618 reg: regInfo{
16619 inputs: []inputInfo{
16620 {0, 9223372034707292160},
16621 },
16622 },
16623 },
16624 {
16625 name: "MVNshiftLL",
16626 auxType: auxInt64,
16627 argLen: 1,
16628 asm: arm64.AMVN,
16629 reg: regInfo{
16630 inputs: []inputInfo{
16631 {0, 805044223},
16632 },
16633 outputs: []outputInfo{
16634 {0, 670826495},
16635 },
16636 },
16637 },
16638 {
16639 name: "MVNshiftRL",
16640 auxType: auxInt64,
16641 argLen: 1,
16642 asm: arm64.AMVN,
16643 reg: regInfo{
16644 inputs: []inputInfo{
16645 {0, 805044223},
16646 },
16647 outputs: []outputInfo{
16648 {0, 670826495},
16649 },
16650 },
16651 },
16652 {
16653 name: "MVNshiftRA",
16654 auxType: auxInt64,
16655 argLen: 1,
16656 asm: arm64.AMVN,
16657 reg: regInfo{
16658 inputs: []inputInfo{
16659 {0, 805044223},
16660 },
16661 outputs: []outputInfo{
16662 {0, 670826495},
16663 },
16664 },
16665 },
16666 {
16667 name: "NEGshiftLL",
16668 auxType: auxInt64,
16669 argLen: 1,
16670 asm: arm64.ANEG,
16671 reg: regInfo{
16672 inputs: []inputInfo{
16673 {0, 805044223},
16674 },
16675 outputs: []outputInfo{
16676 {0, 670826495},
16677 },
16678 },
16679 },
16680 {
16681 name: "NEGshiftRL",
16682 auxType: auxInt64,
16683 argLen: 1,
16684 asm: arm64.ANEG,
16685 reg: regInfo{
16686 inputs: []inputInfo{
16687 {0, 805044223},
16688 },
16689 outputs: []outputInfo{
16690 {0, 670826495},
16691 },
16692 },
16693 },
16694 {
16695 name: "NEGshiftRA",
16696 auxType: auxInt64,
16697 argLen: 1,
16698 asm: arm64.ANEG,
16699 reg: regInfo{
16700 inputs: []inputInfo{
16701 {0, 805044223},
16702 },
16703 outputs: []outputInfo{
16704 {0, 670826495},
16705 },
16706 },
16707 },
16708 {
16709 name: "ADDshiftLL",
16710 auxType: auxInt64,
16711 argLen: 2,
16712 asm: arm64.AADD,
16713 reg: regInfo{
16714 inputs: []inputInfo{
16715 {0, 805044223},
16716 {1, 805044223},
16717 },
16718 outputs: []outputInfo{
16719 {0, 670826495},
16720 },
16721 },
16722 },
16723 {
16724 name: "ADDshiftRL",
16725 auxType: auxInt64,
16726 argLen: 2,
16727 asm: arm64.AADD,
16728 reg: regInfo{
16729 inputs: []inputInfo{
16730 {0, 805044223},
16731 {1, 805044223},
16732 },
16733 outputs: []outputInfo{
16734 {0, 670826495},
16735 },
16736 },
16737 },
16738 {
16739 name: "ADDshiftRA",
16740 auxType: auxInt64,
16741 argLen: 2,
16742 asm: arm64.AADD,
16743 reg: regInfo{
16744 inputs: []inputInfo{
16745 {0, 805044223},
16746 {1, 805044223},
16747 },
16748 outputs: []outputInfo{
16749 {0, 670826495},
16750 },
16751 },
16752 },
16753 {
16754 name: "SUBshiftLL",
16755 auxType: auxInt64,
16756 argLen: 2,
16757 asm: arm64.ASUB,
16758 reg: regInfo{
16759 inputs: []inputInfo{
16760 {0, 805044223},
16761 {1, 805044223},
16762 },
16763 outputs: []outputInfo{
16764 {0, 670826495},
16765 },
16766 },
16767 },
16768 {
16769 name: "SUBshiftRL",
16770 auxType: auxInt64,
16771 argLen: 2,
16772 asm: arm64.ASUB,
16773 reg: regInfo{
16774 inputs: []inputInfo{
16775 {0, 805044223},
16776 {1, 805044223},
16777 },
16778 outputs: []outputInfo{
16779 {0, 670826495},
16780 },
16781 },
16782 },
16783 {
16784 name: "SUBshiftRA",
16785 auxType: auxInt64,
16786 argLen: 2,
16787 asm: arm64.ASUB,
16788 reg: regInfo{
16789 inputs: []inputInfo{
16790 {0, 805044223},
16791 {1, 805044223},
16792 },
16793 outputs: []outputInfo{
16794 {0, 670826495},
16795 },
16796 },
16797 },
16798 {
16799 name: "ANDshiftLL",
16800 auxType: auxInt64,
16801 argLen: 2,
16802 asm: arm64.AAND,
16803 reg: regInfo{
16804 inputs: []inputInfo{
16805 {0, 805044223},
16806 {1, 805044223},
16807 },
16808 outputs: []outputInfo{
16809 {0, 670826495},
16810 },
16811 },
16812 },
16813 {
16814 name: "ANDshiftRL",
16815 auxType: auxInt64,
16816 argLen: 2,
16817 asm: arm64.AAND,
16818 reg: regInfo{
16819 inputs: []inputInfo{
16820 {0, 805044223},
16821 {1, 805044223},
16822 },
16823 outputs: []outputInfo{
16824 {0, 670826495},
16825 },
16826 },
16827 },
16828 {
16829 name: "ANDshiftRA",
16830 auxType: auxInt64,
16831 argLen: 2,
16832 asm: arm64.AAND,
16833 reg: regInfo{
16834 inputs: []inputInfo{
16835 {0, 805044223},
16836 {1, 805044223},
16837 },
16838 outputs: []outputInfo{
16839 {0, 670826495},
16840 },
16841 },
16842 },
16843 {
16844 name: "ORshiftLL",
16845 auxType: auxInt64,
16846 argLen: 2,
16847 asm: arm64.AORR,
16848 reg: regInfo{
16849 inputs: []inputInfo{
16850 {0, 805044223},
16851 {1, 805044223},
16852 },
16853 outputs: []outputInfo{
16854 {0, 670826495},
16855 },
16856 },
16857 },
16858 {
16859 name: "ORshiftRL",
16860 auxType: auxInt64,
16861 argLen: 2,
16862 asm: arm64.AORR,
16863 reg: regInfo{
16864 inputs: []inputInfo{
16865 {0, 805044223},
16866 {1, 805044223},
16867 },
16868 outputs: []outputInfo{
16869 {0, 670826495},
16870 },
16871 },
16872 },
16873 {
16874 name: "ORshiftRA",
16875 auxType: auxInt64,
16876 argLen: 2,
16877 asm: arm64.AORR,
16878 reg: regInfo{
16879 inputs: []inputInfo{
16880 {0, 805044223},
16881 {1, 805044223},
16882 },
16883 outputs: []outputInfo{
16884 {0, 670826495},
16885 },
16886 },
16887 },
16888 {
16889 name: "XORshiftLL",
16890 auxType: auxInt64,
16891 argLen: 2,
16892 asm: arm64.AEOR,
16893 reg: regInfo{
16894 inputs: []inputInfo{
16895 {0, 805044223},
16896 {1, 805044223},
16897 },
16898 outputs: []outputInfo{
16899 {0, 670826495},
16900 },
16901 },
16902 },
16903 {
16904 name: "XORshiftRL",
16905 auxType: auxInt64,
16906 argLen: 2,
16907 asm: arm64.AEOR,
16908 reg: regInfo{
16909 inputs: []inputInfo{
16910 {0, 805044223},
16911 {1, 805044223},
16912 },
16913 outputs: []outputInfo{
16914 {0, 670826495},
16915 },
16916 },
16917 },
16918 {
16919 name: "XORshiftRA",
16920 auxType: auxInt64,
16921 argLen: 2,
16922 asm: arm64.AEOR,
16923 reg: regInfo{
16924 inputs: []inputInfo{
16925 {0, 805044223},
16926 {1, 805044223},
16927 },
16928 outputs: []outputInfo{
16929 {0, 670826495},
16930 },
16931 },
16932 },
16933 {
16934 name: "BICshiftLL",
16935 auxType: auxInt64,
16936 argLen: 2,
16937 asm: arm64.ABIC,
16938 reg: regInfo{
16939 inputs: []inputInfo{
16940 {0, 805044223},
16941 {1, 805044223},
16942 },
16943 outputs: []outputInfo{
16944 {0, 670826495},
16945 },
16946 },
16947 },
16948 {
16949 name: "BICshiftRL",
16950 auxType: auxInt64,
16951 argLen: 2,
16952 asm: arm64.ABIC,
16953 reg: regInfo{
16954 inputs: []inputInfo{
16955 {0, 805044223},
16956 {1, 805044223},
16957 },
16958 outputs: []outputInfo{
16959 {0, 670826495},
16960 },
16961 },
16962 },
16963 {
16964 name: "BICshiftRA",
16965 auxType: auxInt64,
16966 argLen: 2,
16967 asm: arm64.ABIC,
16968 reg: regInfo{
16969 inputs: []inputInfo{
16970 {0, 805044223},
16971 {1, 805044223},
16972 },
16973 outputs: []outputInfo{
16974 {0, 670826495},
16975 },
16976 },
16977 },
16978 {
16979 name: "EONshiftLL",
16980 auxType: auxInt64,
16981 argLen: 2,
16982 asm: arm64.AEON,
16983 reg: regInfo{
16984 inputs: []inputInfo{
16985 {0, 805044223},
16986 {1, 805044223},
16987 },
16988 outputs: []outputInfo{
16989 {0, 670826495},
16990 },
16991 },
16992 },
16993 {
16994 name: "EONshiftRL",
16995 auxType: auxInt64,
16996 argLen: 2,
16997 asm: arm64.AEON,
16998 reg: regInfo{
16999 inputs: []inputInfo{
17000 {0, 805044223},
17001 {1, 805044223},
17002 },
17003 outputs: []outputInfo{
17004 {0, 670826495},
17005 },
17006 },
17007 },
17008 {
17009 name: "EONshiftRA",
17010 auxType: auxInt64,
17011 argLen: 2,
17012 asm: arm64.AEON,
17013 reg: regInfo{
17014 inputs: []inputInfo{
17015 {0, 805044223},
17016 {1, 805044223},
17017 },
17018 outputs: []outputInfo{
17019 {0, 670826495},
17020 },
17021 },
17022 },
17023 {
17024 name: "ORNshiftLL",
17025 auxType: auxInt64,
17026 argLen: 2,
17027 asm: arm64.AORN,
17028 reg: regInfo{
17029 inputs: []inputInfo{
17030 {0, 805044223},
17031 {1, 805044223},
17032 },
17033 outputs: []outputInfo{
17034 {0, 670826495},
17035 },
17036 },
17037 },
17038 {
17039 name: "ORNshiftRL",
17040 auxType: auxInt64,
17041 argLen: 2,
17042 asm: arm64.AORN,
17043 reg: regInfo{
17044 inputs: []inputInfo{
17045 {0, 805044223},
17046 {1, 805044223},
17047 },
17048 outputs: []outputInfo{
17049 {0, 670826495},
17050 },
17051 },
17052 },
17053 {
17054 name: "ORNshiftRA",
17055 auxType: auxInt64,
17056 argLen: 2,
17057 asm: arm64.AORN,
17058 reg: regInfo{
17059 inputs: []inputInfo{
17060 {0, 805044223},
17061 {1, 805044223},
17062 },
17063 outputs: []outputInfo{
17064 {0, 670826495},
17065 },
17066 },
17067 },
17068 {
17069 name: "CMPshiftLL",
17070 auxType: auxInt64,
17071 argLen: 2,
17072 asm: arm64.ACMP,
17073 reg: regInfo{
17074 inputs: []inputInfo{
17075 {0, 805044223},
17076 {1, 805044223},
17077 },
17078 },
17079 },
17080 {
17081 name: "CMPshiftRL",
17082 auxType: auxInt64,
17083 argLen: 2,
17084 asm: arm64.ACMP,
17085 reg: regInfo{
17086 inputs: []inputInfo{
17087 {0, 805044223},
17088 {1, 805044223},
17089 },
17090 },
17091 },
17092 {
17093 name: "CMPshiftRA",
17094 auxType: auxInt64,
17095 argLen: 2,
17096 asm: arm64.ACMP,
17097 reg: regInfo{
17098 inputs: []inputInfo{
17099 {0, 805044223},
17100 {1, 805044223},
17101 },
17102 },
17103 },
17104 {
17105 name: "CMNshiftLL",
17106 auxType: auxInt64,
17107 argLen: 2,
17108 asm: arm64.ACMN,
17109 reg: regInfo{
17110 inputs: []inputInfo{
17111 {0, 805044223},
17112 {1, 805044223},
17113 },
17114 },
17115 },
17116 {
17117 name: "CMNshiftRL",
17118 auxType: auxInt64,
17119 argLen: 2,
17120 asm: arm64.ACMN,
17121 reg: regInfo{
17122 inputs: []inputInfo{
17123 {0, 805044223},
17124 {1, 805044223},
17125 },
17126 },
17127 },
17128 {
17129 name: "CMNshiftRA",
17130 auxType: auxInt64,
17131 argLen: 2,
17132 asm: arm64.ACMN,
17133 reg: regInfo{
17134 inputs: []inputInfo{
17135 {0, 805044223},
17136 {1, 805044223},
17137 },
17138 },
17139 },
17140 {
17141 name: "TSTshiftLL",
17142 auxType: auxInt64,
17143 argLen: 2,
17144 asm: arm64.ATST,
17145 reg: regInfo{
17146 inputs: []inputInfo{
17147 {0, 805044223},
17148 {1, 805044223},
17149 },
17150 },
17151 },
17152 {
17153 name: "TSTshiftRL",
17154 auxType: auxInt64,
17155 argLen: 2,
17156 asm: arm64.ATST,
17157 reg: regInfo{
17158 inputs: []inputInfo{
17159 {0, 805044223},
17160 {1, 805044223},
17161 },
17162 },
17163 },
17164 {
17165 name: "TSTshiftRA",
17166 auxType: auxInt64,
17167 argLen: 2,
17168 asm: arm64.ATST,
17169 reg: regInfo{
17170 inputs: []inputInfo{
17171 {0, 805044223},
17172 {1, 805044223},
17173 },
17174 },
17175 },
17176 {
17177 name: "BFI",
17178 auxType: auxInt64,
17179 argLen: 2,
17180 resultInArg0: true,
17181 asm: arm64.ABFI,
17182 reg: regInfo{
17183 inputs: []inputInfo{
17184 {0, 670826495},
17185 {1, 670826495},
17186 },
17187 outputs: []outputInfo{
17188 {0, 670826495},
17189 },
17190 },
17191 },
17192 {
17193 name: "BFXIL",
17194 auxType: auxInt64,
17195 argLen: 2,
17196 resultInArg0: true,
17197 asm: arm64.ABFXIL,
17198 reg: regInfo{
17199 inputs: []inputInfo{
17200 {0, 670826495},
17201 {1, 670826495},
17202 },
17203 outputs: []outputInfo{
17204 {0, 670826495},
17205 },
17206 },
17207 },
17208 {
17209 name: "SBFIZ",
17210 auxType: auxInt64,
17211 argLen: 1,
17212 asm: arm64.ASBFIZ,
17213 reg: regInfo{
17214 inputs: []inputInfo{
17215 {0, 805044223},
17216 },
17217 outputs: []outputInfo{
17218 {0, 670826495},
17219 },
17220 },
17221 },
17222 {
17223 name: "SBFX",
17224 auxType: auxInt64,
17225 argLen: 1,
17226 asm: arm64.ASBFX,
17227 reg: regInfo{
17228 inputs: []inputInfo{
17229 {0, 805044223},
17230 },
17231 outputs: []outputInfo{
17232 {0, 670826495},
17233 },
17234 },
17235 },
17236 {
17237 name: "UBFIZ",
17238 auxType: auxInt64,
17239 argLen: 1,
17240 asm: arm64.AUBFIZ,
17241 reg: regInfo{
17242 inputs: []inputInfo{
17243 {0, 805044223},
17244 },
17245 outputs: []outputInfo{
17246 {0, 670826495},
17247 },
17248 },
17249 },
17250 {
17251 name: "UBFX",
17252 auxType: auxInt64,
17253 argLen: 1,
17254 asm: arm64.AUBFX,
17255 reg: regInfo{
17256 inputs: []inputInfo{
17257 {0, 805044223},
17258 },
17259 outputs: []outputInfo{
17260 {0, 670826495},
17261 },
17262 },
17263 },
17264 {
17265 name: "MOVDconst",
17266 auxType: auxInt64,
17267 argLen: 0,
17268 rematerializeable: true,
17269 asm: arm64.AMOVD,
17270 reg: regInfo{
17271 outputs: []outputInfo{
17272 {0, 670826495},
17273 },
17274 },
17275 },
17276 {
17277 name: "FMOVSconst",
17278 auxType: auxFloat64,
17279 argLen: 0,
17280 rematerializeable: true,
17281 asm: arm64.AFMOVS,
17282 reg: regInfo{
17283 outputs: []outputInfo{
17284 {0, 9223372034707292160},
17285 },
17286 },
17287 },
17288 {
17289 name: "FMOVDconst",
17290 auxType: auxFloat64,
17291 argLen: 0,
17292 rematerializeable: true,
17293 asm: arm64.AFMOVD,
17294 reg: regInfo{
17295 outputs: []outputInfo{
17296 {0, 9223372034707292160},
17297 },
17298 },
17299 },
17300 {
17301 name: "MOVDaddr",
17302 auxType: auxSymOff,
17303 argLen: 1,
17304 rematerializeable: true,
17305 symEffect: SymAddr,
17306 asm: arm64.AMOVD,
17307 reg: regInfo{
17308 inputs: []inputInfo{
17309 {0, 9223372037928517632},
17310 },
17311 outputs: []outputInfo{
17312 {0, 670826495},
17313 },
17314 },
17315 },
17316 {
17317 name: "MOVBload",
17318 auxType: auxSymOff,
17319 argLen: 2,
17320 faultOnNilArg0: true,
17321 symEffect: SymRead,
17322 asm: arm64.AMOVB,
17323 reg: regInfo{
17324 inputs: []inputInfo{
17325 {0, 9223372038733561855},
17326 },
17327 outputs: []outputInfo{
17328 {0, 670826495},
17329 },
17330 },
17331 },
17332 {
17333 name: "MOVBUload",
17334 auxType: auxSymOff,
17335 argLen: 2,
17336 faultOnNilArg0: true,
17337 symEffect: SymRead,
17338 asm: arm64.AMOVBU,
17339 reg: regInfo{
17340 inputs: []inputInfo{
17341 {0, 9223372038733561855},
17342 },
17343 outputs: []outputInfo{
17344 {0, 670826495},
17345 },
17346 },
17347 },
17348 {
17349 name: "MOVHload",
17350 auxType: auxSymOff,
17351 argLen: 2,
17352 faultOnNilArg0: true,
17353 symEffect: SymRead,
17354 asm: arm64.AMOVH,
17355 reg: regInfo{
17356 inputs: []inputInfo{
17357 {0, 9223372038733561855},
17358 },
17359 outputs: []outputInfo{
17360 {0, 670826495},
17361 },
17362 },
17363 },
17364 {
17365 name: "MOVHUload",
17366 auxType: auxSymOff,
17367 argLen: 2,
17368 faultOnNilArg0: true,
17369 symEffect: SymRead,
17370 asm: arm64.AMOVHU,
17371 reg: regInfo{
17372 inputs: []inputInfo{
17373 {0, 9223372038733561855},
17374 },
17375 outputs: []outputInfo{
17376 {0, 670826495},
17377 },
17378 },
17379 },
17380 {
17381 name: "MOVWload",
17382 auxType: auxSymOff,
17383 argLen: 2,
17384 faultOnNilArg0: true,
17385 symEffect: SymRead,
17386 asm: arm64.AMOVW,
17387 reg: regInfo{
17388 inputs: []inputInfo{
17389 {0, 9223372038733561855},
17390 },
17391 outputs: []outputInfo{
17392 {0, 670826495},
17393 },
17394 },
17395 },
17396 {
17397 name: "MOVWUload",
17398 auxType: auxSymOff,
17399 argLen: 2,
17400 faultOnNilArg0: true,
17401 symEffect: SymRead,
17402 asm: arm64.AMOVWU,
17403 reg: regInfo{
17404 inputs: []inputInfo{
17405 {0, 9223372038733561855},
17406 },
17407 outputs: []outputInfo{
17408 {0, 670826495},
17409 },
17410 },
17411 },
17412 {
17413 name: "MOVDload",
17414 auxType: auxSymOff,
17415 argLen: 2,
17416 faultOnNilArg0: true,
17417 symEffect: SymRead,
17418 asm: arm64.AMOVD,
17419 reg: regInfo{
17420 inputs: []inputInfo{
17421 {0, 9223372038733561855},
17422 },
17423 outputs: []outputInfo{
17424 {0, 670826495},
17425 },
17426 },
17427 },
17428 {
17429 name: "FMOVSload",
17430 auxType: auxSymOff,
17431 argLen: 2,
17432 faultOnNilArg0: true,
17433 symEffect: SymRead,
17434 asm: arm64.AFMOVS,
17435 reg: regInfo{
17436 inputs: []inputInfo{
17437 {0, 9223372038733561855},
17438 },
17439 outputs: []outputInfo{
17440 {0, 9223372034707292160},
17441 },
17442 },
17443 },
17444 {
17445 name: "FMOVDload",
17446 auxType: auxSymOff,
17447 argLen: 2,
17448 faultOnNilArg0: true,
17449 symEffect: SymRead,
17450 asm: arm64.AFMOVD,
17451 reg: regInfo{
17452 inputs: []inputInfo{
17453 {0, 9223372038733561855},
17454 },
17455 outputs: []outputInfo{
17456 {0, 9223372034707292160},
17457 },
17458 },
17459 },
17460 {
17461 name: "MOVDloadidx",
17462 argLen: 3,
17463 asm: arm64.AMOVD,
17464 reg: regInfo{
17465 inputs: []inputInfo{
17466 {1, 805044223},
17467 {0, 9223372038733561855},
17468 },
17469 outputs: []outputInfo{
17470 {0, 670826495},
17471 },
17472 },
17473 },
17474 {
17475 name: "MOVWloadidx",
17476 argLen: 3,
17477 asm: arm64.AMOVW,
17478 reg: regInfo{
17479 inputs: []inputInfo{
17480 {1, 805044223},
17481 {0, 9223372038733561855},
17482 },
17483 outputs: []outputInfo{
17484 {0, 670826495},
17485 },
17486 },
17487 },
17488 {
17489 name: "MOVWUloadidx",
17490 argLen: 3,
17491 asm: arm64.AMOVWU,
17492 reg: regInfo{
17493 inputs: []inputInfo{
17494 {1, 805044223},
17495 {0, 9223372038733561855},
17496 },
17497 outputs: []outputInfo{
17498 {0, 670826495},
17499 },
17500 },
17501 },
17502 {
17503 name: "MOVHloadidx",
17504 argLen: 3,
17505 asm: arm64.AMOVH,
17506 reg: regInfo{
17507 inputs: []inputInfo{
17508 {1, 805044223},
17509 {0, 9223372038733561855},
17510 },
17511 outputs: []outputInfo{
17512 {0, 670826495},
17513 },
17514 },
17515 },
17516 {
17517 name: "MOVHUloadidx",
17518 argLen: 3,
17519 asm: arm64.AMOVHU,
17520 reg: regInfo{
17521 inputs: []inputInfo{
17522 {1, 805044223},
17523 {0, 9223372038733561855},
17524 },
17525 outputs: []outputInfo{
17526 {0, 670826495},
17527 },
17528 },
17529 },
17530 {
17531 name: "MOVBloadidx",
17532 argLen: 3,
17533 asm: arm64.AMOVB,
17534 reg: regInfo{
17535 inputs: []inputInfo{
17536 {1, 805044223},
17537 {0, 9223372038733561855},
17538 },
17539 outputs: []outputInfo{
17540 {0, 670826495},
17541 },
17542 },
17543 },
17544 {
17545 name: "MOVBUloadidx",
17546 argLen: 3,
17547 asm: arm64.AMOVBU,
17548 reg: regInfo{
17549 inputs: []inputInfo{
17550 {1, 805044223},
17551 {0, 9223372038733561855},
17552 },
17553 outputs: []outputInfo{
17554 {0, 670826495},
17555 },
17556 },
17557 },
17558 {
17559 name: "FMOVSloadidx",
17560 argLen: 3,
17561 asm: arm64.AFMOVS,
17562 reg: regInfo{
17563 inputs: []inputInfo{
17564 {1, 805044223},
17565 {0, 9223372038733561855},
17566 },
17567 outputs: []outputInfo{
17568 {0, 9223372034707292160},
17569 },
17570 },
17571 },
17572 {
17573 name: "FMOVDloadidx",
17574 argLen: 3,
17575 asm: arm64.AFMOVD,
17576 reg: regInfo{
17577 inputs: []inputInfo{
17578 {1, 805044223},
17579 {0, 9223372038733561855},
17580 },
17581 outputs: []outputInfo{
17582 {0, 9223372034707292160},
17583 },
17584 },
17585 },
17586 {
17587 name: "MOVHloadidx2",
17588 argLen: 3,
17589 asm: arm64.AMOVH,
17590 reg: regInfo{
17591 inputs: []inputInfo{
17592 {1, 805044223},
17593 {0, 9223372038733561855},
17594 },
17595 outputs: []outputInfo{
17596 {0, 670826495},
17597 },
17598 },
17599 },
17600 {
17601 name: "MOVHUloadidx2",
17602 argLen: 3,
17603 asm: arm64.AMOVHU,
17604 reg: regInfo{
17605 inputs: []inputInfo{
17606 {1, 805044223},
17607 {0, 9223372038733561855},
17608 },
17609 outputs: []outputInfo{
17610 {0, 670826495},
17611 },
17612 },
17613 },
17614 {
17615 name: "MOVWloadidx4",
17616 argLen: 3,
17617 asm: arm64.AMOVW,
17618 reg: regInfo{
17619 inputs: []inputInfo{
17620 {1, 805044223},
17621 {0, 9223372038733561855},
17622 },
17623 outputs: []outputInfo{
17624 {0, 670826495},
17625 },
17626 },
17627 },
17628 {
17629 name: "MOVWUloadidx4",
17630 argLen: 3,
17631 asm: arm64.AMOVWU,
17632 reg: regInfo{
17633 inputs: []inputInfo{
17634 {1, 805044223},
17635 {0, 9223372038733561855},
17636 },
17637 outputs: []outputInfo{
17638 {0, 670826495},
17639 },
17640 },
17641 },
17642 {
17643 name: "MOVDloadidx8",
17644 argLen: 3,
17645 asm: arm64.AMOVD,
17646 reg: regInfo{
17647 inputs: []inputInfo{
17648 {1, 805044223},
17649 {0, 9223372038733561855},
17650 },
17651 outputs: []outputInfo{
17652 {0, 670826495},
17653 },
17654 },
17655 },
17656 {
17657 name: "MOVBstore",
17658 auxType: auxSymOff,
17659 argLen: 3,
17660 faultOnNilArg0: true,
17661 symEffect: SymWrite,
17662 asm: arm64.AMOVB,
17663 reg: regInfo{
17664 inputs: []inputInfo{
17665 {1, 805044223},
17666 {0, 9223372038733561855},
17667 },
17668 },
17669 },
17670 {
17671 name: "MOVHstore",
17672 auxType: auxSymOff,
17673 argLen: 3,
17674 faultOnNilArg0: true,
17675 symEffect: SymWrite,
17676 asm: arm64.AMOVH,
17677 reg: regInfo{
17678 inputs: []inputInfo{
17679 {1, 805044223},
17680 {0, 9223372038733561855},
17681 },
17682 },
17683 },
17684 {
17685 name: "MOVWstore",
17686 auxType: auxSymOff,
17687 argLen: 3,
17688 faultOnNilArg0: true,
17689 symEffect: SymWrite,
17690 asm: arm64.AMOVW,
17691 reg: regInfo{
17692 inputs: []inputInfo{
17693 {1, 805044223},
17694 {0, 9223372038733561855},
17695 },
17696 },
17697 },
17698 {
17699 name: "MOVDstore",
17700 auxType: auxSymOff,
17701 argLen: 3,
17702 faultOnNilArg0: true,
17703 symEffect: SymWrite,
17704 asm: arm64.AMOVD,
17705 reg: regInfo{
17706 inputs: []inputInfo{
17707 {1, 805044223},
17708 {0, 9223372038733561855},
17709 },
17710 },
17711 },
17712 {
17713 name: "STP",
17714 auxType: auxSymOff,
17715 argLen: 4,
17716 faultOnNilArg0: true,
17717 symEffect: SymWrite,
17718 asm: arm64.ASTP,
17719 reg: regInfo{
17720 inputs: []inputInfo{
17721 {1, 805044223},
17722 {2, 805044223},
17723 {0, 9223372038733561855},
17724 },
17725 },
17726 },
17727 {
17728 name: "FMOVSstore",
17729 auxType: auxSymOff,
17730 argLen: 3,
17731 faultOnNilArg0: true,
17732 symEffect: SymWrite,
17733 asm: arm64.AFMOVS,
17734 reg: regInfo{
17735 inputs: []inputInfo{
17736 {0, 9223372038733561855},
17737 {1, 9223372034707292160},
17738 },
17739 },
17740 },
17741 {
17742 name: "FMOVDstore",
17743 auxType: auxSymOff,
17744 argLen: 3,
17745 faultOnNilArg0: true,
17746 symEffect: SymWrite,
17747 asm: arm64.AFMOVD,
17748 reg: regInfo{
17749 inputs: []inputInfo{
17750 {0, 9223372038733561855},
17751 {1, 9223372034707292160},
17752 },
17753 },
17754 },
17755 {
17756 name: "MOVBstoreidx",
17757 argLen: 4,
17758 asm: arm64.AMOVB,
17759 reg: regInfo{
17760 inputs: []inputInfo{
17761 {1, 805044223},
17762 {2, 805044223},
17763 {0, 9223372038733561855},
17764 },
17765 },
17766 },
17767 {
17768 name: "MOVHstoreidx",
17769 argLen: 4,
17770 asm: arm64.AMOVH,
17771 reg: regInfo{
17772 inputs: []inputInfo{
17773 {1, 805044223},
17774 {2, 805044223},
17775 {0, 9223372038733561855},
17776 },
17777 },
17778 },
17779 {
17780 name: "MOVWstoreidx",
17781 argLen: 4,
17782 asm: arm64.AMOVW,
17783 reg: regInfo{
17784 inputs: []inputInfo{
17785 {1, 805044223},
17786 {2, 805044223},
17787 {0, 9223372038733561855},
17788 },
17789 },
17790 },
17791 {
17792 name: "MOVDstoreidx",
17793 argLen: 4,
17794 asm: arm64.AMOVD,
17795 reg: regInfo{
17796 inputs: []inputInfo{
17797 {1, 805044223},
17798 {2, 805044223},
17799 {0, 9223372038733561855},
17800 },
17801 },
17802 },
17803 {
17804 name: "FMOVSstoreidx",
17805 argLen: 4,
17806 asm: arm64.AFMOVS,
17807 reg: regInfo{
17808 inputs: []inputInfo{
17809 {1, 805044223},
17810 {0, 9223372038733561855},
17811 {2, 9223372034707292160},
17812 },
17813 },
17814 },
17815 {
17816 name: "FMOVDstoreidx",
17817 argLen: 4,
17818 asm: arm64.AFMOVD,
17819 reg: regInfo{
17820 inputs: []inputInfo{
17821 {1, 805044223},
17822 {0, 9223372038733561855},
17823 {2, 9223372034707292160},
17824 },
17825 },
17826 },
17827 {
17828 name: "MOVHstoreidx2",
17829 argLen: 4,
17830 asm: arm64.AMOVH,
17831 reg: regInfo{
17832 inputs: []inputInfo{
17833 {1, 805044223},
17834 {2, 805044223},
17835 {0, 9223372038733561855},
17836 },
17837 },
17838 },
17839 {
17840 name: "MOVWstoreidx4",
17841 argLen: 4,
17842 asm: arm64.AMOVW,
17843 reg: regInfo{
17844 inputs: []inputInfo{
17845 {1, 805044223},
17846 {2, 805044223},
17847 {0, 9223372038733561855},
17848 },
17849 },
17850 },
17851 {
17852 name: "MOVDstoreidx8",
17853 argLen: 4,
17854 asm: arm64.AMOVD,
17855 reg: regInfo{
17856 inputs: []inputInfo{
17857 {1, 805044223},
17858 {2, 805044223},
17859 {0, 9223372038733561855},
17860 },
17861 },
17862 },
17863 {
17864 name: "MOVBstorezero",
17865 auxType: auxSymOff,
17866 argLen: 2,
17867 faultOnNilArg0: true,
17868 symEffect: SymWrite,
17869 asm: arm64.AMOVB,
17870 reg: regInfo{
17871 inputs: []inputInfo{
17872 {0, 9223372038733561855},
17873 },
17874 },
17875 },
17876 {
17877 name: "MOVHstorezero",
17878 auxType: auxSymOff,
17879 argLen: 2,
17880 faultOnNilArg0: true,
17881 symEffect: SymWrite,
17882 asm: arm64.AMOVH,
17883 reg: regInfo{
17884 inputs: []inputInfo{
17885 {0, 9223372038733561855},
17886 },
17887 },
17888 },
17889 {
17890 name: "MOVWstorezero",
17891 auxType: auxSymOff,
17892 argLen: 2,
17893 faultOnNilArg0: true,
17894 symEffect: SymWrite,
17895 asm: arm64.AMOVW,
17896 reg: regInfo{
17897 inputs: []inputInfo{
17898 {0, 9223372038733561855},
17899 },
17900 },
17901 },
17902 {
17903 name: "MOVDstorezero",
17904 auxType: auxSymOff,
17905 argLen: 2,
17906 faultOnNilArg0: true,
17907 symEffect: SymWrite,
17908 asm: arm64.AMOVD,
17909 reg: regInfo{
17910 inputs: []inputInfo{
17911 {0, 9223372038733561855},
17912 },
17913 },
17914 },
17915 {
17916 name: "MOVQstorezero",
17917 auxType: auxSymOff,
17918 argLen: 2,
17919 faultOnNilArg0: true,
17920 symEffect: SymWrite,
17921 asm: arm64.ASTP,
17922 reg: regInfo{
17923 inputs: []inputInfo{
17924 {0, 9223372038733561855},
17925 },
17926 },
17927 },
17928 {
17929 name: "MOVBstorezeroidx",
17930 argLen: 3,
17931 asm: arm64.AMOVB,
17932 reg: regInfo{
17933 inputs: []inputInfo{
17934 {1, 805044223},
17935 {0, 9223372038733561855},
17936 },
17937 },
17938 },
17939 {
17940 name: "MOVHstorezeroidx",
17941 argLen: 3,
17942 asm: arm64.AMOVH,
17943 reg: regInfo{
17944 inputs: []inputInfo{
17945 {1, 805044223},
17946 {0, 9223372038733561855},
17947 },
17948 },
17949 },
17950 {
17951 name: "MOVWstorezeroidx",
17952 argLen: 3,
17953 asm: arm64.AMOVW,
17954 reg: regInfo{
17955 inputs: []inputInfo{
17956 {1, 805044223},
17957 {0, 9223372038733561855},
17958 },
17959 },
17960 },
17961 {
17962 name: "MOVDstorezeroidx",
17963 argLen: 3,
17964 asm: arm64.AMOVD,
17965 reg: regInfo{
17966 inputs: []inputInfo{
17967 {1, 805044223},
17968 {0, 9223372038733561855},
17969 },
17970 },
17971 },
17972 {
17973 name: "MOVHstorezeroidx2",
17974 argLen: 3,
17975 asm: arm64.AMOVH,
17976 reg: regInfo{
17977 inputs: []inputInfo{
17978 {1, 805044223},
17979 {0, 9223372038733561855},
17980 },
17981 },
17982 },
17983 {
17984 name: "MOVWstorezeroidx4",
17985 argLen: 3,
17986 asm: arm64.AMOVW,
17987 reg: regInfo{
17988 inputs: []inputInfo{
17989 {1, 805044223},
17990 {0, 9223372038733561855},
17991 },
17992 },
17993 },
17994 {
17995 name: "MOVDstorezeroidx8",
17996 argLen: 3,
17997 asm: arm64.AMOVD,
17998 reg: regInfo{
17999 inputs: []inputInfo{
18000 {1, 805044223},
18001 {0, 9223372038733561855},
18002 },
18003 },
18004 },
18005 {
18006 name: "FMOVDgpfp",
18007 argLen: 1,
18008 asm: arm64.AFMOVD,
18009 reg: regInfo{
18010 inputs: []inputInfo{
18011 {0, 670826495},
18012 },
18013 outputs: []outputInfo{
18014 {0, 9223372034707292160},
18015 },
18016 },
18017 },
18018 {
18019 name: "FMOVDfpgp",
18020 argLen: 1,
18021 asm: arm64.AFMOVD,
18022 reg: regInfo{
18023 inputs: []inputInfo{
18024 {0, 9223372034707292160},
18025 },
18026 outputs: []outputInfo{
18027 {0, 670826495},
18028 },
18029 },
18030 },
18031 {
18032 name: "FMOVSgpfp",
18033 argLen: 1,
18034 asm: arm64.AFMOVS,
18035 reg: regInfo{
18036 inputs: []inputInfo{
18037 {0, 670826495},
18038 },
18039 outputs: []outputInfo{
18040 {0, 9223372034707292160},
18041 },
18042 },
18043 },
18044 {
18045 name: "FMOVSfpgp",
18046 argLen: 1,
18047 asm: arm64.AFMOVS,
18048 reg: regInfo{
18049 inputs: []inputInfo{
18050 {0, 9223372034707292160},
18051 },
18052 outputs: []outputInfo{
18053 {0, 670826495},
18054 },
18055 },
18056 },
18057 {
18058 name: "MOVBreg",
18059 argLen: 1,
18060 asm: arm64.AMOVB,
18061 reg: regInfo{
18062 inputs: []inputInfo{
18063 {0, 805044223},
18064 },
18065 outputs: []outputInfo{
18066 {0, 670826495},
18067 },
18068 },
18069 },
18070 {
18071 name: "MOVBUreg",
18072 argLen: 1,
18073 asm: arm64.AMOVBU,
18074 reg: regInfo{
18075 inputs: []inputInfo{
18076 {0, 805044223},
18077 },
18078 outputs: []outputInfo{
18079 {0, 670826495},
18080 },
18081 },
18082 },
18083 {
18084 name: "MOVHreg",
18085 argLen: 1,
18086 asm: arm64.AMOVH,
18087 reg: regInfo{
18088 inputs: []inputInfo{
18089 {0, 805044223},
18090 },
18091 outputs: []outputInfo{
18092 {0, 670826495},
18093 },
18094 },
18095 },
18096 {
18097 name: "MOVHUreg",
18098 argLen: 1,
18099 asm: arm64.AMOVHU,
18100 reg: regInfo{
18101 inputs: []inputInfo{
18102 {0, 805044223},
18103 },
18104 outputs: []outputInfo{
18105 {0, 670826495},
18106 },
18107 },
18108 },
18109 {
18110 name: "MOVWreg",
18111 argLen: 1,
18112 asm: arm64.AMOVW,
18113 reg: regInfo{
18114 inputs: []inputInfo{
18115 {0, 805044223},
18116 },
18117 outputs: []outputInfo{
18118 {0, 670826495},
18119 },
18120 },
18121 },
18122 {
18123 name: "MOVWUreg",
18124 argLen: 1,
18125 asm: arm64.AMOVWU,
18126 reg: regInfo{
18127 inputs: []inputInfo{
18128 {0, 805044223},
18129 },
18130 outputs: []outputInfo{
18131 {0, 670826495},
18132 },
18133 },
18134 },
18135 {
18136 name: "MOVDreg",
18137 argLen: 1,
18138 asm: arm64.AMOVD,
18139 reg: regInfo{
18140 inputs: []inputInfo{
18141 {0, 805044223},
18142 },
18143 outputs: []outputInfo{
18144 {0, 670826495},
18145 },
18146 },
18147 },
18148 {
18149 name: "MOVDnop",
18150 argLen: 1,
18151 resultInArg0: true,
18152 reg: regInfo{
18153 inputs: []inputInfo{
18154 {0, 670826495},
18155 },
18156 outputs: []outputInfo{
18157 {0, 670826495},
18158 },
18159 },
18160 },
18161 {
18162 name: "SCVTFWS",
18163 argLen: 1,
18164 asm: arm64.ASCVTFWS,
18165 reg: regInfo{
18166 inputs: []inputInfo{
18167 {0, 670826495},
18168 },
18169 outputs: []outputInfo{
18170 {0, 9223372034707292160},
18171 },
18172 },
18173 },
18174 {
18175 name: "SCVTFWD",
18176 argLen: 1,
18177 asm: arm64.ASCVTFWD,
18178 reg: regInfo{
18179 inputs: []inputInfo{
18180 {0, 670826495},
18181 },
18182 outputs: []outputInfo{
18183 {0, 9223372034707292160},
18184 },
18185 },
18186 },
18187 {
18188 name: "UCVTFWS",
18189 argLen: 1,
18190 asm: arm64.AUCVTFWS,
18191 reg: regInfo{
18192 inputs: []inputInfo{
18193 {0, 670826495},
18194 },
18195 outputs: []outputInfo{
18196 {0, 9223372034707292160},
18197 },
18198 },
18199 },
18200 {
18201 name: "UCVTFWD",
18202 argLen: 1,
18203 asm: arm64.AUCVTFWD,
18204 reg: regInfo{
18205 inputs: []inputInfo{
18206 {0, 670826495},
18207 },
18208 outputs: []outputInfo{
18209 {0, 9223372034707292160},
18210 },
18211 },
18212 },
18213 {
18214 name: "SCVTFS",
18215 argLen: 1,
18216 asm: arm64.ASCVTFS,
18217 reg: regInfo{
18218 inputs: []inputInfo{
18219 {0, 670826495},
18220 },
18221 outputs: []outputInfo{
18222 {0, 9223372034707292160},
18223 },
18224 },
18225 },
18226 {
18227 name: "SCVTFD",
18228 argLen: 1,
18229 asm: arm64.ASCVTFD,
18230 reg: regInfo{
18231 inputs: []inputInfo{
18232 {0, 670826495},
18233 },
18234 outputs: []outputInfo{
18235 {0, 9223372034707292160},
18236 },
18237 },
18238 },
18239 {
18240 name: "UCVTFS",
18241 argLen: 1,
18242 asm: arm64.AUCVTFS,
18243 reg: regInfo{
18244 inputs: []inputInfo{
18245 {0, 670826495},
18246 },
18247 outputs: []outputInfo{
18248 {0, 9223372034707292160},
18249 },
18250 },
18251 },
18252 {
18253 name: "UCVTFD",
18254 argLen: 1,
18255 asm: arm64.AUCVTFD,
18256 reg: regInfo{
18257 inputs: []inputInfo{
18258 {0, 670826495},
18259 },
18260 outputs: []outputInfo{
18261 {0, 9223372034707292160},
18262 },
18263 },
18264 },
18265 {
18266 name: "FCVTZSSW",
18267 argLen: 1,
18268 asm: arm64.AFCVTZSSW,
18269 reg: regInfo{
18270 inputs: []inputInfo{
18271 {0, 9223372034707292160},
18272 },
18273 outputs: []outputInfo{
18274 {0, 670826495},
18275 },
18276 },
18277 },
18278 {
18279 name: "FCVTZSDW",
18280 argLen: 1,
18281 asm: arm64.AFCVTZSDW,
18282 reg: regInfo{
18283 inputs: []inputInfo{
18284 {0, 9223372034707292160},
18285 },
18286 outputs: []outputInfo{
18287 {0, 670826495},
18288 },
18289 },
18290 },
18291 {
18292 name: "FCVTZUSW",
18293 argLen: 1,
18294 asm: arm64.AFCVTZUSW,
18295 reg: regInfo{
18296 inputs: []inputInfo{
18297 {0, 9223372034707292160},
18298 },
18299 outputs: []outputInfo{
18300 {0, 670826495},
18301 },
18302 },
18303 },
18304 {
18305 name: "FCVTZUDW",
18306 argLen: 1,
18307 asm: arm64.AFCVTZUDW,
18308 reg: regInfo{
18309 inputs: []inputInfo{
18310 {0, 9223372034707292160},
18311 },
18312 outputs: []outputInfo{
18313 {0, 670826495},
18314 },
18315 },
18316 },
18317 {
18318 name: "FCVTZSS",
18319 argLen: 1,
18320 asm: arm64.AFCVTZSS,
18321 reg: regInfo{
18322 inputs: []inputInfo{
18323 {0, 9223372034707292160},
18324 },
18325 outputs: []outputInfo{
18326 {0, 670826495},
18327 },
18328 },
18329 },
18330 {
18331 name: "FCVTZSD",
18332 argLen: 1,
18333 asm: arm64.AFCVTZSD,
18334 reg: regInfo{
18335 inputs: []inputInfo{
18336 {0, 9223372034707292160},
18337 },
18338 outputs: []outputInfo{
18339 {0, 670826495},
18340 },
18341 },
18342 },
18343 {
18344 name: "FCVTZUS",
18345 argLen: 1,
18346 asm: arm64.AFCVTZUS,
18347 reg: regInfo{
18348 inputs: []inputInfo{
18349 {0, 9223372034707292160},
18350 },
18351 outputs: []outputInfo{
18352 {0, 670826495},
18353 },
18354 },
18355 },
18356 {
18357 name: "FCVTZUD",
18358 argLen: 1,
18359 asm: arm64.AFCVTZUD,
18360 reg: regInfo{
18361 inputs: []inputInfo{
18362 {0, 9223372034707292160},
18363 },
18364 outputs: []outputInfo{
18365 {0, 670826495},
18366 },
18367 },
18368 },
18369 {
18370 name: "FCVTSD",
18371 argLen: 1,
18372 asm: arm64.AFCVTSD,
18373 reg: regInfo{
18374 inputs: []inputInfo{
18375 {0, 9223372034707292160},
18376 },
18377 outputs: []outputInfo{
18378 {0, 9223372034707292160},
18379 },
18380 },
18381 },
18382 {
18383 name: "FCVTDS",
18384 argLen: 1,
18385 asm: arm64.AFCVTDS,
18386 reg: regInfo{
18387 inputs: []inputInfo{
18388 {0, 9223372034707292160},
18389 },
18390 outputs: []outputInfo{
18391 {0, 9223372034707292160},
18392 },
18393 },
18394 },
18395 {
18396 name: "FRINTAD",
18397 argLen: 1,
18398 asm: arm64.AFRINTAD,
18399 reg: regInfo{
18400 inputs: []inputInfo{
18401 {0, 9223372034707292160},
18402 },
18403 outputs: []outputInfo{
18404 {0, 9223372034707292160},
18405 },
18406 },
18407 },
18408 {
18409 name: "FRINTMD",
18410 argLen: 1,
18411 asm: arm64.AFRINTMD,
18412 reg: regInfo{
18413 inputs: []inputInfo{
18414 {0, 9223372034707292160},
18415 },
18416 outputs: []outputInfo{
18417 {0, 9223372034707292160},
18418 },
18419 },
18420 },
18421 {
18422 name: "FRINTND",
18423 argLen: 1,
18424 asm: arm64.AFRINTND,
18425 reg: regInfo{
18426 inputs: []inputInfo{
18427 {0, 9223372034707292160},
18428 },
18429 outputs: []outputInfo{
18430 {0, 9223372034707292160},
18431 },
18432 },
18433 },
18434 {
18435 name: "FRINTPD",
18436 argLen: 1,
18437 asm: arm64.AFRINTPD,
18438 reg: regInfo{
18439 inputs: []inputInfo{
18440 {0, 9223372034707292160},
18441 },
18442 outputs: []outputInfo{
18443 {0, 9223372034707292160},
18444 },
18445 },
18446 },
18447 {
18448 name: "FRINTZD",
18449 argLen: 1,
18450 asm: arm64.AFRINTZD,
18451 reg: regInfo{
18452 inputs: []inputInfo{
18453 {0, 9223372034707292160},
18454 },
18455 outputs: []outputInfo{
18456 {0, 9223372034707292160},
18457 },
18458 },
18459 },
18460 {
18461 name: "CSEL",
18462 auxType: auxCCop,
18463 argLen: 3,
18464 asm: arm64.ACSEL,
18465 reg: regInfo{
18466 inputs: []inputInfo{
18467 {0, 670826495},
18468 {1, 670826495},
18469 },
18470 outputs: []outputInfo{
18471 {0, 670826495},
18472 },
18473 },
18474 },
18475 {
18476 name: "CSEL0",
18477 auxType: auxCCop,
18478 argLen: 2,
18479 asm: arm64.ACSEL,
18480 reg: regInfo{
18481 inputs: []inputInfo{
18482 {0, 805044223},
18483 },
18484 outputs: []outputInfo{
18485 {0, 670826495},
18486 },
18487 },
18488 },
18489 {
18490 name: "CALLstatic",
18491 auxType: auxSymOff,
18492 argLen: 1,
18493 clobberFlags: true,
18494 call: true,
18495 symEffect: SymNone,
18496 reg: regInfo{
18497 clobbers: 9223372035512336383,
18498 },
18499 },
18500 {
18501 name: "CALLclosure",
18502 auxType: auxInt64,
18503 argLen: 3,
18504 clobberFlags: true,
18505 call: true,
18506 reg: regInfo{
18507 inputs: []inputInfo{
18508 {1, 67108864},
18509 {0, 1744568319},
18510 },
18511 clobbers: 9223372035512336383,
18512 },
18513 },
18514 {
18515 name: "CALLinter",
18516 auxType: auxInt64,
18517 argLen: 2,
18518 clobberFlags: true,
18519 call: true,
18520 reg: regInfo{
18521 inputs: []inputInfo{
18522 {0, 670826495},
18523 },
18524 clobbers: 9223372035512336383,
18525 },
18526 },
18527 {
18528 name: "LoweredNilCheck",
18529 argLen: 2,
18530 nilCheck: true,
18531 faultOnNilArg0: true,
18532 reg: regInfo{
18533 inputs: []inputInfo{
18534 {0, 805044223},
18535 },
18536 },
18537 },
18538 {
18539 name: "Equal",
18540 argLen: 1,
18541 reg: regInfo{
18542 outputs: []outputInfo{
18543 {0, 670826495},
18544 },
18545 },
18546 },
18547 {
18548 name: "NotEqual",
18549 argLen: 1,
18550 reg: regInfo{
18551 outputs: []outputInfo{
18552 {0, 670826495},
18553 },
18554 },
18555 },
18556 {
18557 name: "LessThan",
18558 argLen: 1,
18559 reg: regInfo{
18560 outputs: []outputInfo{
18561 {0, 670826495},
18562 },
18563 },
18564 },
18565 {
18566 name: "LessEqual",
18567 argLen: 1,
18568 reg: regInfo{
18569 outputs: []outputInfo{
18570 {0, 670826495},
18571 },
18572 },
18573 },
18574 {
18575 name: "GreaterThan",
18576 argLen: 1,
18577 reg: regInfo{
18578 outputs: []outputInfo{
18579 {0, 670826495},
18580 },
18581 },
18582 },
18583 {
18584 name: "GreaterEqual",
18585 argLen: 1,
18586 reg: regInfo{
18587 outputs: []outputInfo{
18588 {0, 670826495},
18589 },
18590 },
18591 },
18592 {
18593 name: "LessThanU",
18594 argLen: 1,
18595 reg: regInfo{
18596 outputs: []outputInfo{
18597 {0, 670826495},
18598 },
18599 },
18600 },
18601 {
18602 name: "LessEqualU",
18603 argLen: 1,
18604 reg: regInfo{
18605 outputs: []outputInfo{
18606 {0, 670826495},
18607 },
18608 },
18609 },
18610 {
18611 name: "GreaterThanU",
18612 argLen: 1,
18613 reg: regInfo{
18614 outputs: []outputInfo{
18615 {0, 670826495},
18616 },
18617 },
18618 },
18619 {
18620 name: "GreaterEqualU",
18621 argLen: 1,
18622 reg: regInfo{
18623 outputs: []outputInfo{
18624 {0, 670826495},
18625 },
18626 },
18627 },
18628 {
18629 name: "LessThanF",
18630 argLen: 1,
18631 reg: regInfo{
18632 outputs: []outputInfo{
18633 {0, 670826495},
18634 },
18635 },
18636 },
18637 {
18638 name: "LessEqualF",
18639 argLen: 1,
18640 reg: regInfo{
18641 outputs: []outputInfo{
18642 {0, 670826495},
18643 },
18644 },
18645 },
18646 {
18647 name: "GreaterThanF",
18648 argLen: 1,
18649 reg: regInfo{
18650 outputs: []outputInfo{
18651 {0, 670826495},
18652 },
18653 },
18654 },
18655 {
18656 name: "GreaterEqualF",
18657 argLen: 1,
18658 reg: regInfo{
18659 outputs: []outputInfo{
18660 {0, 670826495},
18661 },
18662 },
18663 },
18664 {
18665 name: "DUFFZERO",
18666 auxType: auxInt64,
18667 argLen: 2,
18668 faultOnNilArg0: true,
18669 reg: regInfo{
18670 inputs: []inputInfo{
18671 {0, 1048576},
18672 },
18673 clobbers: 537919488,
18674 },
18675 },
18676 {
18677 name: "LoweredZero",
18678 argLen: 3,
18679 clobberFlags: true,
18680 faultOnNilArg0: true,
18681 reg: regInfo{
18682 inputs: []inputInfo{
18683 {0, 65536},
18684 {1, 670826495},
18685 },
18686 clobbers: 65536,
18687 },
18688 },
18689 {
18690 name: "DUFFCOPY",
18691 auxType: auxInt64,
18692 argLen: 3,
18693 faultOnNilArg0: true,
18694 faultOnNilArg1: true,
18695 reg: regInfo{
18696 inputs: []inputInfo{
18697 {0, 2097152},
18698 {1, 1048576},
18699 },
18700 clobbers: 607125504,
18701 },
18702 },
18703 {
18704 name: "LoweredMove",
18705 argLen: 4,
18706 clobberFlags: true,
18707 faultOnNilArg0: true,
18708 faultOnNilArg1: true,
18709 reg: regInfo{
18710 inputs: []inputInfo{
18711 {0, 131072},
18712 {1, 65536},
18713 {2, 670826495},
18714 },
18715 clobbers: 196608,
18716 },
18717 },
18718 {
18719 name: "LoweredGetClosurePtr",
18720 argLen: 0,
18721 zeroWidth: true,
18722 reg: regInfo{
18723 outputs: []outputInfo{
18724 {0, 67108864},
18725 },
18726 },
18727 },
18728 {
18729 name: "LoweredGetCallerSP",
18730 argLen: 0,
18731 rematerializeable: true,
18732 reg: regInfo{
18733 outputs: []outputInfo{
18734 {0, 670826495},
18735 },
18736 },
18737 },
18738 {
18739 name: "LoweredGetCallerPC",
18740 argLen: 0,
18741 rematerializeable: true,
18742 reg: regInfo{
18743 outputs: []outputInfo{
18744 {0, 670826495},
18745 },
18746 },
18747 },
18748 {
18749 name: "FlagEQ",
18750 argLen: 0,
18751 reg: regInfo{},
18752 },
18753 {
18754 name: "FlagLT_ULT",
18755 argLen: 0,
18756 reg: regInfo{},
18757 },
18758 {
18759 name: "FlagLT_UGT",
18760 argLen: 0,
18761 reg: regInfo{},
18762 },
18763 {
18764 name: "FlagGT_UGT",
18765 argLen: 0,
18766 reg: regInfo{},
18767 },
18768 {
18769 name: "FlagGT_ULT",
18770 argLen: 0,
18771 reg: regInfo{},
18772 },
18773 {
18774 name: "InvertFlags",
18775 argLen: 1,
18776 reg: regInfo{},
18777 },
18778 {
18779 name: "LDAR",
18780 argLen: 2,
18781 faultOnNilArg0: true,
18782 asm: arm64.ALDAR,
18783 reg: regInfo{
18784 inputs: []inputInfo{
18785 {0, 9223372038733561855},
18786 },
18787 outputs: []outputInfo{
18788 {0, 670826495},
18789 },
18790 },
18791 },
18792 {
18793 name: "LDARB",
18794 argLen: 2,
18795 faultOnNilArg0: true,
18796 asm: arm64.ALDARB,
18797 reg: regInfo{
18798 inputs: []inputInfo{
18799 {0, 9223372038733561855},
18800 },
18801 outputs: []outputInfo{
18802 {0, 670826495},
18803 },
18804 },
18805 },
18806 {
18807 name: "LDARW",
18808 argLen: 2,
18809 faultOnNilArg0: true,
18810 asm: arm64.ALDARW,
18811 reg: regInfo{
18812 inputs: []inputInfo{
18813 {0, 9223372038733561855},
18814 },
18815 outputs: []outputInfo{
18816 {0, 670826495},
18817 },
18818 },
18819 },
18820 {
18821 name: "STLR",
18822 argLen: 3,
18823 faultOnNilArg0: true,
18824 hasSideEffects: true,
18825 asm: arm64.ASTLR,
18826 reg: regInfo{
18827 inputs: []inputInfo{
18828 {1, 805044223},
18829 {0, 9223372038733561855},
18830 },
18831 },
18832 },
18833 {
18834 name: "STLRW",
18835 argLen: 3,
18836 faultOnNilArg0: true,
18837 hasSideEffects: true,
18838 asm: arm64.ASTLRW,
18839 reg: regInfo{
18840 inputs: []inputInfo{
18841 {1, 805044223},
18842 {0, 9223372038733561855},
18843 },
18844 },
18845 },
18846 {
18847 name: "LoweredAtomicExchange64",
18848 argLen: 3,
18849 resultNotInArgs: true,
18850 faultOnNilArg0: true,
18851 hasSideEffects: true,
18852 reg: regInfo{
18853 inputs: []inputInfo{
18854 {1, 805044223},
18855 {0, 9223372038733561855},
18856 },
18857 outputs: []outputInfo{
18858 {0, 670826495},
18859 },
18860 },
18861 },
18862 {
18863 name: "LoweredAtomicExchange32",
18864 argLen: 3,
18865 resultNotInArgs: true,
18866 faultOnNilArg0: true,
18867 hasSideEffects: true,
18868 reg: regInfo{
18869 inputs: []inputInfo{
18870 {1, 805044223},
18871 {0, 9223372038733561855},
18872 },
18873 outputs: []outputInfo{
18874 {0, 670826495},
18875 },
18876 },
18877 },
18878 {
18879 name: "LoweredAtomicAdd64",
18880 argLen: 3,
18881 resultNotInArgs: true,
18882 faultOnNilArg0: true,
18883 hasSideEffects: true,
18884 reg: regInfo{
18885 inputs: []inputInfo{
18886 {1, 805044223},
18887 {0, 9223372038733561855},
18888 },
18889 outputs: []outputInfo{
18890 {0, 670826495},
18891 },
18892 },
18893 },
18894 {
18895 name: "LoweredAtomicAdd32",
18896 argLen: 3,
18897 resultNotInArgs: true,
18898 faultOnNilArg0: true,
18899 hasSideEffects: true,
18900 reg: regInfo{
18901 inputs: []inputInfo{
18902 {1, 805044223},
18903 {0, 9223372038733561855},
18904 },
18905 outputs: []outputInfo{
18906 {0, 670826495},
18907 },
18908 },
18909 },
18910 {
18911 name: "LoweredAtomicAdd64Variant",
18912 argLen: 3,
18913 resultNotInArgs: true,
18914 faultOnNilArg0: true,
18915 hasSideEffects: true,
18916 reg: regInfo{
18917 inputs: []inputInfo{
18918 {1, 805044223},
18919 {0, 9223372038733561855},
18920 },
18921 outputs: []outputInfo{
18922 {0, 670826495},
18923 },
18924 },
18925 },
18926 {
18927 name: "LoweredAtomicAdd32Variant",
18928 argLen: 3,
18929 resultNotInArgs: true,
18930 faultOnNilArg0: true,
18931 hasSideEffects: true,
18932 reg: regInfo{
18933 inputs: []inputInfo{
18934 {1, 805044223},
18935 {0, 9223372038733561855},
18936 },
18937 outputs: []outputInfo{
18938 {0, 670826495},
18939 },
18940 },
18941 },
18942 {
18943 name: "LoweredAtomicCas64",
18944 argLen: 4,
18945 resultNotInArgs: true,
18946 clobberFlags: true,
18947 faultOnNilArg0: true,
18948 hasSideEffects: true,
18949 reg: regInfo{
18950 inputs: []inputInfo{
18951 {1, 805044223},
18952 {2, 805044223},
18953 {0, 9223372038733561855},
18954 },
18955 outputs: []outputInfo{
18956 {0, 670826495},
18957 },
18958 },
18959 },
18960 {
18961 name: "LoweredAtomicCas32",
18962 argLen: 4,
18963 resultNotInArgs: true,
18964 clobberFlags: true,
18965 faultOnNilArg0: true,
18966 hasSideEffects: true,
18967 reg: regInfo{
18968 inputs: []inputInfo{
18969 {1, 805044223},
18970 {2, 805044223},
18971 {0, 9223372038733561855},
18972 },
18973 outputs: []outputInfo{
18974 {0, 670826495},
18975 },
18976 },
18977 },
18978 {
18979 name: "LoweredAtomicAnd8",
18980 argLen: 3,
18981 resultNotInArgs: true,
18982 faultOnNilArg0: true,
18983 hasSideEffects: true,
18984 asm: arm64.AAND,
18985 reg: regInfo{
18986 inputs: []inputInfo{
18987 {1, 805044223},
18988 {0, 9223372038733561855},
18989 },
18990 outputs: []outputInfo{
18991 {0, 670826495},
18992 },
18993 },
18994 },
18995 {
18996 name: "LoweredAtomicOr8",
18997 argLen: 3,
18998 resultNotInArgs: true,
18999 faultOnNilArg0: true,
19000 hasSideEffects: true,
19001 asm: arm64.AORR,
19002 reg: regInfo{
19003 inputs: []inputInfo{
19004 {1, 805044223},
19005 {0, 9223372038733561855},
19006 },
19007 outputs: []outputInfo{
19008 {0, 670826495},
19009 },
19010 },
19011 },
19012 {
19013 name: "LoweredWB",
19014 auxType: auxSym,
19015 argLen: 3,
19016 clobberFlags: true,
19017 symEffect: SymNone,
19018 reg: regInfo{
19019 inputs: []inputInfo{
19020 {0, 4},
19021 {1, 8},
19022 },
19023 clobbers: 9223372035244163072,
19024 },
19025 },
19026 {
19027 name: "LoweredPanicBoundsA",
19028 auxType: auxInt64,
19029 argLen: 3,
19030 reg: regInfo{
19031 inputs: []inputInfo{
19032 {0, 4},
19033 {1, 8},
19034 },
19035 },
19036 },
19037 {
19038 name: "LoweredPanicBoundsB",
19039 auxType: auxInt64,
19040 argLen: 3,
19041 reg: regInfo{
19042 inputs: []inputInfo{
19043 {0, 2},
19044 {1, 4},
19045 },
19046 },
19047 },
19048 {
19049 name: "LoweredPanicBoundsC",
19050 auxType: auxInt64,
19051 argLen: 3,
19052 reg: regInfo{
19053 inputs: []inputInfo{
19054 {0, 1},
19055 {1, 2},
19056 },
19057 },
19058 },
19059
19060 {
19061 name: "ADD",
19062 argLen: 2,
19063 commutative: true,
19064 asm: mips.AADDU,
19065 reg: regInfo{
19066 inputs: []inputInfo{
19067 {0, 469762046},
19068 {1, 469762046},
19069 },
19070 outputs: []outputInfo{
19071 {0, 335544318},
19072 },
19073 },
19074 },
19075 {
19076 name: "ADDconst",
19077 auxType: auxInt32,
19078 argLen: 1,
19079 asm: mips.AADDU,
19080 reg: regInfo{
19081 inputs: []inputInfo{
19082 {0, 536870910},
19083 },
19084 outputs: []outputInfo{
19085 {0, 335544318},
19086 },
19087 },
19088 },
19089 {
19090 name: "SUB",
19091 argLen: 2,
19092 asm: mips.ASUBU,
19093 reg: regInfo{
19094 inputs: []inputInfo{
19095 {0, 469762046},
19096 {1, 469762046},
19097 },
19098 outputs: []outputInfo{
19099 {0, 335544318},
19100 },
19101 },
19102 },
19103 {
19104 name: "SUBconst",
19105 auxType: auxInt32,
19106 argLen: 1,
19107 asm: mips.ASUBU,
19108 reg: regInfo{
19109 inputs: []inputInfo{
19110 {0, 469762046},
19111 },
19112 outputs: []outputInfo{
19113 {0, 335544318},
19114 },
19115 },
19116 },
19117 {
19118 name: "MUL",
19119 argLen: 2,
19120 commutative: true,
19121 asm: mips.AMUL,
19122 reg: regInfo{
19123 inputs: []inputInfo{
19124 {0, 469762046},
19125 {1, 469762046},
19126 },
19127 clobbers: 105553116266496,
19128 outputs: []outputInfo{
19129 {0, 335544318},
19130 },
19131 },
19132 },
19133 {
19134 name: "MULT",
19135 argLen: 2,
19136 commutative: true,
19137 asm: mips.AMUL,
19138 reg: regInfo{
19139 inputs: []inputInfo{
19140 {0, 469762046},
19141 {1, 469762046},
19142 },
19143 outputs: []outputInfo{
19144 {0, 35184372088832},
19145 {1, 70368744177664},
19146 },
19147 },
19148 },
19149 {
19150 name: "MULTU",
19151 argLen: 2,
19152 commutative: true,
19153 asm: mips.AMULU,
19154 reg: regInfo{
19155 inputs: []inputInfo{
19156 {0, 469762046},
19157 {1, 469762046},
19158 },
19159 outputs: []outputInfo{
19160 {0, 35184372088832},
19161 {1, 70368744177664},
19162 },
19163 },
19164 },
19165 {
19166 name: "DIV",
19167 argLen: 2,
19168 asm: mips.ADIV,
19169 reg: regInfo{
19170 inputs: []inputInfo{
19171 {0, 469762046},
19172 {1, 469762046},
19173 },
19174 outputs: []outputInfo{
19175 {0, 35184372088832},
19176 {1, 70368744177664},
19177 },
19178 },
19179 },
19180 {
19181 name: "DIVU",
19182 argLen: 2,
19183 asm: mips.ADIVU,
19184 reg: regInfo{
19185 inputs: []inputInfo{
19186 {0, 469762046},
19187 {1, 469762046},
19188 },
19189 outputs: []outputInfo{
19190 {0, 35184372088832},
19191 {1, 70368744177664},
19192 },
19193 },
19194 },
19195 {
19196 name: "ADDF",
19197 argLen: 2,
19198 commutative: true,
19199 asm: mips.AADDF,
19200 reg: regInfo{
19201 inputs: []inputInfo{
19202 {0, 35183835217920},
19203 {1, 35183835217920},
19204 },
19205 outputs: []outputInfo{
19206 {0, 35183835217920},
19207 },
19208 },
19209 },
19210 {
19211 name: "ADDD",
19212 argLen: 2,
19213 commutative: true,
19214 asm: mips.AADDD,
19215 reg: regInfo{
19216 inputs: []inputInfo{
19217 {0, 35183835217920},
19218 {1, 35183835217920},
19219 },
19220 outputs: []outputInfo{
19221 {0, 35183835217920},
19222 },
19223 },
19224 },
19225 {
19226 name: "SUBF",
19227 argLen: 2,
19228 asm: mips.ASUBF,
19229 reg: regInfo{
19230 inputs: []inputInfo{
19231 {0, 35183835217920},
19232 {1, 35183835217920},
19233 },
19234 outputs: []outputInfo{
19235 {0, 35183835217920},
19236 },
19237 },
19238 },
19239 {
19240 name: "SUBD",
19241 argLen: 2,
19242 asm: mips.ASUBD,
19243 reg: regInfo{
19244 inputs: []inputInfo{
19245 {0, 35183835217920},
19246 {1, 35183835217920},
19247 },
19248 outputs: []outputInfo{
19249 {0, 35183835217920},
19250 },
19251 },
19252 },
19253 {
19254 name: "MULF",
19255 argLen: 2,
19256 commutative: true,
19257 asm: mips.AMULF,
19258 reg: regInfo{
19259 inputs: []inputInfo{
19260 {0, 35183835217920},
19261 {1, 35183835217920},
19262 },
19263 outputs: []outputInfo{
19264 {0, 35183835217920},
19265 },
19266 },
19267 },
19268 {
19269 name: "MULD",
19270 argLen: 2,
19271 commutative: true,
19272 asm: mips.AMULD,
19273 reg: regInfo{
19274 inputs: []inputInfo{
19275 {0, 35183835217920},
19276 {1, 35183835217920},
19277 },
19278 outputs: []outputInfo{
19279 {0, 35183835217920},
19280 },
19281 },
19282 },
19283 {
19284 name: "DIVF",
19285 argLen: 2,
19286 asm: mips.ADIVF,
19287 reg: regInfo{
19288 inputs: []inputInfo{
19289 {0, 35183835217920},
19290 {1, 35183835217920},
19291 },
19292 outputs: []outputInfo{
19293 {0, 35183835217920},
19294 },
19295 },
19296 },
19297 {
19298 name: "DIVD",
19299 argLen: 2,
19300 asm: mips.ADIVD,
19301 reg: regInfo{
19302 inputs: []inputInfo{
19303 {0, 35183835217920},
19304 {1, 35183835217920},
19305 },
19306 outputs: []outputInfo{
19307 {0, 35183835217920},
19308 },
19309 },
19310 },
19311 {
19312 name: "AND",
19313 argLen: 2,
19314 commutative: true,
19315 asm: mips.AAND,
19316 reg: regInfo{
19317 inputs: []inputInfo{
19318 {0, 469762046},
19319 {1, 469762046},
19320 },
19321 outputs: []outputInfo{
19322 {0, 335544318},
19323 },
19324 },
19325 },
19326 {
19327 name: "ANDconst",
19328 auxType: auxInt32,
19329 argLen: 1,
19330 asm: mips.AAND,
19331 reg: regInfo{
19332 inputs: []inputInfo{
19333 {0, 469762046},
19334 },
19335 outputs: []outputInfo{
19336 {0, 335544318},
19337 },
19338 },
19339 },
19340 {
19341 name: "OR",
19342 argLen: 2,
19343 commutative: true,
19344 asm: mips.AOR,
19345 reg: regInfo{
19346 inputs: []inputInfo{
19347 {0, 469762046},
19348 {1, 469762046},
19349 },
19350 outputs: []outputInfo{
19351 {0, 335544318},
19352 },
19353 },
19354 },
19355 {
19356 name: "ORconst",
19357 auxType: auxInt32,
19358 argLen: 1,
19359 asm: mips.AOR,
19360 reg: regInfo{
19361 inputs: []inputInfo{
19362 {0, 469762046},
19363 },
19364 outputs: []outputInfo{
19365 {0, 335544318},
19366 },
19367 },
19368 },
19369 {
19370 name: "XOR",
19371 argLen: 2,
19372 commutative: true,
19373 asm: mips.AXOR,
19374 reg: regInfo{
19375 inputs: []inputInfo{
19376 {0, 469762046},
19377 {1, 469762046},
19378 },
19379 outputs: []outputInfo{
19380 {0, 335544318},
19381 },
19382 },
19383 },
19384 {
19385 name: "XORconst",
19386 auxType: auxInt32,
19387 argLen: 1,
19388 asm: mips.AXOR,
19389 reg: regInfo{
19390 inputs: []inputInfo{
19391 {0, 469762046},
19392 },
19393 outputs: []outputInfo{
19394 {0, 335544318},
19395 },
19396 },
19397 },
19398 {
19399 name: "NOR",
19400 argLen: 2,
19401 commutative: true,
19402 asm: mips.ANOR,
19403 reg: regInfo{
19404 inputs: []inputInfo{
19405 {0, 469762046},
19406 {1, 469762046},
19407 },
19408 outputs: []outputInfo{
19409 {0, 335544318},
19410 },
19411 },
19412 },
19413 {
19414 name: "NORconst",
19415 auxType: auxInt32,
19416 argLen: 1,
19417 asm: mips.ANOR,
19418 reg: regInfo{
19419 inputs: []inputInfo{
19420 {0, 469762046},
19421 },
19422 outputs: []outputInfo{
19423 {0, 335544318},
19424 },
19425 },
19426 },
19427 {
19428 name: "NEG",
19429 argLen: 1,
19430 reg: regInfo{
19431 inputs: []inputInfo{
19432 {0, 469762046},
19433 },
19434 outputs: []outputInfo{
19435 {0, 335544318},
19436 },
19437 },
19438 },
19439 {
19440 name: "NEGF",
19441 argLen: 1,
19442 asm: mips.ANEGF,
19443 reg: regInfo{
19444 inputs: []inputInfo{
19445 {0, 35183835217920},
19446 },
19447 outputs: []outputInfo{
19448 {0, 35183835217920},
19449 },
19450 },
19451 },
19452 {
19453 name: "NEGD",
19454 argLen: 1,
19455 asm: mips.ANEGD,
19456 reg: regInfo{
19457 inputs: []inputInfo{
19458 {0, 35183835217920},
19459 },
19460 outputs: []outputInfo{
19461 {0, 35183835217920},
19462 },
19463 },
19464 },
19465 {
19466 name: "SQRTD",
19467 argLen: 1,
19468 asm: mips.ASQRTD,
19469 reg: regInfo{
19470 inputs: []inputInfo{
19471 {0, 35183835217920},
19472 },
19473 outputs: []outputInfo{
19474 {0, 35183835217920},
19475 },
19476 },
19477 },
19478 {
19479 name: "SLL",
19480 argLen: 2,
19481 asm: mips.ASLL,
19482 reg: regInfo{
19483 inputs: []inputInfo{
19484 {0, 469762046},
19485 {1, 469762046},
19486 },
19487 outputs: []outputInfo{
19488 {0, 335544318},
19489 },
19490 },
19491 },
19492 {
19493 name: "SLLconst",
19494 auxType: auxInt32,
19495 argLen: 1,
19496 asm: mips.ASLL,
19497 reg: regInfo{
19498 inputs: []inputInfo{
19499 {0, 469762046},
19500 },
19501 outputs: []outputInfo{
19502 {0, 335544318},
19503 },
19504 },
19505 },
19506 {
19507 name: "SRL",
19508 argLen: 2,
19509 asm: mips.ASRL,
19510 reg: regInfo{
19511 inputs: []inputInfo{
19512 {0, 469762046},
19513 {1, 469762046},
19514 },
19515 outputs: []outputInfo{
19516 {0, 335544318},
19517 },
19518 },
19519 },
19520 {
19521 name: "SRLconst",
19522 auxType: auxInt32,
19523 argLen: 1,
19524 asm: mips.ASRL,
19525 reg: regInfo{
19526 inputs: []inputInfo{
19527 {0, 469762046},
19528 },
19529 outputs: []outputInfo{
19530 {0, 335544318},
19531 },
19532 },
19533 },
19534 {
19535 name: "SRA",
19536 argLen: 2,
19537 asm: mips.ASRA,
19538 reg: regInfo{
19539 inputs: []inputInfo{
19540 {0, 469762046},
19541 {1, 469762046},
19542 },
19543 outputs: []outputInfo{
19544 {0, 335544318},
19545 },
19546 },
19547 },
19548 {
19549 name: "SRAconst",
19550 auxType: auxInt32,
19551 argLen: 1,
19552 asm: mips.ASRA,
19553 reg: regInfo{
19554 inputs: []inputInfo{
19555 {0, 469762046},
19556 },
19557 outputs: []outputInfo{
19558 {0, 335544318},
19559 },
19560 },
19561 },
19562 {
19563 name: "CLZ",
19564 argLen: 1,
19565 asm: mips.ACLZ,
19566 reg: regInfo{
19567 inputs: []inputInfo{
19568 {0, 469762046},
19569 },
19570 outputs: []outputInfo{
19571 {0, 335544318},
19572 },
19573 },
19574 },
19575 {
19576 name: "SGT",
19577 argLen: 2,
19578 asm: mips.ASGT,
19579 reg: regInfo{
19580 inputs: []inputInfo{
19581 {0, 469762046},
19582 {1, 469762046},
19583 },
19584 outputs: []outputInfo{
19585 {0, 335544318},
19586 },
19587 },
19588 },
19589 {
19590 name: "SGTconst",
19591 auxType: auxInt32,
19592 argLen: 1,
19593 asm: mips.ASGT,
19594 reg: regInfo{
19595 inputs: []inputInfo{
19596 {0, 469762046},
19597 },
19598 outputs: []outputInfo{
19599 {0, 335544318},
19600 },
19601 },
19602 },
19603 {
19604 name: "SGTzero",
19605 argLen: 1,
19606 asm: mips.ASGT,
19607 reg: regInfo{
19608 inputs: []inputInfo{
19609 {0, 469762046},
19610 },
19611 outputs: []outputInfo{
19612 {0, 335544318},
19613 },
19614 },
19615 },
19616 {
19617 name: "SGTU",
19618 argLen: 2,
19619 asm: mips.ASGTU,
19620 reg: regInfo{
19621 inputs: []inputInfo{
19622 {0, 469762046},
19623 {1, 469762046},
19624 },
19625 outputs: []outputInfo{
19626 {0, 335544318},
19627 },
19628 },
19629 },
19630 {
19631 name: "SGTUconst",
19632 auxType: auxInt32,
19633 argLen: 1,
19634 asm: mips.ASGTU,
19635 reg: regInfo{
19636 inputs: []inputInfo{
19637 {0, 469762046},
19638 },
19639 outputs: []outputInfo{
19640 {0, 335544318},
19641 },
19642 },
19643 },
19644 {
19645 name: "SGTUzero",
19646 argLen: 1,
19647 asm: mips.ASGTU,
19648 reg: regInfo{
19649 inputs: []inputInfo{
19650 {0, 469762046},
19651 },
19652 outputs: []outputInfo{
19653 {0, 335544318},
19654 },
19655 },
19656 },
19657 {
19658 name: "CMPEQF",
19659 argLen: 2,
19660 asm: mips.ACMPEQF,
19661 reg: regInfo{
19662 inputs: []inputInfo{
19663 {0, 35183835217920},
19664 {1, 35183835217920},
19665 },
19666 },
19667 },
19668 {
19669 name: "CMPEQD",
19670 argLen: 2,
19671 asm: mips.ACMPEQD,
19672 reg: regInfo{
19673 inputs: []inputInfo{
19674 {0, 35183835217920},
19675 {1, 35183835217920},
19676 },
19677 },
19678 },
19679 {
19680 name: "CMPGEF",
19681 argLen: 2,
19682 asm: mips.ACMPGEF,
19683 reg: regInfo{
19684 inputs: []inputInfo{
19685 {0, 35183835217920},
19686 {1, 35183835217920},
19687 },
19688 },
19689 },
19690 {
19691 name: "CMPGED",
19692 argLen: 2,
19693 asm: mips.ACMPGED,
19694 reg: regInfo{
19695 inputs: []inputInfo{
19696 {0, 35183835217920},
19697 {1, 35183835217920},
19698 },
19699 },
19700 },
19701 {
19702 name: "CMPGTF",
19703 argLen: 2,
19704 asm: mips.ACMPGTF,
19705 reg: regInfo{
19706 inputs: []inputInfo{
19707 {0, 35183835217920},
19708 {1, 35183835217920},
19709 },
19710 },
19711 },
19712 {
19713 name: "CMPGTD",
19714 argLen: 2,
19715 asm: mips.ACMPGTD,
19716 reg: regInfo{
19717 inputs: []inputInfo{
19718 {0, 35183835217920},
19719 {1, 35183835217920},
19720 },
19721 },
19722 },
19723 {
19724 name: "MOVWconst",
19725 auxType: auxInt32,
19726 argLen: 0,
19727 rematerializeable: true,
19728 asm: mips.AMOVW,
19729 reg: regInfo{
19730 outputs: []outputInfo{
19731 {0, 335544318},
19732 },
19733 },
19734 },
19735 {
19736 name: "MOVFconst",
19737 auxType: auxFloat32,
19738 argLen: 0,
19739 rematerializeable: true,
19740 asm: mips.AMOVF,
19741 reg: regInfo{
19742 outputs: []outputInfo{
19743 {0, 35183835217920},
19744 },
19745 },
19746 },
19747 {
19748 name: "MOVDconst",
19749 auxType: auxFloat64,
19750 argLen: 0,
19751 rematerializeable: true,
19752 asm: mips.AMOVD,
19753 reg: regInfo{
19754 outputs: []outputInfo{
19755 {0, 35183835217920},
19756 },
19757 },
19758 },
19759 {
19760 name: "MOVWaddr",
19761 auxType: auxSymOff,
19762 argLen: 1,
19763 rematerializeable: true,
19764 symEffect: SymAddr,
19765 asm: mips.AMOVW,
19766 reg: regInfo{
19767 inputs: []inputInfo{
19768 {0, 140737555464192},
19769 },
19770 outputs: []outputInfo{
19771 {0, 335544318},
19772 },
19773 },
19774 },
19775 {
19776 name: "MOVBload",
19777 auxType: auxSymOff,
19778 argLen: 2,
19779 faultOnNilArg0: true,
19780 symEffect: SymRead,
19781 asm: mips.AMOVB,
19782 reg: regInfo{
19783 inputs: []inputInfo{
19784 {0, 140738025226238},
19785 },
19786 outputs: []outputInfo{
19787 {0, 335544318},
19788 },
19789 },
19790 },
19791 {
19792 name: "MOVBUload",
19793 auxType: auxSymOff,
19794 argLen: 2,
19795 faultOnNilArg0: true,
19796 symEffect: SymRead,
19797 asm: mips.AMOVBU,
19798 reg: regInfo{
19799 inputs: []inputInfo{
19800 {0, 140738025226238},
19801 },
19802 outputs: []outputInfo{
19803 {0, 335544318},
19804 },
19805 },
19806 },
19807 {
19808 name: "MOVHload",
19809 auxType: auxSymOff,
19810 argLen: 2,
19811 faultOnNilArg0: true,
19812 symEffect: SymRead,
19813 asm: mips.AMOVH,
19814 reg: regInfo{
19815 inputs: []inputInfo{
19816 {0, 140738025226238},
19817 },
19818 outputs: []outputInfo{
19819 {0, 335544318},
19820 },
19821 },
19822 },
19823 {
19824 name: "MOVHUload",
19825 auxType: auxSymOff,
19826 argLen: 2,
19827 faultOnNilArg0: true,
19828 symEffect: SymRead,
19829 asm: mips.AMOVHU,
19830 reg: regInfo{
19831 inputs: []inputInfo{
19832 {0, 140738025226238},
19833 },
19834 outputs: []outputInfo{
19835 {0, 335544318},
19836 },
19837 },
19838 },
19839 {
19840 name: "MOVWload",
19841 auxType: auxSymOff,
19842 argLen: 2,
19843 faultOnNilArg0: true,
19844 symEffect: SymRead,
19845 asm: mips.AMOVW,
19846 reg: regInfo{
19847 inputs: []inputInfo{
19848 {0, 140738025226238},
19849 },
19850 outputs: []outputInfo{
19851 {0, 335544318},
19852 },
19853 },
19854 },
19855 {
19856 name: "MOVFload",
19857 auxType: auxSymOff,
19858 argLen: 2,
19859 faultOnNilArg0: true,
19860 symEffect: SymRead,
19861 asm: mips.AMOVF,
19862 reg: regInfo{
19863 inputs: []inputInfo{
19864 {0, 140738025226238},
19865 },
19866 outputs: []outputInfo{
19867 {0, 35183835217920},
19868 },
19869 },
19870 },
19871 {
19872 name: "MOVDload",
19873 auxType: auxSymOff,
19874 argLen: 2,
19875 faultOnNilArg0: true,
19876 symEffect: SymRead,
19877 asm: mips.AMOVD,
19878 reg: regInfo{
19879 inputs: []inputInfo{
19880 {0, 140738025226238},
19881 },
19882 outputs: []outputInfo{
19883 {0, 35183835217920},
19884 },
19885 },
19886 },
19887 {
19888 name: "MOVBstore",
19889 auxType: auxSymOff,
19890 argLen: 3,
19891 faultOnNilArg0: true,
19892 symEffect: SymWrite,
19893 asm: mips.AMOVB,
19894 reg: regInfo{
19895 inputs: []inputInfo{
19896 {1, 469762046},
19897 {0, 140738025226238},
19898 },
19899 },
19900 },
19901 {
19902 name: "MOVHstore",
19903 auxType: auxSymOff,
19904 argLen: 3,
19905 faultOnNilArg0: true,
19906 symEffect: SymWrite,
19907 asm: mips.AMOVH,
19908 reg: regInfo{
19909 inputs: []inputInfo{
19910 {1, 469762046},
19911 {0, 140738025226238},
19912 },
19913 },
19914 },
19915 {
19916 name: "MOVWstore",
19917 auxType: auxSymOff,
19918 argLen: 3,
19919 faultOnNilArg0: true,
19920 symEffect: SymWrite,
19921 asm: mips.AMOVW,
19922 reg: regInfo{
19923 inputs: []inputInfo{
19924 {1, 469762046},
19925 {0, 140738025226238},
19926 },
19927 },
19928 },
19929 {
19930 name: "MOVFstore",
19931 auxType: auxSymOff,
19932 argLen: 3,
19933 faultOnNilArg0: true,
19934 symEffect: SymWrite,
19935 asm: mips.AMOVF,
19936 reg: regInfo{
19937 inputs: []inputInfo{
19938 {1, 35183835217920},
19939 {0, 140738025226238},
19940 },
19941 },
19942 },
19943 {
19944 name: "MOVDstore",
19945 auxType: auxSymOff,
19946 argLen: 3,
19947 faultOnNilArg0: true,
19948 symEffect: SymWrite,
19949 asm: mips.AMOVD,
19950 reg: regInfo{
19951 inputs: []inputInfo{
19952 {1, 35183835217920},
19953 {0, 140738025226238},
19954 },
19955 },
19956 },
19957 {
19958 name: "MOVBstorezero",
19959 auxType: auxSymOff,
19960 argLen: 2,
19961 faultOnNilArg0: true,
19962 symEffect: SymWrite,
19963 asm: mips.AMOVB,
19964 reg: regInfo{
19965 inputs: []inputInfo{
19966 {0, 140738025226238},
19967 },
19968 },
19969 },
19970 {
19971 name: "MOVHstorezero",
19972 auxType: auxSymOff,
19973 argLen: 2,
19974 faultOnNilArg0: true,
19975 symEffect: SymWrite,
19976 asm: mips.AMOVH,
19977 reg: regInfo{
19978 inputs: []inputInfo{
19979 {0, 140738025226238},
19980 },
19981 },
19982 },
19983 {
19984 name: "MOVWstorezero",
19985 auxType: auxSymOff,
19986 argLen: 2,
19987 faultOnNilArg0: true,
19988 symEffect: SymWrite,
19989 asm: mips.AMOVW,
19990 reg: regInfo{
19991 inputs: []inputInfo{
19992 {0, 140738025226238},
19993 },
19994 },
19995 },
19996 {
19997 name: "MOVBreg",
19998 argLen: 1,
19999 asm: mips.AMOVB,
20000 reg: regInfo{
20001 inputs: []inputInfo{
20002 {0, 469762046},
20003 },
20004 outputs: []outputInfo{
20005 {0, 335544318},
20006 },
20007 },
20008 },
20009 {
20010 name: "MOVBUreg",
20011 argLen: 1,
20012 asm: mips.AMOVBU,
20013 reg: regInfo{
20014 inputs: []inputInfo{
20015 {0, 469762046},
20016 },
20017 outputs: []outputInfo{
20018 {0, 335544318},
20019 },
20020 },
20021 },
20022 {
20023 name: "MOVHreg",
20024 argLen: 1,
20025 asm: mips.AMOVH,
20026 reg: regInfo{
20027 inputs: []inputInfo{
20028 {0, 469762046},
20029 },
20030 outputs: []outputInfo{
20031 {0, 335544318},
20032 },
20033 },
20034 },
20035 {
20036 name: "MOVHUreg",
20037 argLen: 1,
20038 asm: mips.AMOVHU,
20039 reg: regInfo{
20040 inputs: []inputInfo{
20041 {0, 469762046},
20042 },
20043 outputs: []outputInfo{
20044 {0, 335544318},
20045 },
20046 },
20047 },
20048 {
20049 name: "MOVWreg",
20050 argLen: 1,
20051 asm: mips.AMOVW,
20052 reg: regInfo{
20053 inputs: []inputInfo{
20054 {0, 469762046},
20055 },
20056 outputs: []outputInfo{
20057 {0, 335544318},
20058 },
20059 },
20060 },
20061 {
20062 name: "MOVWnop",
20063 argLen: 1,
20064 resultInArg0: true,
20065 reg: regInfo{
20066 inputs: []inputInfo{
20067 {0, 335544318},
20068 },
20069 outputs: []outputInfo{
20070 {0, 335544318},
20071 },
20072 },
20073 },
20074 {
20075 name: "CMOVZ",
20076 argLen: 3,
20077 resultInArg0: true,
20078 asm: mips.ACMOVZ,
20079 reg: regInfo{
20080 inputs: []inputInfo{
20081 {0, 335544318},
20082 {1, 335544318},
20083 {2, 335544318},
20084 },
20085 outputs: []outputInfo{
20086 {0, 335544318},
20087 },
20088 },
20089 },
20090 {
20091 name: "CMOVZzero",
20092 argLen: 2,
20093 resultInArg0: true,
20094 asm: mips.ACMOVZ,
20095 reg: regInfo{
20096 inputs: []inputInfo{
20097 {0, 335544318},
20098 {1, 469762046},
20099 },
20100 outputs: []outputInfo{
20101 {0, 335544318},
20102 },
20103 },
20104 },
20105 {
20106 name: "MOVWF",
20107 argLen: 1,
20108 asm: mips.AMOVWF,
20109 reg: regInfo{
20110 inputs: []inputInfo{
20111 {0, 35183835217920},
20112 },
20113 outputs: []outputInfo{
20114 {0, 35183835217920},
20115 },
20116 },
20117 },
20118 {
20119 name: "MOVWD",
20120 argLen: 1,
20121 asm: mips.AMOVWD,
20122 reg: regInfo{
20123 inputs: []inputInfo{
20124 {0, 35183835217920},
20125 },
20126 outputs: []outputInfo{
20127 {0, 35183835217920},
20128 },
20129 },
20130 },
20131 {
20132 name: "TRUNCFW",
20133 argLen: 1,
20134 asm: mips.ATRUNCFW,
20135 reg: regInfo{
20136 inputs: []inputInfo{
20137 {0, 35183835217920},
20138 },
20139 outputs: []outputInfo{
20140 {0, 35183835217920},
20141 },
20142 },
20143 },
20144 {
20145 name: "TRUNCDW",
20146 argLen: 1,
20147 asm: mips.ATRUNCDW,
20148 reg: regInfo{
20149 inputs: []inputInfo{
20150 {0, 35183835217920},
20151 },
20152 outputs: []outputInfo{
20153 {0, 35183835217920},
20154 },
20155 },
20156 },
20157 {
20158 name: "MOVFD",
20159 argLen: 1,
20160 asm: mips.AMOVFD,
20161 reg: regInfo{
20162 inputs: []inputInfo{
20163 {0, 35183835217920},
20164 },
20165 outputs: []outputInfo{
20166 {0, 35183835217920},
20167 },
20168 },
20169 },
20170 {
20171 name: "MOVDF",
20172 argLen: 1,
20173 asm: mips.AMOVDF,
20174 reg: regInfo{
20175 inputs: []inputInfo{
20176 {0, 35183835217920},
20177 },
20178 outputs: []outputInfo{
20179 {0, 35183835217920},
20180 },
20181 },
20182 },
20183 {
20184 name: "CALLstatic",
20185 auxType: auxSymOff,
20186 argLen: 1,
20187 clobberFlags: true,
20188 call: true,
20189 symEffect: SymNone,
20190 reg: regInfo{
20191 clobbers: 140737421246462,
20192 },
20193 },
20194 {
20195 name: "CALLclosure",
20196 auxType: auxInt64,
20197 argLen: 3,
20198 clobberFlags: true,
20199 call: true,
20200 reg: regInfo{
20201 inputs: []inputInfo{
20202 {1, 4194304},
20203 {0, 402653182},
20204 },
20205 clobbers: 140737421246462,
20206 },
20207 },
20208 {
20209 name: "CALLinter",
20210 auxType: auxInt64,
20211 argLen: 2,
20212 clobberFlags: true,
20213 call: true,
20214 reg: regInfo{
20215 inputs: []inputInfo{
20216 {0, 335544318},
20217 },
20218 clobbers: 140737421246462,
20219 },
20220 },
20221 {
20222 name: "LoweredAtomicLoad",
20223 argLen: 2,
20224 faultOnNilArg0: true,
20225 reg: regInfo{
20226 inputs: []inputInfo{
20227 {0, 140738025226238},
20228 },
20229 outputs: []outputInfo{
20230 {0, 335544318},
20231 },
20232 },
20233 },
20234 {
20235 name: "LoweredAtomicStore",
20236 argLen: 3,
20237 faultOnNilArg0: true,
20238 hasSideEffects: true,
20239 reg: regInfo{
20240 inputs: []inputInfo{
20241 {1, 469762046},
20242 {0, 140738025226238},
20243 },
20244 },
20245 },
20246 {
20247 name: "LoweredAtomicStorezero",
20248 argLen: 2,
20249 faultOnNilArg0: true,
20250 hasSideEffects: true,
20251 reg: regInfo{
20252 inputs: []inputInfo{
20253 {0, 140738025226238},
20254 },
20255 },
20256 },
20257 {
20258 name: "LoweredAtomicExchange",
20259 argLen: 3,
20260 resultNotInArgs: true,
20261 faultOnNilArg0: true,
20262 hasSideEffects: true,
20263 reg: regInfo{
20264 inputs: []inputInfo{
20265 {1, 469762046},
20266 {0, 140738025226238},
20267 },
20268 outputs: []outputInfo{
20269 {0, 335544318},
20270 },
20271 },
20272 },
20273 {
20274 name: "LoweredAtomicAdd",
20275 argLen: 3,
20276 resultNotInArgs: true,
20277 faultOnNilArg0: true,
20278 hasSideEffects: true,
20279 reg: regInfo{
20280 inputs: []inputInfo{
20281 {1, 469762046},
20282 {0, 140738025226238},
20283 },
20284 outputs: []outputInfo{
20285 {0, 335544318},
20286 },
20287 },
20288 },
20289 {
20290 name: "LoweredAtomicAddconst",
20291 auxType: auxInt32,
20292 argLen: 2,
20293 resultNotInArgs: true,
20294 faultOnNilArg0: true,
20295 hasSideEffects: true,
20296 reg: regInfo{
20297 inputs: []inputInfo{
20298 {0, 140738025226238},
20299 },
20300 outputs: []outputInfo{
20301 {0, 335544318},
20302 },
20303 },
20304 },
20305 {
20306 name: "LoweredAtomicCas",
20307 argLen: 4,
20308 resultNotInArgs: true,
20309 faultOnNilArg0: true,
20310 hasSideEffects: true,
20311 reg: regInfo{
20312 inputs: []inputInfo{
20313 {1, 469762046},
20314 {2, 469762046},
20315 {0, 140738025226238},
20316 },
20317 outputs: []outputInfo{
20318 {0, 335544318},
20319 },
20320 },
20321 },
20322 {
20323 name: "LoweredAtomicAnd",
20324 argLen: 3,
20325 faultOnNilArg0: true,
20326 hasSideEffects: true,
20327 asm: mips.AAND,
20328 reg: regInfo{
20329 inputs: []inputInfo{
20330 {1, 469762046},
20331 {0, 140738025226238},
20332 },
20333 },
20334 },
20335 {
20336 name: "LoweredAtomicOr",
20337 argLen: 3,
20338 faultOnNilArg0: true,
20339 hasSideEffects: true,
20340 asm: mips.AOR,
20341 reg: regInfo{
20342 inputs: []inputInfo{
20343 {1, 469762046},
20344 {0, 140738025226238},
20345 },
20346 },
20347 },
20348 {
20349 name: "LoweredZero",
20350 auxType: auxInt32,
20351 argLen: 3,
20352 faultOnNilArg0: true,
20353 reg: regInfo{
20354 inputs: []inputInfo{
20355 {0, 2},
20356 {1, 335544318},
20357 },
20358 clobbers: 2,
20359 },
20360 },
20361 {
20362 name: "LoweredMove",
20363 auxType: auxInt32,
20364 argLen: 4,
20365 faultOnNilArg0: true,
20366 faultOnNilArg1: true,
20367 reg: regInfo{
20368 inputs: []inputInfo{
20369 {0, 4},
20370 {1, 2},
20371 {2, 335544318},
20372 },
20373 clobbers: 6,
20374 },
20375 },
20376 {
20377 name: "LoweredNilCheck",
20378 argLen: 2,
20379 nilCheck: true,
20380 faultOnNilArg0: true,
20381 reg: regInfo{
20382 inputs: []inputInfo{
20383 {0, 469762046},
20384 },
20385 },
20386 },
20387 {
20388 name: "FPFlagTrue",
20389 argLen: 1,
20390 reg: regInfo{
20391 outputs: []outputInfo{
20392 {0, 335544318},
20393 },
20394 },
20395 },
20396 {
20397 name: "FPFlagFalse",
20398 argLen: 1,
20399 reg: regInfo{
20400 outputs: []outputInfo{
20401 {0, 335544318},
20402 },
20403 },
20404 },
20405 {
20406 name: "LoweredGetClosurePtr",
20407 argLen: 0,
20408 zeroWidth: true,
20409 reg: regInfo{
20410 outputs: []outputInfo{
20411 {0, 4194304},
20412 },
20413 },
20414 },
20415 {
20416 name: "LoweredGetCallerSP",
20417 argLen: 0,
20418 rematerializeable: true,
20419 reg: regInfo{
20420 outputs: []outputInfo{
20421 {0, 335544318},
20422 },
20423 },
20424 },
20425 {
20426 name: "LoweredGetCallerPC",
20427 argLen: 0,
20428 rematerializeable: true,
20429 reg: regInfo{
20430 outputs: []outputInfo{
20431 {0, 335544318},
20432 },
20433 },
20434 },
20435 {
20436 name: "LoweredWB",
20437 auxType: auxSym,
20438 argLen: 3,
20439 clobberFlags: true,
20440 symEffect: SymNone,
20441 reg: regInfo{
20442 inputs: []inputInfo{
20443 {0, 1048576},
20444 {1, 2097152},
20445 },
20446 clobbers: 140737219919872,
20447 },
20448 },
20449 {
20450 name: "LoweredPanicBoundsA",
20451 auxType: auxInt64,
20452 argLen: 3,
20453 reg: regInfo{
20454 inputs: []inputInfo{
20455 {0, 8},
20456 {1, 16},
20457 },
20458 },
20459 },
20460 {
20461 name: "LoweredPanicBoundsB",
20462 auxType: auxInt64,
20463 argLen: 3,
20464 reg: regInfo{
20465 inputs: []inputInfo{
20466 {0, 4},
20467 {1, 8},
20468 },
20469 },
20470 },
20471 {
20472 name: "LoweredPanicBoundsC",
20473 auxType: auxInt64,
20474 argLen: 3,
20475 reg: regInfo{
20476 inputs: []inputInfo{
20477 {0, 2},
20478 {1, 4},
20479 },
20480 },
20481 },
20482 {
20483 name: "LoweredPanicExtendA",
20484 auxType: auxInt64,
20485 argLen: 4,
20486 reg: regInfo{
20487 inputs: []inputInfo{
20488 {0, 32},
20489 {1, 8},
20490 {2, 16},
20491 },
20492 },
20493 },
20494 {
20495 name: "LoweredPanicExtendB",
20496 auxType: auxInt64,
20497 argLen: 4,
20498 reg: regInfo{
20499 inputs: []inputInfo{
20500 {0, 32},
20501 {1, 4},
20502 {2, 8},
20503 },
20504 },
20505 },
20506 {
20507 name: "LoweredPanicExtendC",
20508 auxType: auxInt64,
20509 argLen: 4,
20510 reg: regInfo{
20511 inputs: []inputInfo{
20512 {0, 32},
20513 {1, 2},
20514 {2, 4},
20515 },
20516 },
20517 },
20518
20519 {
20520 name: "ADDV",
20521 argLen: 2,
20522 commutative: true,
20523 asm: mips.AADDVU,
20524 reg: regInfo{
20525 inputs: []inputInfo{
20526 {0, 234881022},
20527 {1, 234881022},
20528 },
20529 outputs: []outputInfo{
20530 {0, 167772158},
20531 },
20532 },
20533 },
20534 {
20535 name: "ADDVconst",
20536 auxType: auxInt64,
20537 argLen: 1,
20538 asm: mips.AADDVU,
20539 reg: regInfo{
20540 inputs: []inputInfo{
20541 {0, 268435454},
20542 },
20543 outputs: []outputInfo{
20544 {0, 167772158},
20545 },
20546 },
20547 },
20548 {
20549 name: "SUBV",
20550 argLen: 2,
20551 asm: mips.ASUBVU,
20552 reg: regInfo{
20553 inputs: []inputInfo{
20554 {0, 234881022},
20555 {1, 234881022},
20556 },
20557 outputs: []outputInfo{
20558 {0, 167772158},
20559 },
20560 },
20561 },
20562 {
20563 name: "SUBVconst",
20564 auxType: auxInt64,
20565 argLen: 1,
20566 asm: mips.ASUBVU,
20567 reg: regInfo{
20568 inputs: []inputInfo{
20569 {0, 234881022},
20570 },
20571 outputs: []outputInfo{
20572 {0, 167772158},
20573 },
20574 },
20575 },
20576 {
20577 name: "MULV",
20578 argLen: 2,
20579 commutative: true,
20580 asm: mips.AMULV,
20581 reg: regInfo{
20582 inputs: []inputInfo{
20583 {0, 234881022},
20584 {1, 234881022},
20585 },
20586 outputs: []outputInfo{
20587 {0, 1152921504606846976},
20588 {1, 2305843009213693952},
20589 },
20590 },
20591 },
20592 {
20593 name: "MULVU",
20594 argLen: 2,
20595 commutative: true,
20596 asm: mips.AMULVU,
20597 reg: regInfo{
20598 inputs: []inputInfo{
20599 {0, 234881022},
20600 {1, 234881022},
20601 },
20602 outputs: []outputInfo{
20603 {0, 1152921504606846976},
20604 {1, 2305843009213693952},
20605 },
20606 },
20607 },
20608 {
20609 name: "DIVV",
20610 argLen: 2,
20611 asm: mips.ADIVV,
20612 reg: regInfo{
20613 inputs: []inputInfo{
20614 {0, 234881022},
20615 {1, 234881022},
20616 },
20617 outputs: []outputInfo{
20618 {0, 1152921504606846976},
20619 {1, 2305843009213693952},
20620 },
20621 },
20622 },
20623 {
20624 name: "DIVVU",
20625 argLen: 2,
20626 asm: mips.ADIVVU,
20627 reg: regInfo{
20628 inputs: []inputInfo{
20629 {0, 234881022},
20630 {1, 234881022},
20631 },
20632 outputs: []outputInfo{
20633 {0, 1152921504606846976},
20634 {1, 2305843009213693952},
20635 },
20636 },
20637 },
20638 {
20639 name: "ADDF",
20640 argLen: 2,
20641 commutative: true,
20642 asm: mips.AADDF,
20643 reg: regInfo{
20644 inputs: []inputInfo{
20645 {0, 1152921504338411520},
20646 {1, 1152921504338411520},
20647 },
20648 outputs: []outputInfo{
20649 {0, 1152921504338411520},
20650 },
20651 },
20652 },
20653 {
20654 name: "ADDD",
20655 argLen: 2,
20656 commutative: true,
20657 asm: mips.AADDD,
20658 reg: regInfo{
20659 inputs: []inputInfo{
20660 {0, 1152921504338411520},
20661 {1, 1152921504338411520},
20662 },
20663 outputs: []outputInfo{
20664 {0, 1152921504338411520},
20665 },
20666 },
20667 },
20668 {
20669 name: "SUBF",
20670 argLen: 2,
20671 asm: mips.ASUBF,
20672 reg: regInfo{
20673 inputs: []inputInfo{
20674 {0, 1152921504338411520},
20675 {1, 1152921504338411520},
20676 },
20677 outputs: []outputInfo{
20678 {0, 1152921504338411520},
20679 },
20680 },
20681 },
20682 {
20683 name: "SUBD",
20684 argLen: 2,
20685 asm: mips.ASUBD,
20686 reg: regInfo{
20687 inputs: []inputInfo{
20688 {0, 1152921504338411520},
20689 {1, 1152921504338411520},
20690 },
20691 outputs: []outputInfo{
20692 {0, 1152921504338411520},
20693 },
20694 },
20695 },
20696 {
20697 name: "MULF",
20698 argLen: 2,
20699 commutative: true,
20700 asm: mips.AMULF,
20701 reg: regInfo{
20702 inputs: []inputInfo{
20703 {0, 1152921504338411520},
20704 {1, 1152921504338411520},
20705 },
20706 outputs: []outputInfo{
20707 {0, 1152921504338411520},
20708 },
20709 },
20710 },
20711 {
20712 name: "MULD",
20713 argLen: 2,
20714 commutative: true,
20715 asm: mips.AMULD,
20716 reg: regInfo{
20717 inputs: []inputInfo{
20718 {0, 1152921504338411520},
20719 {1, 1152921504338411520},
20720 },
20721 outputs: []outputInfo{
20722 {0, 1152921504338411520},
20723 },
20724 },
20725 },
20726 {
20727 name: "DIVF",
20728 argLen: 2,
20729 asm: mips.ADIVF,
20730 reg: regInfo{
20731 inputs: []inputInfo{
20732 {0, 1152921504338411520},
20733 {1, 1152921504338411520},
20734 },
20735 outputs: []outputInfo{
20736 {0, 1152921504338411520},
20737 },
20738 },
20739 },
20740 {
20741 name: "DIVD",
20742 argLen: 2,
20743 asm: mips.ADIVD,
20744 reg: regInfo{
20745 inputs: []inputInfo{
20746 {0, 1152921504338411520},
20747 {1, 1152921504338411520},
20748 },
20749 outputs: []outputInfo{
20750 {0, 1152921504338411520},
20751 },
20752 },
20753 },
20754 {
20755 name: "AND",
20756 argLen: 2,
20757 commutative: true,
20758 asm: mips.AAND,
20759 reg: regInfo{
20760 inputs: []inputInfo{
20761 {0, 234881022},
20762 {1, 234881022},
20763 },
20764 outputs: []outputInfo{
20765 {0, 167772158},
20766 },
20767 },
20768 },
20769 {
20770 name: "ANDconst",
20771 auxType: auxInt64,
20772 argLen: 1,
20773 asm: mips.AAND,
20774 reg: regInfo{
20775 inputs: []inputInfo{
20776 {0, 234881022},
20777 },
20778 outputs: []outputInfo{
20779 {0, 167772158},
20780 },
20781 },
20782 },
20783 {
20784 name: "OR",
20785 argLen: 2,
20786 commutative: true,
20787 asm: mips.AOR,
20788 reg: regInfo{
20789 inputs: []inputInfo{
20790 {0, 234881022},
20791 {1, 234881022},
20792 },
20793 outputs: []outputInfo{
20794 {0, 167772158},
20795 },
20796 },
20797 },
20798 {
20799 name: "ORconst",
20800 auxType: auxInt64,
20801 argLen: 1,
20802 asm: mips.AOR,
20803 reg: regInfo{
20804 inputs: []inputInfo{
20805 {0, 234881022},
20806 },
20807 outputs: []outputInfo{
20808 {0, 167772158},
20809 },
20810 },
20811 },
20812 {
20813 name: "XOR",
20814 argLen: 2,
20815 commutative: true,
20816 asm: mips.AXOR,
20817 reg: regInfo{
20818 inputs: []inputInfo{
20819 {0, 234881022},
20820 {1, 234881022},
20821 },
20822 outputs: []outputInfo{
20823 {0, 167772158},
20824 },
20825 },
20826 },
20827 {
20828 name: "XORconst",
20829 auxType: auxInt64,
20830 argLen: 1,
20831 asm: mips.AXOR,
20832 reg: regInfo{
20833 inputs: []inputInfo{
20834 {0, 234881022},
20835 },
20836 outputs: []outputInfo{
20837 {0, 167772158},
20838 },
20839 },
20840 },
20841 {
20842 name: "NOR",
20843 argLen: 2,
20844 commutative: true,
20845 asm: mips.ANOR,
20846 reg: regInfo{
20847 inputs: []inputInfo{
20848 {0, 234881022},
20849 {1, 234881022},
20850 },
20851 outputs: []outputInfo{
20852 {0, 167772158},
20853 },
20854 },
20855 },
20856 {
20857 name: "NORconst",
20858 auxType: auxInt64,
20859 argLen: 1,
20860 asm: mips.ANOR,
20861 reg: regInfo{
20862 inputs: []inputInfo{
20863 {0, 234881022},
20864 },
20865 outputs: []outputInfo{
20866 {0, 167772158},
20867 },
20868 },
20869 },
20870 {
20871 name: "NEGV",
20872 argLen: 1,
20873 reg: regInfo{
20874 inputs: []inputInfo{
20875 {0, 234881022},
20876 },
20877 outputs: []outputInfo{
20878 {0, 167772158},
20879 },
20880 },
20881 },
20882 {
20883 name: "NEGF",
20884 argLen: 1,
20885 asm: mips.ANEGF,
20886 reg: regInfo{
20887 inputs: []inputInfo{
20888 {0, 1152921504338411520},
20889 },
20890 outputs: []outputInfo{
20891 {0, 1152921504338411520},
20892 },
20893 },
20894 },
20895 {
20896 name: "NEGD",
20897 argLen: 1,
20898 asm: mips.ANEGD,
20899 reg: regInfo{
20900 inputs: []inputInfo{
20901 {0, 1152921504338411520},
20902 },
20903 outputs: []outputInfo{
20904 {0, 1152921504338411520},
20905 },
20906 },
20907 },
20908 {
20909 name: "SQRTD",
20910 argLen: 1,
20911 asm: mips.ASQRTD,
20912 reg: regInfo{
20913 inputs: []inputInfo{
20914 {0, 1152921504338411520},
20915 },
20916 outputs: []outputInfo{
20917 {0, 1152921504338411520},
20918 },
20919 },
20920 },
20921 {
20922 name: "SLLV",
20923 argLen: 2,
20924 asm: mips.ASLLV,
20925 reg: regInfo{
20926 inputs: []inputInfo{
20927 {0, 234881022},
20928 {1, 234881022},
20929 },
20930 outputs: []outputInfo{
20931 {0, 167772158},
20932 },
20933 },
20934 },
20935 {
20936 name: "SLLVconst",
20937 auxType: auxInt64,
20938 argLen: 1,
20939 asm: mips.ASLLV,
20940 reg: regInfo{
20941 inputs: []inputInfo{
20942 {0, 234881022},
20943 },
20944 outputs: []outputInfo{
20945 {0, 167772158},
20946 },
20947 },
20948 },
20949 {
20950 name: "SRLV",
20951 argLen: 2,
20952 asm: mips.ASRLV,
20953 reg: regInfo{
20954 inputs: []inputInfo{
20955 {0, 234881022},
20956 {1, 234881022},
20957 },
20958 outputs: []outputInfo{
20959 {0, 167772158},
20960 },
20961 },
20962 },
20963 {
20964 name: "SRLVconst",
20965 auxType: auxInt64,
20966 argLen: 1,
20967 asm: mips.ASRLV,
20968 reg: regInfo{
20969 inputs: []inputInfo{
20970 {0, 234881022},
20971 },
20972 outputs: []outputInfo{
20973 {0, 167772158},
20974 },
20975 },
20976 },
20977 {
20978 name: "SRAV",
20979 argLen: 2,
20980 asm: mips.ASRAV,
20981 reg: regInfo{
20982 inputs: []inputInfo{
20983 {0, 234881022},
20984 {1, 234881022},
20985 },
20986 outputs: []outputInfo{
20987 {0, 167772158},
20988 },
20989 },
20990 },
20991 {
20992 name: "SRAVconst",
20993 auxType: auxInt64,
20994 argLen: 1,
20995 asm: mips.ASRAV,
20996 reg: regInfo{
20997 inputs: []inputInfo{
20998 {0, 234881022},
20999 },
21000 outputs: []outputInfo{
21001 {0, 167772158},
21002 },
21003 },
21004 },
21005 {
21006 name: "SGT",
21007 argLen: 2,
21008 asm: mips.ASGT,
21009 reg: regInfo{
21010 inputs: []inputInfo{
21011 {0, 234881022},
21012 {1, 234881022},
21013 },
21014 outputs: []outputInfo{
21015 {0, 167772158},
21016 },
21017 },
21018 },
21019 {
21020 name: "SGTconst",
21021 auxType: auxInt64,
21022 argLen: 1,
21023 asm: mips.ASGT,
21024 reg: regInfo{
21025 inputs: []inputInfo{
21026 {0, 234881022},
21027 },
21028 outputs: []outputInfo{
21029 {0, 167772158},
21030 },
21031 },
21032 },
21033 {
21034 name: "SGTU",
21035 argLen: 2,
21036 asm: mips.ASGTU,
21037 reg: regInfo{
21038 inputs: []inputInfo{
21039 {0, 234881022},
21040 {1, 234881022},
21041 },
21042 outputs: []outputInfo{
21043 {0, 167772158},
21044 },
21045 },
21046 },
21047 {
21048 name: "SGTUconst",
21049 auxType: auxInt64,
21050 argLen: 1,
21051 asm: mips.ASGTU,
21052 reg: regInfo{
21053 inputs: []inputInfo{
21054 {0, 234881022},
21055 },
21056 outputs: []outputInfo{
21057 {0, 167772158},
21058 },
21059 },
21060 },
21061 {
21062 name: "CMPEQF",
21063 argLen: 2,
21064 asm: mips.ACMPEQF,
21065 reg: regInfo{
21066 inputs: []inputInfo{
21067 {0, 1152921504338411520},
21068 {1, 1152921504338411520},
21069 },
21070 },
21071 },
21072 {
21073 name: "CMPEQD",
21074 argLen: 2,
21075 asm: mips.ACMPEQD,
21076 reg: regInfo{
21077 inputs: []inputInfo{
21078 {0, 1152921504338411520},
21079 {1, 1152921504338411520},
21080 },
21081 },
21082 },
21083 {
21084 name: "CMPGEF",
21085 argLen: 2,
21086 asm: mips.ACMPGEF,
21087 reg: regInfo{
21088 inputs: []inputInfo{
21089 {0, 1152921504338411520},
21090 {1, 1152921504338411520},
21091 },
21092 },
21093 },
21094 {
21095 name: "CMPGED",
21096 argLen: 2,
21097 asm: mips.ACMPGED,
21098 reg: regInfo{
21099 inputs: []inputInfo{
21100 {0, 1152921504338411520},
21101 {1, 1152921504338411520},
21102 },
21103 },
21104 },
21105 {
21106 name: "CMPGTF",
21107 argLen: 2,
21108 asm: mips.ACMPGTF,
21109 reg: regInfo{
21110 inputs: []inputInfo{
21111 {0, 1152921504338411520},
21112 {1, 1152921504338411520},
21113 },
21114 },
21115 },
21116 {
21117 name: "CMPGTD",
21118 argLen: 2,
21119 asm: mips.ACMPGTD,
21120 reg: regInfo{
21121 inputs: []inputInfo{
21122 {0, 1152921504338411520},
21123 {1, 1152921504338411520},
21124 },
21125 },
21126 },
21127 {
21128 name: "MOVVconst",
21129 auxType: auxInt64,
21130 argLen: 0,
21131 rematerializeable: true,
21132 asm: mips.AMOVV,
21133 reg: regInfo{
21134 outputs: []outputInfo{
21135 {0, 167772158},
21136 },
21137 },
21138 },
21139 {
21140 name: "MOVFconst",
21141 auxType: auxFloat64,
21142 argLen: 0,
21143 rematerializeable: true,
21144 asm: mips.AMOVF,
21145 reg: regInfo{
21146 outputs: []outputInfo{
21147 {0, 1152921504338411520},
21148 },
21149 },
21150 },
21151 {
21152 name: "MOVDconst",
21153 auxType: auxFloat64,
21154 argLen: 0,
21155 rematerializeable: true,
21156 asm: mips.AMOVD,
21157 reg: regInfo{
21158 outputs: []outputInfo{
21159 {0, 1152921504338411520},
21160 },
21161 },
21162 },
21163 {
21164 name: "MOVVaddr",
21165 auxType: auxSymOff,
21166 argLen: 1,
21167 rematerializeable: true,
21168 symEffect: SymAddr,
21169 asm: mips.AMOVV,
21170 reg: regInfo{
21171 inputs: []inputInfo{
21172 {0, 4611686018460942336},
21173 },
21174 outputs: []outputInfo{
21175 {0, 167772158},
21176 },
21177 },
21178 },
21179 {
21180 name: "MOVBload",
21181 auxType: auxSymOff,
21182 argLen: 2,
21183 faultOnNilArg0: true,
21184 symEffect: SymRead,
21185 asm: mips.AMOVB,
21186 reg: regInfo{
21187 inputs: []inputInfo{
21188 {0, 4611686018695823358},
21189 },
21190 outputs: []outputInfo{
21191 {0, 167772158},
21192 },
21193 },
21194 },
21195 {
21196 name: "MOVBUload",
21197 auxType: auxSymOff,
21198 argLen: 2,
21199 faultOnNilArg0: true,
21200 symEffect: SymRead,
21201 asm: mips.AMOVBU,
21202 reg: regInfo{
21203 inputs: []inputInfo{
21204 {0, 4611686018695823358},
21205 },
21206 outputs: []outputInfo{
21207 {0, 167772158},
21208 },
21209 },
21210 },
21211 {
21212 name: "MOVHload",
21213 auxType: auxSymOff,
21214 argLen: 2,
21215 faultOnNilArg0: true,
21216 symEffect: SymRead,
21217 asm: mips.AMOVH,
21218 reg: regInfo{
21219 inputs: []inputInfo{
21220 {0, 4611686018695823358},
21221 },
21222 outputs: []outputInfo{
21223 {0, 167772158},
21224 },
21225 },
21226 },
21227 {
21228 name: "MOVHUload",
21229 auxType: auxSymOff,
21230 argLen: 2,
21231 faultOnNilArg0: true,
21232 symEffect: SymRead,
21233 asm: mips.AMOVHU,
21234 reg: regInfo{
21235 inputs: []inputInfo{
21236 {0, 4611686018695823358},
21237 },
21238 outputs: []outputInfo{
21239 {0, 167772158},
21240 },
21241 },
21242 },
21243 {
21244 name: "MOVWload",
21245 auxType: auxSymOff,
21246 argLen: 2,
21247 faultOnNilArg0: true,
21248 symEffect: SymRead,
21249 asm: mips.AMOVW,
21250 reg: regInfo{
21251 inputs: []inputInfo{
21252 {0, 4611686018695823358},
21253 },
21254 outputs: []outputInfo{
21255 {0, 167772158},
21256 },
21257 },
21258 },
21259 {
21260 name: "MOVWUload",
21261 auxType: auxSymOff,
21262 argLen: 2,
21263 faultOnNilArg0: true,
21264 symEffect: SymRead,
21265 asm: mips.AMOVWU,
21266 reg: regInfo{
21267 inputs: []inputInfo{
21268 {0, 4611686018695823358},
21269 },
21270 outputs: []outputInfo{
21271 {0, 167772158},
21272 },
21273 },
21274 },
21275 {
21276 name: "MOVVload",
21277 auxType: auxSymOff,
21278 argLen: 2,
21279 faultOnNilArg0: true,
21280 symEffect: SymRead,
21281 asm: mips.AMOVV,
21282 reg: regInfo{
21283 inputs: []inputInfo{
21284 {0, 4611686018695823358},
21285 },
21286 outputs: []outputInfo{
21287 {0, 167772158},
21288 },
21289 },
21290 },
21291 {
21292 name: "MOVFload",
21293 auxType: auxSymOff,
21294 argLen: 2,
21295 faultOnNilArg0: true,
21296 symEffect: SymRead,
21297 asm: mips.AMOVF,
21298 reg: regInfo{
21299 inputs: []inputInfo{
21300 {0, 4611686018695823358},
21301 },
21302 outputs: []outputInfo{
21303 {0, 1152921504338411520},
21304 },
21305 },
21306 },
21307 {
21308 name: "MOVDload",
21309 auxType: auxSymOff,
21310 argLen: 2,
21311 faultOnNilArg0: true,
21312 symEffect: SymRead,
21313 asm: mips.AMOVD,
21314 reg: regInfo{
21315 inputs: []inputInfo{
21316 {0, 4611686018695823358},
21317 },
21318 outputs: []outputInfo{
21319 {0, 1152921504338411520},
21320 },
21321 },
21322 },
21323 {
21324 name: "MOVBstore",
21325 auxType: auxSymOff,
21326 argLen: 3,
21327 faultOnNilArg0: true,
21328 symEffect: SymWrite,
21329 asm: mips.AMOVB,
21330 reg: regInfo{
21331 inputs: []inputInfo{
21332 {1, 234881022},
21333 {0, 4611686018695823358},
21334 },
21335 },
21336 },
21337 {
21338 name: "MOVHstore",
21339 auxType: auxSymOff,
21340 argLen: 3,
21341 faultOnNilArg0: true,
21342 symEffect: SymWrite,
21343 asm: mips.AMOVH,
21344 reg: regInfo{
21345 inputs: []inputInfo{
21346 {1, 234881022},
21347 {0, 4611686018695823358},
21348 },
21349 },
21350 },
21351 {
21352 name: "MOVWstore",
21353 auxType: auxSymOff,
21354 argLen: 3,
21355 faultOnNilArg0: true,
21356 symEffect: SymWrite,
21357 asm: mips.AMOVW,
21358 reg: regInfo{
21359 inputs: []inputInfo{
21360 {1, 234881022},
21361 {0, 4611686018695823358},
21362 },
21363 },
21364 },
21365 {
21366 name: "MOVVstore",
21367 auxType: auxSymOff,
21368 argLen: 3,
21369 faultOnNilArg0: true,
21370 symEffect: SymWrite,
21371 asm: mips.AMOVV,
21372 reg: regInfo{
21373 inputs: []inputInfo{
21374 {1, 234881022},
21375 {0, 4611686018695823358},
21376 },
21377 },
21378 },
21379 {
21380 name: "MOVFstore",
21381 auxType: auxSymOff,
21382 argLen: 3,
21383 faultOnNilArg0: true,
21384 symEffect: SymWrite,
21385 asm: mips.AMOVF,
21386 reg: regInfo{
21387 inputs: []inputInfo{
21388 {0, 4611686018695823358},
21389 {1, 1152921504338411520},
21390 },
21391 },
21392 },
21393 {
21394 name: "MOVDstore",
21395 auxType: auxSymOff,
21396 argLen: 3,
21397 faultOnNilArg0: true,
21398 symEffect: SymWrite,
21399 asm: mips.AMOVD,
21400 reg: regInfo{
21401 inputs: []inputInfo{
21402 {0, 4611686018695823358},
21403 {1, 1152921504338411520},
21404 },
21405 },
21406 },
21407 {
21408 name: "MOVBstorezero",
21409 auxType: auxSymOff,
21410 argLen: 2,
21411 faultOnNilArg0: true,
21412 symEffect: SymWrite,
21413 asm: mips.AMOVB,
21414 reg: regInfo{
21415 inputs: []inputInfo{
21416 {0, 4611686018695823358},
21417 },
21418 },
21419 },
21420 {
21421 name: "MOVHstorezero",
21422 auxType: auxSymOff,
21423 argLen: 2,
21424 faultOnNilArg0: true,
21425 symEffect: SymWrite,
21426 asm: mips.AMOVH,
21427 reg: regInfo{
21428 inputs: []inputInfo{
21429 {0, 4611686018695823358},
21430 },
21431 },
21432 },
21433 {
21434 name: "MOVWstorezero",
21435 auxType: auxSymOff,
21436 argLen: 2,
21437 faultOnNilArg0: true,
21438 symEffect: SymWrite,
21439 asm: mips.AMOVW,
21440 reg: regInfo{
21441 inputs: []inputInfo{
21442 {0, 4611686018695823358},
21443 },
21444 },
21445 },
21446 {
21447 name: "MOVVstorezero",
21448 auxType: auxSymOff,
21449 argLen: 2,
21450 faultOnNilArg0: true,
21451 symEffect: SymWrite,
21452 asm: mips.AMOVV,
21453 reg: regInfo{
21454 inputs: []inputInfo{
21455 {0, 4611686018695823358},
21456 },
21457 },
21458 },
21459 {
21460 name: "MOVBreg",
21461 argLen: 1,
21462 asm: mips.AMOVB,
21463 reg: regInfo{
21464 inputs: []inputInfo{
21465 {0, 234881022},
21466 },
21467 outputs: []outputInfo{
21468 {0, 167772158},
21469 },
21470 },
21471 },
21472 {
21473 name: "MOVBUreg",
21474 argLen: 1,
21475 asm: mips.AMOVBU,
21476 reg: regInfo{
21477 inputs: []inputInfo{
21478 {0, 234881022},
21479 },
21480 outputs: []outputInfo{
21481 {0, 167772158},
21482 },
21483 },
21484 },
21485 {
21486 name: "MOVHreg",
21487 argLen: 1,
21488 asm: mips.AMOVH,
21489 reg: regInfo{
21490 inputs: []inputInfo{
21491 {0, 234881022},
21492 },
21493 outputs: []outputInfo{
21494 {0, 167772158},
21495 },
21496 },
21497 },
21498 {
21499 name: "MOVHUreg",
21500 argLen: 1,
21501 asm: mips.AMOVHU,
21502 reg: regInfo{
21503 inputs: []inputInfo{
21504 {0, 234881022},
21505 },
21506 outputs: []outputInfo{
21507 {0, 167772158},
21508 },
21509 },
21510 },
21511 {
21512 name: "MOVWreg",
21513 argLen: 1,
21514 asm: mips.AMOVW,
21515 reg: regInfo{
21516 inputs: []inputInfo{
21517 {0, 234881022},
21518 },
21519 outputs: []outputInfo{
21520 {0, 167772158},
21521 },
21522 },
21523 },
21524 {
21525 name: "MOVWUreg",
21526 argLen: 1,
21527 asm: mips.AMOVWU,
21528 reg: regInfo{
21529 inputs: []inputInfo{
21530 {0, 234881022},
21531 },
21532 outputs: []outputInfo{
21533 {0, 167772158},
21534 },
21535 },
21536 },
21537 {
21538 name: "MOVVreg",
21539 argLen: 1,
21540 asm: mips.AMOVV,
21541 reg: regInfo{
21542 inputs: []inputInfo{
21543 {0, 234881022},
21544 },
21545 outputs: []outputInfo{
21546 {0, 167772158},
21547 },
21548 },
21549 },
21550 {
21551 name: "MOVVnop",
21552 argLen: 1,
21553 resultInArg0: true,
21554 reg: regInfo{
21555 inputs: []inputInfo{
21556 {0, 167772158},
21557 },
21558 outputs: []outputInfo{
21559 {0, 167772158},
21560 },
21561 },
21562 },
21563 {
21564 name: "MOVWF",
21565 argLen: 1,
21566 asm: mips.AMOVWF,
21567 reg: regInfo{
21568 inputs: []inputInfo{
21569 {0, 1152921504338411520},
21570 },
21571 outputs: []outputInfo{
21572 {0, 1152921504338411520},
21573 },
21574 },
21575 },
21576 {
21577 name: "MOVWD",
21578 argLen: 1,
21579 asm: mips.AMOVWD,
21580 reg: regInfo{
21581 inputs: []inputInfo{
21582 {0, 1152921504338411520},
21583 },
21584 outputs: []outputInfo{
21585 {0, 1152921504338411520},
21586 },
21587 },
21588 },
21589 {
21590 name: "MOVVF",
21591 argLen: 1,
21592 asm: mips.AMOVVF,
21593 reg: regInfo{
21594 inputs: []inputInfo{
21595 {0, 1152921504338411520},
21596 },
21597 outputs: []outputInfo{
21598 {0, 1152921504338411520},
21599 },
21600 },
21601 },
21602 {
21603 name: "MOVVD",
21604 argLen: 1,
21605 asm: mips.AMOVVD,
21606 reg: regInfo{
21607 inputs: []inputInfo{
21608 {0, 1152921504338411520},
21609 },
21610 outputs: []outputInfo{
21611 {0, 1152921504338411520},
21612 },
21613 },
21614 },
21615 {
21616 name: "TRUNCFW",
21617 argLen: 1,
21618 asm: mips.ATRUNCFW,
21619 reg: regInfo{
21620 inputs: []inputInfo{
21621 {0, 1152921504338411520},
21622 },
21623 outputs: []outputInfo{
21624 {0, 1152921504338411520},
21625 },
21626 },
21627 },
21628 {
21629 name: "TRUNCDW",
21630 argLen: 1,
21631 asm: mips.ATRUNCDW,
21632 reg: regInfo{
21633 inputs: []inputInfo{
21634 {0, 1152921504338411520},
21635 },
21636 outputs: []outputInfo{
21637 {0, 1152921504338411520},
21638 },
21639 },
21640 },
21641 {
21642 name: "TRUNCFV",
21643 argLen: 1,
21644 asm: mips.ATRUNCFV,
21645 reg: regInfo{
21646 inputs: []inputInfo{
21647 {0, 1152921504338411520},
21648 },
21649 outputs: []outputInfo{
21650 {0, 1152921504338411520},
21651 },
21652 },
21653 },
21654 {
21655 name: "TRUNCDV",
21656 argLen: 1,
21657 asm: mips.ATRUNCDV,
21658 reg: regInfo{
21659 inputs: []inputInfo{
21660 {0, 1152921504338411520},
21661 },
21662 outputs: []outputInfo{
21663 {0, 1152921504338411520},
21664 },
21665 },
21666 },
21667 {
21668 name: "MOVFD",
21669 argLen: 1,
21670 asm: mips.AMOVFD,
21671 reg: regInfo{
21672 inputs: []inputInfo{
21673 {0, 1152921504338411520},
21674 },
21675 outputs: []outputInfo{
21676 {0, 1152921504338411520},
21677 },
21678 },
21679 },
21680 {
21681 name: "MOVDF",
21682 argLen: 1,
21683 asm: mips.AMOVDF,
21684 reg: regInfo{
21685 inputs: []inputInfo{
21686 {0, 1152921504338411520},
21687 },
21688 outputs: []outputInfo{
21689 {0, 1152921504338411520},
21690 },
21691 },
21692 },
21693 {
21694 name: "CALLstatic",
21695 auxType: auxSymOff,
21696 argLen: 1,
21697 clobberFlags: true,
21698 call: true,
21699 symEffect: SymNone,
21700 reg: regInfo{
21701 clobbers: 4611686018393833470,
21702 },
21703 },
21704 {
21705 name: "CALLclosure",
21706 auxType: auxInt64,
21707 argLen: 3,
21708 clobberFlags: true,
21709 call: true,
21710 reg: regInfo{
21711 inputs: []inputInfo{
21712 {1, 4194304},
21713 {0, 201326590},
21714 },
21715 clobbers: 4611686018393833470,
21716 },
21717 },
21718 {
21719 name: "CALLinter",
21720 auxType: auxInt64,
21721 argLen: 2,
21722 clobberFlags: true,
21723 call: true,
21724 reg: regInfo{
21725 inputs: []inputInfo{
21726 {0, 167772158},
21727 },
21728 clobbers: 4611686018393833470,
21729 },
21730 },
21731 {
21732 name: "DUFFZERO",
21733 auxType: auxInt64,
21734 argLen: 2,
21735 faultOnNilArg0: true,
21736 reg: regInfo{
21737 inputs: []inputInfo{
21738 {0, 167772158},
21739 },
21740 clobbers: 134217730,
21741 },
21742 },
21743 {
21744 name: "LoweredZero",
21745 auxType: auxInt64,
21746 argLen: 3,
21747 clobberFlags: true,
21748 faultOnNilArg0: true,
21749 reg: regInfo{
21750 inputs: []inputInfo{
21751 {0, 2},
21752 {1, 167772158},
21753 },
21754 clobbers: 2,
21755 },
21756 },
21757 {
21758 name: "LoweredMove",
21759 auxType: auxInt64,
21760 argLen: 4,
21761 clobberFlags: true,
21762 faultOnNilArg0: true,
21763 faultOnNilArg1: true,
21764 reg: regInfo{
21765 inputs: []inputInfo{
21766 {0, 4},
21767 {1, 2},
21768 {2, 167772158},
21769 },
21770 clobbers: 6,
21771 },
21772 },
21773 {
21774 name: "LoweredAtomicLoad8",
21775 argLen: 2,
21776 faultOnNilArg0: true,
21777 reg: regInfo{
21778 inputs: []inputInfo{
21779 {0, 4611686018695823358},
21780 },
21781 outputs: []outputInfo{
21782 {0, 167772158},
21783 },
21784 },
21785 },
21786 {
21787 name: "LoweredAtomicLoad32",
21788 argLen: 2,
21789 faultOnNilArg0: true,
21790 reg: regInfo{
21791 inputs: []inputInfo{
21792 {0, 4611686018695823358},
21793 },
21794 outputs: []outputInfo{
21795 {0, 167772158},
21796 },
21797 },
21798 },
21799 {
21800 name: "LoweredAtomicLoad64",
21801 argLen: 2,
21802 faultOnNilArg0: true,
21803 reg: regInfo{
21804 inputs: []inputInfo{
21805 {0, 4611686018695823358},
21806 },
21807 outputs: []outputInfo{
21808 {0, 167772158},
21809 },
21810 },
21811 },
21812 {
21813 name: "LoweredAtomicStore32",
21814 argLen: 3,
21815 faultOnNilArg0: true,
21816 hasSideEffects: true,
21817 reg: regInfo{
21818 inputs: []inputInfo{
21819 {1, 234881022},
21820 {0, 4611686018695823358},
21821 },
21822 },
21823 },
21824 {
21825 name: "LoweredAtomicStore64",
21826 argLen: 3,
21827 faultOnNilArg0: true,
21828 hasSideEffects: true,
21829 reg: regInfo{
21830 inputs: []inputInfo{
21831 {1, 234881022},
21832 {0, 4611686018695823358},
21833 },
21834 },
21835 },
21836 {
21837 name: "LoweredAtomicStorezero32",
21838 argLen: 2,
21839 faultOnNilArg0: true,
21840 hasSideEffects: true,
21841 reg: regInfo{
21842 inputs: []inputInfo{
21843 {0, 4611686018695823358},
21844 },
21845 },
21846 },
21847 {
21848 name: "LoweredAtomicStorezero64",
21849 argLen: 2,
21850 faultOnNilArg0: true,
21851 hasSideEffects: true,
21852 reg: regInfo{
21853 inputs: []inputInfo{
21854 {0, 4611686018695823358},
21855 },
21856 },
21857 },
21858 {
21859 name: "LoweredAtomicExchange32",
21860 argLen: 3,
21861 resultNotInArgs: true,
21862 faultOnNilArg0: true,
21863 hasSideEffects: true,
21864 reg: regInfo{
21865 inputs: []inputInfo{
21866 {1, 234881022},
21867 {0, 4611686018695823358},
21868 },
21869 outputs: []outputInfo{
21870 {0, 167772158},
21871 },
21872 },
21873 },
21874 {
21875 name: "LoweredAtomicExchange64",
21876 argLen: 3,
21877 resultNotInArgs: true,
21878 faultOnNilArg0: true,
21879 hasSideEffects: true,
21880 reg: regInfo{
21881 inputs: []inputInfo{
21882 {1, 234881022},
21883 {0, 4611686018695823358},
21884 },
21885 outputs: []outputInfo{
21886 {0, 167772158},
21887 },
21888 },
21889 },
21890 {
21891 name: "LoweredAtomicAdd32",
21892 argLen: 3,
21893 resultNotInArgs: true,
21894 faultOnNilArg0: true,
21895 hasSideEffects: true,
21896 reg: regInfo{
21897 inputs: []inputInfo{
21898 {1, 234881022},
21899 {0, 4611686018695823358},
21900 },
21901 outputs: []outputInfo{
21902 {0, 167772158},
21903 },
21904 },
21905 },
21906 {
21907 name: "LoweredAtomicAdd64",
21908 argLen: 3,
21909 resultNotInArgs: true,
21910 faultOnNilArg0: true,
21911 hasSideEffects: true,
21912 reg: regInfo{
21913 inputs: []inputInfo{
21914 {1, 234881022},
21915 {0, 4611686018695823358},
21916 },
21917 outputs: []outputInfo{
21918 {0, 167772158},
21919 },
21920 },
21921 },
21922 {
21923 name: "LoweredAtomicAddconst32",
21924 auxType: auxInt32,
21925 argLen: 2,
21926 resultNotInArgs: true,
21927 faultOnNilArg0: true,
21928 hasSideEffects: true,
21929 reg: regInfo{
21930 inputs: []inputInfo{
21931 {0, 4611686018695823358},
21932 },
21933 outputs: []outputInfo{
21934 {0, 167772158},
21935 },
21936 },
21937 },
21938 {
21939 name: "LoweredAtomicAddconst64",
21940 auxType: auxInt64,
21941 argLen: 2,
21942 resultNotInArgs: true,
21943 faultOnNilArg0: true,
21944 hasSideEffects: true,
21945 reg: regInfo{
21946 inputs: []inputInfo{
21947 {0, 4611686018695823358},
21948 },
21949 outputs: []outputInfo{
21950 {0, 167772158},
21951 },
21952 },
21953 },
21954 {
21955 name: "LoweredAtomicCas32",
21956 argLen: 4,
21957 resultNotInArgs: true,
21958 faultOnNilArg0: true,
21959 hasSideEffects: true,
21960 reg: regInfo{
21961 inputs: []inputInfo{
21962 {1, 234881022},
21963 {2, 234881022},
21964 {0, 4611686018695823358},
21965 },
21966 outputs: []outputInfo{
21967 {0, 167772158},
21968 },
21969 },
21970 },
21971 {
21972 name: "LoweredAtomicCas64",
21973 argLen: 4,
21974 resultNotInArgs: true,
21975 faultOnNilArg0: true,
21976 hasSideEffects: true,
21977 reg: regInfo{
21978 inputs: []inputInfo{
21979 {1, 234881022},
21980 {2, 234881022},
21981 {0, 4611686018695823358},
21982 },
21983 outputs: []outputInfo{
21984 {0, 167772158},
21985 },
21986 },
21987 },
21988 {
21989 name: "LoweredNilCheck",
21990 argLen: 2,
21991 nilCheck: true,
21992 faultOnNilArg0: true,
21993 reg: regInfo{
21994 inputs: []inputInfo{
21995 {0, 234881022},
21996 },
21997 },
21998 },
21999 {
22000 name: "FPFlagTrue",
22001 argLen: 1,
22002 reg: regInfo{
22003 outputs: []outputInfo{
22004 {0, 167772158},
22005 },
22006 },
22007 },
22008 {
22009 name: "FPFlagFalse",
22010 argLen: 1,
22011 reg: regInfo{
22012 outputs: []outputInfo{
22013 {0, 167772158},
22014 },
22015 },
22016 },
22017 {
22018 name: "LoweredGetClosurePtr",
22019 argLen: 0,
22020 zeroWidth: true,
22021 reg: regInfo{
22022 outputs: []outputInfo{
22023 {0, 4194304},
22024 },
22025 },
22026 },
22027 {
22028 name: "LoweredGetCallerSP",
22029 argLen: 0,
22030 rematerializeable: true,
22031 reg: regInfo{
22032 outputs: []outputInfo{
22033 {0, 167772158},
22034 },
22035 },
22036 },
22037 {
22038 name: "LoweredGetCallerPC",
22039 argLen: 0,
22040 rematerializeable: true,
22041 reg: regInfo{
22042 outputs: []outputInfo{
22043 {0, 167772158},
22044 },
22045 },
22046 },
22047 {
22048 name: "LoweredWB",
22049 auxType: auxSym,
22050 argLen: 3,
22051 clobberFlags: true,
22052 symEffect: SymNone,
22053 reg: regInfo{
22054 inputs: []inputInfo{
22055 {0, 1048576},
22056 {1, 2097152},
22057 },
22058 clobbers: 4611686018293170176,
22059 },
22060 },
22061 {
22062 name: "LoweredPanicBoundsA",
22063 auxType: auxInt64,
22064 argLen: 3,
22065 reg: regInfo{
22066 inputs: []inputInfo{
22067 {0, 8},
22068 {1, 16},
22069 },
22070 },
22071 },
22072 {
22073 name: "LoweredPanicBoundsB",
22074 auxType: auxInt64,
22075 argLen: 3,
22076 reg: regInfo{
22077 inputs: []inputInfo{
22078 {0, 4},
22079 {1, 8},
22080 },
22081 },
22082 },
22083 {
22084 name: "LoweredPanicBoundsC",
22085 auxType: auxInt64,
22086 argLen: 3,
22087 reg: regInfo{
22088 inputs: []inputInfo{
22089 {0, 2},
22090 {1, 4},
22091 },
22092 },
22093 },
22094
22095 {
22096 name: "ADD",
22097 argLen: 2,
22098 commutative: true,
22099 asm: ppc64.AADD,
22100 reg: regInfo{
22101 inputs: []inputInfo{
22102 {0, 1073733630},
22103 {1, 1073733630},
22104 },
22105 outputs: []outputInfo{
22106 {0, 1073733624},
22107 },
22108 },
22109 },
22110 {
22111 name: "ADDconst",
22112 auxType: auxInt64,
22113 argLen: 1,
22114 asm: ppc64.AADD,
22115 reg: regInfo{
22116 inputs: []inputInfo{
22117 {0, 1073733630},
22118 },
22119 outputs: []outputInfo{
22120 {0, 1073733624},
22121 },
22122 },
22123 },
22124 {
22125 name: "FADD",
22126 argLen: 2,
22127 commutative: true,
22128 asm: ppc64.AFADD,
22129 reg: regInfo{
22130 inputs: []inputInfo{
22131 {0, 576460743713488896},
22132 {1, 576460743713488896},
22133 },
22134 outputs: []outputInfo{
22135 {0, 576460743713488896},
22136 },
22137 },
22138 },
22139 {
22140 name: "FADDS",
22141 argLen: 2,
22142 commutative: true,
22143 asm: ppc64.AFADDS,
22144 reg: regInfo{
22145 inputs: []inputInfo{
22146 {0, 576460743713488896},
22147 {1, 576460743713488896},
22148 },
22149 outputs: []outputInfo{
22150 {0, 576460743713488896},
22151 },
22152 },
22153 },
22154 {
22155 name: "SUB",
22156 argLen: 2,
22157 asm: ppc64.ASUB,
22158 reg: regInfo{
22159 inputs: []inputInfo{
22160 {0, 1073733630},
22161 {1, 1073733630},
22162 },
22163 outputs: []outputInfo{
22164 {0, 1073733624},
22165 },
22166 },
22167 },
22168 {
22169 name: "FSUB",
22170 argLen: 2,
22171 asm: ppc64.AFSUB,
22172 reg: regInfo{
22173 inputs: []inputInfo{
22174 {0, 576460743713488896},
22175 {1, 576460743713488896},
22176 },
22177 outputs: []outputInfo{
22178 {0, 576460743713488896},
22179 },
22180 },
22181 },
22182 {
22183 name: "FSUBS",
22184 argLen: 2,
22185 asm: ppc64.AFSUBS,
22186 reg: regInfo{
22187 inputs: []inputInfo{
22188 {0, 576460743713488896},
22189 {1, 576460743713488896},
22190 },
22191 outputs: []outputInfo{
22192 {0, 576460743713488896},
22193 },
22194 },
22195 },
22196 {
22197 name: "MULLD",
22198 argLen: 2,
22199 commutative: true,
22200 asm: ppc64.AMULLD,
22201 reg: regInfo{
22202 inputs: []inputInfo{
22203 {0, 1073733630},
22204 {1, 1073733630},
22205 },
22206 outputs: []outputInfo{
22207 {0, 1073733624},
22208 },
22209 },
22210 },
22211 {
22212 name: "MULLW",
22213 argLen: 2,
22214 commutative: true,
22215 asm: ppc64.AMULLW,
22216 reg: regInfo{
22217 inputs: []inputInfo{
22218 {0, 1073733630},
22219 {1, 1073733630},
22220 },
22221 outputs: []outputInfo{
22222 {0, 1073733624},
22223 },
22224 },
22225 },
22226 {
22227 name: "MULHD",
22228 argLen: 2,
22229 commutative: true,
22230 asm: ppc64.AMULHD,
22231 reg: regInfo{
22232 inputs: []inputInfo{
22233 {0, 1073733630},
22234 {1, 1073733630},
22235 },
22236 outputs: []outputInfo{
22237 {0, 1073733624},
22238 },
22239 },
22240 },
22241 {
22242 name: "MULHW",
22243 argLen: 2,
22244 commutative: true,
22245 asm: ppc64.AMULHW,
22246 reg: regInfo{
22247 inputs: []inputInfo{
22248 {0, 1073733630},
22249 {1, 1073733630},
22250 },
22251 outputs: []outputInfo{
22252 {0, 1073733624},
22253 },
22254 },
22255 },
22256 {
22257 name: "MULHDU",
22258 argLen: 2,
22259 commutative: true,
22260 asm: ppc64.AMULHDU,
22261 reg: regInfo{
22262 inputs: []inputInfo{
22263 {0, 1073733630},
22264 {1, 1073733630},
22265 },
22266 outputs: []outputInfo{
22267 {0, 1073733624},
22268 },
22269 },
22270 },
22271 {
22272 name: "MULHWU",
22273 argLen: 2,
22274 commutative: true,
22275 asm: ppc64.AMULHWU,
22276 reg: regInfo{
22277 inputs: []inputInfo{
22278 {0, 1073733630},
22279 {1, 1073733630},
22280 },
22281 outputs: []outputInfo{
22282 {0, 1073733624},
22283 },
22284 },
22285 },
22286 {
22287 name: "LoweredMuluhilo",
22288 argLen: 2,
22289 resultNotInArgs: true,
22290 reg: regInfo{
22291 inputs: []inputInfo{
22292 {0, 1073733630},
22293 {1, 1073733630},
22294 },
22295 outputs: []outputInfo{
22296 {0, 1073733624},
22297 {1, 1073733624},
22298 },
22299 },
22300 },
22301 {
22302 name: "FMUL",
22303 argLen: 2,
22304 commutative: true,
22305 asm: ppc64.AFMUL,
22306 reg: regInfo{
22307 inputs: []inputInfo{
22308 {0, 576460743713488896},
22309 {1, 576460743713488896},
22310 },
22311 outputs: []outputInfo{
22312 {0, 576460743713488896},
22313 },
22314 },
22315 },
22316 {
22317 name: "FMULS",
22318 argLen: 2,
22319 commutative: true,
22320 asm: ppc64.AFMULS,
22321 reg: regInfo{
22322 inputs: []inputInfo{
22323 {0, 576460743713488896},
22324 {1, 576460743713488896},
22325 },
22326 outputs: []outputInfo{
22327 {0, 576460743713488896},
22328 },
22329 },
22330 },
22331 {
22332 name: "FMADD",
22333 argLen: 3,
22334 asm: ppc64.AFMADD,
22335 reg: regInfo{
22336 inputs: []inputInfo{
22337 {0, 576460743713488896},
22338 {1, 576460743713488896},
22339 {2, 576460743713488896},
22340 },
22341 outputs: []outputInfo{
22342 {0, 576460743713488896},
22343 },
22344 },
22345 },
22346 {
22347 name: "FMADDS",
22348 argLen: 3,
22349 asm: ppc64.AFMADDS,
22350 reg: regInfo{
22351 inputs: []inputInfo{
22352 {0, 576460743713488896},
22353 {1, 576460743713488896},
22354 {2, 576460743713488896},
22355 },
22356 outputs: []outputInfo{
22357 {0, 576460743713488896},
22358 },
22359 },
22360 },
22361 {
22362 name: "FMSUB",
22363 argLen: 3,
22364 asm: ppc64.AFMSUB,
22365 reg: regInfo{
22366 inputs: []inputInfo{
22367 {0, 576460743713488896},
22368 {1, 576460743713488896},
22369 {2, 576460743713488896},
22370 },
22371 outputs: []outputInfo{
22372 {0, 576460743713488896},
22373 },
22374 },
22375 },
22376 {
22377 name: "FMSUBS",
22378 argLen: 3,
22379 asm: ppc64.AFMSUBS,
22380 reg: regInfo{
22381 inputs: []inputInfo{
22382 {0, 576460743713488896},
22383 {1, 576460743713488896},
22384 {2, 576460743713488896},
22385 },
22386 outputs: []outputInfo{
22387 {0, 576460743713488896},
22388 },
22389 },
22390 },
22391 {
22392 name: "SRAD",
22393 argLen: 2,
22394 asm: ppc64.ASRAD,
22395 reg: regInfo{
22396 inputs: []inputInfo{
22397 {0, 1073733630},
22398 {1, 1073733630},
22399 },
22400 outputs: []outputInfo{
22401 {0, 1073733624},
22402 },
22403 },
22404 },
22405 {
22406 name: "SRAW",
22407 argLen: 2,
22408 asm: ppc64.ASRAW,
22409 reg: regInfo{
22410 inputs: []inputInfo{
22411 {0, 1073733630},
22412 {1, 1073733630},
22413 },
22414 outputs: []outputInfo{
22415 {0, 1073733624},
22416 },
22417 },
22418 },
22419 {
22420 name: "SRD",
22421 argLen: 2,
22422 asm: ppc64.ASRD,
22423 reg: regInfo{
22424 inputs: []inputInfo{
22425 {0, 1073733630},
22426 {1, 1073733630},
22427 },
22428 outputs: []outputInfo{
22429 {0, 1073733624},
22430 },
22431 },
22432 },
22433 {
22434 name: "SRW",
22435 argLen: 2,
22436 asm: ppc64.ASRW,
22437 reg: regInfo{
22438 inputs: []inputInfo{
22439 {0, 1073733630},
22440 {1, 1073733630},
22441 },
22442 outputs: []outputInfo{
22443 {0, 1073733624},
22444 },
22445 },
22446 },
22447 {
22448 name: "SLD",
22449 argLen: 2,
22450 asm: ppc64.ASLD,
22451 reg: regInfo{
22452 inputs: []inputInfo{
22453 {0, 1073733630},
22454 {1, 1073733630},
22455 },
22456 outputs: []outputInfo{
22457 {0, 1073733624},
22458 },
22459 },
22460 },
22461 {
22462 name: "SLW",
22463 argLen: 2,
22464 asm: ppc64.ASLW,
22465 reg: regInfo{
22466 inputs: []inputInfo{
22467 {0, 1073733630},
22468 {1, 1073733630},
22469 },
22470 outputs: []outputInfo{
22471 {0, 1073733624},
22472 },
22473 },
22474 },
22475 {
22476 name: "ROTL",
22477 argLen: 2,
22478 asm: ppc64.AROTL,
22479 reg: regInfo{
22480 inputs: []inputInfo{
22481 {0, 1073733630},
22482 {1, 1073733630},
22483 },
22484 outputs: []outputInfo{
22485 {0, 1073733624},
22486 },
22487 },
22488 },
22489 {
22490 name: "ROTLW",
22491 argLen: 2,
22492 asm: ppc64.AROTLW,
22493 reg: regInfo{
22494 inputs: []inputInfo{
22495 {0, 1073733630},
22496 {1, 1073733630},
22497 },
22498 outputs: []outputInfo{
22499 {0, 1073733624},
22500 },
22501 },
22502 },
22503 {
22504 name: "LoweredAdd64Carry",
22505 argLen: 3,
22506 resultNotInArgs: true,
22507 reg: regInfo{
22508 inputs: []inputInfo{
22509 {0, 1073733630},
22510 {1, 1073733630},
22511 {2, 1073733630},
22512 },
22513 outputs: []outputInfo{
22514 {0, 1073733624},
22515 {1, 1073733624},
22516 },
22517 },
22518 },
22519 {
22520 name: "ADDconstForCarry",
22521 auxType: auxInt16,
22522 argLen: 1,
22523 asm: ppc64.AADDC,
22524 reg: regInfo{
22525 inputs: []inputInfo{
22526 {0, 1073733630},
22527 },
22528 clobbers: 2147483648,
22529 },
22530 },
22531 {
22532 name: "MaskIfNotCarry",
22533 argLen: 1,
22534 asm: ppc64.AADDME,
22535 reg: regInfo{
22536 outputs: []outputInfo{
22537 {0, 1073733624},
22538 },
22539 },
22540 },
22541 {
22542 name: "SRADconst",
22543 auxType: auxInt64,
22544 argLen: 1,
22545 asm: ppc64.ASRAD,
22546 reg: regInfo{
22547 inputs: []inputInfo{
22548 {0, 1073733630},
22549 },
22550 outputs: []outputInfo{
22551 {0, 1073733624},
22552 },
22553 },
22554 },
22555 {
22556 name: "SRAWconst",
22557 auxType: auxInt64,
22558 argLen: 1,
22559 asm: ppc64.ASRAW,
22560 reg: regInfo{
22561 inputs: []inputInfo{
22562 {0, 1073733630},
22563 },
22564 outputs: []outputInfo{
22565 {0, 1073733624},
22566 },
22567 },
22568 },
22569 {
22570 name: "SRDconst",
22571 auxType: auxInt64,
22572 argLen: 1,
22573 asm: ppc64.ASRD,
22574 reg: regInfo{
22575 inputs: []inputInfo{
22576 {0, 1073733630},
22577 },
22578 outputs: []outputInfo{
22579 {0, 1073733624},
22580 },
22581 },
22582 },
22583 {
22584 name: "SRWconst",
22585 auxType: auxInt64,
22586 argLen: 1,
22587 asm: ppc64.ASRW,
22588 reg: regInfo{
22589 inputs: []inputInfo{
22590 {0, 1073733630},
22591 },
22592 outputs: []outputInfo{
22593 {0, 1073733624},
22594 },
22595 },
22596 },
22597 {
22598 name: "SLDconst",
22599 auxType: auxInt64,
22600 argLen: 1,
22601 asm: ppc64.ASLD,
22602 reg: regInfo{
22603 inputs: []inputInfo{
22604 {0, 1073733630},
22605 },
22606 outputs: []outputInfo{
22607 {0, 1073733624},
22608 },
22609 },
22610 },
22611 {
22612 name: "SLWconst",
22613 auxType: auxInt64,
22614 argLen: 1,
22615 asm: ppc64.ASLW,
22616 reg: regInfo{
22617 inputs: []inputInfo{
22618 {0, 1073733630},
22619 },
22620 outputs: []outputInfo{
22621 {0, 1073733624},
22622 },
22623 },
22624 },
22625 {
22626 name: "ROTLconst",
22627 auxType: auxInt64,
22628 argLen: 1,
22629 asm: ppc64.AROTL,
22630 reg: regInfo{
22631 inputs: []inputInfo{
22632 {0, 1073733630},
22633 },
22634 outputs: []outputInfo{
22635 {0, 1073733624},
22636 },
22637 },
22638 },
22639 {
22640 name: "ROTLWconst",
22641 auxType: auxInt64,
22642 argLen: 1,
22643 asm: ppc64.AROTLW,
22644 reg: regInfo{
22645 inputs: []inputInfo{
22646 {0, 1073733630},
22647 },
22648 outputs: []outputInfo{
22649 {0, 1073733624},
22650 },
22651 },
22652 },
22653 {
22654 name: "CNTLZD",
22655 argLen: 1,
22656 clobberFlags: true,
22657 asm: ppc64.ACNTLZD,
22658 reg: regInfo{
22659 inputs: []inputInfo{
22660 {0, 1073733630},
22661 },
22662 outputs: []outputInfo{
22663 {0, 1073733624},
22664 },
22665 },
22666 },
22667 {
22668 name: "CNTLZW",
22669 argLen: 1,
22670 clobberFlags: true,
22671 asm: ppc64.ACNTLZW,
22672 reg: regInfo{
22673 inputs: []inputInfo{
22674 {0, 1073733630},
22675 },
22676 outputs: []outputInfo{
22677 {0, 1073733624},
22678 },
22679 },
22680 },
22681 {
22682 name: "CNTTZD",
22683 argLen: 1,
22684 asm: ppc64.ACNTTZD,
22685 reg: regInfo{
22686 inputs: []inputInfo{
22687 {0, 1073733630},
22688 },
22689 outputs: []outputInfo{
22690 {0, 1073733624},
22691 },
22692 },
22693 },
22694 {
22695 name: "CNTTZW",
22696 argLen: 1,
22697 asm: ppc64.ACNTTZW,
22698 reg: regInfo{
22699 inputs: []inputInfo{
22700 {0, 1073733630},
22701 },
22702 outputs: []outputInfo{
22703 {0, 1073733624},
22704 },
22705 },
22706 },
22707 {
22708 name: "POPCNTD",
22709 argLen: 1,
22710 asm: ppc64.APOPCNTD,
22711 reg: regInfo{
22712 inputs: []inputInfo{
22713 {0, 1073733630},
22714 },
22715 outputs: []outputInfo{
22716 {0, 1073733624},
22717 },
22718 },
22719 },
22720 {
22721 name: "POPCNTW",
22722 argLen: 1,
22723 asm: ppc64.APOPCNTW,
22724 reg: regInfo{
22725 inputs: []inputInfo{
22726 {0, 1073733630},
22727 },
22728 outputs: []outputInfo{
22729 {0, 1073733624},
22730 },
22731 },
22732 },
22733 {
22734 name: "POPCNTB",
22735 argLen: 1,
22736 asm: ppc64.APOPCNTB,
22737 reg: regInfo{
22738 inputs: []inputInfo{
22739 {0, 1073733630},
22740 },
22741 outputs: []outputInfo{
22742 {0, 1073733624},
22743 },
22744 },
22745 },
22746 {
22747 name: "FDIV",
22748 argLen: 2,
22749 asm: ppc64.AFDIV,
22750 reg: regInfo{
22751 inputs: []inputInfo{
22752 {0, 576460743713488896},
22753 {1, 576460743713488896},
22754 },
22755 outputs: []outputInfo{
22756 {0, 576460743713488896},
22757 },
22758 },
22759 },
22760 {
22761 name: "FDIVS",
22762 argLen: 2,
22763 asm: ppc64.AFDIVS,
22764 reg: regInfo{
22765 inputs: []inputInfo{
22766 {0, 576460743713488896},
22767 {1, 576460743713488896},
22768 },
22769 outputs: []outputInfo{
22770 {0, 576460743713488896},
22771 },
22772 },
22773 },
22774 {
22775 name: "DIVD",
22776 argLen: 2,
22777 asm: ppc64.ADIVD,
22778 reg: regInfo{
22779 inputs: []inputInfo{
22780 {0, 1073733630},
22781 {1, 1073733630},
22782 },
22783 outputs: []outputInfo{
22784 {0, 1073733624},
22785 },
22786 },
22787 },
22788 {
22789 name: "DIVW",
22790 argLen: 2,
22791 asm: ppc64.ADIVW,
22792 reg: regInfo{
22793 inputs: []inputInfo{
22794 {0, 1073733630},
22795 {1, 1073733630},
22796 },
22797 outputs: []outputInfo{
22798 {0, 1073733624},
22799 },
22800 },
22801 },
22802 {
22803 name: "DIVDU",
22804 argLen: 2,
22805 asm: ppc64.ADIVDU,
22806 reg: regInfo{
22807 inputs: []inputInfo{
22808 {0, 1073733630},
22809 {1, 1073733630},
22810 },
22811 outputs: []outputInfo{
22812 {0, 1073733624},
22813 },
22814 },
22815 },
22816 {
22817 name: "DIVWU",
22818 argLen: 2,
22819 asm: ppc64.ADIVWU,
22820 reg: regInfo{
22821 inputs: []inputInfo{
22822 {0, 1073733630},
22823 {1, 1073733630},
22824 },
22825 outputs: []outputInfo{
22826 {0, 1073733624},
22827 },
22828 },
22829 },
22830 {
22831 name: "FCTIDZ",
22832 argLen: 1,
22833 asm: ppc64.AFCTIDZ,
22834 reg: regInfo{
22835 inputs: []inputInfo{
22836 {0, 576460743713488896},
22837 },
22838 outputs: []outputInfo{
22839 {0, 576460743713488896},
22840 },
22841 },
22842 },
22843 {
22844 name: "FCTIWZ",
22845 argLen: 1,
22846 asm: ppc64.AFCTIWZ,
22847 reg: regInfo{
22848 inputs: []inputInfo{
22849 {0, 576460743713488896},
22850 },
22851 outputs: []outputInfo{
22852 {0, 576460743713488896},
22853 },
22854 },
22855 },
22856 {
22857 name: "FCFID",
22858 argLen: 1,
22859 asm: ppc64.AFCFID,
22860 reg: regInfo{
22861 inputs: []inputInfo{
22862 {0, 576460743713488896},
22863 },
22864 outputs: []outputInfo{
22865 {0, 576460743713488896},
22866 },
22867 },
22868 },
22869 {
22870 name: "FCFIDS",
22871 argLen: 1,
22872 asm: ppc64.AFCFIDS,
22873 reg: regInfo{
22874 inputs: []inputInfo{
22875 {0, 576460743713488896},
22876 },
22877 outputs: []outputInfo{
22878 {0, 576460743713488896},
22879 },
22880 },
22881 },
22882 {
22883 name: "FRSP",
22884 argLen: 1,
22885 asm: ppc64.AFRSP,
22886 reg: regInfo{
22887 inputs: []inputInfo{
22888 {0, 576460743713488896},
22889 },
22890 outputs: []outputInfo{
22891 {0, 576460743713488896},
22892 },
22893 },
22894 },
22895 {
22896 name: "MFVSRD",
22897 argLen: 1,
22898 asm: ppc64.AMFVSRD,
22899 reg: regInfo{
22900 inputs: []inputInfo{
22901 {0, 576460743713488896},
22902 },
22903 outputs: []outputInfo{
22904 {0, 1073733624},
22905 },
22906 },
22907 },
22908 {
22909 name: "MTVSRD",
22910 argLen: 1,
22911 asm: ppc64.AMTVSRD,
22912 reg: regInfo{
22913 inputs: []inputInfo{
22914 {0, 1073733624},
22915 },
22916 outputs: []outputInfo{
22917 {0, 576460743713488896},
22918 },
22919 },
22920 },
22921 {
22922 name: "AND",
22923 argLen: 2,
22924 commutative: true,
22925 asm: ppc64.AAND,
22926 reg: regInfo{
22927 inputs: []inputInfo{
22928 {0, 1073733630},
22929 {1, 1073733630},
22930 },
22931 outputs: []outputInfo{
22932 {0, 1073733624},
22933 },
22934 },
22935 },
22936 {
22937 name: "ANDN",
22938 argLen: 2,
22939 asm: ppc64.AANDN,
22940 reg: regInfo{
22941 inputs: []inputInfo{
22942 {0, 1073733630},
22943 {1, 1073733630},
22944 },
22945 outputs: []outputInfo{
22946 {0, 1073733624},
22947 },
22948 },
22949 },
22950 {
22951 name: "ANDCC",
22952 argLen: 2,
22953 commutative: true,
22954 asm: ppc64.AANDCC,
22955 reg: regInfo{
22956 inputs: []inputInfo{
22957 {0, 1073733630},
22958 {1, 1073733630},
22959 },
22960 outputs: []outputInfo{
22961 {0, 1073733624},
22962 },
22963 },
22964 },
22965 {
22966 name: "OR",
22967 argLen: 2,
22968 commutative: true,
22969 asm: ppc64.AOR,
22970 reg: regInfo{
22971 inputs: []inputInfo{
22972 {0, 1073733630},
22973 {1, 1073733630},
22974 },
22975 outputs: []outputInfo{
22976 {0, 1073733624},
22977 },
22978 },
22979 },
22980 {
22981 name: "ORN",
22982 argLen: 2,
22983 asm: ppc64.AORN,
22984 reg: regInfo{
22985 inputs: []inputInfo{
22986 {0, 1073733630},
22987 {1, 1073733630},
22988 },
22989 outputs: []outputInfo{
22990 {0, 1073733624},
22991 },
22992 },
22993 },
22994 {
22995 name: "ORCC",
22996 argLen: 2,
22997 commutative: true,
22998 asm: ppc64.AORCC,
22999 reg: regInfo{
23000 inputs: []inputInfo{
23001 {0, 1073733630},
23002 {1, 1073733630},
23003 },
23004 outputs: []outputInfo{
23005 {0, 1073733624},
23006 },
23007 },
23008 },
23009 {
23010 name: "NOR",
23011 argLen: 2,
23012 commutative: true,
23013 asm: ppc64.ANOR,
23014 reg: regInfo{
23015 inputs: []inputInfo{
23016 {0, 1073733630},
23017 {1, 1073733630},
23018 },
23019 outputs: []outputInfo{
23020 {0, 1073733624},
23021 },
23022 },
23023 },
23024 {
23025 name: "XOR",
23026 argLen: 2,
23027 commutative: true,
23028 asm: ppc64.AXOR,
23029 reg: regInfo{
23030 inputs: []inputInfo{
23031 {0, 1073733630},
23032 {1, 1073733630},
23033 },
23034 outputs: []outputInfo{
23035 {0, 1073733624},
23036 },
23037 },
23038 },
23039 {
23040 name: "XORCC",
23041 argLen: 2,
23042 commutative: true,
23043 asm: ppc64.AXORCC,
23044 reg: regInfo{
23045 inputs: []inputInfo{
23046 {0, 1073733630},
23047 {1, 1073733630},
23048 },
23049 outputs: []outputInfo{
23050 {0, 1073733624},
23051 },
23052 },
23053 },
23054 {
23055 name: "EQV",
23056 argLen: 2,
23057 commutative: true,
23058 asm: ppc64.AEQV,
23059 reg: regInfo{
23060 inputs: []inputInfo{
23061 {0, 1073733630},
23062 {1, 1073733630},
23063 },
23064 outputs: []outputInfo{
23065 {0, 1073733624},
23066 },
23067 },
23068 },
23069 {
23070 name: "NEG",
23071 argLen: 1,
23072 asm: ppc64.ANEG,
23073 reg: regInfo{
23074 inputs: []inputInfo{
23075 {0, 1073733630},
23076 },
23077 outputs: []outputInfo{
23078 {0, 1073733624},
23079 },
23080 },
23081 },
23082 {
23083 name: "FNEG",
23084 argLen: 1,
23085 asm: ppc64.AFNEG,
23086 reg: regInfo{
23087 inputs: []inputInfo{
23088 {0, 576460743713488896},
23089 },
23090 outputs: []outputInfo{
23091 {0, 576460743713488896},
23092 },
23093 },
23094 },
23095 {
23096 name: "FSQRT",
23097 argLen: 1,
23098 asm: ppc64.AFSQRT,
23099 reg: regInfo{
23100 inputs: []inputInfo{
23101 {0, 576460743713488896},
23102 },
23103 outputs: []outputInfo{
23104 {0, 576460743713488896},
23105 },
23106 },
23107 },
23108 {
23109 name: "FSQRTS",
23110 argLen: 1,
23111 asm: ppc64.AFSQRTS,
23112 reg: regInfo{
23113 inputs: []inputInfo{
23114 {0, 576460743713488896},
23115 },
23116 outputs: []outputInfo{
23117 {0, 576460743713488896},
23118 },
23119 },
23120 },
23121 {
23122 name: "FFLOOR",
23123 argLen: 1,
23124 asm: ppc64.AFRIM,
23125 reg: regInfo{
23126 inputs: []inputInfo{
23127 {0, 576460743713488896},
23128 },
23129 outputs: []outputInfo{
23130 {0, 576460743713488896},
23131 },
23132 },
23133 },
23134 {
23135 name: "FCEIL",
23136 argLen: 1,
23137 asm: ppc64.AFRIP,
23138 reg: regInfo{
23139 inputs: []inputInfo{
23140 {0, 576460743713488896},
23141 },
23142 outputs: []outputInfo{
23143 {0, 576460743713488896},
23144 },
23145 },
23146 },
23147 {
23148 name: "FTRUNC",
23149 argLen: 1,
23150 asm: ppc64.AFRIZ,
23151 reg: regInfo{
23152 inputs: []inputInfo{
23153 {0, 576460743713488896},
23154 },
23155 outputs: []outputInfo{
23156 {0, 576460743713488896},
23157 },
23158 },
23159 },
23160 {
23161 name: "FROUND",
23162 argLen: 1,
23163 asm: ppc64.AFRIN,
23164 reg: regInfo{
23165 inputs: []inputInfo{
23166 {0, 576460743713488896},
23167 },
23168 outputs: []outputInfo{
23169 {0, 576460743713488896},
23170 },
23171 },
23172 },
23173 {
23174 name: "FABS",
23175 argLen: 1,
23176 asm: ppc64.AFABS,
23177 reg: regInfo{
23178 inputs: []inputInfo{
23179 {0, 576460743713488896},
23180 },
23181 outputs: []outputInfo{
23182 {0, 576460743713488896},
23183 },
23184 },
23185 },
23186 {
23187 name: "FNABS",
23188 argLen: 1,
23189 asm: ppc64.AFNABS,
23190 reg: regInfo{
23191 inputs: []inputInfo{
23192 {0, 576460743713488896},
23193 },
23194 outputs: []outputInfo{
23195 {0, 576460743713488896},
23196 },
23197 },
23198 },
23199 {
23200 name: "FCPSGN",
23201 argLen: 2,
23202 asm: ppc64.AFCPSGN,
23203 reg: regInfo{
23204 inputs: []inputInfo{
23205 {0, 576460743713488896},
23206 {1, 576460743713488896},
23207 },
23208 outputs: []outputInfo{
23209 {0, 576460743713488896},
23210 },
23211 },
23212 },
23213 {
23214 name: "ORconst",
23215 auxType: auxInt64,
23216 argLen: 1,
23217 asm: ppc64.AOR,
23218 reg: regInfo{
23219 inputs: []inputInfo{
23220 {0, 1073733630},
23221 },
23222 outputs: []outputInfo{
23223 {0, 1073733624},
23224 },
23225 },
23226 },
23227 {
23228 name: "XORconst",
23229 auxType: auxInt64,
23230 argLen: 1,
23231 asm: ppc64.AXOR,
23232 reg: regInfo{
23233 inputs: []inputInfo{
23234 {0, 1073733630},
23235 },
23236 outputs: []outputInfo{
23237 {0, 1073733624},
23238 },
23239 },
23240 },
23241 {
23242 name: "ANDconst",
23243 auxType: auxInt64,
23244 argLen: 1,
23245 clobberFlags: true,
23246 asm: ppc64.AANDCC,
23247 reg: regInfo{
23248 inputs: []inputInfo{
23249 {0, 1073733630},
23250 },
23251 outputs: []outputInfo{
23252 {0, 1073733624},
23253 },
23254 },
23255 },
23256 {
23257 name: "ANDCCconst",
23258 auxType: auxInt64,
23259 argLen: 1,
23260 asm: ppc64.AANDCC,
23261 reg: regInfo{
23262 inputs: []inputInfo{
23263 {0, 1073733630},
23264 },
23265 },
23266 },
23267 {
23268 name: "MOVBreg",
23269 argLen: 1,
23270 asm: ppc64.AMOVB,
23271 reg: regInfo{
23272 inputs: []inputInfo{
23273 {0, 1073733630},
23274 },
23275 outputs: []outputInfo{
23276 {0, 1073733624},
23277 },
23278 },
23279 },
23280 {
23281 name: "MOVBZreg",
23282 argLen: 1,
23283 asm: ppc64.AMOVBZ,
23284 reg: regInfo{
23285 inputs: []inputInfo{
23286 {0, 1073733630},
23287 },
23288 outputs: []outputInfo{
23289 {0, 1073733624},
23290 },
23291 },
23292 },
23293 {
23294 name: "MOVHreg",
23295 argLen: 1,
23296 asm: ppc64.AMOVH,
23297 reg: regInfo{
23298 inputs: []inputInfo{
23299 {0, 1073733630},
23300 },
23301 outputs: []outputInfo{
23302 {0, 1073733624},
23303 },
23304 },
23305 },
23306 {
23307 name: "MOVHZreg",
23308 argLen: 1,
23309 asm: ppc64.AMOVHZ,
23310 reg: regInfo{
23311 inputs: []inputInfo{
23312 {0, 1073733630},
23313 },
23314 outputs: []outputInfo{
23315 {0, 1073733624},
23316 },
23317 },
23318 },
23319 {
23320 name: "MOVWreg",
23321 argLen: 1,
23322 asm: ppc64.AMOVW,
23323 reg: regInfo{
23324 inputs: []inputInfo{
23325 {0, 1073733630},
23326 },
23327 outputs: []outputInfo{
23328 {0, 1073733624},
23329 },
23330 },
23331 },
23332 {
23333 name: "MOVWZreg",
23334 argLen: 1,
23335 asm: ppc64.AMOVWZ,
23336 reg: regInfo{
23337 inputs: []inputInfo{
23338 {0, 1073733630},
23339 },
23340 outputs: []outputInfo{
23341 {0, 1073733624},
23342 },
23343 },
23344 },
23345 {
23346 name: "MOVBZload",
23347 auxType: auxSymOff,
23348 argLen: 2,
23349 faultOnNilArg0: true,
23350 symEffect: SymRead,
23351 asm: ppc64.AMOVBZ,
23352 reg: regInfo{
23353 inputs: []inputInfo{
23354 {0, 1073733630},
23355 },
23356 outputs: []outputInfo{
23357 {0, 1073733624},
23358 },
23359 },
23360 },
23361 {
23362 name: "MOVHload",
23363 auxType: auxSymOff,
23364 argLen: 2,
23365 faultOnNilArg0: true,
23366 symEffect: SymRead,
23367 asm: ppc64.AMOVH,
23368 reg: regInfo{
23369 inputs: []inputInfo{
23370 {0, 1073733630},
23371 },
23372 outputs: []outputInfo{
23373 {0, 1073733624},
23374 },
23375 },
23376 },
23377 {
23378 name: "MOVHZload",
23379 auxType: auxSymOff,
23380 argLen: 2,
23381 faultOnNilArg0: true,
23382 symEffect: SymRead,
23383 asm: ppc64.AMOVHZ,
23384 reg: regInfo{
23385 inputs: []inputInfo{
23386 {0, 1073733630},
23387 },
23388 outputs: []outputInfo{
23389 {0, 1073733624},
23390 },
23391 },
23392 },
23393 {
23394 name: "MOVWload",
23395 auxType: auxSymOff,
23396 argLen: 2,
23397 faultOnNilArg0: true,
23398 symEffect: SymRead,
23399 asm: ppc64.AMOVW,
23400 reg: regInfo{
23401 inputs: []inputInfo{
23402 {0, 1073733630},
23403 },
23404 outputs: []outputInfo{
23405 {0, 1073733624},
23406 },
23407 },
23408 },
23409 {
23410 name: "MOVWZload",
23411 auxType: auxSymOff,
23412 argLen: 2,
23413 faultOnNilArg0: true,
23414 symEffect: SymRead,
23415 asm: ppc64.AMOVWZ,
23416 reg: regInfo{
23417 inputs: []inputInfo{
23418 {0, 1073733630},
23419 },
23420 outputs: []outputInfo{
23421 {0, 1073733624},
23422 },
23423 },
23424 },
23425 {
23426 name: "MOVDload",
23427 auxType: auxSymOff,
23428 argLen: 2,
23429 faultOnNilArg0: true,
23430 symEffect: SymRead,
23431 asm: ppc64.AMOVD,
23432 reg: regInfo{
23433 inputs: []inputInfo{
23434 {0, 1073733630},
23435 },
23436 outputs: []outputInfo{
23437 {0, 1073733624},
23438 },
23439 },
23440 },
23441 {
23442 name: "MOVDBRload",
23443 auxType: auxSymOff,
23444 argLen: 2,
23445 faultOnNilArg0: true,
23446 symEffect: SymRead,
23447 asm: ppc64.AMOVDBR,
23448 reg: regInfo{
23449 inputs: []inputInfo{
23450 {0, 1073733630},
23451 },
23452 outputs: []outputInfo{
23453 {0, 1073733624},
23454 },
23455 },
23456 },
23457 {
23458 name: "MOVWBRload",
23459 auxType: auxSymOff,
23460 argLen: 2,
23461 faultOnNilArg0: true,
23462 symEffect: SymRead,
23463 asm: ppc64.AMOVWBR,
23464 reg: regInfo{
23465 inputs: []inputInfo{
23466 {0, 1073733630},
23467 },
23468 outputs: []outputInfo{
23469 {0, 1073733624},
23470 },
23471 },
23472 },
23473 {
23474 name: "MOVHBRload",
23475 auxType: auxSymOff,
23476 argLen: 2,
23477 faultOnNilArg0: true,
23478 symEffect: SymRead,
23479 asm: ppc64.AMOVHBR,
23480 reg: regInfo{
23481 inputs: []inputInfo{
23482 {0, 1073733630},
23483 },
23484 outputs: []outputInfo{
23485 {0, 1073733624},
23486 },
23487 },
23488 },
23489 {
23490 name: "MOVBZloadidx",
23491 auxType: auxSymOff,
23492 argLen: 3,
23493 faultOnNilArg0: true,
23494 symEffect: SymRead,
23495 asm: ppc64.AMOVBZ,
23496 reg: regInfo{
23497 inputs: []inputInfo{
23498 {1, 1073733624},
23499 {0, 1073733630},
23500 },
23501 outputs: []outputInfo{
23502 {0, 1073733624},
23503 },
23504 },
23505 },
23506 {
23507 name: "MOVHloadidx",
23508 auxType: auxSymOff,
23509 argLen: 3,
23510 faultOnNilArg0: true,
23511 symEffect: SymRead,
23512 asm: ppc64.AMOVH,
23513 reg: regInfo{
23514 inputs: []inputInfo{
23515 {1, 1073733624},
23516 {0, 1073733630},
23517 },
23518 outputs: []outputInfo{
23519 {0, 1073733624},
23520 },
23521 },
23522 },
23523 {
23524 name: "MOVHZloadidx",
23525 auxType: auxSymOff,
23526 argLen: 3,
23527 faultOnNilArg0: true,
23528 symEffect: SymRead,
23529 asm: ppc64.AMOVHZ,
23530 reg: regInfo{
23531 inputs: []inputInfo{
23532 {1, 1073733624},
23533 {0, 1073733630},
23534 },
23535 outputs: []outputInfo{
23536 {0, 1073733624},
23537 },
23538 },
23539 },
23540 {
23541 name: "MOVWloadidx",
23542 auxType: auxSymOff,
23543 argLen: 3,
23544 faultOnNilArg0: true,
23545 symEffect: SymRead,
23546 asm: ppc64.AMOVW,
23547 reg: regInfo{
23548 inputs: []inputInfo{
23549 {1, 1073733624},
23550 {0, 1073733630},
23551 },
23552 outputs: []outputInfo{
23553 {0, 1073733624},
23554 },
23555 },
23556 },
23557 {
23558 name: "MOVWZloadidx",
23559 auxType: auxSymOff,
23560 argLen: 3,
23561 faultOnNilArg0: true,
23562 symEffect: SymRead,
23563 asm: ppc64.AMOVWZ,
23564 reg: regInfo{
23565 inputs: []inputInfo{
23566 {1, 1073733624},
23567 {0, 1073733630},
23568 },
23569 outputs: []outputInfo{
23570 {0, 1073733624},
23571 },
23572 },
23573 },
23574 {
23575 name: "MOVDloadidx",
23576 auxType: auxSymOff,
23577 argLen: 3,
23578 faultOnNilArg0: true,
23579 symEffect: SymRead,
23580 asm: ppc64.AMOVD,
23581 reg: regInfo{
23582 inputs: []inputInfo{
23583 {1, 1073733624},
23584 {0, 1073733630},
23585 },
23586 outputs: []outputInfo{
23587 {0, 1073733624},
23588 },
23589 },
23590 },
23591 {
23592 name: "MOVHBRloadidx",
23593 auxType: auxSymOff,
23594 argLen: 3,
23595 faultOnNilArg0: true,
23596 symEffect: SymRead,
23597 asm: ppc64.AMOVHBR,
23598 reg: regInfo{
23599 inputs: []inputInfo{
23600 {1, 1073733624},
23601 {0, 1073733630},
23602 },
23603 outputs: []outputInfo{
23604 {0, 1073733624},
23605 },
23606 },
23607 },
23608 {
23609 name: "MOVWBRloadidx",
23610 auxType: auxSymOff,
23611 argLen: 3,
23612 faultOnNilArg0: true,
23613 symEffect: SymRead,
23614 asm: ppc64.AMOVWBR,
23615 reg: regInfo{
23616 inputs: []inputInfo{
23617 {1, 1073733624},
23618 {0, 1073733630},
23619 },
23620 outputs: []outputInfo{
23621 {0, 1073733624},
23622 },
23623 },
23624 },
23625 {
23626 name: "MOVDBRloadidx",
23627 auxType: auxSymOff,
23628 argLen: 3,
23629 faultOnNilArg0: true,
23630 symEffect: SymRead,
23631 asm: ppc64.AMOVDBR,
23632 reg: regInfo{
23633 inputs: []inputInfo{
23634 {1, 1073733624},
23635 {0, 1073733630},
23636 },
23637 outputs: []outputInfo{
23638 {0, 1073733624},
23639 },
23640 },
23641 },
23642 {
23643 name: "FMOVDloadidx",
23644 auxType: auxSymOff,
23645 argLen: 3,
23646 faultOnNilArg0: true,
23647 symEffect: SymRead,
23648 asm: ppc64.AFMOVD,
23649 reg: regInfo{
23650 inputs: []inputInfo{
23651 {0, 1073733630},
23652 {1, 1073733630},
23653 },
23654 outputs: []outputInfo{
23655 {0, 576460743713488896},
23656 },
23657 },
23658 },
23659 {
23660 name: "FMOVSloadidx",
23661 auxType: auxSymOff,
23662 argLen: 3,
23663 faultOnNilArg0: true,
23664 symEffect: SymRead,
23665 asm: ppc64.AFMOVS,
23666 reg: regInfo{
23667 inputs: []inputInfo{
23668 {0, 1073733630},
23669 {1, 1073733630},
23670 },
23671 outputs: []outputInfo{
23672 {0, 576460743713488896},
23673 },
23674 },
23675 },
23676 {
23677 name: "MOVDBRstore",
23678 auxType: auxSymOff,
23679 argLen: 3,
23680 faultOnNilArg0: true,
23681 symEffect: SymWrite,
23682 asm: ppc64.AMOVDBR,
23683 reg: regInfo{
23684 inputs: []inputInfo{
23685 {0, 1073733630},
23686 {1, 1073733630},
23687 },
23688 },
23689 },
23690 {
23691 name: "MOVWBRstore",
23692 auxType: auxSymOff,
23693 argLen: 3,
23694 faultOnNilArg0: true,
23695 symEffect: SymWrite,
23696 asm: ppc64.AMOVWBR,
23697 reg: regInfo{
23698 inputs: []inputInfo{
23699 {0, 1073733630},
23700 {1, 1073733630},
23701 },
23702 },
23703 },
23704 {
23705 name: "MOVHBRstore",
23706 auxType: auxSymOff,
23707 argLen: 3,
23708 faultOnNilArg0: true,
23709 symEffect: SymWrite,
23710 asm: ppc64.AMOVHBR,
23711 reg: regInfo{
23712 inputs: []inputInfo{
23713 {0, 1073733630},
23714 {1, 1073733630},
23715 },
23716 },
23717 },
23718 {
23719 name: "FMOVDload",
23720 auxType: auxSymOff,
23721 argLen: 2,
23722 faultOnNilArg0: true,
23723 symEffect: SymRead,
23724 asm: ppc64.AFMOVD,
23725 reg: regInfo{
23726 inputs: []inputInfo{
23727 {0, 1073733630},
23728 },
23729 outputs: []outputInfo{
23730 {0, 576460743713488896},
23731 },
23732 },
23733 },
23734 {
23735 name: "FMOVSload",
23736 auxType: auxSymOff,
23737 argLen: 2,
23738 faultOnNilArg0: true,
23739 symEffect: SymRead,
23740 asm: ppc64.AFMOVS,
23741 reg: regInfo{
23742 inputs: []inputInfo{
23743 {0, 1073733630},
23744 },
23745 outputs: []outputInfo{
23746 {0, 576460743713488896},
23747 },
23748 },
23749 },
23750 {
23751 name: "MOVBstore",
23752 auxType: auxSymOff,
23753 argLen: 3,
23754 faultOnNilArg0: true,
23755 symEffect: SymWrite,
23756 asm: ppc64.AMOVB,
23757 reg: regInfo{
23758 inputs: []inputInfo{
23759 {0, 1073733630},
23760 {1, 1073733630},
23761 },
23762 },
23763 },
23764 {
23765 name: "MOVHstore",
23766 auxType: auxSymOff,
23767 argLen: 3,
23768 faultOnNilArg0: true,
23769 symEffect: SymWrite,
23770 asm: ppc64.AMOVH,
23771 reg: regInfo{
23772 inputs: []inputInfo{
23773 {0, 1073733630},
23774 {1, 1073733630},
23775 },
23776 },
23777 },
23778 {
23779 name: "MOVWstore",
23780 auxType: auxSymOff,
23781 argLen: 3,
23782 faultOnNilArg0: true,
23783 symEffect: SymWrite,
23784 asm: ppc64.AMOVW,
23785 reg: regInfo{
23786 inputs: []inputInfo{
23787 {0, 1073733630},
23788 {1, 1073733630},
23789 },
23790 },
23791 },
23792 {
23793 name: "MOVDstore",
23794 auxType: auxSymOff,
23795 argLen: 3,
23796 faultOnNilArg0: true,
23797 symEffect: SymWrite,
23798 asm: ppc64.AMOVD,
23799 reg: regInfo{
23800 inputs: []inputInfo{
23801 {0, 1073733630},
23802 {1, 1073733630},
23803 },
23804 },
23805 },
23806 {
23807 name: "FMOVDstore",
23808 auxType: auxSymOff,
23809 argLen: 3,
23810 faultOnNilArg0: true,
23811 symEffect: SymWrite,
23812 asm: ppc64.AFMOVD,
23813 reg: regInfo{
23814 inputs: []inputInfo{
23815 {1, 576460743713488896},
23816 {0, 1073733630},
23817 },
23818 },
23819 },
23820 {
23821 name: "FMOVSstore",
23822 auxType: auxSymOff,
23823 argLen: 3,
23824 faultOnNilArg0: true,
23825 symEffect: SymWrite,
23826 asm: ppc64.AFMOVS,
23827 reg: regInfo{
23828 inputs: []inputInfo{
23829 {1, 576460743713488896},
23830 {0, 1073733630},
23831 },
23832 },
23833 },
23834 {
23835 name: "MOVBstoreidx",
23836 auxType: auxSymOff,
23837 argLen: 4,
23838 faultOnNilArg0: true,
23839 symEffect: SymWrite,
23840 asm: ppc64.AMOVB,
23841 reg: regInfo{
23842 inputs: []inputInfo{
23843 {0, 1073733630},
23844 {1, 1073733630},
23845 {2, 1073733630},
23846 },
23847 },
23848 },
23849 {
23850 name: "MOVHstoreidx",
23851 auxType: auxSymOff,
23852 argLen: 4,
23853 faultOnNilArg0: true,
23854 symEffect: SymWrite,
23855 asm: ppc64.AMOVH,
23856 reg: regInfo{
23857 inputs: []inputInfo{
23858 {0, 1073733630},
23859 {1, 1073733630},
23860 {2, 1073733630},
23861 },
23862 },
23863 },
23864 {
23865 name: "MOVWstoreidx",
23866 auxType: auxSymOff,
23867 argLen: 4,
23868 faultOnNilArg0: true,
23869 symEffect: SymWrite,
23870 asm: ppc64.AMOVW,
23871 reg: regInfo{
23872 inputs: []inputInfo{
23873 {0, 1073733630},
23874 {1, 1073733630},
23875 {2, 1073733630},
23876 },
23877 },
23878 },
23879 {
23880 name: "MOVDstoreidx",
23881 auxType: auxSymOff,
23882 argLen: 4,
23883 faultOnNilArg0: true,
23884 symEffect: SymWrite,
23885 asm: ppc64.AMOVD,
23886 reg: regInfo{
23887 inputs: []inputInfo{
23888 {0, 1073733630},
23889 {1, 1073733630},
23890 {2, 1073733630},
23891 },
23892 },
23893 },
23894 {
23895 name: "FMOVDstoreidx",
23896 auxType: auxSymOff,
23897 argLen: 4,
23898 faultOnNilArg0: true,
23899 symEffect: SymWrite,
23900 asm: ppc64.AFMOVD,
23901 reg: regInfo{
23902 inputs: []inputInfo{
23903 {2, 576460743713488896},
23904 {0, 1073733630},
23905 {1, 1073733630},
23906 },
23907 },
23908 },
23909 {
23910 name: "FMOVSstoreidx",
23911 auxType: auxSymOff,
23912 argLen: 4,
23913 faultOnNilArg0: true,
23914 symEffect: SymWrite,
23915 asm: ppc64.AFMOVS,
23916 reg: regInfo{
23917 inputs: []inputInfo{
23918 {2, 576460743713488896},
23919 {0, 1073733630},
23920 {1, 1073733630},
23921 },
23922 },
23923 },
23924 {
23925 name: "MOVHBRstoreidx",
23926 auxType: auxSymOff,
23927 argLen: 4,
23928 faultOnNilArg0: true,
23929 symEffect: SymWrite,
23930 asm: ppc64.AMOVHBR,
23931 reg: regInfo{
23932 inputs: []inputInfo{
23933 {0, 1073733630},
23934 {1, 1073733630},
23935 {2, 1073733630},
23936 },
23937 },
23938 },
23939 {
23940 name: "MOVWBRstoreidx",
23941 auxType: auxSymOff,
23942 argLen: 4,
23943 faultOnNilArg0: true,
23944 symEffect: SymWrite,
23945 asm: ppc64.AMOVWBR,
23946 reg: regInfo{
23947 inputs: []inputInfo{
23948 {0, 1073733630},
23949 {1, 1073733630},
23950 {2, 1073733630},
23951 },
23952 },
23953 },
23954 {
23955 name: "MOVDBRstoreidx",
23956 auxType: auxSymOff,
23957 argLen: 4,
23958 faultOnNilArg0: true,
23959 symEffect: SymWrite,
23960 asm: ppc64.AMOVDBR,
23961 reg: regInfo{
23962 inputs: []inputInfo{
23963 {0, 1073733630},
23964 {1, 1073733630},
23965 {2, 1073733630},
23966 },
23967 },
23968 },
23969 {
23970 name: "MOVBstorezero",
23971 auxType: auxSymOff,
23972 argLen: 2,
23973 faultOnNilArg0: true,
23974 symEffect: SymWrite,
23975 asm: ppc64.AMOVB,
23976 reg: regInfo{
23977 inputs: []inputInfo{
23978 {0, 1073733630},
23979 },
23980 },
23981 },
23982 {
23983 name: "MOVHstorezero",
23984 auxType: auxSymOff,
23985 argLen: 2,
23986 faultOnNilArg0: true,
23987 symEffect: SymWrite,
23988 asm: ppc64.AMOVH,
23989 reg: regInfo{
23990 inputs: []inputInfo{
23991 {0, 1073733630},
23992 },
23993 },
23994 },
23995 {
23996 name: "MOVWstorezero",
23997 auxType: auxSymOff,
23998 argLen: 2,
23999 faultOnNilArg0: true,
24000 symEffect: SymWrite,
24001 asm: ppc64.AMOVW,
24002 reg: regInfo{
24003 inputs: []inputInfo{
24004 {0, 1073733630},
24005 },
24006 },
24007 },
24008 {
24009 name: "MOVDstorezero",
24010 auxType: auxSymOff,
24011 argLen: 2,
24012 faultOnNilArg0: true,
24013 symEffect: SymWrite,
24014 asm: ppc64.AMOVD,
24015 reg: regInfo{
24016 inputs: []inputInfo{
24017 {0, 1073733630},
24018 },
24019 },
24020 },
24021 {
24022 name: "MOVDaddr",
24023 auxType: auxSymOff,
24024 argLen: 1,
24025 rematerializeable: true,
24026 symEffect: SymAddr,
24027 asm: ppc64.AMOVD,
24028 reg: regInfo{
24029 inputs: []inputInfo{
24030 {0, 1073733630},
24031 },
24032 outputs: []outputInfo{
24033 {0, 1073733624},
24034 },
24035 },
24036 },
24037 {
24038 name: "MOVDconst",
24039 auxType: auxInt64,
24040 argLen: 0,
24041 rematerializeable: true,
24042 asm: ppc64.AMOVD,
24043 reg: regInfo{
24044 outputs: []outputInfo{
24045 {0, 1073733624},
24046 },
24047 },
24048 },
24049 {
24050 name: "FMOVDconst",
24051 auxType: auxFloat64,
24052 argLen: 0,
24053 rematerializeable: true,
24054 asm: ppc64.AFMOVD,
24055 reg: regInfo{
24056 outputs: []outputInfo{
24057 {0, 576460743713488896},
24058 },
24059 },
24060 },
24061 {
24062 name: "FMOVSconst",
24063 auxType: auxFloat32,
24064 argLen: 0,
24065 rematerializeable: true,
24066 asm: ppc64.AFMOVS,
24067 reg: regInfo{
24068 outputs: []outputInfo{
24069 {0, 576460743713488896},
24070 },
24071 },
24072 },
24073 {
24074 name: "FCMPU",
24075 argLen: 2,
24076 asm: ppc64.AFCMPU,
24077 reg: regInfo{
24078 inputs: []inputInfo{
24079 {0, 576460743713488896},
24080 {1, 576460743713488896},
24081 },
24082 },
24083 },
24084 {
24085 name: "CMP",
24086 argLen: 2,
24087 asm: ppc64.ACMP,
24088 reg: regInfo{
24089 inputs: []inputInfo{
24090 {0, 1073733630},
24091 {1, 1073733630},
24092 },
24093 },
24094 },
24095 {
24096 name: "CMPU",
24097 argLen: 2,
24098 asm: ppc64.ACMPU,
24099 reg: regInfo{
24100 inputs: []inputInfo{
24101 {0, 1073733630},
24102 {1, 1073733630},
24103 },
24104 },
24105 },
24106 {
24107 name: "CMPW",
24108 argLen: 2,
24109 asm: ppc64.ACMPW,
24110 reg: regInfo{
24111 inputs: []inputInfo{
24112 {0, 1073733630},
24113 {1, 1073733630},
24114 },
24115 },
24116 },
24117 {
24118 name: "CMPWU",
24119 argLen: 2,
24120 asm: ppc64.ACMPWU,
24121 reg: regInfo{
24122 inputs: []inputInfo{
24123 {0, 1073733630},
24124 {1, 1073733630},
24125 },
24126 },
24127 },
24128 {
24129 name: "CMPconst",
24130 auxType: auxInt64,
24131 argLen: 1,
24132 asm: ppc64.ACMP,
24133 reg: regInfo{
24134 inputs: []inputInfo{
24135 {0, 1073733630},
24136 },
24137 },
24138 },
24139 {
24140 name: "CMPUconst",
24141 auxType: auxInt64,
24142 argLen: 1,
24143 asm: ppc64.ACMPU,
24144 reg: regInfo{
24145 inputs: []inputInfo{
24146 {0, 1073733630},
24147 },
24148 },
24149 },
24150 {
24151 name: "CMPWconst",
24152 auxType: auxInt32,
24153 argLen: 1,
24154 asm: ppc64.ACMPW,
24155 reg: regInfo{
24156 inputs: []inputInfo{
24157 {0, 1073733630},
24158 },
24159 },
24160 },
24161 {
24162 name: "CMPWUconst",
24163 auxType: auxInt32,
24164 argLen: 1,
24165 asm: ppc64.ACMPWU,
24166 reg: regInfo{
24167 inputs: []inputInfo{
24168 {0, 1073733630},
24169 },
24170 },
24171 },
24172 {
24173 name: "Equal",
24174 argLen: 1,
24175 reg: regInfo{
24176 outputs: []outputInfo{
24177 {0, 1073733624},
24178 },
24179 },
24180 },
24181 {
24182 name: "NotEqual",
24183 argLen: 1,
24184 reg: regInfo{
24185 outputs: []outputInfo{
24186 {0, 1073733624},
24187 },
24188 },
24189 },
24190 {
24191 name: "LessThan",
24192 argLen: 1,
24193 reg: regInfo{
24194 outputs: []outputInfo{
24195 {0, 1073733624},
24196 },
24197 },
24198 },
24199 {
24200 name: "FLessThan",
24201 argLen: 1,
24202 reg: regInfo{
24203 outputs: []outputInfo{
24204 {0, 1073733624},
24205 },
24206 },
24207 },
24208 {
24209 name: "LessEqual",
24210 argLen: 1,
24211 reg: regInfo{
24212 outputs: []outputInfo{
24213 {0, 1073733624},
24214 },
24215 },
24216 },
24217 {
24218 name: "FLessEqual",
24219 argLen: 1,
24220 reg: regInfo{
24221 outputs: []outputInfo{
24222 {0, 1073733624},
24223 },
24224 },
24225 },
24226 {
24227 name: "GreaterThan",
24228 argLen: 1,
24229 reg: regInfo{
24230 outputs: []outputInfo{
24231 {0, 1073733624},
24232 },
24233 },
24234 },
24235 {
24236 name: "FGreaterThan",
24237 argLen: 1,
24238 reg: regInfo{
24239 outputs: []outputInfo{
24240 {0, 1073733624},
24241 },
24242 },
24243 },
24244 {
24245 name: "GreaterEqual",
24246 argLen: 1,
24247 reg: regInfo{
24248 outputs: []outputInfo{
24249 {0, 1073733624},
24250 },
24251 },
24252 },
24253 {
24254 name: "FGreaterEqual",
24255 argLen: 1,
24256 reg: regInfo{
24257 outputs: []outputInfo{
24258 {0, 1073733624},
24259 },
24260 },
24261 },
24262 {
24263 name: "LoweredGetClosurePtr",
24264 argLen: 0,
24265 zeroWidth: true,
24266 reg: regInfo{
24267 outputs: []outputInfo{
24268 {0, 2048},
24269 },
24270 },
24271 },
24272 {
24273 name: "LoweredGetCallerSP",
24274 argLen: 0,
24275 rematerializeable: true,
24276 reg: regInfo{
24277 outputs: []outputInfo{
24278 {0, 1073733624},
24279 },
24280 },
24281 },
24282 {
24283 name: "LoweredGetCallerPC",
24284 argLen: 0,
24285 rematerializeable: true,
24286 reg: regInfo{
24287 outputs: []outputInfo{
24288 {0, 1073733624},
24289 },
24290 },
24291 },
24292 {
24293 name: "LoweredNilCheck",
24294 argLen: 2,
24295 clobberFlags: true,
24296 nilCheck: true,
24297 faultOnNilArg0: true,
24298 reg: regInfo{
24299 inputs: []inputInfo{
24300 {0, 1073733630},
24301 },
24302 clobbers: 2147483648,
24303 },
24304 },
24305 {
24306 name: "LoweredRound32F",
24307 argLen: 1,
24308 resultInArg0: true,
24309 zeroWidth: true,
24310 reg: regInfo{
24311 inputs: []inputInfo{
24312 {0, 576460743713488896},
24313 },
24314 outputs: []outputInfo{
24315 {0, 576460743713488896},
24316 },
24317 },
24318 },
24319 {
24320 name: "LoweredRound64F",
24321 argLen: 1,
24322 resultInArg0: true,
24323 zeroWidth: true,
24324 reg: regInfo{
24325 inputs: []inputInfo{
24326 {0, 576460743713488896},
24327 },
24328 outputs: []outputInfo{
24329 {0, 576460743713488896},
24330 },
24331 },
24332 },
24333 {
24334 name: "CALLstatic",
24335 auxType: auxSymOff,
24336 argLen: 1,
24337 clobberFlags: true,
24338 call: true,
24339 symEffect: SymNone,
24340 reg: regInfo{
24341 clobbers: 576460745860964344,
24342 },
24343 },
24344 {
24345 name: "CALLclosure",
24346 auxType: auxInt64,
24347 argLen: 3,
24348 clobberFlags: true,
24349 call: true,
24350 reg: regInfo{
24351 inputs: []inputInfo{
24352 {0, 4096},
24353 {1, 2048},
24354 },
24355 clobbers: 576460745860964344,
24356 },
24357 },
24358 {
24359 name: "CALLinter",
24360 auxType: auxInt64,
24361 argLen: 2,
24362 clobberFlags: true,
24363 call: true,
24364 reg: regInfo{
24365 inputs: []inputInfo{
24366 {0, 4096},
24367 },
24368 clobbers: 576460745860964344,
24369 },
24370 },
24371 {
24372 name: "LoweredZero",
24373 auxType: auxInt64,
24374 argLen: 2,
24375 clobberFlags: true,
24376 faultOnNilArg0: true,
24377 reg: regInfo{
24378 inputs: []inputInfo{
24379 {0, 8},
24380 },
24381 clobbers: 8,
24382 },
24383 },
24384 {
24385 name: "LoweredMove",
24386 auxType: auxInt64,
24387 argLen: 3,
24388 clobberFlags: true,
24389 faultOnNilArg0: true,
24390 faultOnNilArg1: true,
24391 reg: regInfo{
24392 inputs: []inputInfo{
24393 {0, 8},
24394 {1, 16},
24395 },
24396 clobbers: 1944,
24397 },
24398 },
24399 {
24400 name: "LoweredAtomicStore32",
24401 auxType: auxInt64,
24402 argLen: 3,
24403 faultOnNilArg0: true,
24404 hasSideEffects: true,
24405 reg: regInfo{
24406 inputs: []inputInfo{
24407 {0, 1073733630},
24408 {1, 1073733630},
24409 },
24410 },
24411 },
24412 {
24413 name: "LoweredAtomicStore64",
24414 auxType: auxInt64,
24415 argLen: 3,
24416 faultOnNilArg0: true,
24417 hasSideEffects: true,
24418 reg: regInfo{
24419 inputs: []inputInfo{
24420 {0, 1073733630},
24421 {1, 1073733630},
24422 },
24423 },
24424 },
24425 {
24426 name: "LoweredAtomicLoad8",
24427 auxType: auxInt64,
24428 argLen: 2,
24429 clobberFlags: true,
24430 faultOnNilArg0: true,
24431 reg: regInfo{
24432 inputs: []inputInfo{
24433 {0, 1073733630},
24434 },
24435 outputs: []outputInfo{
24436 {0, 1073733624},
24437 },
24438 },
24439 },
24440 {
24441 name: "LoweredAtomicLoad32",
24442 auxType: auxInt64,
24443 argLen: 2,
24444 clobberFlags: true,
24445 faultOnNilArg0: true,
24446 reg: regInfo{
24447 inputs: []inputInfo{
24448 {0, 1073733630},
24449 },
24450 outputs: []outputInfo{
24451 {0, 1073733624},
24452 },
24453 },
24454 },
24455 {
24456 name: "LoweredAtomicLoad64",
24457 auxType: auxInt64,
24458 argLen: 2,
24459 clobberFlags: true,
24460 faultOnNilArg0: true,
24461 reg: regInfo{
24462 inputs: []inputInfo{
24463 {0, 1073733630},
24464 },
24465 outputs: []outputInfo{
24466 {0, 1073733624},
24467 },
24468 },
24469 },
24470 {
24471 name: "LoweredAtomicLoadPtr",
24472 auxType: auxInt64,
24473 argLen: 2,
24474 clobberFlags: true,
24475 faultOnNilArg0: true,
24476 reg: regInfo{
24477 inputs: []inputInfo{
24478 {0, 1073733630},
24479 },
24480 outputs: []outputInfo{
24481 {0, 1073733624},
24482 },
24483 },
24484 },
24485 {
24486 name: "LoweredAtomicAdd32",
24487 argLen: 3,
24488 resultNotInArgs: true,
24489 clobberFlags: true,
24490 faultOnNilArg0: true,
24491 hasSideEffects: true,
24492 reg: regInfo{
24493 inputs: []inputInfo{
24494 {1, 1073733624},
24495 {0, 1073733630},
24496 },
24497 outputs: []outputInfo{
24498 {0, 1073733624},
24499 },
24500 },
24501 },
24502 {
24503 name: "LoweredAtomicAdd64",
24504 argLen: 3,
24505 resultNotInArgs: true,
24506 clobberFlags: true,
24507 faultOnNilArg0: true,
24508 hasSideEffects: true,
24509 reg: regInfo{
24510 inputs: []inputInfo{
24511 {1, 1073733624},
24512 {0, 1073733630},
24513 },
24514 outputs: []outputInfo{
24515 {0, 1073733624},
24516 },
24517 },
24518 },
24519 {
24520 name: "LoweredAtomicExchange32",
24521 argLen: 3,
24522 resultNotInArgs: true,
24523 clobberFlags: true,
24524 faultOnNilArg0: true,
24525 hasSideEffects: true,
24526 reg: regInfo{
24527 inputs: []inputInfo{
24528 {1, 1073733624},
24529 {0, 1073733630},
24530 },
24531 outputs: []outputInfo{
24532 {0, 1073733624},
24533 },
24534 },
24535 },
24536 {
24537 name: "LoweredAtomicExchange64",
24538 argLen: 3,
24539 resultNotInArgs: true,
24540 clobberFlags: true,
24541 faultOnNilArg0: true,
24542 hasSideEffects: true,
24543 reg: regInfo{
24544 inputs: []inputInfo{
24545 {1, 1073733624},
24546 {0, 1073733630},
24547 },
24548 outputs: []outputInfo{
24549 {0, 1073733624},
24550 },
24551 },
24552 },
24553 {
24554 name: "LoweredAtomicCas64",
24555 auxType: auxInt64,
24556 argLen: 4,
24557 resultNotInArgs: true,
24558 clobberFlags: true,
24559 faultOnNilArg0: true,
24560 hasSideEffects: true,
24561 reg: regInfo{
24562 inputs: []inputInfo{
24563 {1, 1073733624},
24564 {2, 1073733624},
24565 {0, 1073733630},
24566 },
24567 outputs: []outputInfo{
24568 {0, 1073733624},
24569 },
24570 },
24571 },
24572 {
24573 name: "LoweredAtomicCas32",
24574 auxType: auxInt64,
24575 argLen: 4,
24576 resultNotInArgs: true,
24577 clobberFlags: true,
24578 faultOnNilArg0: true,
24579 hasSideEffects: true,
24580 reg: regInfo{
24581 inputs: []inputInfo{
24582 {1, 1073733624},
24583 {2, 1073733624},
24584 {0, 1073733630},
24585 },
24586 outputs: []outputInfo{
24587 {0, 1073733624},
24588 },
24589 },
24590 },
24591 {
24592 name: "LoweredAtomicAnd8",
24593 argLen: 3,
24594 faultOnNilArg0: true,
24595 hasSideEffects: true,
24596 asm: ppc64.AAND,
24597 reg: regInfo{
24598 inputs: []inputInfo{
24599 {0, 1073733630},
24600 {1, 1073733630},
24601 },
24602 },
24603 },
24604 {
24605 name: "LoweredAtomicOr8",
24606 argLen: 3,
24607 faultOnNilArg0: true,
24608 hasSideEffects: true,
24609 asm: ppc64.AOR,
24610 reg: regInfo{
24611 inputs: []inputInfo{
24612 {0, 1073733630},
24613 {1, 1073733630},
24614 },
24615 },
24616 },
24617 {
24618 name: "LoweredWB",
24619 auxType: auxSym,
24620 argLen: 3,
24621 clobberFlags: true,
24622 symEffect: SymNone,
24623 reg: regInfo{
24624 inputs: []inputInfo{
24625 {0, 1048576},
24626 {1, 2097152},
24627 },
24628 clobbers: 576460746931503104,
24629 },
24630 },
24631 {
24632 name: "LoweredPanicBoundsA",
24633 auxType: auxInt64,
24634 argLen: 3,
24635 reg: regInfo{
24636 inputs: []inputInfo{
24637 {0, 32},
24638 {1, 64},
24639 },
24640 },
24641 },
24642 {
24643 name: "LoweredPanicBoundsB",
24644 auxType: auxInt64,
24645 argLen: 3,
24646 reg: regInfo{
24647 inputs: []inputInfo{
24648 {0, 16},
24649 {1, 32},
24650 },
24651 },
24652 },
24653 {
24654 name: "LoweredPanicBoundsC",
24655 auxType: auxInt64,
24656 argLen: 3,
24657 reg: regInfo{
24658 inputs: []inputInfo{
24659 {0, 8},
24660 {1, 16},
24661 },
24662 },
24663 },
24664 {
24665 name: "InvertFlags",
24666 argLen: 1,
24667 reg: regInfo{},
24668 },
24669 {
24670 name: "FlagEQ",
24671 argLen: 0,
24672 reg: regInfo{},
24673 },
24674 {
24675 name: "FlagLT",
24676 argLen: 0,
24677 reg: regInfo{},
24678 },
24679 {
24680 name: "FlagGT",
24681 argLen: 0,
24682 reg: regInfo{},
24683 },
24684
24685 {
24686 name: "FADDS",
24687 argLen: 2,
24688 commutative: true,
24689 resultInArg0: true,
24690 clobberFlags: true,
24691 asm: s390x.AFADDS,
24692 reg: regInfo{
24693 inputs: []inputInfo{
24694 {0, 4294901760},
24695 {1, 4294901760},
24696 },
24697 outputs: []outputInfo{
24698 {0, 4294901760},
24699 },
24700 },
24701 },
24702 {
24703 name: "FADD",
24704 argLen: 2,
24705 commutative: true,
24706 resultInArg0: true,
24707 clobberFlags: true,
24708 asm: s390x.AFADD,
24709 reg: regInfo{
24710 inputs: []inputInfo{
24711 {0, 4294901760},
24712 {1, 4294901760},
24713 },
24714 outputs: []outputInfo{
24715 {0, 4294901760},
24716 },
24717 },
24718 },
24719 {
24720 name: "FSUBS",
24721 argLen: 2,
24722 resultInArg0: true,
24723 clobberFlags: true,
24724 asm: s390x.AFSUBS,
24725 reg: regInfo{
24726 inputs: []inputInfo{
24727 {0, 4294901760},
24728 {1, 4294901760},
24729 },
24730 outputs: []outputInfo{
24731 {0, 4294901760},
24732 },
24733 },
24734 },
24735 {
24736 name: "FSUB",
24737 argLen: 2,
24738 resultInArg0: true,
24739 clobberFlags: true,
24740 asm: s390x.AFSUB,
24741 reg: regInfo{
24742 inputs: []inputInfo{
24743 {0, 4294901760},
24744 {1, 4294901760},
24745 },
24746 outputs: []outputInfo{
24747 {0, 4294901760},
24748 },
24749 },
24750 },
24751 {
24752 name: "FMULS",
24753 argLen: 2,
24754 commutative: true,
24755 resultInArg0: true,
24756 asm: s390x.AFMULS,
24757 reg: regInfo{
24758 inputs: []inputInfo{
24759 {0, 4294901760},
24760 {1, 4294901760},
24761 },
24762 outputs: []outputInfo{
24763 {0, 4294901760},
24764 },
24765 },
24766 },
24767 {
24768 name: "FMUL",
24769 argLen: 2,
24770 commutative: true,
24771 resultInArg0: true,
24772 asm: s390x.AFMUL,
24773 reg: regInfo{
24774 inputs: []inputInfo{
24775 {0, 4294901760},
24776 {1, 4294901760},
24777 },
24778 outputs: []outputInfo{
24779 {0, 4294901760},
24780 },
24781 },
24782 },
24783 {
24784 name: "FDIVS",
24785 argLen: 2,
24786 resultInArg0: true,
24787 asm: s390x.AFDIVS,
24788 reg: regInfo{
24789 inputs: []inputInfo{
24790 {0, 4294901760},
24791 {1, 4294901760},
24792 },
24793 outputs: []outputInfo{
24794 {0, 4294901760},
24795 },
24796 },
24797 },
24798 {
24799 name: "FDIV",
24800 argLen: 2,
24801 resultInArg0: true,
24802 asm: s390x.AFDIV,
24803 reg: regInfo{
24804 inputs: []inputInfo{
24805 {0, 4294901760},
24806 {1, 4294901760},
24807 },
24808 outputs: []outputInfo{
24809 {0, 4294901760},
24810 },
24811 },
24812 },
24813 {
24814 name: "FNEGS",
24815 argLen: 1,
24816 clobberFlags: true,
24817 asm: s390x.AFNEGS,
24818 reg: regInfo{
24819 inputs: []inputInfo{
24820 {0, 4294901760},
24821 },
24822 outputs: []outputInfo{
24823 {0, 4294901760},
24824 },
24825 },
24826 },
24827 {
24828 name: "FNEG",
24829 argLen: 1,
24830 clobberFlags: true,
24831 asm: s390x.AFNEG,
24832 reg: regInfo{
24833 inputs: []inputInfo{
24834 {0, 4294901760},
24835 },
24836 outputs: []outputInfo{
24837 {0, 4294901760},
24838 },
24839 },
24840 },
24841 {
24842 name: "FMADDS",
24843 argLen: 3,
24844 resultInArg0: true,
24845 asm: s390x.AFMADDS,
24846 reg: regInfo{
24847 inputs: []inputInfo{
24848 {0, 4294901760},
24849 {1, 4294901760},
24850 {2, 4294901760},
24851 },
24852 outputs: []outputInfo{
24853 {0, 4294901760},
24854 },
24855 },
24856 },
24857 {
24858 name: "FMADD",
24859 argLen: 3,
24860 resultInArg0: true,
24861 asm: s390x.AFMADD,
24862 reg: regInfo{
24863 inputs: []inputInfo{
24864 {0, 4294901760},
24865 {1, 4294901760},
24866 {2, 4294901760},
24867 },
24868 outputs: []outputInfo{
24869 {0, 4294901760},
24870 },
24871 },
24872 },
24873 {
24874 name: "FMSUBS",
24875 argLen: 3,
24876 resultInArg0: true,
24877 asm: s390x.AFMSUBS,
24878 reg: regInfo{
24879 inputs: []inputInfo{
24880 {0, 4294901760},
24881 {1, 4294901760},
24882 {2, 4294901760},
24883 },
24884 outputs: []outputInfo{
24885 {0, 4294901760},
24886 },
24887 },
24888 },
24889 {
24890 name: "FMSUB",
24891 argLen: 3,
24892 resultInArg0: true,
24893 asm: s390x.AFMSUB,
24894 reg: regInfo{
24895 inputs: []inputInfo{
24896 {0, 4294901760},
24897 {1, 4294901760},
24898 {2, 4294901760},
24899 },
24900 outputs: []outputInfo{
24901 {0, 4294901760},
24902 },
24903 },
24904 },
24905 {
24906 name: "LPDFR",
24907 argLen: 1,
24908 asm: s390x.ALPDFR,
24909 reg: regInfo{
24910 inputs: []inputInfo{
24911 {0, 4294901760},
24912 },
24913 outputs: []outputInfo{
24914 {0, 4294901760},
24915 },
24916 },
24917 },
24918 {
24919 name: "LNDFR",
24920 argLen: 1,
24921 asm: s390x.ALNDFR,
24922 reg: regInfo{
24923 inputs: []inputInfo{
24924 {0, 4294901760},
24925 },
24926 outputs: []outputInfo{
24927 {0, 4294901760},
24928 },
24929 },
24930 },
24931 {
24932 name: "CPSDR",
24933 argLen: 2,
24934 asm: s390x.ACPSDR,
24935 reg: regInfo{
24936 inputs: []inputInfo{
24937 {0, 4294901760},
24938 {1, 4294901760},
24939 },
24940 outputs: []outputInfo{
24941 {0, 4294901760},
24942 },
24943 },
24944 },
24945 {
24946 name: "FIDBR",
24947 auxType: auxInt8,
24948 argLen: 1,
24949 asm: s390x.AFIDBR,
24950 reg: regInfo{
24951 inputs: []inputInfo{
24952 {0, 4294901760},
24953 },
24954 outputs: []outputInfo{
24955 {0, 4294901760},
24956 },
24957 },
24958 },
24959 {
24960 name: "FMOVSload",
24961 auxType: auxSymOff,
24962 argLen: 2,
24963 faultOnNilArg0: true,
24964 symEffect: SymRead,
24965 asm: s390x.AFMOVS,
24966 reg: regInfo{
24967 inputs: []inputInfo{
24968 {0, 4295023614},
24969 },
24970 outputs: []outputInfo{
24971 {0, 4294901760},
24972 },
24973 },
24974 },
24975 {
24976 name: "FMOVDload",
24977 auxType: auxSymOff,
24978 argLen: 2,
24979 faultOnNilArg0: true,
24980 symEffect: SymRead,
24981 asm: s390x.AFMOVD,
24982 reg: regInfo{
24983 inputs: []inputInfo{
24984 {0, 4295023614},
24985 },
24986 outputs: []outputInfo{
24987 {0, 4294901760},
24988 },
24989 },
24990 },
24991 {
24992 name: "FMOVSconst",
24993 auxType: auxFloat32,
24994 argLen: 0,
24995 rematerializeable: true,
24996 asm: s390x.AFMOVS,
24997 reg: regInfo{
24998 outputs: []outputInfo{
24999 {0, 4294901760},
25000 },
25001 },
25002 },
25003 {
25004 name: "FMOVDconst",
25005 auxType: auxFloat64,
25006 argLen: 0,
25007 rematerializeable: true,
25008 asm: s390x.AFMOVD,
25009 reg: regInfo{
25010 outputs: []outputInfo{
25011 {0, 4294901760},
25012 },
25013 },
25014 },
25015 {
25016 name: "FMOVSloadidx",
25017 auxType: auxSymOff,
25018 argLen: 3,
25019 symEffect: SymRead,
25020 asm: s390x.AFMOVS,
25021 reg: regInfo{
25022 inputs: []inputInfo{
25023 {0, 56318},
25024 {1, 56318},
25025 },
25026 outputs: []outputInfo{
25027 {0, 4294901760},
25028 },
25029 },
25030 },
25031 {
25032 name: "FMOVDloadidx",
25033 auxType: auxSymOff,
25034 argLen: 3,
25035 symEffect: SymRead,
25036 asm: s390x.AFMOVD,
25037 reg: regInfo{
25038 inputs: []inputInfo{
25039 {0, 56318},
25040 {1, 56318},
25041 },
25042 outputs: []outputInfo{
25043 {0, 4294901760},
25044 },
25045 },
25046 },
25047 {
25048 name: "FMOVSstore",
25049 auxType: auxSymOff,
25050 argLen: 3,
25051 faultOnNilArg0: true,
25052 symEffect: SymWrite,
25053 asm: s390x.AFMOVS,
25054 reg: regInfo{
25055 inputs: []inputInfo{
25056 {0, 4295023614},
25057 {1, 4294901760},
25058 },
25059 },
25060 },
25061 {
25062 name: "FMOVDstore",
25063 auxType: auxSymOff,
25064 argLen: 3,
25065 faultOnNilArg0: true,
25066 symEffect: SymWrite,
25067 asm: s390x.AFMOVD,
25068 reg: regInfo{
25069 inputs: []inputInfo{
25070 {0, 4295023614},
25071 {1, 4294901760},
25072 },
25073 },
25074 },
25075 {
25076 name: "FMOVSstoreidx",
25077 auxType: auxSymOff,
25078 argLen: 4,
25079 symEffect: SymWrite,
25080 asm: s390x.AFMOVS,
25081 reg: regInfo{
25082 inputs: []inputInfo{
25083 {0, 56318},
25084 {1, 56318},
25085 {2, 4294901760},
25086 },
25087 },
25088 },
25089 {
25090 name: "FMOVDstoreidx",
25091 auxType: auxSymOff,
25092 argLen: 4,
25093 symEffect: SymWrite,
25094 asm: s390x.AFMOVD,
25095 reg: regInfo{
25096 inputs: []inputInfo{
25097 {0, 56318},
25098 {1, 56318},
25099 {2, 4294901760},
25100 },
25101 },
25102 },
25103 {
25104 name: "ADD",
25105 argLen: 2,
25106 commutative: true,
25107 clobberFlags: true,
25108 asm: s390x.AADD,
25109 reg: regInfo{
25110 inputs: []inputInfo{
25111 {1, 23551},
25112 {0, 56319},
25113 },
25114 outputs: []outputInfo{
25115 {0, 23551},
25116 },
25117 },
25118 },
25119 {
25120 name: "ADDW",
25121 argLen: 2,
25122 commutative: true,
25123 clobberFlags: true,
25124 asm: s390x.AADDW,
25125 reg: regInfo{
25126 inputs: []inputInfo{
25127 {1, 23551},
25128 {0, 56319},
25129 },
25130 outputs: []outputInfo{
25131 {0, 23551},
25132 },
25133 },
25134 },
25135 {
25136 name: "ADDconst",
25137 auxType: auxInt32,
25138 argLen: 1,
25139 clobberFlags: true,
25140 asm: s390x.AADD,
25141 reg: regInfo{
25142 inputs: []inputInfo{
25143 {0, 56319},
25144 },
25145 outputs: []outputInfo{
25146 {0, 23551},
25147 },
25148 },
25149 },
25150 {
25151 name: "ADDWconst",
25152 auxType: auxInt32,
25153 argLen: 1,
25154 clobberFlags: true,
25155 asm: s390x.AADDW,
25156 reg: regInfo{
25157 inputs: []inputInfo{
25158 {0, 56319},
25159 },
25160 outputs: []outputInfo{
25161 {0, 23551},
25162 },
25163 },
25164 },
25165 {
25166 name: "ADDload",
25167 auxType: auxSymOff,
25168 argLen: 3,
25169 resultInArg0: true,
25170 clobberFlags: true,
25171 faultOnNilArg1: true,
25172 symEffect: SymRead,
25173 asm: s390x.AADD,
25174 reg: regInfo{
25175 inputs: []inputInfo{
25176 {0, 23551},
25177 {1, 56318},
25178 },
25179 outputs: []outputInfo{
25180 {0, 23551},
25181 },
25182 },
25183 },
25184 {
25185 name: "ADDWload",
25186 auxType: auxSymOff,
25187 argLen: 3,
25188 resultInArg0: true,
25189 clobberFlags: true,
25190 faultOnNilArg1: true,
25191 symEffect: SymRead,
25192 asm: s390x.AADDW,
25193 reg: regInfo{
25194 inputs: []inputInfo{
25195 {0, 23551},
25196 {1, 56318},
25197 },
25198 outputs: []outputInfo{
25199 {0, 23551},
25200 },
25201 },
25202 },
25203 {
25204 name: "SUB",
25205 argLen: 2,
25206 clobberFlags: true,
25207 asm: s390x.ASUB,
25208 reg: regInfo{
25209 inputs: []inputInfo{
25210 {0, 23551},
25211 {1, 23551},
25212 },
25213 outputs: []outputInfo{
25214 {0, 23551},
25215 },
25216 },
25217 },
25218 {
25219 name: "SUBW",
25220 argLen: 2,
25221 clobberFlags: true,
25222 asm: s390x.ASUBW,
25223 reg: regInfo{
25224 inputs: []inputInfo{
25225 {0, 23551},
25226 {1, 23551},
25227 },
25228 outputs: []outputInfo{
25229 {0, 23551},
25230 },
25231 },
25232 },
25233 {
25234 name: "SUBconst",
25235 auxType: auxInt32,
25236 argLen: 1,
25237 resultInArg0: true,
25238 clobberFlags: true,
25239 asm: s390x.ASUB,
25240 reg: regInfo{
25241 inputs: []inputInfo{
25242 {0, 23551},
25243 },
25244 outputs: []outputInfo{
25245 {0, 23551},
25246 },
25247 },
25248 },
25249 {
25250 name: "SUBWconst",
25251 auxType: auxInt32,
25252 argLen: 1,
25253 resultInArg0: true,
25254 clobberFlags: true,
25255 asm: s390x.ASUBW,
25256 reg: regInfo{
25257 inputs: []inputInfo{
25258 {0, 23551},
25259 },
25260 outputs: []outputInfo{
25261 {0, 23551},
25262 },
25263 },
25264 },
25265 {
25266 name: "SUBload",
25267 auxType: auxSymOff,
25268 argLen: 3,
25269 resultInArg0: true,
25270 clobberFlags: true,
25271 faultOnNilArg1: true,
25272 symEffect: SymRead,
25273 asm: s390x.ASUB,
25274 reg: regInfo{
25275 inputs: []inputInfo{
25276 {0, 23551},
25277 {1, 56318},
25278 },
25279 outputs: []outputInfo{
25280 {0, 23551},
25281 },
25282 },
25283 },
25284 {
25285 name: "SUBWload",
25286 auxType: auxSymOff,
25287 argLen: 3,
25288 resultInArg0: true,
25289 clobberFlags: true,
25290 faultOnNilArg1: true,
25291 symEffect: SymRead,
25292 asm: s390x.ASUBW,
25293 reg: regInfo{
25294 inputs: []inputInfo{
25295 {0, 23551},
25296 {1, 56318},
25297 },
25298 outputs: []outputInfo{
25299 {0, 23551},
25300 },
25301 },
25302 },
25303 {
25304 name: "MULLD",
25305 argLen: 2,
25306 commutative: true,
25307 resultInArg0: true,
25308 clobberFlags: true,
25309 asm: s390x.AMULLD,
25310 reg: regInfo{
25311 inputs: []inputInfo{
25312 {0, 23551},
25313 {1, 23551},
25314 },
25315 outputs: []outputInfo{
25316 {0, 23551},
25317 },
25318 },
25319 },
25320 {
25321 name: "MULLW",
25322 argLen: 2,
25323 commutative: true,
25324 resultInArg0: true,
25325 clobberFlags: true,
25326 asm: s390x.AMULLW,
25327 reg: regInfo{
25328 inputs: []inputInfo{
25329 {0, 23551},
25330 {1, 23551},
25331 },
25332 outputs: []outputInfo{
25333 {0, 23551},
25334 },
25335 },
25336 },
25337 {
25338 name: "MULLDconst",
25339 auxType: auxInt32,
25340 argLen: 1,
25341 resultInArg0: true,
25342 clobberFlags: true,
25343 asm: s390x.AMULLD,
25344 reg: regInfo{
25345 inputs: []inputInfo{
25346 {0, 23551},
25347 },
25348 outputs: []outputInfo{
25349 {0, 23551},
25350 },
25351 },
25352 },
25353 {
25354 name: "MULLWconst",
25355 auxType: auxInt32,
25356 argLen: 1,
25357 resultInArg0: true,
25358 clobberFlags: true,
25359 asm: s390x.AMULLW,
25360 reg: regInfo{
25361 inputs: []inputInfo{
25362 {0, 23551},
25363 },
25364 outputs: []outputInfo{
25365 {0, 23551},
25366 },
25367 },
25368 },
25369 {
25370 name: "MULLDload",
25371 auxType: auxSymOff,
25372 argLen: 3,
25373 resultInArg0: true,
25374 clobberFlags: true,
25375 faultOnNilArg1: true,
25376 symEffect: SymRead,
25377 asm: s390x.AMULLD,
25378 reg: regInfo{
25379 inputs: []inputInfo{
25380 {0, 23551},
25381 {1, 56318},
25382 },
25383 outputs: []outputInfo{
25384 {0, 23551},
25385 },
25386 },
25387 },
25388 {
25389 name: "MULLWload",
25390 auxType: auxSymOff,
25391 argLen: 3,
25392 resultInArg0: true,
25393 clobberFlags: true,
25394 faultOnNilArg1: true,
25395 symEffect: SymRead,
25396 asm: s390x.AMULLW,
25397 reg: regInfo{
25398 inputs: []inputInfo{
25399 {0, 23551},
25400 {1, 56318},
25401 },
25402 outputs: []outputInfo{
25403 {0, 23551},
25404 },
25405 },
25406 },
25407 {
25408 name: "MULHD",
25409 argLen: 2,
25410 commutative: true,
25411 resultInArg0: true,
25412 clobberFlags: true,
25413 asm: s390x.AMULHD,
25414 reg: regInfo{
25415 inputs: []inputInfo{
25416 {0, 21503},
25417 {1, 21503},
25418 },
25419 clobbers: 2048,
25420 outputs: []outputInfo{
25421 {0, 21503},
25422 },
25423 },
25424 },
25425 {
25426 name: "MULHDU",
25427 argLen: 2,
25428 commutative: true,
25429 resultInArg0: true,
25430 clobberFlags: true,
25431 asm: s390x.AMULHDU,
25432 reg: regInfo{
25433 inputs: []inputInfo{
25434 {0, 21503},
25435 {1, 21503},
25436 },
25437 clobbers: 2048,
25438 outputs: []outputInfo{
25439 {0, 21503},
25440 },
25441 },
25442 },
25443 {
25444 name: "DIVD",
25445 argLen: 2,
25446 resultInArg0: true,
25447 clobberFlags: true,
25448 asm: s390x.ADIVD,
25449 reg: regInfo{
25450 inputs: []inputInfo{
25451 {0, 21503},
25452 {1, 21503},
25453 },
25454 clobbers: 2048,
25455 outputs: []outputInfo{
25456 {0, 21503},
25457 },
25458 },
25459 },
25460 {
25461 name: "DIVW",
25462 argLen: 2,
25463 resultInArg0: true,
25464 clobberFlags: true,
25465 asm: s390x.ADIVW,
25466 reg: regInfo{
25467 inputs: []inputInfo{
25468 {0, 21503},
25469 {1, 21503},
25470 },
25471 clobbers: 2048,
25472 outputs: []outputInfo{
25473 {0, 21503},
25474 },
25475 },
25476 },
25477 {
25478 name: "DIVDU",
25479 argLen: 2,
25480 resultInArg0: true,
25481 clobberFlags: true,
25482 asm: s390x.ADIVDU,
25483 reg: regInfo{
25484 inputs: []inputInfo{
25485 {0, 21503},
25486 {1, 21503},
25487 },
25488 clobbers: 2048,
25489 outputs: []outputInfo{
25490 {0, 21503},
25491 },
25492 },
25493 },
25494 {
25495 name: "DIVWU",
25496 argLen: 2,
25497 resultInArg0: true,
25498 clobberFlags: true,
25499 asm: s390x.ADIVWU,
25500 reg: regInfo{
25501 inputs: []inputInfo{
25502 {0, 21503},
25503 {1, 21503},
25504 },
25505 clobbers: 2048,
25506 outputs: []outputInfo{
25507 {0, 21503},
25508 },
25509 },
25510 },
25511 {
25512 name: "MODD",
25513 argLen: 2,
25514 resultInArg0: true,
25515 clobberFlags: true,
25516 asm: s390x.AMODD,
25517 reg: regInfo{
25518 inputs: []inputInfo{
25519 {0, 21503},
25520 {1, 21503},
25521 },
25522 clobbers: 2048,
25523 outputs: []outputInfo{
25524 {0, 21503},
25525 },
25526 },
25527 },
25528 {
25529 name: "MODW",
25530 argLen: 2,
25531 resultInArg0: true,
25532 clobberFlags: true,
25533 asm: s390x.AMODW,
25534 reg: regInfo{
25535 inputs: []inputInfo{
25536 {0, 21503},
25537 {1, 21503},
25538 },
25539 clobbers: 2048,
25540 outputs: []outputInfo{
25541 {0, 21503},
25542 },
25543 },
25544 },
25545 {
25546 name: "MODDU",
25547 argLen: 2,
25548 resultInArg0: true,
25549 clobberFlags: true,
25550 asm: s390x.AMODDU,
25551 reg: regInfo{
25552 inputs: []inputInfo{
25553 {0, 21503},
25554 {1, 21503},
25555 },
25556 clobbers: 2048,
25557 outputs: []outputInfo{
25558 {0, 21503},
25559 },
25560 },
25561 },
25562 {
25563 name: "MODWU",
25564 argLen: 2,
25565 resultInArg0: true,
25566 clobberFlags: true,
25567 asm: s390x.AMODWU,
25568 reg: regInfo{
25569 inputs: []inputInfo{
25570 {0, 21503},
25571 {1, 21503},
25572 },
25573 clobbers: 2048,
25574 outputs: []outputInfo{
25575 {0, 21503},
25576 },
25577 },
25578 },
25579 {
25580 name: "AND",
25581 argLen: 2,
25582 commutative: true,
25583 clobberFlags: true,
25584 asm: s390x.AAND,
25585 reg: regInfo{
25586 inputs: []inputInfo{
25587 {0, 23551},
25588 {1, 23551},
25589 },
25590 outputs: []outputInfo{
25591 {0, 23551},
25592 },
25593 },
25594 },
25595 {
25596 name: "ANDW",
25597 argLen: 2,
25598 commutative: true,
25599 clobberFlags: true,
25600 asm: s390x.AANDW,
25601 reg: regInfo{
25602 inputs: []inputInfo{
25603 {0, 23551},
25604 {1, 23551},
25605 },
25606 outputs: []outputInfo{
25607 {0, 23551},
25608 },
25609 },
25610 },
25611 {
25612 name: "ANDconst",
25613 auxType: auxInt64,
25614 argLen: 1,
25615 resultInArg0: true,
25616 clobberFlags: true,
25617 asm: s390x.AAND,
25618 reg: regInfo{
25619 inputs: []inputInfo{
25620 {0, 23551},
25621 },
25622 outputs: []outputInfo{
25623 {0, 23551},
25624 },
25625 },
25626 },
25627 {
25628 name: "ANDWconst",
25629 auxType: auxInt32,
25630 argLen: 1,
25631 resultInArg0: true,
25632 clobberFlags: true,
25633 asm: s390x.AANDW,
25634 reg: regInfo{
25635 inputs: []inputInfo{
25636 {0, 23551},
25637 },
25638 outputs: []outputInfo{
25639 {0, 23551},
25640 },
25641 },
25642 },
25643 {
25644 name: "ANDload",
25645 auxType: auxSymOff,
25646 argLen: 3,
25647 resultInArg0: true,
25648 clobberFlags: true,
25649 faultOnNilArg1: true,
25650 symEffect: SymRead,
25651 asm: s390x.AAND,
25652 reg: regInfo{
25653 inputs: []inputInfo{
25654 {0, 23551},
25655 {1, 56318},
25656 },
25657 outputs: []outputInfo{
25658 {0, 23551},
25659 },
25660 },
25661 },
25662 {
25663 name: "ANDWload",
25664 auxType: auxSymOff,
25665 argLen: 3,
25666 resultInArg0: true,
25667 clobberFlags: true,
25668 faultOnNilArg1: true,
25669 symEffect: SymRead,
25670 asm: s390x.AANDW,
25671 reg: regInfo{
25672 inputs: []inputInfo{
25673 {0, 23551},
25674 {1, 56318},
25675 },
25676 outputs: []outputInfo{
25677 {0, 23551},
25678 },
25679 },
25680 },
25681 {
25682 name: "OR",
25683 argLen: 2,
25684 commutative: true,
25685 clobberFlags: true,
25686 asm: s390x.AOR,
25687 reg: regInfo{
25688 inputs: []inputInfo{
25689 {0, 23551},
25690 {1, 23551},
25691 },
25692 outputs: []outputInfo{
25693 {0, 23551},
25694 },
25695 },
25696 },
25697 {
25698 name: "ORW",
25699 argLen: 2,
25700 commutative: true,
25701 clobberFlags: true,
25702 asm: s390x.AORW,
25703 reg: regInfo{
25704 inputs: []inputInfo{
25705 {0, 23551},
25706 {1, 23551},
25707 },
25708 outputs: []outputInfo{
25709 {0, 23551},
25710 },
25711 },
25712 },
25713 {
25714 name: "ORconst",
25715 auxType: auxInt64,
25716 argLen: 1,
25717 resultInArg0: true,
25718 clobberFlags: true,
25719 asm: s390x.AOR,
25720 reg: regInfo{
25721 inputs: []inputInfo{
25722 {0, 23551},
25723 },
25724 outputs: []outputInfo{
25725 {0, 23551},
25726 },
25727 },
25728 },
25729 {
25730 name: "ORWconst",
25731 auxType: auxInt32,
25732 argLen: 1,
25733 resultInArg0: true,
25734 clobberFlags: true,
25735 asm: s390x.AORW,
25736 reg: regInfo{
25737 inputs: []inputInfo{
25738 {0, 23551},
25739 },
25740 outputs: []outputInfo{
25741 {0, 23551},
25742 },
25743 },
25744 },
25745 {
25746 name: "ORload",
25747 auxType: auxSymOff,
25748 argLen: 3,
25749 resultInArg0: true,
25750 clobberFlags: true,
25751 faultOnNilArg1: true,
25752 symEffect: SymRead,
25753 asm: s390x.AOR,
25754 reg: regInfo{
25755 inputs: []inputInfo{
25756 {0, 23551},
25757 {1, 56318},
25758 },
25759 outputs: []outputInfo{
25760 {0, 23551},
25761 },
25762 },
25763 },
25764 {
25765 name: "ORWload",
25766 auxType: auxSymOff,
25767 argLen: 3,
25768 resultInArg0: true,
25769 clobberFlags: true,
25770 faultOnNilArg1: true,
25771 symEffect: SymRead,
25772 asm: s390x.AORW,
25773 reg: regInfo{
25774 inputs: []inputInfo{
25775 {0, 23551},
25776 {1, 56318},
25777 },
25778 outputs: []outputInfo{
25779 {0, 23551},
25780 },
25781 },
25782 },
25783 {
25784 name: "XOR",
25785 argLen: 2,
25786 commutative: true,
25787 clobberFlags: true,
25788 asm: s390x.AXOR,
25789 reg: regInfo{
25790 inputs: []inputInfo{
25791 {0, 23551},
25792 {1, 23551},
25793 },
25794 outputs: []outputInfo{
25795 {0, 23551},
25796 },
25797 },
25798 },
25799 {
25800 name: "XORW",
25801 argLen: 2,
25802 commutative: true,
25803 clobberFlags: true,
25804 asm: s390x.AXORW,
25805 reg: regInfo{
25806 inputs: []inputInfo{
25807 {0, 23551},
25808 {1, 23551},
25809 },
25810 outputs: []outputInfo{
25811 {0, 23551},
25812 },
25813 },
25814 },
25815 {
25816 name: "XORconst",
25817 auxType: auxInt64,
25818 argLen: 1,
25819 resultInArg0: true,
25820 clobberFlags: true,
25821 asm: s390x.AXOR,
25822 reg: regInfo{
25823 inputs: []inputInfo{
25824 {0, 23551},
25825 },
25826 outputs: []outputInfo{
25827 {0, 23551},
25828 },
25829 },
25830 },
25831 {
25832 name: "XORWconst",
25833 auxType: auxInt32,
25834 argLen: 1,
25835 resultInArg0: true,
25836 clobberFlags: true,
25837 asm: s390x.AXORW,
25838 reg: regInfo{
25839 inputs: []inputInfo{
25840 {0, 23551},
25841 },
25842 outputs: []outputInfo{
25843 {0, 23551},
25844 },
25845 },
25846 },
25847 {
25848 name: "XORload",
25849 auxType: auxSymOff,
25850 argLen: 3,
25851 resultInArg0: true,
25852 clobberFlags: true,
25853 faultOnNilArg1: true,
25854 symEffect: SymRead,
25855 asm: s390x.AXOR,
25856 reg: regInfo{
25857 inputs: []inputInfo{
25858 {0, 23551},
25859 {1, 56318},
25860 },
25861 outputs: []outputInfo{
25862 {0, 23551},
25863 },
25864 },
25865 },
25866 {
25867 name: "XORWload",
25868 auxType: auxSymOff,
25869 argLen: 3,
25870 resultInArg0: true,
25871 clobberFlags: true,
25872 faultOnNilArg1: true,
25873 symEffect: SymRead,
25874 asm: s390x.AXORW,
25875 reg: regInfo{
25876 inputs: []inputInfo{
25877 {0, 23551},
25878 {1, 56318},
25879 },
25880 outputs: []outputInfo{
25881 {0, 23551},
25882 },
25883 },
25884 },
25885 {
25886 name: "ADDC",
25887 argLen: 2,
25888 commutative: true,
25889 asm: s390x.AADDC,
25890 reg: regInfo{
25891 inputs: []inputInfo{
25892 {0, 23551},
25893 {1, 23551},
25894 },
25895 outputs: []outputInfo{
25896 {0, 23551},
25897 },
25898 },
25899 },
25900 {
25901 name: "ADDCconst",
25902 auxType: auxInt16,
25903 argLen: 1,
25904 asm: s390x.AADDC,
25905 reg: regInfo{
25906 inputs: []inputInfo{
25907 {0, 23551},
25908 },
25909 outputs: []outputInfo{
25910 {0, 23551},
25911 },
25912 },
25913 },
25914 {
25915 name: "ADDE",
25916 argLen: 3,
25917 commutative: true,
25918 resultInArg0: true,
25919 asm: s390x.AADDE,
25920 reg: regInfo{
25921 inputs: []inputInfo{
25922 {0, 23551},
25923 {1, 23551},
25924 },
25925 outputs: []outputInfo{
25926 {0, 23551},
25927 },
25928 },
25929 },
25930 {
25931 name: "SUBC",
25932 argLen: 2,
25933 asm: s390x.ASUBC,
25934 reg: regInfo{
25935 inputs: []inputInfo{
25936 {0, 23551},
25937 {1, 23551},
25938 },
25939 outputs: []outputInfo{
25940 {0, 23551},
25941 },
25942 },
25943 },
25944 {
25945 name: "SUBE",
25946 argLen: 3,
25947 resultInArg0: true,
25948 asm: s390x.ASUBE,
25949 reg: regInfo{
25950 inputs: []inputInfo{
25951 {0, 23551},
25952 {1, 23551},
25953 },
25954 outputs: []outputInfo{
25955 {0, 23551},
25956 },
25957 },
25958 },
25959 {
25960 name: "CMP",
25961 argLen: 2,
25962 asm: s390x.ACMP,
25963 reg: regInfo{
25964 inputs: []inputInfo{
25965 {0, 56319},
25966 {1, 56319},
25967 },
25968 },
25969 },
25970 {
25971 name: "CMPW",
25972 argLen: 2,
25973 asm: s390x.ACMPW,
25974 reg: regInfo{
25975 inputs: []inputInfo{
25976 {0, 56319},
25977 {1, 56319},
25978 },
25979 },
25980 },
25981 {
25982 name: "CMPU",
25983 argLen: 2,
25984 asm: s390x.ACMPU,
25985 reg: regInfo{
25986 inputs: []inputInfo{
25987 {0, 56319},
25988 {1, 56319},
25989 },
25990 },
25991 },
25992 {
25993 name: "CMPWU",
25994 argLen: 2,
25995 asm: s390x.ACMPWU,
25996 reg: regInfo{
25997 inputs: []inputInfo{
25998 {0, 56319},
25999 {1, 56319},
26000 },
26001 },
26002 },
26003 {
26004 name: "CMPconst",
26005 auxType: auxInt32,
26006 argLen: 1,
26007 asm: s390x.ACMP,
26008 reg: regInfo{
26009 inputs: []inputInfo{
26010 {0, 56319},
26011 },
26012 },
26013 },
26014 {
26015 name: "CMPWconst",
26016 auxType: auxInt32,
26017 argLen: 1,
26018 asm: s390x.ACMPW,
26019 reg: regInfo{
26020 inputs: []inputInfo{
26021 {0, 56319},
26022 },
26023 },
26024 },
26025 {
26026 name: "CMPUconst",
26027 auxType: auxInt32,
26028 argLen: 1,
26029 asm: s390x.ACMPU,
26030 reg: regInfo{
26031 inputs: []inputInfo{
26032 {0, 56319},
26033 },
26034 },
26035 },
26036 {
26037 name: "CMPWUconst",
26038 auxType: auxInt32,
26039 argLen: 1,
26040 asm: s390x.ACMPWU,
26041 reg: regInfo{
26042 inputs: []inputInfo{
26043 {0, 56319},
26044 },
26045 },
26046 },
26047 {
26048 name: "FCMPS",
26049 argLen: 2,
26050 asm: s390x.ACEBR,
26051 reg: regInfo{
26052 inputs: []inputInfo{
26053 {0, 4294901760},
26054 {1, 4294901760},
26055 },
26056 },
26057 },
26058 {
26059 name: "FCMP",
26060 argLen: 2,
26061 asm: s390x.AFCMPU,
26062 reg: regInfo{
26063 inputs: []inputInfo{
26064 {0, 4294901760},
26065 {1, 4294901760},
26066 },
26067 },
26068 },
26069 {
26070 name: "SLD",
26071 argLen: 2,
26072 asm: s390x.ASLD,
26073 reg: regInfo{
26074 inputs: []inputInfo{
26075 {1, 23550},
26076 {0, 23551},
26077 },
26078 outputs: []outputInfo{
26079 {0, 23551},
26080 },
26081 },
26082 },
26083 {
26084 name: "SLW",
26085 argLen: 2,
26086 asm: s390x.ASLW,
26087 reg: regInfo{
26088 inputs: []inputInfo{
26089 {1, 23550},
26090 {0, 23551},
26091 },
26092 outputs: []outputInfo{
26093 {0, 23551},
26094 },
26095 },
26096 },
26097 {
26098 name: "SLDconst",
26099 auxType: auxInt8,
26100 argLen: 1,
26101 asm: s390x.ASLD,
26102 reg: regInfo{
26103 inputs: []inputInfo{
26104 {0, 23551},
26105 },
26106 outputs: []outputInfo{
26107 {0, 23551},
26108 },
26109 },
26110 },
26111 {
26112 name: "SLWconst",
26113 auxType: auxInt8,
26114 argLen: 1,
26115 asm: s390x.ASLW,
26116 reg: regInfo{
26117 inputs: []inputInfo{
26118 {0, 23551},
26119 },
26120 outputs: []outputInfo{
26121 {0, 23551},
26122 },
26123 },
26124 },
26125 {
26126 name: "SRD",
26127 argLen: 2,
26128 asm: s390x.ASRD,
26129 reg: regInfo{
26130 inputs: []inputInfo{
26131 {1, 23550},
26132 {0, 23551},
26133 },
26134 outputs: []outputInfo{
26135 {0, 23551},
26136 },
26137 },
26138 },
26139 {
26140 name: "SRW",
26141 argLen: 2,
26142 asm: s390x.ASRW,
26143 reg: regInfo{
26144 inputs: []inputInfo{
26145 {1, 23550},
26146 {0, 23551},
26147 },
26148 outputs: []outputInfo{
26149 {0, 23551},
26150 },
26151 },
26152 },
26153 {
26154 name: "SRDconst",
26155 auxType: auxInt8,
26156 argLen: 1,
26157 asm: s390x.ASRD,
26158 reg: regInfo{
26159 inputs: []inputInfo{
26160 {0, 23551},
26161 },
26162 outputs: []outputInfo{
26163 {0, 23551},
26164 },
26165 },
26166 },
26167 {
26168 name: "SRWconst",
26169 auxType: auxInt8,
26170 argLen: 1,
26171 asm: s390x.ASRW,
26172 reg: regInfo{
26173 inputs: []inputInfo{
26174 {0, 23551},
26175 },
26176 outputs: []outputInfo{
26177 {0, 23551},
26178 },
26179 },
26180 },
26181 {
26182 name: "SRAD",
26183 argLen: 2,
26184 clobberFlags: true,
26185 asm: s390x.ASRAD,
26186 reg: regInfo{
26187 inputs: []inputInfo{
26188 {1, 23550},
26189 {0, 23551},
26190 },
26191 outputs: []outputInfo{
26192 {0, 23551},
26193 },
26194 },
26195 },
26196 {
26197 name: "SRAW",
26198 argLen: 2,
26199 clobberFlags: true,
26200 asm: s390x.ASRAW,
26201 reg: regInfo{
26202 inputs: []inputInfo{
26203 {1, 23550},
26204 {0, 23551},
26205 },
26206 outputs: []outputInfo{
26207 {0, 23551},
26208 },
26209 },
26210 },
26211 {
26212 name: "SRADconst",
26213 auxType: auxInt8,
26214 argLen: 1,
26215 clobberFlags: true,
26216 asm: s390x.ASRAD,
26217 reg: regInfo{
26218 inputs: []inputInfo{
26219 {0, 23551},
26220 },
26221 outputs: []outputInfo{
26222 {0, 23551},
26223 },
26224 },
26225 },
26226 {
26227 name: "SRAWconst",
26228 auxType: auxInt8,
26229 argLen: 1,
26230 clobberFlags: true,
26231 asm: s390x.ASRAW,
26232 reg: regInfo{
26233 inputs: []inputInfo{
26234 {0, 23551},
26235 },
26236 outputs: []outputInfo{
26237 {0, 23551},
26238 },
26239 },
26240 },
26241 {
26242 name: "RLLG",
26243 argLen: 2,
26244 asm: s390x.ARLLG,
26245 reg: regInfo{
26246 inputs: []inputInfo{
26247 {1, 23550},
26248 {0, 23551},
26249 },
26250 outputs: []outputInfo{
26251 {0, 23551},
26252 },
26253 },
26254 },
26255 {
26256 name: "RLL",
26257 argLen: 2,
26258 asm: s390x.ARLL,
26259 reg: regInfo{
26260 inputs: []inputInfo{
26261 {1, 23550},
26262 {0, 23551},
26263 },
26264 outputs: []outputInfo{
26265 {0, 23551},
26266 },
26267 },
26268 },
26269 {
26270 name: "RLLGconst",
26271 auxType: auxInt8,
26272 argLen: 1,
26273 asm: s390x.ARLLG,
26274 reg: regInfo{
26275 inputs: []inputInfo{
26276 {0, 23551},
26277 },
26278 outputs: []outputInfo{
26279 {0, 23551},
26280 },
26281 },
26282 },
26283 {
26284 name: "RLLconst",
26285 auxType: auxInt8,
26286 argLen: 1,
26287 asm: s390x.ARLL,
26288 reg: regInfo{
26289 inputs: []inputInfo{
26290 {0, 23551},
26291 },
26292 outputs: []outputInfo{
26293 {0, 23551},
26294 },
26295 },
26296 },
26297 {
26298 name: "NEG",
26299 argLen: 1,
26300 clobberFlags: true,
26301 asm: s390x.ANEG,
26302 reg: regInfo{
26303 inputs: []inputInfo{
26304 {0, 23551},
26305 },
26306 outputs: []outputInfo{
26307 {0, 23551},
26308 },
26309 },
26310 },
26311 {
26312 name: "NEGW",
26313 argLen: 1,
26314 clobberFlags: true,
26315 asm: s390x.ANEGW,
26316 reg: regInfo{
26317 inputs: []inputInfo{
26318 {0, 23551},
26319 },
26320 outputs: []outputInfo{
26321 {0, 23551},
26322 },
26323 },
26324 },
26325 {
26326 name: "NOT",
26327 argLen: 1,
26328 resultInArg0: true,
26329 clobberFlags: true,
26330 reg: regInfo{
26331 inputs: []inputInfo{
26332 {0, 23551},
26333 },
26334 outputs: []outputInfo{
26335 {0, 23551},
26336 },
26337 },
26338 },
26339 {
26340 name: "NOTW",
26341 argLen: 1,
26342 resultInArg0: true,
26343 clobberFlags: true,
26344 reg: regInfo{
26345 inputs: []inputInfo{
26346 {0, 23551},
26347 },
26348 outputs: []outputInfo{
26349 {0, 23551},
26350 },
26351 },
26352 },
26353 {
26354 name: "FSQRT",
26355 argLen: 1,
26356 asm: s390x.AFSQRT,
26357 reg: regInfo{
26358 inputs: []inputInfo{
26359 {0, 4294901760},
26360 },
26361 outputs: []outputInfo{
26362 {0, 4294901760},
26363 },
26364 },
26365 },
26366 {
26367 name: "MOVDEQ",
26368 argLen: 3,
26369 resultInArg0: true,
26370 asm: s390x.AMOVDEQ,
26371 reg: regInfo{
26372 inputs: []inputInfo{
26373 {0, 23551},
26374 {1, 23551},
26375 },
26376 outputs: []outputInfo{
26377 {0, 23551},
26378 },
26379 },
26380 },
26381 {
26382 name: "MOVDNE",
26383 argLen: 3,
26384 resultInArg0: true,
26385 asm: s390x.AMOVDNE,
26386 reg: regInfo{
26387 inputs: []inputInfo{
26388 {0, 23551},
26389 {1, 23551},
26390 },
26391 outputs: []outputInfo{
26392 {0, 23551},
26393 },
26394 },
26395 },
26396 {
26397 name: "MOVDLT",
26398 argLen: 3,
26399 resultInArg0: true,
26400 asm: s390x.AMOVDLT,
26401 reg: regInfo{
26402 inputs: []inputInfo{
26403 {0, 23551},
26404 {1, 23551},
26405 },
26406 outputs: []outputInfo{
26407 {0, 23551},
26408 },
26409 },
26410 },
26411 {
26412 name: "MOVDLE",
26413 argLen: 3,
26414 resultInArg0: true,
26415 asm: s390x.AMOVDLE,
26416 reg: regInfo{
26417 inputs: []inputInfo{
26418 {0, 23551},
26419 {1, 23551},
26420 },
26421 outputs: []outputInfo{
26422 {0, 23551},
26423 },
26424 },
26425 },
26426 {
26427 name: "MOVDGT",
26428 argLen: 3,
26429 resultInArg0: true,
26430 asm: s390x.AMOVDGT,
26431 reg: regInfo{
26432 inputs: []inputInfo{
26433 {0, 23551},
26434 {1, 23551},
26435 },
26436 outputs: []outputInfo{
26437 {0, 23551},
26438 },
26439 },
26440 },
26441 {
26442 name: "MOVDGE",
26443 argLen: 3,
26444 resultInArg0: true,
26445 asm: s390x.AMOVDGE,
26446 reg: regInfo{
26447 inputs: []inputInfo{
26448 {0, 23551},
26449 {1, 23551},
26450 },
26451 outputs: []outputInfo{
26452 {0, 23551},
26453 },
26454 },
26455 },
26456 {
26457 name: "MOVDGTnoinv",
26458 argLen: 3,
26459 resultInArg0: true,
26460 asm: s390x.AMOVDGT,
26461 reg: regInfo{
26462 inputs: []inputInfo{
26463 {0, 23551},
26464 {1, 23551},
26465 },
26466 outputs: []outputInfo{
26467 {0, 23551},
26468 },
26469 },
26470 },
26471 {
26472 name: "MOVDGEnoinv",
26473 argLen: 3,
26474 resultInArg0: true,
26475 asm: s390x.AMOVDGE,
26476 reg: regInfo{
26477 inputs: []inputInfo{
26478 {0, 23551},
26479 {1, 23551},
26480 },
26481 outputs: []outputInfo{
26482 {0, 23551},
26483 },
26484 },
26485 },
26486 {
26487 name: "MOVBreg",
26488 argLen: 1,
26489 asm: s390x.AMOVB,
26490 reg: regInfo{
26491 inputs: []inputInfo{
26492 {0, 56319},
26493 },
26494 outputs: []outputInfo{
26495 {0, 23551},
26496 },
26497 },
26498 },
26499 {
26500 name: "MOVBZreg",
26501 argLen: 1,
26502 asm: s390x.AMOVBZ,
26503 reg: regInfo{
26504 inputs: []inputInfo{
26505 {0, 56319},
26506 },
26507 outputs: []outputInfo{
26508 {0, 23551},
26509 },
26510 },
26511 },
26512 {
26513 name: "MOVHreg",
26514 argLen: 1,
26515 asm: s390x.AMOVH,
26516 reg: regInfo{
26517 inputs: []inputInfo{
26518 {0, 56319},
26519 },
26520 outputs: []outputInfo{
26521 {0, 23551},
26522 },
26523 },
26524 },
26525 {
26526 name: "MOVHZreg",
26527 argLen: 1,
26528 asm: s390x.AMOVHZ,
26529 reg: regInfo{
26530 inputs: []inputInfo{
26531 {0, 56319},
26532 },
26533 outputs: []outputInfo{
26534 {0, 23551},
26535 },
26536 },
26537 },
26538 {
26539 name: "MOVWreg",
26540 argLen: 1,
26541 asm: s390x.AMOVW,
26542 reg: regInfo{
26543 inputs: []inputInfo{
26544 {0, 56319},
26545 },
26546 outputs: []outputInfo{
26547 {0, 23551},
26548 },
26549 },
26550 },
26551 {
26552 name: "MOVWZreg",
26553 argLen: 1,
26554 asm: s390x.AMOVWZ,
26555 reg: regInfo{
26556 inputs: []inputInfo{
26557 {0, 56319},
26558 },
26559 outputs: []outputInfo{
26560 {0, 23551},
26561 },
26562 },
26563 },
26564 {
26565 name: "MOVDreg",
26566 argLen: 1,
26567 asm: s390x.AMOVD,
26568 reg: regInfo{
26569 inputs: []inputInfo{
26570 {0, 56319},
26571 },
26572 outputs: []outputInfo{
26573 {0, 23551},
26574 },
26575 },
26576 },
26577 {
26578 name: "MOVDnop",
26579 argLen: 1,
26580 resultInArg0: true,
26581 reg: regInfo{
26582 inputs: []inputInfo{
26583 {0, 23551},
26584 },
26585 outputs: []outputInfo{
26586 {0, 23551},
26587 },
26588 },
26589 },
26590 {
26591 name: "MOVDconst",
26592 auxType: auxInt64,
26593 argLen: 0,
26594 rematerializeable: true,
26595 asm: s390x.AMOVD,
26596 reg: regInfo{
26597 outputs: []outputInfo{
26598 {0, 23551},
26599 },
26600 },
26601 },
26602 {
26603 name: "LDGR",
26604 argLen: 1,
26605 asm: s390x.ALDGR,
26606 reg: regInfo{
26607 inputs: []inputInfo{
26608 {0, 23551},
26609 },
26610 outputs: []outputInfo{
26611 {0, 4294901760},
26612 },
26613 },
26614 },
26615 {
26616 name: "LGDR",
26617 argLen: 1,
26618 asm: s390x.ALGDR,
26619 reg: regInfo{
26620 inputs: []inputInfo{
26621 {0, 4294901760},
26622 },
26623 outputs: []outputInfo{
26624 {0, 23551},
26625 },
26626 },
26627 },
26628 {
26629 name: "CFDBRA",
26630 argLen: 1,
26631 asm: s390x.ACFDBRA,
26632 reg: regInfo{
26633 inputs: []inputInfo{
26634 {0, 4294901760},
26635 },
26636 outputs: []outputInfo{
26637 {0, 23551},
26638 },
26639 },
26640 },
26641 {
26642 name: "CGDBRA",
26643 argLen: 1,
26644 asm: s390x.ACGDBRA,
26645 reg: regInfo{
26646 inputs: []inputInfo{
26647 {0, 4294901760},
26648 },
26649 outputs: []outputInfo{
26650 {0, 23551},
26651 },
26652 },
26653 },
26654 {
26655 name: "CFEBRA",
26656 argLen: 1,
26657 asm: s390x.ACFEBRA,
26658 reg: regInfo{
26659 inputs: []inputInfo{
26660 {0, 4294901760},
26661 },
26662 outputs: []outputInfo{
26663 {0, 23551},
26664 },
26665 },
26666 },
26667 {
26668 name: "CGEBRA",
26669 argLen: 1,
26670 asm: s390x.ACGEBRA,
26671 reg: regInfo{
26672 inputs: []inputInfo{
26673 {0, 4294901760},
26674 },
26675 outputs: []outputInfo{
26676 {0, 23551},
26677 },
26678 },
26679 },
26680 {
26681 name: "CEFBRA",
26682 argLen: 1,
26683 asm: s390x.ACEFBRA,
26684 reg: regInfo{
26685 inputs: []inputInfo{
26686 {0, 23551},
26687 },
26688 outputs: []outputInfo{
26689 {0, 4294901760},
26690 },
26691 },
26692 },
26693 {
26694 name: "CDFBRA",
26695 argLen: 1,
26696 asm: s390x.ACDFBRA,
26697 reg: regInfo{
26698 inputs: []inputInfo{
26699 {0, 23551},
26700 },
26701 outputs: []outputInfo{
26702 {0, 4294901760},
26703 },
26704 },
26705 },
26706 {
26707 name: "CEGBRA",
26708 argLen: 1,
26709 asm: s390x.ACEGBRA,
26710 reg: regInfo{
26711 inputs: []inputInfo{
26712 {0, 23551},
26713 },
26714 outputs: []outputInfo{
26715 {0, 4294901760},
26716 },
26717 },
26718 },
26719 {
26720 name: "CDGBRA",
26721 argLen: 1,
26722 asm: s390x.ACDGBRA,
26723 reg: regInfo{
26724 inputs: []inputInfo{
26725 {0, 23551},
26726 },
26727 outputs: []outputInfo{
26728 {0, 4294901760},
26729 },
26730 },
26731 },
26732 {
26733 name: "LEDBR",
26734 argLen: 1,
26735 asm: s390x.ALEDBR,
26736 reg: regInfo{
26737 inputs: []inputInfo{
26738 {0, 4294901760},
26739 },
26740 outputs: []outputInfo{
26741 {0, 4294901760},
26742 },
26743 },
26744 },
26745 {
26746 name: "LDEBR",
26747 argLen: 1,
26748 asm: s390x.ALDEBR,
26749 reg: regInfo{
26750 inputs: []inputInfo{
26751 {0, 4294901760},
26752 },
26753 outputs: []outputInfo{
26754 {0, 4294901760},
26755 },
26756 },
26757 },
26758 {
26759 name: "MOVDaddr",
26760 auxType: auxSymOff,
26761 argLen: 1,
26762 rematerializeable: true,
26763 symEffect: SymRead,
26764 reg: regInfo{
26765 inputs: []inputInfo{
26766 {0, 4295000064},
26767 },
26768 outputs: []outputInfo{
26769 {0, 23551},
26770 },
26771 },
26772 },
26773 {
26774 name: "MOVDaddridx",
26775 auxType: auxSymOff,
26776 argLen: 2,
26777 symEffect: SymRead,
26778 reg: regInfo{
26779 inputs: []inputInfo{
26780 {0, 4295000064},
26781 {1, 56318},
26782 },
26783 outputs: []outputInfo{
26784 {0, 23551},
26785 },
26786 },
26787 },
26788 {
26789 name: "MOVBZload",
26790 auxType: auxSymOff,
26791 argLen: 2,
26792 faultOnNilArg0: true,
26793 symEffect: SymRead,
26794 asm: s390x.AMOVBZ,
26795 reg: regInfo{
26796 inputs: []inputInfo{
26797 {0, 4295023614},
26798 },
26799 outputs: []outputInfo{
26800 {0, 23551},
26801 },
26802 },
26803 },
26804 {
26805 name: "MOVBload",
26806 auxType: auxSymOff,
26807 argLen: 2,
26808 faultOnNilArg0: true,
26809 symEffect: SymRead,
26810 asm: s390x.AMOVB,
26811 reg: regInfo{
26812 inputs: []inputInfo{
26813 {0, 4295023614},
26814 },
26815 outputs: []outputInfo{
26816 {0, 23551},
26817 },
26818 },
26819 },
26820 {
26821 name: "MOVHZload",
26822 auxType: auxSymOff,
26823 argLen: 2,
26824 faultOnNilArg0: true,
26825 symEffect: SymRead,
26826 asm: s390x.AMOVHZ,
26827 reg: regInfo{
26828 inputs: []inputInfo{
26829 {0, 4295023614},
26830 },
26831 outputs: []outputInfo{
26832 {0, 23551},
26833 },
26834 },
26835 },
26836 {
26837 name: "MOVHload",
26838 auxType: auxSymOff,
26839 argLen: 2,
26840 faultOnNilArg0: true,
26841 symEffect: SymRead,
26842 asm: s390x.AMOVH,
26843 reg: regInfo{
26844 inputs: []inputInfo{
26845 {0, 4295023614},
26846 },
26847 outputs: []outputInfo{
26848 {0, 23551},
26849 },
26850 },
26851 },
26852 {
26853 name: "MOVWZload",
26854 auxType: auxSymOff,
26855 argLen: 2,
26856 faultOnNilArg0: true,
26857 symEffect: SymRead,
26858 asm: s390x.AMOVWZ,
26859 reg: regInfo{
26860 inputs: []inputInfo{
26861 {0, 4295023614},
26862 },
26863 outputs: []outputInfo{
26864 {0, 23551},
26865 },
26866 },
26867 },
26868 {
26869 name: "MOVWload",
26870 auxType: auxSymOff,
26871 argLen: 2,
26872 faultOnNilArg0: true,
26873 symEffect: SymRead,
26874 asm: s390x.AMOVW,
26875 reg: regInfo{
26876 inputs: []inputInfo{
26877 {0, 4295023614},
26878 },
26879 outputs: []outputInfo{
26880 {0, 23551},
26881 },
26882 },
26883 },
26884 {
26885 name: "MOVDload",
26886 auxType: auxSymOff,
26887 argLen: 2,
26888 faultOnNilArg0: true,
26889 symEffect: SymRead,
26890 asm: s390x.AMOVD,
26891 reg: regInfo{
26892 inputs: []inputInfo{
26893 {0, 4295023614},
26894 },
26895 outputs: []outputInfo{
26896 {0, 23551},
26897 },
26898 },
26899 },
26900 {
26901 name: "MOVWBR",
26902 argLen: 1,
26903 asm: s390x.AMOVWBR,
26904 reg: regInfo{
26905 inputs: []inputInfo{
26906 {0, 23551},
26907 },
26908 outputs: []outputInfo{
26909 {0, 23551},
26910 },
26911 },
26912 },
26913 {
26914 name: "MOVDBR",
26915 argLen: 1,
26916 asm: s390x.AMOVDBR,
26917 reg: regInfo{
26918 inputs: []inputInfo{
26919 {0, 23551},
26920 },
26921 outputs: []outputInfo{
26922 {0, 23551},
26923 },
26924 },
26925 },
26926 {
26927 name: "MOVHBRload",
26928 auxType: auxSymOff,
26929 argLen: 2,
26930 faultOnNilArg0: true,
26931 symEffect: SymRead,
26932 asm: s390x.AMOVHBR,
26933 reg: regInfo{
26934 inputs: []inputInfo{
26935 {0, 4295023614},
26936 },
26937 outputs: []outputInfo{
26938 {0, 23551},
26939 },
26940 },
26941 },
26942 {
26943 name: "MOVWBRload",
26944 auxType: auxSymOff,
26945 argLen: 2,
26946 faultOnNilArg0: true,
26947 symEffect: SymRead,
26948 asm: s390x.AMOVWBR,
26949 reg: regInfo{
26950 inputs: []inputInfo{
26951 {0, 4295023614},
26952 },
26953 outputs: []outputInfo{
26954 {0, 23551},
26955 },
26956 },
26957 },
26958 {
26959 name: "MOVDBRload",
26960 auxType: auxSymOff,
26961 argLen: 2,
26962 faultOnNilArg0: true,
26963 symEffect: SymRead,
26964 asm: s390x.AMOVDBR,
26965 reg: regInfo{
26966 inputs: []inputInfo{
26967 {0, 4295023614},
26968 },
26969 outputs: []outputInfo{
26970 {0, 23551},
26971 },
26972 },
26973 },
26974 {
26975 name: "MOVBstore",
26976 auxType: auxSymOff,
26977 argLen: 3,
26978 faultOnNilArg0: true,
26979 symEffect: SymWrite,
26980 asm: s390x.AMOVB,
26981 reg: regInfo{
26982 inputs: []inputInfo{
26983 {0, 4295023614},
26984 {1, 56319},
26985 },
26986 },
26987 },
26988 {
26989 name: "MOVHstore",
26990 auxType: auxSymOff,
26991 argLen: 3,
26992 faultOnNilArg0: true,
26993 symEffect: SymWrite,
26994 asm: s390x.AMOVH,
26995 reg: regInfo{
26996 inputs: []inputInfo{
26997 {0, 4295023614},
26998 {1, 56319},
26999 },
27000 },
27001 },
27002 {
27003 name: "MOVWstore",
27004 auxType: auxSymOff,
27005 argLen: 3,
27006 faultOnNilArg0: true,
27007 symEffect: SymWrite,
27008 asm: s390x.AMOVW,
27009 reg: regInfo{
27010 inputs: []inputInfo{
27011 {0, 4295023614},
27012 {1, 56319},
27013 },
27014 },
27015 },
27016 {
27017 name: "MOVDstore",
27018 auxType: auxSymOff,
27019 argLen: 3,
27020 faultOnNilArg0: true,
27021 symEffect: SymWrite,
27022 asm: s390x.AMOVD,
27023 reg: regInfo{
27024 inputs: []inputInfo{
27025 {0, 4295023614},
27026 {1, 56319},
27027 },
27028 },
27029 },
27030 {
27031 name: "MOVHBRstore",
27032 auxType: auxSymOff,
27033 argLen: 3,
27034 faultOnNilArg0: true,
27035 symEffect: SymWrite,
27036 asm: s390x.AMOVHBR,
27037 reg: regInfo{
27038 inputs: []inputInfo{
27039 {0, 56318},
27040 {1, 56319},
27041 },
27042 },
27043 },
27044 {
27045 name: "MOVWBRstore",
27046 auxType: auxSymOff,
27047 argLen: 3,
27048 faultOnNilArg0: true,
27049 symEffect: SymWrite,
27050 asm: s390x.AMOVWBR,
27051 reg: regInfo{
27052 inputs: []inputInfo{
27053 {0, 56318},
27054 {1, 56319},
27055 },
27056 },
27057 },
27058 {
27059 name: "MOVDBRstore",
27060 auxType: auxSymOff,
27061 argLen: 3,
27062 faultOnNilArg0: true,
27063 symEffect: SymWrite,
27064 asm: s390x.AMOVDBR,
27065 reg: regInfo{
27066 inputs: []inputInfo{
27067 {0, 56318},
27068 {1, 56319},
27069 },
27070 },
27071 },
27072 {
27073 name: "MVC",
27074 auxType: auxSymValAndOff,
27075 argLen: 3,
27076 clobberFlags: true,
27077 faultOnNilArg0: true,
27078 faultOnNilArg1: true,
27079 symEffect: SymNone,
27080 asm: s390x.AMVC,
27081 reg: regInfo{
27082 inputs: []inputInfo{
27083 {0, 56318},
27084 {1, 56318},
27085 },
27086 },
27087 },
27088 {
27089 name: "MOVBZloadidx",
27090 auxType: auxSymOff,
27091 argLen: 3,
27092 commutative: true,
27093 symEffect: SymRead,
27094 asm: s390x.AMOVBZ,
27095 reg: regInfo{
27096 inputs: []inputInfo{
27097 {1, 56318},
27098 {0, 4295023614},
27099 },
27100 outputs: []outputInfo{
27101 {0, 23551},
27102 },
27103 },
27104 },
27105 {
27106 name: "MOVBloadidx",
27107 auxType: auxSymOff,
27108 argLen: 3,
27109 commutative: true,
27110 symEffect: SymRead,
27111 asm: s390x.AMOVB,
27112 reg: regInfo{
27113 inputs: []inputInfo{
27114 {1, 56318},
27115 {0, 4295023614},
27116 },
27117 outputs: []outputInfo{
27118 {0, 23551},
27119 },
27120 },
27121 },
27122 {
27123 name: "MOVHZloadidx",
27124 auxType: auxSymOff,
27125 argLen: 3,
27126 commutative: true,
27127 symEffect: SymRead,
27128 asm: s390x.AMOVHZ,
27129 reg: regInfo{
27130 inputs: []inputInfo{
27131 {1, 56318},
27132 {0, 4295023614},
27133 },
27134 outputs: []outputInfo{
27135 {0, 23551},
27136 },
27137 },
27138 },
27139 {
27140 name: "MOVHloadidx",
27141 auxType: auxSymOff,
27142 argLen: 3,
27143 commutative: true,
27144 symEffect: SymRead,
27145 asm: s390x.AMOVH,
27146 reg: regInfo{
27147 inputs: []inputInfo{
27148 {1, 56318},
27149 {0, 4295023614},
27150 },
27151 outputs: []outputInfo{
27152 {0, 23551},
27153 },
27154 },
27155 },
27156 {
27157 name: "MOVWZloadidx",
27158 auxType: auxSymOff,
27159 argLen: 3,
27160 commutative: true,
27161 symEffect: SymRead,
27162 asm: s390x.AMOVWZ,
27163 reg: regInfo{
27164 inputs: []inputInfo{
27165 {1, 56318},
27166 {0, 4295023614},
27167 },
27168 outputs: []outputInfo{
27169 {0, 23551},
27170 },
27171 },
27172 },
27173 {
27174 name: "MOVWloadidx",
27175 auxType: auxSymOff,
27176 argLen: 3,
27177 commutative: true,
27178 symEffect: SymRead,
27179 asm: s390x.AMOVW,
27180 reg: regInfo{
27181 inputs: []inputInfo{
27182 {1, 56318},
27183 {0, 4295023614},
27184 },
27185 outputs: []outputInfo{
27186 {0, 23551},
27187 },
27188 },
27189 },
27190 {
27191 name: "MOVDloadidx",
27192 auxType: auxSymOff,
27193 argLen: 3,
27194 commutative: true,
27195 symEffect: SymRead,
27196 asm: s390x.AMOVD,
27197 reg: regInfo{
27198 inputs: []inputInfo{
27199 {1, 56318},
27200 {0, 4295023614},
27201 },
27202 outputs: []outputInfo{
27203 {0, 23551},
27204 },
27205 },
27206 },
27207 {
27208 name: "MOVHBRloadidx",
27209 auxType: auxSymOff,
27210 argLen: 3,
27211 commutative: true,
27212 symEffect: SymRead,
27213 asm: s390x.AMOVHBR,
27214 reg: regInfo{
27215 inputs: []inputInfo{
27216 {1, 56318},
27217 {0, 4295023614},
27218 },
27219 outputs: []outputInfo{
27220 {0, 23551},
27221 },
27222 },
27223 },
27224 {
27225 name: "MOVWBRloadidx",
27226 auxType: auxSymOff,
27227 argLen: 3,
27228 commutative: true,
27229 symEffect: SymRead,
27230 asm: s390x.AMOVWBR,
27231 reg: regInfo{
27232 inputs: []inputInfo{
27233 {1, 56318},
27234 {0, 4295023614},
27235 },
27236 outputs: []outputInfo{
27237 {0, 23551},
27238 },
27239 },
27240 },
27241 {
27242 name: "MOVDBRloadidx",
27243 auxType: auxSymOff,
27244 argLen: 3,
27245 commutative: true,
27246 symEffect: SymRead,
27247 asm: s390x.AMOVDBR,
27248 reg: regInfo{
27249 inputs: []inputInfo{
27250 {1, 56318},
27251 {0, 4295023614},
27252 },
27253 outputs: []outputInfo{
27254 {0, 23551},
27255 },
27256 },
27257 },
27258 {
27259 name: "MOVBstoreidx",
27260 auxType: auxSymOff,
27261 argLen: 4,
27262 commutative: true,
27263 symEffect: SymWrite,
27264 asm: s390x.AMOVB,
27265 reg: regInfo{
27266 inputs: []inputInfo{
27267 {0, 56318},
27268 {1, 56318},
27269 {2, 56319},
27270 },
27271 },
27272 },
27273 {
27274 name: "MOVHstoreidx",
27275 auxType: auxSymOff,
27276 argLen: 4,
27277 commutative: true,
27278 symEffect: SymWrite,
27279 asm: s390x.AMOVH,
27280 reg: regInfo{
27281 inputs: []inputInfo{
27282 {0, 56318},
27283 {1, 56318},
27284 {2, 56319},
27285 },
27286 },
27287 },
27288 {
27289 name: "MOVWstoreidx",
27290 auxType: auxSymOff,
27291 argLen: 4,
27292 commutative: true,
27293 symEffect: SymWrite,
27294 asm: s390x.AMOVW,
27295 reg: regInfo{
27296 inputs: []inputInfo{
27297 {0, 56318},
27298 {1, 56318},
27299 {2, 56319},
27300 },
27301 },
27302 },
27303 {
27304 name: "MOVDstoreidx",
27305 auxType: auxSymOff,
27306 argLen: 4,
27307 commutative: true,
27308 symEffect: SymWrite,
27309 asm: s390x.AMOVD,
27310 reg: regInfo{
27311 inputs: []inputInfo{
27312 {0, 56318},
27313 {1, 56318},
27314 {2, 56319},
27315 },
27316 },
27317 },
27318 {
27319 name: "MOVHBRstoreidx",
27320 auxType: auxSymOff,
27321 argLen: 4,
27322 commutative: true,
27323 symEffect: SymWrite,
27324 asm: s390x.AMOVHBR,
27325 reg: regInfo{
27326 inputs: []inputInfo{
27327 {0, 56318},
27328 {1, 56318},
27329 {2, 56319},
27330 },
27331 },
27332 },
27333 {
27334 name: "MOVWBRstoreidx",
27335 auxType: auxSymOff,
27336 argLen: 4,
27337 commutative: true,
27338 symEffect: SymWrite,
27339 asm: s390x.AMOVWBR,
27340 reg: regInfo{
27341 inputs: []inputInfo{
27342 {0, 56318},
27343 {1, 56318},
27344 {2, 56319},
27345 },
27346 },
27347 },
27348 {
27349 name: "MOVDBRstoreidx",
27350 auxType: auxSymOff,
27351 argLen: 4,
27352 commutative: true,
27353 symEffect: SymWrite,
27354 asm: s390x.AMOVDBR,
27355 reg: regInfo{
27356 inputs: []inputInfo{
27357 {0, 56318},
27358 {1, 56318},
27359 {2, 56319},
27360 },
27361 },
27362 },
27363 {
27364 name: "MOVBstoreconst",
27365 auxType: auxSymValAndOff,
27366 argLen: 2,
27367 faultOnNilArg0: true,
27368 symEffect: SymWrite,
27369 asm: s390x.AMOVB,
27370 reg: regInfo{
27371 inputs: []inputInfo{
27372 {0, 4295023614},
27373 },
27374 },
27375 },
27376 {
27377 name: "MOVHstoreconst",
27378 auxType: auxSymValAndOff,
27379 argLen: 2,
27380 faultOnNilArg0: true,
27381 symEffect: SymWrite,
27382 asm: s390x.AMOVH,
27383 reg: regInfo{
27384 inputs: []inputInfo{
27385 {0, 4295023614},
27386 },
27387 },
27388 },
27389 {
27390 name: "MOVWstoreconst",
27391 auxType: auxSymValAndOff,
27392 argLen: 2,
27393 faultOnNilArg0: true,
27394 symEffect: SymWrite,
27395 asm: s390x.AMOVW,
27396 reg: regInfo{
27397 inputs: []inputInfo{
27398 {0, 4295023614},
27399 },
27400 },
27401 },
27402 {
27403 name: "MOVDstoreconst",
27404 auxType: auxSymValAndOff,
27405 argLen: 2,
27406 faultOnNilArg0: true,
27407 symEffect: SymWrite,
27408 asm: s390x.AMOVD,
27409 reg: regInfo{
27410 inputs: []inputInfo{
27411 {0, 4295023614},
27412 },
27413 },
27414 },
27415 {
27416 name: "CLEAR",
27417 auxType: auxSymValAndOff,
27418 argLen: 2,
27419 clobberFlags: true,
27420 faultOnNilArg0: true,
27421 symEffect: SymWrite,
27422 asm: s390x.ACLEAR,
27423 reg: regInfo{
27424 inputs: []inputInfo{
27425 {0, 23550},
27426 },
27427 },
27428 },
27429 {
27430 name: "CALLstatic",
27431 auxType: auxSymOff,
27432 argLen: 1,
27433 clobberFlags: true,
27434 call: true,
27435 symEffect: SymNone,
27436 reg: regInfo{
27437 clobbers: 4294933503,
27438 },
27439 },
27440 {
27441 name: "CALLclosure",
27442 auxType: auxInt64,
27443 argLen: 3,
27444 clobberFlags: true,
27445 call: true,
27446 reg: regInfo{
27447 inputs: []inputInfo{
27448 {1, 4096},
27449 {0, 56318},
27450 },
27451 clobbers: 4294933503,
27452 },
27453 },
27454 {
27455 name: "CALLinter",
27456 auxType: auxInt64,
27457 argLen: 2,
27458 clobberFlags: true,
27459 call: true,
27460 reg: regInfo{
27461 inputs: []inputInfo{
27462 {0, 23550},
27463 },
27464 clobbers: 4294933503,
27465 },
27466 },
27467 {
27468 name: "InvertFlags",
27469 argLen: 1,
27470 reg: regInfo{},
27471 },
27472 {
27473 name: "LoweredGetG",
27474 argLen: 1,
27475 reg: regInfo{
27476 outputs: []outputInfo{
27477 {0, 23551},
27478 },
27479 },
27480 },
27481 {
27482 name: "LoweredGetClosurePtr",
27483 argLen: 0,
27484 zeroWidth: true,
27485 reg: regInfo{
27486 outputs: []outputInfo{
27487 {0, 4096},
27488 },
27489 },
27490 },
27491 {
27492 name: "LoweredGetCallerSP",
27493 argLen: 0,
27494 rematerializeable: true,
27495 reg: regInfo{
27496 outputs: []outputInfo{
27497 {0, 23551},
27498 },
27499 },
27500 },
27501 {
27502 name: "LoweredGetCallerPC",
27503 argLen: 0,
27504 rematerializeable: true,
27505 reg: regInfo{
27506 outputs: []outputInfo{
27507 {0, 23551},
27508 },
27509 },
27510 },
27511 {
27512 name: "LoweredNilCheck",
27513 argLen: 2,
27514 clobberFlags: true,
27515 nilCheck: true,
27516 faultOnNilArg0: true,
27517 reg: regInfo{
27518 inputs: []inputInfo{
27519 {0, 56318},
27520 },
27521 },
27522 },
27523 {
27524 name: "LoweredRound32F",
27525 argLen: 1,
27526 resultInArg0: true,
27527 zeroWidth: true,
27528 reg: regInfo{
27529 inputs: []inputInfo{
27530 {0, 4294901760},
27531 },
27532 outputs: []outputInfo{
27533 {0, 4294901760},
27534 },
27535 },
27536 },
27537 {
27538 name: "LoweredRound64F",
27539 argLen: 1,
27540 resultInArg0: true,
27541 zeroWidth: true,
27542 reg: regInfo{
27543 inputs: []inputInfo{
27544 {0, 4294901760},
27545 },
27546 outputs: []outputInfo{
27547 {0, 4294901760},
27548 },
27549 },
27550 },
27551 {
27552 name: "LoweredWB",
27553 auxType: auxSym,
27554 argLen: 3,
27555 clobberFlags: true,
27556 symEffect: SymNone,
27557 reg: regInfo{
27558 inputs: []inputInfo{
27559 {0, 4},
27560 {1, 8},
27561 },
27562 clobbers: 4294918144,
27563 },
27564 },
27565 {
27566 name: "LoweredPanicBoundsA",
27567 auxType: auxInt64,
27568 argLen: 3,
27569 reg: regInfo{
27570 inputs: []inputInfo{
27571 {0, 4},
27572 {1, 8},
27573 },
27574 },
27575 },
27576 {
27577 name: "LoweredPanicBoundsB",
27578 auxType: auxInt64,
27579 argLen: 3,
27580 reg: regInfo{
27581 inputs: []inputInfo{
27582 {0, 2},
27583 {1, 4},
27584 },
27585 },
27586 },
27587 {
27588 name: "LoweredPanicBoundsC",
27589 auxType: auxInt64,
27590 argLen: 3,
27591 reg: regInfo{
27592 inputs: []inputInfo{
27593 {0, 1},
27594 {1, 2},
27595 },
27596 },
27597 },
27598 {
27599 name: "FlagEQ",
27600 argLen: 0,
27601 reg: regInfo{},
27602 },
27603 {
27604 name: "FlagLT",
27605 argLen: 0,
27606 reg: regInfo{},
27607 },
27608 {
27609 name: "FlagGT",
27610 argLen: 0,
27611 reg: regInfo{},
27612 },
27613 {
27614 name: "FlagOV",
27615 argLen: 0,
27616 reg: regInfo{},
27617 },
27618 {
27619 name: "SYNC",
27620 argLen: 1,
27621 asm: s390x.ASYNC,
27622 reg: regInfo{},
27623 },
27624 {
27625 name: "MOVBZatomicload",
27626 auxType: auxSymOff,
27627 argLen: 2,
27628 faultOnNilArg0: true,
27629 symEffect: SymRead,
27630 asm: s390x.AMOVBZ,
27631 reg: regInfo{
27632 inputs: []inputInfo{
27633 {0, 4295023614},
27634 },
27635 outputs: []outputInfo{
27636 {0, 23551},
27637 },
27638 },
27639 },
27640 {
27641 name: "MOVWZatomicload",
27642 auxType: auxSymOff,
27643 argLen: 2,
27644 faultOnNilArg0: true,
27645 symEffect: SymRead,
27646 asm: s390x.AMOVWZ,
27647 reg: regInfo{
27648 inputs: []inputInfo{
27649 {0, 4295023614},
27650 },
27651 outputs: []outputInfo{
27652 {0, 23551},
27653 },
27654 },
27655 },
27656 {
27657 name: "MOVDatomicload",
27658 auxType: auxSymOff,
27659 argLen: 2,
27660 faultOnNilArg0: true,
27661 symEffect: SymRead,
27662 asm: s390x.AMOVD,
27663 reg: regInfo{
27664 inputs: []inputInfo{
27665 {0, 4295023614},
27666 },
27667 outputs: []outputInfo{
27668 {0, 23551},
27669 },
27670 },
27671 },
27672 {
27673 name: "MOVWatomicstore",
27674 auxType: auxSymOff,
27675 argLen: 3,
27676 clobberFlags: true,
27677 faultOnNilArg0: true,
27678 hasSideEffects: true,
27679 symEffect: SymWrite,
27680 asm: s390x.AMOVW,
27681 reg: regInfo{
27682 inputs: []inputInfo{
27683 {0, 4295023614},
27684 {1, 56319},
27685 },
27686 },
27687 },
27688 {
27689 name: "MOVDatomicstore",
27690 auxType: auxSymOff,
27691 argLen: 3,
27692 clobberFlags: true,
27693 faultOnNilArg0: true,
27694 hasSideEffects: true,
27695 symEffect: SymWrite,
27696 asm: s390x.AMOVD,
27697 reg: regInfo{
27698 inputs: []inputInfo{
27699 {0, 4295023614},
27700 {1, 56319},
27701 },
27702 },
27703 },
27704 {
27705 name: "LAA",
27706 auxType: auxSymOff,
27707 argLen: 3,
27708 clobberFlags: true,
27709 faultOnNilArg0: true,
27710 hasSideEffects: true,
27711 symEffect: SymRdWr,
27712 asm: s390x.ALAA,
27713 reg: regInfo{
27714 inputs: []inputInfo{
27715 {0, 4295023614},
27716 {1, 56319},
27717 },
27718 outputs: []outputInfo{
27719 {0, 23551},
27720 },
27721 },
27722 },
27723 {
27724 name: "LAAG",
27725 auxType: auxSymOff,
27726 argLen: 3,
27727 clobberFlags: true,
27728 faultOnNilArg0: true,
27729 hasSideEffects: true,
27730 symEffect: SymRdWr,
27731 asm: s390x.ALAAG,
27732 reg: regInfo{
27733 inputs: []inputInfo{
27734 {0, 4295023614},
27735 {1, 56319},
27736 },
27737 outputs: []outputInfo{
27738 {0, 23551},
27739 },
27740 },
27741 },
27742 {
27743 name: "AddTupleFirst32",
27744 argLen: 2,
27745 reg: regInfo{},
27746 },
27747 {
27748 name: "AddTupleFirst64",
27749 argLen: 2,
27750 reg: regInfo{},
27751 },
27752 {
27753 name: "LoweredAtomicCas32",
27754 auxType: auxSymOff,
27755 argLen: 4,
27756 clobberFlags: true,
27757 faultOnNilArg0: true,
27758 hasSideEffects: true,
27759 symEffect: SymRdWr,
27760 asm: s390x.ACS,
27761 reg: regInfo{
27762 inputs: []inputInfo{
27763 {1, 1},
27764 {0, 56318},
27765 {2, 56319},
27766 },
27767 clobbers: 1,
27768 outputs: []outputInfo{
27769 {1, 0},
27770 {0, 23551},
27771 },
27772 },
27773 },
27774 {
27775 name: "LoweredAtomicCas64",
27776 auxType: auxSymOff,
27777 argLen: 4,
27778 clobberFlags: true,
27779 faultOnNilArg0: true,
27780 hasSideEffects: true,
27781 symEffect: SymRdWr,
27782 asm: s390x.ACSG,
27783 reg: regInfo{
27784 inputs: []inputInfo{
27785 {1, 1},
27786 {0, 56318},
27787 {2, 56319},
27788 },
27789 clobbers: 1,
27790 outputs: []outputInfo{
27791 {1, 0},
27792 {0, 23551},
27793 },
27794 },
27795 },
27796 {
27797 name: "LoweredAtomicExchange32",
27798 auxType: auxSymOff,
27799 argLen: 3,
27800 clobberFlags: true,
27801 faultOnNilArg0: true,
27802 hasSideEffects: true,
27803 symEffect: SymRdWr,
27804 asm: s390x.ACS,
27805 reg: regInfo{
27806 inputs: []inputInfo{
27807 {0, 56318},
27808 {1, 56318},
27809 },
27810 outputs: []outputInfo{
27811 {1, 0},
27812 {0, 1},
27813 },
27814 },
27815 },
27816 {
27817 name: "LoweredAtomicExchange64",
27818 auxType: auxSymOff,
27819 argLen: 3,
27820 clobberFlags: true,
27821 faultOnNilArg0: true,
27822 hasSideEffects: true,
27823 symEffect: SymRdWr,
27824 asm: s390x.ACSG,
27825 reg: regInfo{
27826 inputs: []inputInfo{
27827 {0, 56318},
27828 {1, 56318},
27829 },
27830 outputs: []outputInfo{
27831 {1, 0},
27832 {0, 1},
27833 },
27834 },
27835 },
27836 {
27837 name: "FLOGR",
27838 argLen: 1,
27839 clobberFlags: true,
27840 asm: s390x.AFLOGR,
27841 reg: regInfo{
27842 inputs: []inputInfo{
27843 {0, 23551},
27844 },
27845 clobbers: 2,
27846 outputs: []outputInfo{
27847 {0, 1},
27848 },
27849 },
27850 },
27851 {
27852 name: "POPCNT",
27853 argLen: 1,
27854 clobberFlags: true,
27855 asm: s390x.APOPCNT,
27856 reg: regInfo{
27857 inputs: []inputInfo{
27858 {0, 23551},
27859 },
27860 outputs: []outputInfo{
27861 {0, 23551},
27862 },
27863 },
27864 },
27865 {
27866 name: "SumBytes2",
27867 argLen: 1,
27868 reg: regInfo{},
27869 },
27870 {
27871 name: "SumBytes4",
27872 argLen: 1,
27873 reg: regInfo{},
27874 },
27875 {
27876 name: "SumBytes8",
27877 argLen: 1,
27878 reg: regInfo{},
27879 },
27880 {
27881 name: "STMG2",
27882 auxType: auxSymOff,
27883 argLen: 4,
27884 faultOnNilArg0: true,
27885 symEffect: SymWrite,
27886 asm: s390x.ASTMG,
27887 reg: regInfo{
27888 inputs: []inputInfo{
27889 {1, 2},
27890 {2, 4},
27891 {0, 56318},
27892 },
27893 },
27894 },
27895 {
27896 name: "STMG3",
27897 auxType: auxSymOff,
27898 argLen: 5,
27899 faultOnNilArg0: true,
27900 symEffect: SymWrite,
27901 asm: s390x.ASTMG,
27902 reg: regInfo{
27903 inputs: []inputInfo{
27904 {1, 2},
27905 {2, 4},
27906 {3, 8},
27907 {0, 56318},
27908 },
27909 },
27910 },
27911 {
27912 name: "STMG4",
27913 auxType: auxSymOff,
27914 argLen: 6,
27915 faultOnNilArg0: true,
27916 symEffect: SymWrite,
27917 asm: s390x.ASTMG,
27918 reg: regInfo{
27919 inputs: []inputInfo{
27920 {1, 2},
27921 {2, 4},
27922 {3, 8},
27923 {4, 16},
27924 {0, 56318},
27925 },
27926 },
27927 },
27928 {
27929 name: "STM2",
27930 auxType: auxSymOff,
27931 argLen: 4,
27932 faultOnNilArg0: true,
27933 symEffect: SymWrite,
27934 asm: s390x.ASTMY,
27935 reg: regInfo{
27936 inputs: []inputInfo{
27937 {1, 2},
27938 {2, 4},
27939 {0, 56318},
27940 },
27941 },
27942 },
27943 {
27944 name: "STM3",
27945 auxType: auxSymOff,
27946 argLen: 5,
27947 faultOnNilArg0: true,
27948 symEffect: SymWrite,
27949 asm: s390x.ASTMY,
27950 reg: regInfo{
27951 inputs: []inputInfo{
27952 {1, 2},
27953 {2, 4},
27954 {3, 8},
27955 {0, 56318},
27956 },
27957 },
27958 },
27959 {
27960 name: "STM4",
27961 auxType: auxSymOff,
27962 argLen: 6,
27963 faultOnNilArg0: true,
27964 symEffect: SymWrite,
27965 asm: s390x.ASTMY,
27966 reg: regInfo{
27967 inputs: []inputInfo{
27968 {1, 2},
27969 {2, 4},
27970 {3, 8},
27971 {4, 16},
27972 {0, 56318},
27973 },
27974 },
27975 },
27976 {
27977 name: "LoweredMove",
27978 auxType: auxInt64,
27979 argLen: 4,
27980 clobberFlags: true,
27981 faultOnNilArg0: true,
27982 faultOnNilArg1: true,
27983 reg: regInfo{
27984 inputs: []inputInfo{
27985 {0, 2},
27986 {1, 4},
27987 {2, 56319},
27988 },
27989 clobbers: 6,
27990 },
27991 },
27992 {
27993 name: "LoweredZero",
27994 auxType: auxInt64,
27995 argLen: 3,
27996 clobberFlags: true,
27997 faultOnNilArg0: true,
27998 reg: regInfo{
27999 inputs: []inputInfo{
28000 {0, 2},
28001 {1, 56319},
28002 },
28003 clobbers: 2,
28004 },
28005 },
28006
28007 {
28008 name: "LoweredStaticCall",
28009 auxType: auxSymOff,
28010 argLen: 1,
28011 call: true,
28012 symEffect: SymNone,
28013 reg: regInfo{
28014 clobbers: 12884901887,
28015 },
28016 },
28017 {
28018 name: "LoweredClosureCall",
28019 auxType: auxInt64,
28020 argLen: 3,
28021 call: true,
28022 reg: regInfo{
28023 inputs: []inputInfo{
28024 {0, 65535},
28025 {1, 65535},
28026 },
28027 clobbers: 12884901887,
28028 },
28029 },
28030 {
28031 name: "LoweredInterCall",
28032 auxType: auxInt64,
28033 argLen: 2,
28034 call: true,
28035 reg: regInfo{
28036 inputs: []inputInfo{
28037 {0, 65535},
28038 },
28039 clobbers: 12884901887,
28040 },
28041 },
28042 {
28043 name: "LoweredAddr",
28044 auxType: auxSymOff,
28045 argLen: 1,
28046 rematerializeable: true,
28047 symEffect: SymAddr,
28048 reg: regInfo{
28049 inputs: []inputInfo{
28050 {0, 4295032831},
28051 },
28052 outputs: []outputInfo{
28053 {0, 65535},
28054 },
28055 },
28056 },
28057 {
28058 name: "LoweredMove",
28059 auxType: auxInt64,
28060 argLen: 3,
28061 reg: regInfo{
28062 inputs: []inputInfo{
28063 {0, 65535},
28064 {1, 65535},
28065 },
28066 },
28067 },
28068 {
28069 name: "LoweredZero",
28070 auxType: auxInt64,
28071 argLen: 2,
28072 reg: regInfo{
28073 inputs: []inputInfo{
28074 {0, 65535},
28075 },
28076 },
28077 },
28078 {
28079 name: "LoweredGetClosurePtr",
28080 argLen: 0,
28081 reg: regInfo{
28082 outputs: []outputInfo{
28083 {0, 65535},
28084 },
28085 },
28086 },
28087 {
28088 name: "LoweredGetCallerPC",
28089 argLen: 0,
28090 rematerializeable: true,
28091 reg: regInfo{
28092 outputs: []outputInfo{
28093 {0, 65535},
28094 },
28095 },
28096 },
28097 {
28098 name: "LoweredGetCallerSP",
28099 argLen: 0,
28100 rematerializeable: true,
28101 reg: regInfo{
28102 outputs: []outputInfo{
28103 {0, 65535},
28104 },
28105 },
28106 },
28107 {
28108 name: "LoweredNilCheck",
28109 argLen: 2,
28110 nilCheck: true,
28111 faultOnNilArg0: true,
28112 reg: regInfo{
28113 inputs: []inputInfo{
28114 {0, 65535},
28115 },
28116 },
28117 },
28118 {
28119 name: "LoweredWB",
28120 auxType: auxSym,
28121 argLen: 3,
28122 symEffect: SymNone,
28123 reg: regInfo{
28124 inputs: []inputInfo{
28125 {0, 65535},
28126 {1, 65535},
28127 },
28128 },
28129 },
28130 {
28131 name: "LoweredRound32F",
28132 argLen: 1,
28133 reg: regInfo{
28134 inputs: []inputInfo{
28135 {0, 4294901760},
28136 },
28137 outputs: []outputInfo{
28138 {0, 4294901760},
28139 },
28140 },
28141 },
28142 {
28143 name: "LoweredConvert",
28144 argLen: 2,
28145 reg: regInfo{
28146 inputs: []inputInfo{
28147 {0, 65535},
28148 },
28149 outputs: []outputInfo{
28150 {0, 65535},
28151 },
28152 },
28153 },
28154 {
28155 name: "Select",
28156 argLen: 3,
28157 asm: wasm.ASelect,
28158 reg: regInfo{
28159 inputs: []inputInfo{
28160 {0, 4295032831},
28161 {1, 4295032831},
28162 {2, 4295032831},
28163 },
28164 outputs: []outputInfo{
28165 {0, 65535},
28166 },
28167 },
28168 },
28169 {
28170 name: "I64Load8U",
28171 auxType: auxInt64,
28172 argLen: 2,
28173 asm: wasm.AI64Load8U,
28174 reg: regInfo{
28175 inputs: []inputInfo{
28176 {0, 21474902015},
28177 },
28178 outputs: []outputInfo{
28179 {0, 65535},
28180 },
28181 },
28182 },
28183 {
28184 name: "I64Load8S",
28185 auxType: auxInt64,
28186 argLen: 2,
28187 asm: wasm.AI64Load8S,
28188 reg: regInfo{
28189 inputs: []inputInfo{
28190 {0, 21474902015},
28191 },
28192 outputs: []outputInfo{
28193 {0, 65535},
28194 },
28195 },
28196 },
28197 {
28198 name: "I64Load16U",
28199 auxType: auxInt64,
28200 argLen: 2,
28201 asm: wasm.AI64Load16U,
28202 reg: regInfo{
28203 inputs: []inputInfo{
28204 {0, 21474902015},
28205 },
28206 outputs: []outputInfo{
28207 {0, 65535},
28208 },
28209 },
28210 },
28211 {
28212 name: "I64Load16S",
28213 auxType: auxInt64,
28214 argLen: 2,
28215 asm: wasm.AI64Load16S,
28216 reg: regInfo{
28217 inputs: []inputInfo{
28218 {0, 21474902015},
28219 },
28220 outputs: []outputInfo{
28221 {0, 65535},
28222 },
28223 },
28224 },
28225 {
28226 name: "I64Load32U",
28227 auxType: auxInt64,
28228 argLen: 2,
28229 asm: wasm.AI64Load32U,
28230 reg: regInfo{
28231 inputs: []inputInfo{
28232 {0, 21474902015},
28233 },
28234 outputs: []outputInfo{
28235 {0, 65535},
28236 },
28237 },
28238 },
28239 {
28240 name: "I64Load32S",
28241 auxType: auxInt64,
28242 argLen: 2,
28243 asm: wasm.AI64Load32S,
28244 reg: regInfo{
28245 inputs: []inputInfo{
28246 {0, 21474902015},
28247 },
28248 outputs: []outputInfo{
28249 {0, 65535},
28250 },
28251 },
28252 },
28253 {
28254 name: "I64Load",
28255 auxType: auxInt64,
28256 argLen: 2,
28257 asm: wasm.AI64Load,
28258 reg: regInfo{
28259 inputs: []inputInfo{
28260 {0, 21474902015},
28261 },
28262 outputs: []outputInfo{
28263 {0, 65535},
28264 },
28265 },
28266 },
28267 {
28268 name: "I64Store8",
28269 auxType: auxInt64,
28270 argLen: 3,
28271 asm: wasm.AI64Store8,
28272 reg: regInfo{
28273 inputs: []inputInfo{
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29210 {
29211 name: "Mul16",
29212 argLen: 2,
29213 commutative: true,
29214 generic: true,
29215 },
29216 {
29217 name: "Mul32",
29218 argLen: 2,
29219 commutative: true,
29220 generic: true,
29221 },
29222 {
29223 name: "Mul64",
29224 argLen: 2,
29225 commutative: true,
29226 generic: true,
29227 },
29228 {
29229 name: "Mul32F",
29230 argLen: 2,
29231 commutative: true,
29232 generic: true,
29233 },
29234 {
29235 name: "Mul64F",
29236 argLen: 2,
29237 commutative: true,
29238 generic: true,
29239 },
29240 {
29241 name: "Div32F",
29242 argLen: 2,
29243 generic: true,
29244 },
29245 {
29246 name: "Div64F",
29247 argLen: 2,
29248 generic: true,
29249 },
29250 {
29251 name: "Hmul32",
29252 argLen: 2,
29253 commutative: true,
29254 generic: true,
29255 },
29256 {
29257 name: "Hmul32u",
29258 argLen: 2,
29259 commutative: true,
29260 generic: true,
29261 },
29262 {
29263 name: "Hmul64",
29264 argLen: 2,
29265 commutative: true,
29266 generic: true,
29267 },
29268 {
29269 name: "Hmul64u",
29270 argLen: 2,
29271 commutative: true,
29272 generic: true,
29273 },
29274 {
29275 name: "Mul32uhilo",
29276 argLen: 2,
29277 commutative: true,
29278 generic: true,
29279 },
29280 {
29281 name: "Mul64uhilo",
29282 argLen: 2,
29283 commutative: true,
29284 generic: true,
29285 },
29286 {
29287 name: "Mul32uover",
29288 argLen: 2,
29289 commutative: true,
29290 generic: true,
29291 },
29292 {
29293 name: "Mul64uover",
29294 argLen: 2,
29295 commutative: true,
29296 generic: true,
29297 },
29298 {
29299 name: "Avg32u",
29300 argLen: 2,
29301 generic: true,
29302 },
29303 {
29304 name: "Avg64u",
29305 argLen: 2,
29306 generic: true,
29307 },
29308 {
29309 name: "Div8",
29310 argLen: 2,
29311 generic: true,
29312 },
29313 {
29314 name: "Div8u",
29315 argLen: 2,
29316 generic: true,
29317 },
29318 {
29319 name: "Div16",
29320 auxType: auxBool,
29321 argLen: 2,
29322 generic: true,
29323 },
29324 {
29325 name: "Div16u",
29326 argLen: 2,
29327 generic: true,
29328 },
29329 {
29330 name: "Div32",
29331 auxType: auxBool,
29332 argLen: 2,
29333 generic: true,
29334 },
29335 {
29336 name: "Div32u",
29337 argLen: 2,
29338 generic: true,
29339 },
29340 {
29341 name: "Div64",
29342 auxType: auxBool,
29343 argLen: 2,
29344 generic: true,
29345 },
29346 {
29347 name: "Div64u",
29348 argLen: 2,
29349 generic: true,
29350 },
29351 {
29352 name: "Div128u",
29353 argLen: 3,
29354 generic: true,
29355 },
29356 {
29357 name: "Mod8",
29358 argLen: 2,
29359 generic: true,
29360 },
29361 {
29362 name: "Mod8u",
29363 argLen: 2,
29364 generic: true,
29365 },
29366 {
29367 name: "Mod16",
29368 auxType: auxBool,
29369 argLen: 2,
29370 generic: true,
29371 },
29372 {
29373 name: "Mod16u",
29374 argLen: 2,
29375 generic: true,
29376 },
29377 {
29378 name: "Mod32",
29379 auxType: auxBool,
29380 argLen: 2,
29381 generic: true,
29382 },
29383 {
29384 name: "Mod32u",
29385 argLen: 2,
29386 generic: true,
29387 },
29388 {
29389 name: "Mod64",
29390 auxType: auxBool,
29391 argLen: 2,
29392 generic: true,
29393 },
29394 {
29395 name: "Mod64u",
29396 argLen: 2,
29397 generic: true,
29398 },
29399 {
29400 name: "And8",
29401 argLen: 2,
29402 commutative: true,
29403 generic: true,
29404 },
29405 {
29406 name: "And16",
29407 argLen: 2,
29408 commutative: true,
29409 generic: true,
29410 },
29411 {
29412 name: "And32",
29413 argLen: 2,
29414 commutative: true,
29415 generic: true,
29416 },
29417 {
29418 name: "And64",
29419 argLen: 2,
29420 commutative: true,
29421 generic: true,
29422 },
29423 {
29424 name: "Or8",
29425 argLen: 2,
29426 commutative: true,
29427 generic: true,
29428 },
29429 {
29430 name: "Or16",
29431 argLen: 2,
29432 commutative: true,
29433 generic: true,
29434 },
29435 {
29436 name: "Or32",
29437 argLen: 2,
29438 commutative: true,
29439 generic: true,
29440 },
29441 {
29442 name: "Or64",
29443 argLen: 2,
29444 commutative: true,
29445 generic: true,
29446 },
29447 {
29448 name: "Xor8",
29449 argLen: 2,
29450 commutative: true,
29451 generic: true,
29452 },
29453 {
29454 name: "Xor16",
29455 argLen: 2,
29456 commutative: true,
29457 generic: true,
29458 },
29459 {
29460 name: "Xor32",
29461 argLen: 2,
29462 commutative: true,
29463 generic: true,
29464 },
29465 {
29466 name: "Xor64",
29467 argLen: 2,
29468 commutative: true,
29469 generic: true,
29470 },
29471 {
29472 name: "Lsh8x8",
29473 auxType: auxBool,
29474 argLen: 2,
29475 generic: true,
29476 },
29477 {
29478 name: "Lsh8x16",
29479 auxType: auxBool,
29480 argLen: 2,
29481 generic: true,
29482 },
29483 {
29484 name: "Lsh8x32",
29485 auxType: auxBool,
29486 argLen: 2,
29487 generic: true,
29488 },
29489 {
29490 name: "Lsh8x64",
29491 auxType: auxBool,
29492 argLen: 2,
29493 generic: true,
29494 },
29495 {
29496 name: "Lsh16x8",
29497 auxType: auxBool,
29498 argLen: 2,
29499 generic: true,
29500 },
29501 {
29502 name: "Lsh16x16",
29503 auxType: auxBool,
29504 argLen: 2,
29505 generic: true,
29506 },
29507 {
29508 name: "Lsh16x32",
29509 auxType: auxBool,
29510 argLen: 2,
29511 generic: true,
29512 },
29513 {
29514 name: "Lsh16x64",
29515 auxType: auxBool,
29516 argLen: 2,
29517 generic: true,
29518 },
29519 {
29520 name: "Lsh32x8",
29521 auxType: auxBool,
29522 argLen: 2,
29523 generic: true,
29524 },
29525 {
29526 name: "Lsh32x16",
29527 auxType: auxBool,
29528 argLen: 2,
29529 generic: true,
29530 },
29531 {
29532 name: "Lsh32x32",
29533 auxType: auxBool,
29534 argLen: 2,
29535 generic: true,
29536 },
29537 {
29538 name: "Lsh32x64",
29539 auxType: auxBool,
29540 argLen: 2,
29541 generic: true,
29542 },
29543 {
29544 name: "Lsh64x8",
29545 auxType: auxBool,
29546 argLen: 2,
29547 generic: true,
29548 },
29549 {
29550 name: "Lsh64x16",
29551 auxType: auxBool,
29552 argLen: 2,
29553 generic: true,
29554 },
29555 {
29556 name: "Lsh64x32",
29557 auxType: auxBool,
29558 argLen: 2,
29559 generic: true,
29560 },
29561 {
29562 name: "Lsh64x64",
29563 auxType: auxBool,
29564 argLen: 2,
29565 generic: true,
29566 },
29567 {
29568 name: "Rsh8x8",
29569 auxType: auxBool,
29570 argLen: 2,
29571 generic: true,
29572 },
29573 {
29574 name: "Rsh8x16",
29575 auxType: auxBool,
29576 argLen: 2,
29577 generic: true,
29578 },
29579 {
29580 name: "Rsh8x32",
29581 auxType: auxBool,
29582 argLen: 2,
29583 generic: true,
29584 },
29585 {
29586 name: "Rsh8x64",
29587 auxType: auxBool,
29588 argLen: 2,
29589 generic: true,
29590 },
29591 {
29592 name: "Rsh16x8",
29593 auxType: auxBool,
29594 argLen: 2,
29595 generic: true,
29596 },
29597 {
29598 name: "Rsh16x16",
29599 auxType: auxBool,
29600 argLen: 2,
29601 generic: true,
29602 },
29603 {
29604 name: "Rsh16x32",
29605 auxType: auxBool,
29606 argLen: 2,
29607 generic: true,
29608 },
29609 {
29610 name: "Rsh16x64",
29611 auxType: auxBool,
29612 argLen: 2,
29613 generic: true,
29614 },
29615 {
29616 name: "Rsh32x8",
29617 auxType: auxBool,
29618 argLen: 2,
29619 generic: true,
29620 },
29621 {
29622 name: "Rsh32x16",
29623 auxType: auxBool,
29624 argLen: 2,
29625 generic: true,
29626 },
29627 {
29628 name: "Rsh32x32",
29629 auxType: auxBool,
29630 argLen: 2,
29631 generic: true,
29632 },
29633 {
29634 name: "Rsh32x64",
29635 auxType: auxBool,
29636 argLen: 2,
29637 generic: true,
29638 },
29639 {
29640 name: "Rsh64x8",
29641 auxType: auxBool,
29642 argLen: 2,
29643 generic: true,
29644 },
29645 {
29646 name: "Rsh64x16",
29647 auxType: auxBool,
29648 argLen: 2,
29649 generic: true,
29650 },
29651 {
29652 name: "Rsh64x32",
29653 auxType: auxBool,
29654 argLen: 2,
29655 generic: true,
29656 },
29657 {
29658 name: "Rsh64x64",
29659 auxType: auxBool,
29660 argLen: 2,
29661 generic: true,
29662 },
29663 {
29664 name: "Rsh8Ux8",
29665 auxType: auxBool,
29666 argLen: 2,
29667 generic: true,
29668 },
29669 {
29670 name: "Rsh8Ux16",
29671 auxType: auxBool,
29672 argLen: 2,
29673 generic: true,
29674 },
29675 {
29676 name: "Rsh8Ux32",
29677 auxType: auxBool,
29678 argLen: 2,
29679 generic: true,
29680 },
29681 {
29682 name: "Rsh8Ux64",
29683 auxType: auxBool,
29684 argLen: 2,
29685 generic: true,
29686 },
29687 {
29688 name: "Rsh16Ux8",
29689 auxType: auxBool,
29690 argLen: 2,
29691 generic: true,
29692 },
29693 {
29694 name: "Rsh16Ux16",
29695 auxType: auxBool,
29696 argLen: 2,
29697 generic: true,
29698 },
29699 {
29700 name: "Rsh16Ux32",
29701 auxType: auxBool,
29702 argLen: 2,
29703 generic: true,
29704 },
29705 {
29706 name: "Rsh16Ux64",
29707 auxType: auxBool,
29708 argLen: 2,
29709 generic: true,
29710 },
29711 {
29712 name: "Rsh32Ux8",
29713 auxType: auxBool,
29714 argLen: 2,
29715 generic: true,
29716 },
29717 {
29718 name: "Rsh32Ux16",
29719 auxType: auxBool,
29720 argLen: 2,
29721 generic: true,
29722 },
29723 {
29724 name: "Rsh32Ux32",
29725 auxType: auxBool,
29726 argLen: 2,
29727 generic: true,
29728 },
29729 {
29730 name: "Rsh32Ux64",
29731 auxType: auxBool,
29732 argLen: 2,
29733 generic: true,
29734 },
29735 {
29736 name: "Rsh64Ux8",
29737 auxType: auxBool,
29738 argLen: 2,
29739 generic: true,
29740 },
29741 {
29742 name: "Rsh64Ux16",
29743 auxType: auxBool,
29744 argLen: 2,
29745 generic: true,
29746 },
29747 {
29748 name: "Rsh64Ux32",
29749 auxType: auxBool,
29750 argLen: 2,
29751 generic: true,
29752 },
29753 {
29754 name: "Rsh64Ux64",
29755 auxType: auxBool,
29756 argLen: 2,
29757 generic: true,
29758 },
29759 {
29760 name: "Eq8",
29761 argLen: 2,
29762 commutative: true,
29763 generic: true,
29764 },
29765 {
29766 name: "Eq16",
29767 argLen: 2,
29768 commutative: true,
29769 generic: true,
29770 },
29771 {
29772 name: "Eq32",
29773 argLen: 2,
29774 commutative: true,
29775 generic: true,
29776 },
29777 {
29778 name: "Eq64",
29779 argLen: 2,
29780 commutative: true,
29781 generic: true,
29782 },
29783 {
29784 name: "EqPtr",
29785 argLen: 2,
29786 commutative: true,
29787 generic: true,
29788 },
29789 {
29790 name: "EqInter",
29791 argLen: 2,
29792 generic: true,
29793 },
29794 {
29795 name: "EqSlice",
29796 argLen: 2,
29797 generic: true,
29798 },
29799 {
29800 name: "Eq32F",
29801 argLen: 2,
29802 commutative: true,
29803 generic: true,
29804 },
29805 {
29806 name: "Eq64F",
29807 argLen: 2,
29808 commutative: true,
29809 generic: true,
29810 },
29811 {
29812 name: "Neq8",
29813 argLen: 2,
29814 commutative: true,
29815 generic: true,
29816 },
29817 {
29818 name: "Neq16",
29819 argLen: 2,
29820 commutative: true,
29821 generic: true,
29822 },
29823 {
29824 name: "Neq32",
29825 argLen: 2,
29826 commutative: true,
29827 generic: true,
29828 },
29829 {
29830 name: "Neq64",
29831 argLen: 2,
29832 commutative: true,
29833 generic: true,
29834 },
29835 {
29836 name: "NeqPtr",
29837 argLen: 2,
29838 commutative: true,
29839 generic: true,
29840 },
29841 {
29842 name: "NeqInter",
29843 argLen: 2,
29844 generic: true,
29845 },
29846 {
29847 name: "NeqSlice",
29848 argLen: 2,
29849 generic: true,
29850 },
29851 {
29852 name: "Neq32F",
29853 argLen: 2,
29854 commutative: true,
29855 generic: true,
29856 },
29857 {
29858 name: "Neq64F",
29859 argLen: 2,
29860 commutative: true,
29861 generic: true,
29862 },
29863 {
29864 name: "Less8",
29865 argLen: 2,
29866 generic: true,
29867 },
29868 {
29869 name: "Less8U",
29870 argLen: 2,
29871 generic: true,
29872 },
29873 {
29874 name: "Less16",
29875 argLen: 2,
29876 generic: true,
29877 },
29878 {
29879 name: "Less16U",
29880 argLen: 2,
29881 generic: true,
29882 },
29883 {
29884 name: "Less32",
29885 argLen: 2,
29886 generic: true,
29887 },
29888 {
29889 name: "Less32U",
29890 argLen: 2,
29891 generic: true,
29892 },
29893 {
29894 name: "Less64",
29895 argLen: 2,
29896 generic: true,
29897 },
29898 {
29899 name: "Less64U",
29900 argLen: 2,
29901 generic: true,
29902 },
29903 {
29904 name: "Less32F",
29905 argLen: 2,
29906 generic: true,
29907 },
29908 {
29909 name: "Less64F",
29910 argLen: 2,
29911 generic: true,
29912 },
29913 {
29914 name: "Leq8",
29915 argLen: 2,
29916 generic: true,
29917 },
29918 {
29919 name: "Leq8U",
29920 argLen: 2,
29921 generic: true,
29922 },
29923 {
29924 name: "Leq16",
29925 argLen: 2,
29926 generic: true,
29927 },
29928 {
29929 name: "Leq16U",
29930 argLen: 2,
29931 generic: true,
29932 },
29933 {
29934 name: "Leq32",
29935 argLen: 2,
29936 generic: true,
29937 },
29938 {
29939 name: "Leq32U",
29940 argLen: 2,
29941 generic: true,
29942 },
29943 {
29944 name: "Leq64",
29945 argLen: 2,
29946 generic: true,
29947 },
29948 {
29949 name: "Leq64U",
29950 argLen: 2,
29951 generic: true,
29952 },
29953 {
29954 name: "Leq32F",
29955 argLen: 2,
29956 generic: true,
29957 },
29958 {
29959 name: "Leq64F",
29960 argLen: 2,
29961 generic: true,
29962 },
29963 {
29964 name: "Greater8",
29965 argLen: 2,
29966 generic: true,
29967 },
29968 {
29969 name: "Greater8U",
29970 argLen: 2,
29971 generic: true,
29972 },
29973 {
29974 name: "Greater16",
29975 argLen: 2,
29976 generic: true,
29977 },
29978 {
29979 name: "Greater16U",
29980 argLen: 2,
29981 generic: true,
29982 },
29983 {
29984 name: "Greater32",
29985 argLen: 2,
29986 generic: true,
29987 },
29988 {
29989 name: "Greater32U",
29990 argLen: 2,
29991 generic: true,
29992 },
29993 {
29994 name: "Greater64",
29995 argLen: 2,
29996 generic: true,
29997 },
29998 {
29999 name: "Greater64U",
30000 argLen: 2,
30001 generic: true,
30002 },
30003 {
30004 name: "Greater32F",
30005 argLen: 2,
30006 generic: true,
30007 },
30008 {
30009 name: "Greater64F",
30010 argLen: 2,
30011 generic: true,
30012 },
30013 {
30014 name: "Geq8",
30015 argLen: 2,
30016 generic: true,
30017 },
30018 {
30019 name: "Geq8U",
30020 argLen: 2,
30021 generic: true,
30022 },
30023 {
30024 name: "Geq16",
30025 argLen: 2,
30026 generic: true,
30027 },
30028 {
30029 name: "Geq16U",
30030 argLen: 2,
30031 generic: true,
30032 },
30033 {
30034 name: "Geq32",
30035 argLen: 2,
30036 generic: true,
30037 },
30038 {
30039 name: "Geq32U",
30040 argLen: 2,
30041 generic: true,
30042 },
30043 {
30044 name: "Geq64",
30045 argLen: 2,
30046 generic: true,
30047 },
30048 {
30049 name: "Geq64U",
30050 argLen: 2,
30051 generic: true,
30052 },
30053 {
30054 name: "Geq32F",
30055 argLen: 2,
30056 generic: true,
30057 },
30058 {
30059 name: "Geq64F",
30060 argLen: 2,
30061 generic: true,
30062 },
30063 {
30064 name: "CondSelect",
30065 argLen: 3,
30066 generic: true,
30067 },
30068 {
30069 name: "AndB",
30070 argLen: 2,
30071 commutative: true,
30072 generic: true,
30073 },
30074 {
30075 name: "OrB",
30076 argLen: 2,
30077 commutative: true,
30078 generic: true,
30079 },
30080 {
30081 name: "EqB",
30082 argLen: 2,
30083 commutative: true,
30084 generic: true,
30085 },
30086 {
30087 name: "NeqB",
30088 argLen: 2,
30089 commutative: true,
30090 generic: true,
30091 },
30092 {
30093 name: "Not",
30094 argLen: 1,
30095 generic: true,
30096 },
30097 {
30098 name: "Neg8",
30099 argLen: 1,
30100 generic: true,
30101 },
30102 {
30103 name: "Neg16",
30104 argLen: 1,
30105 generic: true,
30106 },
30107 {
30108 name: "Neg32",
30109 argLen: 1,
30110 generic: true,
30111 },
30112 {
30113 name: "Neg64",
30114 argLen: 1,
30115 generic: true,
30116 },
30117 {
30118 name: "Neg32F",
30119 argLen: 1,
30120 generic: true,
30121 },
30122 {
30123 name: "Neg64F",
30124 argLen: 1,
30125 generic: true,
30126 },
30127 {
30128 name: "Com8",
30129 argLen: 1,
30130 generic: true,
30131 },
30132 {
30133 name: "Com16",
30134 argLen: 1,
30135 generic: true,
30136 },
30137 {
30138 name: "Com32",
30139 argLen: 1,
30140 generic: true,
30141 },
30142 {
30143 name: "Com64",
30144 argLen: 1,
30145 generic: true,
30146 },
30147 {
30148 name: "Ctz8",
30149 argLen: 1,
30150 generic: true,
30151 },
30152 {
30153 name: "Ctz16",
30154 argLen: 1,
30155 generic: true,
30156 },
30157 {
30158 name: "Ctz32",
30159 argLen: 1,
30160 generic: true,
30161 },
30162 {
30163 name: "Ctz64",
30164 argLen: 1,
30165 generic: true,
30166 },
30167 {
30168 name: "Ctz8NonZero",
30169 argLen: 1,
30170 generic: true,
30171 },
30172 {
30173 name: "Ctz16NonZero",
30174 argLen: 1,
30175 generic: true,
30176 },
30177 {
30178 name: "Ctz32NonZero",
30179 argLen: 1,
30180 generic: true,
30181 },
30182 {
30183 name: "Ctz64NonZero",
30184 argLen: 1,
30185 generic: true,
30186 },
30187 {
30188 name: "BitLen8",
30189 argLen: 1,
30190 generic: true,
30191 },
30192 {
30193 name: "BitLen16",
30194 argLen: 1,
30195 generic: true,
30196 },
30197 {
30198 name: "BitLen32",
30199 argLen: 1,
30200 generic: true,
30201 },
30202 {
30203 name: "BitLen64",
30204 argLen: 1,
30205 generic: true,
30206 },
30207 {
30208 name: "Bswap32",
30209 argLen: 1,
30210 generic: true,
30211 },
30212 {
30213 name: "Bswap64",
30214 argLen: 1,
30215 generic: true,
30216 },
30217 {
30218 name: "BitRev8",
30219 argLen: 1,
30220 generic: true,
30221 },
30222 {
30223 name: "BitRev16",
30224 argLen: 1,
30225 generic: true,
30226 },
30227 {
30228 name: "BitRev32",
30229 argLen: 1,
30230 generic: true,
30231 },
30232 {
30233 name: "BitRev64",
30234 argLen: 1,
30235 generic: true,
30236 },
30237 {
30238 name: "PopCount8",
30239 argLen: 1,
30240 generic: true,
30241 },
30242 {
30243 name: "PopCount16",
30244 argLen: 1,
30245 generic: true,
30246 },
30247 {
30248 name: "PopCount32",
30249 argLen: 1,
30250 generic: true,
30251 },
30252 {
30253 name: "PopCount64",
30254 argLen: 1,
30255 generic: true,
30256 },
30257 {
30258 name: "RotateLeft8",
30259 argLen: 2,
30260 generic: true,
30261 },
30262 {
30263 name: "RotateLeft16",
30264 argLen: 2,
30265 generic: true,
30266 },
30267 {
30268 name: "RotateLeft32",
30269 argLen: 2,
30270 generic: true,
30271 },
30272 {
30273 name: "RotateLeft64",
30274 argLen: 2,
30275 generic: true,
30276 },
30277 {
30278 name: "Sqrt",
30279 argLen: 1,
30280 generic: true,
30281 },
30282 {
30283 name: "Floor",
30284 argLen: 1,
30285 generic: true,
30286 },
30287 {
30288 name: "Ceil",
30289 argLen: 1,
30290 generic: true,
30291 },
30292 {
30293 name: "Trunc",
30294 argLen: 1,
30295 generic: true,
30296 },
30297 {
30298 name: "Round",
30299 argLen: 1,
30300 generic: true,
30301 },
30302 {
30303 name: "RoundToEven",
30304 argLen: 1,
30305 generic: true,
30306 },
30307 {
30308 name: "Abs",
30309 argLen: 1,
30310 generic: true,
30311 },
30312 {
30313 name: "Copysign",
30314 argLen: 2,
30315 generic: true,
30316 },
30317 {
30318 name: "Phi",
30319 argLen: -1,
30320 zeroWidth: true,
30321 generic: true,
30322 },
30323 {
30324 name: "Copy",
30325 argLen: 1,
30326 generic: true,
30327 },
30328 {
30329 name: "Convert",
30330 argLen: 2,
30331 resultInArg0: true,
30332 zeroWidth: true,
30333 generic: true,
30334 },
30335 {
30336 name: "ConstBool",
30337 auxType: auxBool,
30338 argLen: 0,
30339 generic: true,
30340 },
30341 {
30342 name: "ConstString",
30343 auxType: auxString,
30344 argLen: 0,
30345 generic: true,
30346 },
30347 {
30348 name: "ConstNil",
30349 argLen: 0,
30350 generic: true,
30351 },
30352 {
30353 name: "Const8",
30354 auxType: auxInt8,
30355 argLen: 0,
30356 generic: true,
30357 },
30358 {
30359 name: "Const16",
30360 auxType: auxInt16,
30361 argLen: 0,
30362 generic: true,
30363 },
30364 {
30365 name: "Const32",
30366 auxType: auxInt32,
30367 argLen: 0,
30368 generic: true,
30369 },
30370 {
30371 name: "Const64",
30372 auxType: auxInt64,
30373 argLen: 0,
30374 generic: true,
30375 },
30376 {
30377 name: "Const32F",
30378 auxType: auxFloat32,
30379 argLen: 0,
30380 generic: true,
30381 },
30382 {
30383 name: "Const64F",
30384 auxType: auxFloat64,
30385 argLen: 0,
30386 generic: true,
30387 },
30388 {
30389 name: "ConstInterface",
30390 argLen: 0,
30391 generic: true,
30392 },
30393 {
30394 name: "ConstSlice",
30395 argLen: 0,
30396 generic: true,
30397 },
30398 {
30399 name: "InitMem",
30400 argLen: 0,
30401 zeroWidth: true,
30402 generic: true,
30403 },
30404 {
30405 name: "Arg",
30406 auxType: auxSymOff,
30407 argLen: 0,
30408 zeroWidth: true,
30409 symEffect: SymRead,
30410 generic: true,
30411 },
30412 {
30413 name: "Addr",
30414 auxType: auxSym,
30415 argLen: 1,
30416 symEffect: SymAddr,
30417 generic: true,
30418 },
30419 {
30420 name: "LocalAddr",
30421 auxType: auxSym,
30422 argLen: 2,
30423 symEffect: SymAddr,
30424 generic: true,
30425 },
30426 {
30427 name: "SP",
30428 argLen: 0,
30429 zeroWidth: true,
30430 generic: true,
30431 },
30432 {
30433 name: "SB",
30434 argLen: 0,
30435 zeroWidth: true,
30436 generic: true,
30437 },
30438 {
30439 name: "Load",
30440 argLen: 2,
30441 generic: true,
30442 },
30443 {
30444 name: "Store",
30445 auxType: auxTyp,
30446 argLen: 3,
30447 generic: true,
30448 },
30449 {
30450 name: "Move",
30451 auxType: auxTypSize,
30452 argLen: 3,
30453 generic: true,
30454 },
30455 {
30456 name: "Zero",
30457 auxType: auxTypSize,
30458 argLen: 2,
30459 generic: true,
30460 },
30461 {
30462 name: "StoreWB",
30463 auxType: auxTyp,
30464 argLen: 3,
30465 generic: true,
30466 },
30467 {
30468 name: "MoveWB",
30469 auxType: auxTypSize,
30470 argLen: 3,
30471 generic: true,
30472 },
30473 {
30474 name: "ZeroWB",
30475 auxType: auxTypSize,
30476 argLen: 2,
30477 generic: true,
30478 },
30479 {
30480 name: "WB",
30481 auxType: auxSym,
30482 argLen: 3,
30483 symEffect: SymNone,
30484 generic: true,
30485 },
30486 {
30487 name: "PanicBounds",
30488 auxType: auxInt64,
30489 argLen: 3,
30490 generic: true,
30491 },
30492 {
30493 name: "PanicExtend",
30494 auxType: auxInt64,
30495 argLen: 4,
30496 generic: true,
30497 },
30498 {
30499 name: "ClosureCall",
30500 auxType: auxInt64,
30501 argLen: 3,
30502 call: true,
30503 generic: true,
30504 },
30505 {
30506 name: "StaticCall",
30507 auxType: auxSymOff,
30508 argLen: 1,
30509 call: true,
30510 symEffect: SymNone,
30511 generic: true,
30512 },
30513 {
30514 name: "InterCall",
30515 auxType: auxInt64,
30516 argLen: 2,
30517 call: true,
30518 generic: true,
30519 },
30520 {
30521 name: "SignExt8to16",
30522 argLen: 1,
30523 generic: true,
30524 },
30525 {
30526 name: "SignExt8to32",
30527 argLen: 1,
30528 generic: true,
30529 },
30530 {
30531 name: "SignExt8to64",
30532 argLen: 1,
30533 generic: true,
30534 },
30535 {
30536 name: "SignExt16to32",
30537 argLen: 1,
30538 generic: true,
30539 },
30540 {
30541 name: "SignExt16to64",
30542 argLen: 1,
30543 generic: true,
30544 },
30545 {
30546 name: "SignExt32to64",
30547 argLen: 1,
30548 generic: true,
30549 },
30550 {
30551 name: "ZeroExt8to16",
30552 argLen: 1,
30553 generic: true,
30554 },
30555 {
30556 name: "ZeroExt8to32",
30557 argLen: 1,
30558 generic: true,
30559 },
30560 {
30561 name: "ZeroExt8to64",
30562 argLen: 1,
30563 generic: true,
30564 },
30565 {
30566 name: "ZeroExt16to32",
30567 argLen: 1,
30568 generic: true,
30569 },
30570 {
30571 name: "ZeroExt16to64",
30572 argLen: 1,
30573 generic: true,
30574 },
30575 {
30576 name: "ZeroExt32to64",
30577 argLen: 1,
30578 generic: true,
30579 },
30580 {
30581 name: "Trunc16to8",
30582 argLen: 1,
30583 generic: true,
30584 },
30585 {
30586 name: "Trunc32to8",
30587 argLen: 1,
30588 generic: true,
30589 },
30590 {
30591 name: "Trunc32to16",
30592 argLen: 1,
30593 generic: true,
30594 },
30595 {
30596 name: "Trunc64to8",
30597 argLen: 1,
30598 generic: true,
30599 },
30600 {
30601 name: "Trunc64to16",
30602 argLen: 1,
30603 generic: true,
30604 },
30605 {
30606 name: "Trunc64to32",
30607 argLen: 1,
30608 generic: true,
30609 },
30610 {
30611 name: "Cvt32to32F",
30612 argLen: 1,
30613 generic: true,
30614 },
30615 {
30616 name: "Cvt32to64F",
30617 argLen: 1,
30618 generic: true,
30619 },
30620 {
30621 name: "Cvt64to32F",
30622 argLen: 1,
30623 generic: true,
30624 },
30625 {
30626 name: "Cvt64to64F",
30627 argLen: 1,
30628 generic: true,
30629 },
30630 {
30631 name: "Cvt32Fto32",
30632 argLen: 1,
30633 generic: true,
30634 },
30635 {
30636 name: "Cvt32Fto64",
30637 argLen: 1,
30638 generic: true,
30639 },
30640 {
30641 name: "Cvt64Fto32",
30642 argLen: 1,
30643 generic: true,
30644 },
30645 {
30646 name: "Cvt64Fto64",
30647 argLen: 1,
30648 generic: true,
30649 },
30650 {
30651 name: "Cvt32Fto64F",
30652 argLen: 1,
30653 generic: true,
30654 },
30655 {
30656 name: "Cvt64Fto32F",
30657 argLen: 1,
30658 generic: true,
30659 },
30660 {
30661 name: "Round32F",
30662 argLen: 1,
30663 generic: true,
30664 },
30665 {
30666 name: "Round64F",
30667 argLen: 1,
30668 generic: true,
30669 },
30670 {
30671 name: "IsNonNil",
30672 argLen: 1,
30673 generic: true,
30674 },
30675 {
30676 name: "IsInBounds",
30677 argLen: 2,
30678 generic: true,
30679 },
30680 {
30681 name: "IsSliceInBounds",
30682 argLen: 2,
30683 generic: true,
30684 },
30685 {
30686 name: "NilCheck",
30687 argLen: 2,
30688 generic: true,
30689 },
30690 {
30691 name: "GetG",
30692 argLen: 1,
30693 zeroWidth: true,
30694 generic: true,
30695 },
30696 {
30697 name: "GetClosurePtr",
30698 argLen: 0,
30699 generic: true,
30700 },
30701 {
30702 name: "GetCallerPC",
30703 argLen: 0,
30704 generic: true,
30705 },
30706 {
30707 name: "GetCallerSP",
30708 argLen: 0,
30709 generic: true,
30710 },
30711 {
30712 name: "PtrIndex",
30713 argLen: 2,
30714 generic: true,
30715 },
30716 {
30717 name: "OffPtr",
30718 auxType: auxInt64,
30719 argLen: 1,
30720 generic: true,
30721 },
30722 {
30723 name: "SliceMake",
30724 argLen: 3,
30725 generic: true,
30726 },
30727 {
30728 name: "SlicePtr",
30729 argLen: 1,
30730 generic: true,
30731 },
30732 {
30733 name: "SliceLen",
30734 argLen: 1,
30735 generic: true,
30736 },
30737 {
30738 name: "SliceCap",
30739 argLen: 1,
30740 generic: true,
30741 },
30742 {
30743 name: "ComplexMake",
30744 argLen: 2,
30745 generic: true,
30746 },
30747 {
30748 name: "ComplexReal",
30749 argLen: 1,
30750 generic: true,
30751 },
30752 {
30753 name: "ComplexImag",
30754 argLen: 1,
30755 generic: true,
30756 },
30757 {
30758 name: "StringMake",
30759 argLen: 2,
30760 generic: true,
30761 },
30762 {
30763 name: "StringPtr",
30764 argLen: 1,
30765 generic: true,
30766 },
30767 {
30768 name: "StringLen",
30769 argLen: 1,
30770 generic: true,
30771 },
30772 {
30773 name: "IMake",
30774 argLen: 2,
30775 generic: true,
30776 },
30777 {
30778 name: "ITab",
30779 argLen: 1,
30780 generic: true,
30781 },
30782 {
30783 name: "IData",
30784 argLen: 1,
30785 generic: true,
30786 },
30787 {
30788 name: "StructMake0",
30789 argLen: 0,
30790 generic: true,
30791 },
30792 {
30793 name: "StructMake1",
30794 argLen: 1,
30795 generic: true,
30796 },
30797 {
30798 name: "StructMake2",
30799 argLen: 2,
30800 generic: true,
30801 },
30802 {
30803 name: "StructMake3",
30804 argLen: 3,
30805 generic: true,
30806 },
30807 {
30808 name: "StructMake4",
30809 argLen: 4,
30810 generic: true,
30811 },
30812 {
30813 name: "StructSelect",
30814 auxType: auxInt64,
30815 argLen: 1,
30816 generic: true,
30817 },
30818 {
30819 name: "ArrayMake0",
30820 argLen: 0,
30821 generic: true,
30822 },
30823 {
30824 name: "ArrayMake1",
30825 argLen: 1,
30826 generic: true,
30827 },
30828 {
30829 name: "ArraySelect",
30830 auxType: auxInt64,
30831 argLen: 1,
30832 generic: true,
30833 },
30834 {
30835 name: "StoreReg",
30836 argLen: 1,
30837 generic: true,
30838 },
30839 {
30840 name: "LoadReg",
30841 argLen: 1,
30842 generic: true,
30843 },
30844 {
30845 name: "FwdRef",
30846 auxType: auxSym,
30847 argLen: 0,
30848 symEffect: SymNone,
30849 generic: true,
30850 },
30851 {
30852 name: "Unknown",
30853 argLen: 0,
30854 generic: true,
30855 },
30856 {
30857 name: "VarDef",
30858 auxType: auxSym,
30859 argLen: 1,
30860 zeroWidth: true,
30861 symEffect: SymNone,
30862 generic: true,
30863 },
30864 {
30865 name: "VarKill",
30866 auxType: auxSym,
30867 argLen: 1,
30868 symEffect: SymNone,
30869 generic: true,
30870 },
30871 {
30872 name: "VarLive",
30873 auxType: auxSym,
30874 argLen: 1,
30875 zeroWidth: true,
30876 symEffect: SymRead,
30877 generic: true,
30878 },
30879 {
30880 name: "KeepAlive",
30881 argLen: 2,
30882 zeroWidth: true,
30883 generic: true,
30884 },
30885 {
30886 name: "InlMark",
30887 auxType: auxInt32,
30888 argLen: 1,
30889 generic: true,
30890 },
30891 {
30892 name: "Int64Make",
30893 argLen: 2,
30894 generic: true,
30895 },
30896 {
30897 name: "Int64Hi",
30898 argLen: 1,
30899 generic: true,
30900 },
30901 {
30902 name: "Int64Lo",
30903 argLen: 1,
30904 generic: true,
30905 },
30906 {
30907 name: "Add32carry",
30908 argLen: 2,
30909 commutative: true,
30910 generic: true,
30911 },
30912 {
30913 name: "Add32withcarry",
30914 argLen: 3,
30915 commutative: true,
30916 generic: true,
30917 },
30918 {
30919 name: "Sub32carry",
30920 argLen: 2,
30921 generic: true,
30922 },
30923 {
30924 name: "Sub32withcarry",
30925 argLen: 3,
30926 generic: true,
30927 },
30928 {
30929 name: "Add64carry",
30930 argLen: 3,
30931 commutative: true,
30932 generic: true,
30933 },
30934 {
30935 name: "Sub64borrow",
30936 argLen: 3,
30937 generic: true,
30938 },
30939 {
30940 name: "Signmask",
30941 argLen: 1,
30942 generic: true,
30943 },
30944 {
30945 name: "Zeromask",
30946 argLen: 1,
30947 generic: true,
30948 },
30949 {
30950 name: "Slicemask",
30951 argLen: 1,
30952 generic: true,
30953 },
30954 {
30955 name: "Cvt32Uto32F",
30956 argLen: 1,
30957 generic: true,
30958 },
30959 {
30960 name: "Cvt32Uto64F",
30961 argLen: 1,
30962 generic: true,
30963 },
30964 {
30965 name: "Cvt32Fto32U",
30966 argLen: 1,
30967 generic: true,
30968 },
30969 {
30970 name: "Cvt64Fto32U",
30971 argLen: 1,
30972 generic: true,
30973 },
30974 {
30975 name: "Cvt64Uto32F",
30976 argLen: 1,
30977 generic: true,
30978 },
30979 {
30980 name: "Cvt64Uto64F",
30981 argLen: 1,
30982 generic: true,
30983 },
30984 {
30985 name: "Cvt32Fto64U",
30986 argLen: 1,
30987 generic: true,
30988 },
30989 {
30990 name: "Cvt64Fto64U",
30991 argLen: 1,
30992 generic: true,
30993 },
30994 {
30995 name: "Select0",
30996 argLen: 1,
30997 zeroWidth: true,
30998 generic: true,
30999 },
31000 {
31001 name: "Select1",
31002 argLen: 1,
31003 zeroWidth: true,
31004 generic: true,
31005 },
31006 {
31007 name: "AtomicLoad8",
31008 argLen: 2,
31009 generic: true,
31010 },
31011 {
31012 name: "AtomicLoad32",
31013 argLen: 2,
31014 generic: true,
31015 },
31016 {
31017 name: "AtomicLoad64",
31018 argLen: 2,
31019 generic: true,
31020 },
31021 {
31022 name: "AtomicLoadPtr",
31023 argLen: 2,
31024 generic: true,
31025 },
31026 {
31027 name: "AtomicLoadAcq32",
31028 argLen: 2,
31029 generic: true,
31030 },
31031 {
31032 name: "AtomicStore32",
31033 argLen: 3,
31034 hasSideEffects: true,
31035 generic: true,
31036 },
31037 {
31038 name: "AtomicStore64",
31039 argLen: 3,
31040 hasSideEffects: true,
31041 generic: true,
31042 },
31043 {
31044 name: "AtomicStorePtrNoWB",
31045 argLen: 3,
31046 hasSideEffects: true,
31047 generic: true,
31048 },
31049 {
31050 name: "AtomicStoreRel32",
31051 argLen: 3,
31052 hasSideEffects: true,
31053 generic: true,
31054 },
31055 {
31056 name: "AtomicExchange32",
31057 argLen: 3,
31058 hasSideEffects: true,
31059 generic: true,
31060 },
31061 {
31062 name: "AtomicExchange64",
31063 argLen: 3,
31064 hasSideEffects: true,
31065 generic: true,
31066 },
31067 {
31068 name: "AtomicAdd32",
31069 argLen: 3,
31070 hasSideEffects: true,
31071 generic: true,
31072 },
31073 {
31074 name: "AtomicAdd64",
31075 argLen: 3,
31076 hasSideEffects: true,
31077 generic: true,
31078 },
31079 {
31080 name: "AtomicCompareAndSwap32",
31081 argLen: 4,
31082 hasSideEffects: true,
31083 generic: true,
31084 },
31085 {
31086 name: "AtomicCompareAndSwap64",
31087 argLen: 4,
31088 hasSideEffects: true,
31089 generic: true,
31090 },
31091 {
31092 name: "AtomicCompareAndSwapRel32",
31093 argLen: 4,
31094 hasSideEffects: true,
31095 generic: true,
31096 },
31097 {
31098 name: "AtomicAnd8",
31099 argLen: 3,
31100 hasSideEffects: true,
31101 generic: true,
31102 },
31103 {
31104 name: "AtomicOr8",
31105 argLen: 3,
31106 hasSideEffects: true,
31107 generic: true,
31108 },
31109 {
31110 name: "AtomicAdd32Variant",
31111 argLen: 3,
31112 hasSideEffects: true,
31113 generic: true,
31114 },
31115 {
31116 name: "AtomicAdd64Variant",
31117 argLen: 3,
31118 hasSideEffects: true,
31119 generic: true,
31120 },
31121 {
31122 name: "Clobber",
31123 auxType: auxSymOff,
31124 argLen: 0,
31125 symEffect: SymNone,
31126 generic: true,
31127 },
31128 }
31129
31130 func (o Op) Asm() obj.As { return opcodeTable[o].asm }
31131 func (o Op) Scale() int16 { return int16(opcodeTable[o].scale) }
31132 func (o Op) String() string { return opcodeTable[o].name }
31133 func (o Op) UsesScratch() bool { return opcodeTable[o].usesScratch }
31134 func (o Op) SymEffect() SymEffect { return opcodeTable[o].symEffect }
31135 func (o Op) IsCall() bool { return opcodeTable[o].call }
31136
31137 var registers386 = [...]Register{
31138 {0, x86.REG_AX, 0, "AX"},
31139 {1, x86.REG_CX, 1, "CX"},
31140 {2, x86.REG_DX, 2, "DX"},
31141 {3, x86.REG_BX, 3, "BX"},
31142 {4, x86.REGSP, -1, "SP"},
31143 {5, x86.REG_BP, 4, "BP"},
31144 {6, x86.REG_SI, 5, "SI"},
31145 {7, x86.REG_DI, 6, "DI"},
31146 {8, x86.REG_X0, -1, "X0"},
31147 {9, x86.REG_X1, -1, "X1"},
31148 {10, x86.REG_X2, -1, "X2"},
31149 {11, x86.REG_X3, -1, "X3"},
31150 {12, x86.REG_X4, -1, "X4"},
31151 {13, x86.REG_X5, -1, "X5"},
31152 {14, x86.REG_X6, -1, "X6"},
31153 {15, x86.REG_X7, -1, "X7"},
31154 {16, 0, -1, "SB"},
31155 }
31156 var gpRegMask386 = regMask(239)
31157 var fpRegMask386 = regMask(65280)
31158 var specialRegMask386 = regMask(0)
31159 var framepointerReg386 = int8(5)
31160 var linkReg386 = int8(-1)
31161 var registersAMD64 = [...]Register{
31162 {0, x86.REG_AX, 0, "AX"},
31163 {1, x86.REG_CX, 1, "CX"},
31164 {2, x86.REG_DX, 2, "DX"},
31165 {3, x86.REG_BX, 3, "BX"},
31166 {4, x86.REGSP, -1, "SP"},
31167 {5, x86.REG_BP, 4, "BP"},
31168 {6, x86.REG_SI, 5, "SI"},
31169 {7, x86.REG_DI, 6, "DI"},
31170 {8, x86.REG_R8, 7, "R8"},
31171 {9, x86.REG_R9, 8, "R9"},
31172 {10, x86.REG_R10, 9, "R10"},
31173 {11, x86.REG_R11, 10, "R11"},
31174 {12, x86.REG_R12, 11, "R12"},
31175 {13, x86.REG_R13, 12, "R13"},
31176 {14, x86.REG_R14, 13, "R14"},
31177 {15, x86.REG_R15, 14, "R15"},
31178 {16, x86.REG_X0, -1, "X0"},
31179 {17, x86.REG_X1, -1, "X1"},
31180 {18, x86.REG_X2, -1, "X2"},
31181 {19, x86.REG_X3, -1, "X3"},
31182 {20, x86.REG_X4, -1, "X4"},
31183 {21, x86.REG_X5, -1, "X5"},
31184 {22, x86.REG_X6, -1, "X6"},
31185 {23, x86.REG_X7, -1, "X7"},
31186 {24, x86.REG_X8, -1, "X8"},
31187 {25, x86.REG_X9, -1, "X9"},
31188 {26, x86.REG_X10, -1, "X10"},
31189 {27, x86.REG_X11, -1, "X11"},
31190 {28, x86.REG_X12, -1, "X12"},
31191 {29, x86.REG_X13, -1, "X13"},
31192 {30, x86.REG_X14, -1, "X14"},
31193 {31, x86.REG_X15, -1, "X15"},
31194 {32, 0, -1, "SB"},
31195 }
31196 var gpRegMaskAMD64 = regMask(65519)
31197 var fpRegMaskAMD64 = regMask(4294901760)
31198 var specialRegMaskAMD64 = regMask(0)
31199 var framepointerRegAMD64 = int8(5)
31200 var linkRegAMD64 = int8(-1)
31201 var registersARM = [...]Register{
31202 {0, arm.REG_R0, 0, "R0"},
31203 {1, arm.REG_R1, 1, "R1"},
31204 {2, arm.REG_R2, 2, "R2"},
31205 {3, arm.REG_R3, 3, "R3"},
31206 {4, arm.REG_R4, 4, "R4"},
31207 {5, arm.REG_R5, 5, "R5"},
31208 {6, arm.REG_R6, 6, "R6"},
31209 {7, arm.REG_R7, 7, "R7"},
31210 {8, arm.REG_R8, 8, "R8"},
31211 {9, arm.REG_R9, 9, "R9"},
31212 {10, arm.REGG, -1, "g"},
31213 {11, arm.REG_R11, -1, "R11"},
31214 {12, arm.REG_R12, 10, "R12"},
31215 {13, arm.REGSP, -1, "SP"},
31216 {14, arm.REG_R14, 11, "R14"},
31217 {15, arm.REG_R15, -1, "R15"},
31218 {16, arm.REG_F0, -1, "F0"},
31219 {17, arm.REG_F1, -1, "F1"},
31220 {18, arm.REG_F2, -1, "F2"},
31221 {19, arm.REG_F3, -1, "F3"},
31222 {20, arm.REG_F4, -1, "F4"},
31223 {21, arm.REG_F5, -1, "F5"},
31224 {22, arm.REG_F6, -1, "F6"},
31225 {23, arm.REG_F7, -1, "F7"},
31226 {24, arm.REG_F8, -1, "F8"},
31227 {25, arm.REG_F9, -1, "F9"},
31228 {26, arm.REG_F10, -1, "F10"},
31229 {27, arm.REG_F11, -1, "F11"},
31230 {28, arm.REG_F12, -1, "F12"},
31231 {29, arm.REG_F13, -1, "F13"},
31232 {30, arm.REG_F14, -1, "F14"},
31233 {31, arm.REG_F15, -1, "F15"},
31234 {32, 0, -1, "SB"},
31235 }
31236 var gpRegMaskARM = regMask(21503)
31237 var fpRegMaskARM = regMask(4294901760)
31238 var specialRegMaskARM = regMask(0)
31239 var framepointerRegARM = int8(-1)
31240 var linkRegARM = int8(14)
31241 var registersARM64 = [...]Register{
31242 {0, arm64.REG_R0, 0, "R0"},
31243 {1, arm64.REG_R1, 1, "R1"},
31244 {2, arm64.REG_R2, 2, "R2"},
31245 {3, arm64.REG_R3, 3, "R3"},
31246 {4, arm64.REG_R4, 4, "R4"},
31247 {5, arm64.REG_R5, 5, "R5"},
31248 {6, arm64.REG_R6, 6, "R6"},
31249 {7, arm64.REG_R7, 7, "R7"},
31250 {8, arm64.REG_R8, 8, "R8"},
31251 {9, arm64.REG_R9, 9, "R9"},
31252 {10, arm64.REG_R10, 10, "R10"},
31253 {11, arm64.REG_R11, 11, "R11"},
31254 {12, arm64.REG_R12, 12, "R12"},
31255 {13, arm64.REG_R13, 13, "R13"},
31256 {14, arm64.REG_R14, 14, "R14"},
31257 {15, arm64.REG_R15, 15, "R15"},
31258 {16, arm64.REG_R16, 16, "R16"},
31259 {17, arm64.REG_R17, 17, "R17"},
31260 {18, arm64.REG_R18, -1, "R18"},
31261 {19, arm64.REG_R19, 18, "R19"},
31262 {20, arm64.REG_R20, 19, "R20"},
31263 {21, arm64.REG_R21, 20, "R21"},
31264 {22, arm64.REG_R22, 21, "R22"},
31265 {23, arm64.REG_R23, 22, "R23"},
31266 {24, arm64.REG_R24, 23, "R24"},
31267 {25, arm64.REG_R25, 24, "R25"},
31268 {26, arm64.REG_R26, 25, "R26"},
31269 {27, arm64.REGG, -1, "g"},
31270 {28, arm64.REG_R29, -1, "R29"},
31271 {29, arm64.REG_R30, 26, "R30"},
31272 {30, arm64.REGSP, -1, "SP"},
31273 {31, arm64.REG_F0, -1, "F0"},
31274 {32, arm64.REG_F1, -1, "F1"},
31275 {33, arm64.REG_F2, -1, "F2"},
31276 {34, arm64.REG_F3, -1, "F3"},
31277 {35, arm64.REG_F4, -1, "F4"},
31278 {36, arm64.REG_F5, -1, "F5"},
31279 {37, arm64.REG_F6, -1, "F6"},
31280 {38, arm64.REG_F7, -1, "F7"},
31281 {39, arm64.REG_F8, -1, "F8"},
31282 {40, arm64.REG_F9, -1, "F9"},
31283 {41, arm64.REG_F10, -1, "F10"},
31284 {42, arm64.REG_F11, -1, "F11"},
31285 {43, arm64.REG_F12, -1, "F12"},
31286 {44, arm64.REG_F13, -1, "F13"},
31287 {45, arm64.REG_F14, -1, "F14"},
31288 {46, arm64.REG_F15, -1, "F15"},
31289 {47, arm64.REG_F16, -1, "F16"},
31290 {48, arm64.REG_F17, -1, "F17"},
31291 {49, arm64.REG_F18, -1, "F18"},
31292 {50, arm64.REG_F19, -1, "F19"},
31293 {51, arm64.REG_F20, -1, "F20"},
31294 {52, arm64.REG_F21, -1, "F21"},
31295 {53, arm64.REG_F22, -1, "F22"},
31296 {54, arm64.REG_F23, -1, "F23"},
31297 {55, arm64.REG_F24, -1, "F24"},
31298 {56, arm64.REG_F25, -1, "F25"},
31299 {57, arm64.REG_F26, -1, "F26"},
31300 {58, arm64.REG_F27, -1, "F27"},
31301 {59, arm64.REG_F28, -1, "F28"},
31302 {60, arm64.REG_F29, -1, "F29"},
31303 {61, arm64.REG_F30, -1, "F30"},
31304 {62, arm64.REG_F31, -1, "F31"},
31305 {63, 0, -1, "SB"},
31306 }
31307 var gpRegMaskARM64 = regMask(670826495)
31308 var fpRegMaskARM64 = regMask(9223372034707292160)
31309 var specialRegMaskARM64 = regMask(0)
31310 var framepointerRegARM64 = int8(-1)
31311 var linkRegARM64 = int8(29)
31312 var registersMIPS = [...]Register{
31313 {0, mips.REG_R0, -1, "R0"},
31314 {1, mips.REG_R1, 0, "R1"},
31315 {2, mips.REG_R2, 1, "R2"},
31316 {3, mips.REG_R3, 2, "R3"},
31317 {4, mips.REG_R4, 3, "R4"},
31318 {5, mips.REG_R5, 4, "R5"},
31319 {6, mips.REG_R6, 5, "R6"},
31320 {7, mips.REG_R7, 6, "R7"},
31321 {8, mips.REG_R8, 7, "R8"},
31322 {9, mips.REG_R9, 8, "R9"},
31323 {10, mips.REG_R10, 9, "R10"},
31324 {11, mips.REG_R11, 10, "R11"},
31325 {12, mips.REG_R12, 11, "R12"},
31326 {13, mips.REG_R13, 12, "R13"},
31327 {14, mips.REG_R14, 13, "R14"},
31328 {15, mips.REG_R15, 14, "R15"},
31329 {16, mips.REG_R16, 15, "R16"},
31330 {17, mips.REG_R17, 16, "R17"},
31331 {18, mips.REG_R18, 17, "R18"},
31332 {19, mips.REG_R19, 18, "R19"},
31333 {20, mips.REG_R20, 19, "R20"},
31334 {21, mips.REG_R21, 20, "R21"},
31335 {22, mips.REG_R22, 21, "R22"},
31336 {23, mips.REG_R24, 22, "R24"},
31337 {24, mips.REG_R25, 23, "R25"},
31338 {25, mips.REG_R28, 24, "R28"},
31339 {26, mips.REGSP, -1, "SP"},
31340 {27, mips.REGG, -1, "g"},
31341 {28, mips.REG_R31, 25, "R31"},
31342 {29, mips.REG_F0, -1, "F0"},
31343 {30, mips.REG_F2, -1, "F2"},
31344 {31, mips.REG_F4, -1, "F4"},
31345 {32, mips.REG_F6, -1, "F6"},
31346 {33, mips.REG_F8, -1, "F8"},
31347 {34, mips.REG_F10, -1, "F10"},
31348 {35, mips.REG_F12, -1, "F12"},
31349 {36, mips.REG_F14, -1, "F14"},
31350 {37, mips.REG_F16, -1, "F16"},
31351 {38, mips.REG_F18, -1, "F18"},
31352 {39, mips.REG_F20, -1, "F20"},
31353 {40, mips.REG_F22, -1, "F22"},
31354 {41, mips.REG_F24, -1, "F24"},
31355 {42, mips.REG_F26, -1, "F26"},
31356 {43, mips.REG_F28, -1, "F28"},
31357 {44, mips.REG_F30, -1, "F30"},
31358 {45, mips.REG_HI, -1, "HI"},
31359 {46, mips.REG_LO, -1, "LO"},
31360 {47, 0, -1, "SB"},
31361 }
31362 var gpRegMaskMIPS = regMask(335544318)
31363 var fpRegMaskMIPS = regMask(35183835217920)
31364 var specialRegMaskMIPS = regMask(105553116266496)
31365 var framepointerRegMIPS = int8(-1)
31366 var linkRegMIPS = int8(28)
31367 var registersMIPS64 = [...]Register{
31368 {0, mips.REG_R0, -1, "R0"},
31369 {1, mips.REG_R1, 0, "R1"},
31370 {2, mips.REG_R2, 1, "R2"},
31371 {3, mips.REG_R3, 2, "R3"},
31372 {4, mips.REG_R4, 3, "R4"},
31373 {5, mips.REG_R5, 4, "R5"},
31374 {6, mips.REG_R6, 5, "R6"},
31375 {7, mips.REG_R7, 6, "R7"},
31376 {8, mips.REG_R8, 7, "R8"},
31377 {9, mips.REG_R9, 8, "R9"},
31378 {10, mips.REG_R10, 9, "R10"},
31379 {11, mips.REG_R11, 10, "R11"},
31380 {12, mips.REG_R12, 11, "R12"},
31381 {13, mips.REG_R13, 12, "R13"},
31382 {14, mips.REG_R14, 13, "R14"},
31383 {15, mips.REG_R15, 14, "R15"},
31384 {16, mips.REG_R16, 15, "R16"},
31385 {17, mips.REG_R17, 16, "R17"},
31386 {18, mips.REG_R18, 17, "R18"},
31387 {19, mips.REG_R19, 18, "R19"},
31388 {20, mips.REG_R20, 19, "R20"},
31389 {21, mips.REG_R21, 20, "R21"},
31390 {22, mips.REG_R22, 21, "R22"},
31391 {23, mips.REG_R24, 22, "R24"},
31392 {24, mips.REG_R25, 23, "R25"},
31393 {25, mips.REGSP, -1, "SP"},
31394 {26, mips.REGG, -1, "g"},
31395 {27, mips.REG_R31, 24, "R31"},
31396 {28, mips.REG_F0, -1, "F0"},
31397 {29, mips.REG_F1, -1, "F1"},
31398 {30, mips.REG_F2, -1, "F2"},
31399 {31, mips.REG_F3, -1, "F3"},
31400 {32, mips.REG_F4, -1, "F4"},
31401 {33, mips.REG_F5, -1, "F5"},
31402 {34, mips.REG_F6, -1, "F6"},
31403 {35, mips.REG_F7, -1, "F7"},
31404 {36, mips.REG_F8, -1, "F8"},
31405 {37, mips.REG_F9, -1, "F9"},
31406 {38, mips.REG_F10, -1, "F10"},
31407 {39, mips.REG_F11, -1, "F11"},
31408 {40, mips.REG_F12, -1, "F12"},
31409 {41, mips.REG_F13, -1, "F13"},
31410 {42, mips.REG_F14, -1, "F14"},
31411 {43, mips.REG_F15, -1, "F15"},
31412 {44, mips.REG_F16, -1, "F16"},
31413 {45, mips.REG_F17, -1, "F17"},
31414 {46, mips.REG_F18, -1, "F18"},
31415 {47, mips.REG_F19, -1, "F19"},
31416 {48, mips.REG_F20, -1, "F20"},
31417 {49, mips.REG_F21, -1, "F21"},
31418 {50, mips.REG_F22, -1, "F22"},
31419 {51, mips.REG_F23, -1, "F23"},
31420 {52, mips.REG_F24, -1, "F24"},
31421 {53, mips.REG_F25, -1, "F25"},
31422 {54, mips.REG_F26, -1, "F26"},
31423 {55, mips.REG_F27, -1, "F27"},
31424 {56, mips.REG_F28, -1, "F28"},
31425 {57, mips.REG_F29, -1, "F29"},
31426 {58, mips.REG_F30, -1, "F30"},
31427 {59, mips.REG_F31, -1, "F31"},
31428 {60, mips.REG_HI, -1, "HI"},
31429 {61, mips.REG_LO, -1, "LO"},
31430 {62, 0, -1, "SB"},
31431 }
31432 var gpRegMaskMIPS64 = regMask(167772158)
31433 var fpRegMaskMIPS64 = regMask(1152921504338411520)
31434 var specialRegMaskMIPS64 = regMask(3458764513820540928)
31435 var framepointerRegMIPS64 = int8(-1)
31436 var linkRegMIPS64 = int8(27)
31437 var registersPPC64 = [...]Register{
31438 {0, ppc64.REG_R0, -1, "R0"},
31439 {1, ppc64.REGSP, -1, "SP"},
31440 {2, 0, -1, "SB"},
31441 {3, ppc64.REG_R3, 0, "R3"},
31442 {4, ppc64.REG_R4, 1, "R4"},
31443 {5, ppc64.REG_R5, 2, "R5"},
31444 {6, ppc64.REG_R6, 3, "R6"},
31445 {7, ppc64.REG_R7, 4, "R7"},
31446 {8, ppc64.REG_R8, 5, "R8"},
31447 {9, ppc64.REG_R9, 6, "R9"},
31448 {10, ppc64.REG_R10, 7, "R10"},
31449 {11, ppc64.REG_R11, 8, "R11"},
31450 {12, ppc64.REG_R12, 9, "R12"},
31451 {13, ppc64.REG_R13, -1, "R13"},
31452 {14, ppc64.REG_R14, 10, "R14"},
31453 {15, ppc64.REG_R15, 11, "R15"},
31454 {16, ppc64.REG_R16, 12, "R16"},
31455 {17, ppc64.REG_R17, 13, "R17"},
31456 {18, ppc64.REG_R18, 14, "R18"},
31457 {19, ppc64.REG_R19, 15, "R19"},
31458 {20, ppc64.REG_R20, 16, "R20"},
31459 {21, ppc64.REG_R21, 17, "R21"},
31460 {22, ppc64.REG_R22, 18, "R22"},
31461 {23, ppc64.REG_R23, 19, "R23"},
31462 {24, ppc64.REG_R24, 20, "R24"},
31463 {25, ppc64.REG_R25, 21, "R25"},
31464 {26, ppc64.REG_R26, 22, "R26"},
31465 {27, ppc64.REG_R27, 23, "R27"},
31466 {28, ppc64.REG_R28, 24, "R28"},
31467 {29, ppc64.REG_R29, 25, "R29"},
31468 {30, ppc64.REGG, -1, "g"},
31469 {31, ppc64.REG_R31, -1, "R31"},
31470 {32, ppc64.REG_F0, -1, "F0"},
31471 {33, ppc64.REG_F1, -1, "F1"},
31472 {34, ppc64.REG_F2, -1, "F2"},
31473 {35, ppc64.REG_F3, -1, "F3"},
31474 {36, ppc64.REG_F4, -1, "F4"},
31475 {37, ppc64.REG_F5, -1, "F5"},
31476 {38, ppc64.REG_F6, -1, "F6"},
31477 {39, ppc64.REG_F7, -1, "F7"},
31478 {40, ppc64.REG_F8, -1, "F8"},
31479 {41, ppc64.REG_F9, -1, "F9"},
31480 {42, ppc64.REG_F10, -1, "F10"},
31481 {43, ppc64.REG_F11, -1, "F11"},
31482 {44, ppc64.REG_F12, -1, "F12"},
31483 {45, ppc64.REG_F13, -1, "F13"},
31484 {46, ppc64.REG_F14, -1, "F14"},
31485 {47, ppc64.REG_F15, -1, "F15"},
31486 {48, ppc64.REG_F16, -1, "F16"},
31487 {49, ppc64.REG_F17, -1, "F17"},
31488 {50, ppc64.REG_F18, -1, "F18"},
31489 {51, ppc64.REG_F19, -1, "F19"},
31490 {52, ppc64.REG_F20, -1, "F20"},
31491 {53, ppc64.REG_F21, -1, "F21"},
31492 {54, ppc64.REG_F22, -1, "F22"},
31493 {55, ppc64.REG_F23, -1, "F23"},
31494 {56, ppc64.REG_F24, -1, "F24"},
31495 {57, ppc64.REG_F25, -1, "F25"},
31496 {58, ppc64.REG_F26, -1, "F26"},
31497 {59, ppc64.REG_F27, -1, "F27"},
31498 {60, ppc64.REG_F28, -1, "F28"},
31499 {61, ppc64.REG_F29, -1, "F29"},
31500 {62, ppc64.REG_F30, -1, "F30"},
31501 {63, ppc64.REG_F31, -1, "F31"},
31502 }
31503 var gpRegMaskPPC64 = regMask(1073733624)
31504 var fpRegMaskPPC64 = regMask(576460743713488896)
31505 var specialRegMaskPPC64 = regMask(0)
31506 var framepointerRegPPC64 = int8(1)
31507 var linkRegPPC64 = int8(-1)
31508 var registersS390X = [...]Register{
31509 {0, s390x.REG_R0, 0, "R0"},
31510 {1, s390x.REG_R1, 1, "R1"},
31511 {2, s390x.REG_R2, 2, "R2"},
31512 {3, s390x.REG_R3, 3, "R3"},
31513 {4, s390x.REG_R4, 4, "R4"},
31514 {5, s390x.REG_R5, 5, "R5"},
31515 {6, s390x.REG_R6, 6, "R6"},
31516 {7, s390x.REG_R7, 7, "R7"},
31517 {8, s390x.REG_R8, 8, "R8"},
31518 {9, s390x.REG_R9, 9, "R9"},
31519 {10, s390x.REG_R10, -1, "R10"},
31520 {11, s390x.REG_R11, 10, "R11"},
31521 {12, s390x.REG_R12, 11, "R12"},
31522 {13, s390x.REGG, -1, "g"},
31523 {14, s390x.REG_R14, 12, "R14"},
31524 {15, s390x.REGSP, -1, "SP"},
31525 {16, s390x.REG_F0, -1, "F0"},
31526 {17, s390x.REG_F1, -1, "F1"},
31527 {18, s390x.REG_F2, -1, "F2"},
31528 {19, s390x.REG_F3, -1, "F3"},
31529 {20, s390x.REG_F4, -1, "F4"},
31530 {21, s390x.REG_F5, -1, "F5"},
31531 {22, s390x.REG_F6, -1, "F6"},
31532 {23, s390x.REG_F7, -1, "F7"},
31533 {24, s390x.REG_F8, -1, "F8"},
31534 {25, s390x.REG_F9, -1, "F9"},
31535 {26, s390x.REG_F10, -1, "F10"},
31536 {27, s390x.REG_F11, -1, "F11"},
31537 {28, s390x.REG_F12, -1, "F12"},
31538 {29, s390x.REG_F13, -1, "F13"},
31539 {30, s390x.REG_F14, -1, "F14"},
31540 {31, s390x.REG_F15, -1, "F15"},
31541 {32, 0, -1, "SB"},
31542 }
31543 var gpRegMaskS390X = regMask(23551)
31544 var fpRegMaskS390X = regMask(4294901760)
31545 var specialRegMaskS390X = regMask(0)
31546 var framepointerRegS390X = int8(-1)
31547 var linkRegS390X = int8(14)
31548 var registersWasm = [...]Register{
31549 {0, wasm.REG_R0, 0, "R0"},
31550 {1, wasm.REG_R1, 1, "R1"},
31551 {2, wasm.REG_R2, 2, "R2"},
31552 {3, wasm.REG_R3, 3, "R3"},
31553 {4, wasm.REG_R4, 4, "R4"},
31554 {5, wasm.REG_R5, 5, "R5"},
31555 {6, wasm.REG_R6, 6, "R6"},
31556 {7, wasm.REG_R7, 7, "R7"},
31557 {8, wasm.REG_R8, 8, "R8"},
31558 {9, wasm.REG_R9, 9, "R9"},
31559 {10, wasm.REG_R10, 10, "R10"},
31560 {11, wasm.REG_R11, 11, "R11"},
31561 {12, wasm.REG_R12, 12, "R12"},
31562 {13, wasm.REG_R13, 13, "R13"},
31563 {14, wasm.REG_R14, 14, "R14"},
31564 {15, wasm.REG_R15, 15, "R15"},
31565 {16, wasm.REG_F0, -1, "F0"},
31566 {17, wasm.REG_F1, -1, "F1"},
31567 {18, wasm.REG_F2, -1, "F2"},
31568 {19, wasm.REG_F3, -1, "F3"},
31569 {20, wasm.REG_F4, -1, "F4"},
31570 {21, wasm.REG_F5, -1, "F5"},
31571 {22, wasm.REG_F6, -1, "F6"},
31572 {23, wasm.REG_F7, -1, "F7"},
31573 {24, wasm.REG_F8, -1, "F8"},
31574 {25, wasm.REG_F9, -1, "F9"},
31575 {26, wasm.REG_F10, -1, "F10"},
31576 {27, wasm.REG_F11, -1, "F11"},
31577 {28, wasm.REG_F12, -1, "F12"},
31578 {29, wasm.REG_F13, -1, "F13"},
31579 {30, wasm.REG_F14, -1, "F14"},
31580 {31, wasm.REG_F15, -1, "F15"},
31581 {32, wasm.REGSP, -1, "SP"},
31582 {33, wasm.REGG, -1, "g"},
31583 {34, 0, -1, "SB"},
31584 }
31585 var gpRegMaskWasm = regMask(65535)
31586 var fpRegMaskWasm = regMask(4294901760)
31587 var specialRegMaskWasm = regMask(0)
31588 var framepointerRegWasm = int8(-1)
31589 var linkRegWasm = int8(-1)
31590
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